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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f | FileCheck %s3 4declare <16 x float> @llvm.x86.avx512.mask.vfmadd.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)5declare <8 x double> @llvm.x86.avx512.mask.vfmadd.pd.512(<8 x double>, <8 x double>, <8 x double>, i8, i32)6 7define <16 x float> @test_x86_vfnmadd_ps_z(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {8; CHECK-LABEL: test_x86_vfnmadd_ps_z:9; CHECK: ## %bb.0:10; CHECK-NEXT: vfnmadd213ps {{.*#+}} zmm0 = -(zmm1 * zmm0) + zmm211; CHECK-NEXT: retq12 %res = call <16 x float> @llvm.x86.avx512.mask.vfnmadd.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 -1, i32 4) nounwind13 ret <16 x float> %res14}15declare <16 x float> @llvm.x86.avx512.mask.vfnmadd.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32) nounwind readnone16 17define <16 x float> @test_mask_vfnmadd_ps(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 %mask) {18; CHECK-LABEL: test_mask_vfnmadd_ps:19; CHECK: ## %bb.0:20; CHECK-NEXT: kmovw %edi, %k121; CHECK-NEXT: vfnmadd132ps {{.*#+}} zmm0 {%k1} = -(zmm0 * zmm1) + zmm222; CHECK-NEXT: retq23 %res = call <16 x float> @llvm.x86.avx512.mask.vfnmadd.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 %mask, i32 4) nounwind24 ret <16 x float> %res25}26 27define <8 x double> @test_x86_vfnmadd_pd_z(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {28; CHECK-LABEL: test_x86_vfnmadd_pd_z:29; CHECK: ## %bb.0:30; CHECK-NEXT: vfnmadd213pd {{.*#+}} zmm0 = -(zmm1 * zmm0) + zmm231; CHECK-NEXT: retq32 %res = call <8 x double> @llvm.x86.avx512.mask.vfnmadd.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 -1, i32 4) nounwind33 ret <8 x double> %res34}35declare <8 x double> @llvm.x86.avx512.mask.vfnmadd.pd.512(<8 x double>, <8 x double>, <8 x double>, i8, i32) nounwind readnone36 37define <8 x double> @test_mask_vfnmadd_pd(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask) {38; CHECK-LABEL: test_mask_vfnmadd_pd:39; CHECK: ## %bb.0:40; CHECK-NEXT: kmovw %edi, %k141; CHECK-NEXT: vfnmadd132pd {{.*#+}} zmm0 {%k1} = -(zmm0 * zmm1) + zmm242; CHECK-NEXT: retq43 %res = call <8 x double> @llvm.x86.avx512.mask.vfnmadd.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask, i32 4) nounwind44 ret <8 x double> %res45}46 47define <16 x float> @test_x86_vfnmsubps_z(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {48; CHECK-LABEL: test_x86_vfnmsubps_z:49; CHECK: ## %bb.0:50; CHECK-NEXT: vfnmsub213ps {{.*#+}} zmm0 = -(zmm1 * zmm0) - zmm251; CHECK-NEXT: retq52 %res = call <16 x float> @llvm.x86.avx512.mask.vfnmsub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 -1, i32 4) nounwind53 ret <16 x float> %res54}55declare <16 x float> @llvm.x86.avx512.mask.vfnmsub.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32) nounwind readnone56 57define <16 x float> @test_mask_vfnmsub_ps(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 %mask) {58; CHECK-LABEL: test_mask_vfnmsub_ps:59; CHECK: ## %bb.0:60; CHECK-NEXT: kmovw %edi, %k161; CHECK-NEXT: vfnmsub132ps {{.*#+}} zmm0 {%k1} = -(zmm0 * zmm1) - zmm262; CHECK-NEXT: retq63 %res = call <16 x float> @llvm.x86.avx512.mask.vfnmsub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 %mask, i32 4) nounwind64 ret <16 x float> %res65}66 67define <8 x double> @test_x86_vfnmsubpd_z(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {68; CHECK-LABEL: test_x86_vfnmsubpd_z:69; CHECK: ## %bb.0:70; CHECK-NEXT: vfnmsub213pd {{.*#+}} zmm0 = -(zmm1 * zmm0) - zmm271; CHECK-NEXT: retq72 %res = call <8 x double> @llvm.x86.avx512.mask.vfnmsub.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 -1, i32 4) nounwind73 ret <8 x double> %res74}75declare <8 x double> @llvm.x86.avx512.mask.vfnmsub.pd.512(<8 x double>, <8 x double>, <8 x double>, i8, i32) nounwind readnone76 77define <8 x double> @test_mask_vfnmsub_pd(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask) {78; CHECK-LABEL: test_mask_vfnmsub_pd:79; CHECK: ## %bb.0:80; CHECK-NEXT: kmovw %edi, %k181; CHECK-NEXT: vfnmsub132pd {{.*#+}} zmm0 {%k1} = -(zmm0 * zmm1) - zmm282; CHECK-NEXT: retq83 %res = call <8 x double> @llvm.x86.avx512.mask.vfnmsub.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask, i32 4) nounwind84 ret <8 x double> %res85}86 87define <16 x float> @test_x86_vfmaddsubps_z(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {88; CHECK-LABEL: test_x86_vfmaddsubps_z:89; CHECK: ## %bb.0:90; CHECK-NEXT: vfmaddsub213ps {{.*#+}} zmm0 = (zmm1 * zmm0) +/- zmm291; CHECK-NEXT: retq92 %res = call <16 x float> @llvm.x86.avx512.mask.vfmaddsub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 -1, i32 4) nounwind93 ret <16 x float> %res94}95 96define <16 x float> @test_mask_fmaddsub_ps(<16 x float> %a, <16 x float> %b, <16 x float> %c, i16 %mask) {97; CHECK-LABEL: test_mask_fmaddsub_ps:98; CHECK: ## %bb.0:99; CHECK-NEXT: kmovw %edi, %k1100; CHECK-NEXT: vfmaddsub132ps {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) +/- zmm2101; CHECK-NEXT: retq102 %res = call <16 x float> @llvm.x86.avx512.mask.vfmaddsub.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %c, i16 %mask, i32 4)103 ret <16 x float> %res104}105 106declare <16 x float> @llvm.x86.avx512.mask.vfmaddsub.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32) nounwind readnone107 108define <8 x double> @test_x86_vfmaddsubpd_z(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {109; CHECK-LABEL: test_x86_vfmaddsubpd_z:110; CHECK: ## %bb.0:111; CHECK-NEXT: vfmaddsub213pd {{.*#+}} zmm0 = (zmm1 * zmm0) +/- zmm2112; CHECK-NEXT: retq113 %res = call <8 x double> @llvm.x86.avx512.mask.vfmaddsub.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 -1, i32 4) nounwind114 ret <8 x double> %res115}116declare <8 x double> @llvm.x86.avx512.mask.vfmaddsub.pd.512(<8 x double>, <8 x double>, <8 x double>, i8, i32) nounwind readnone117 118define <8 x double> @test_mask_vfmaddsub_pd(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask) {119; CHECK-LABEL: test_mask_vfmaddsub_pd:120; CHECK: ## %bb.0:121; CHECK-NEXT: kmovw %edi, %k1122; CHECK-NEXT: vfmaddsub132pd {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) +/- zmm2123; CHECK-NEXT: retq124 %res = call <8 x double> @llvm.x86.avx512.mask.vfmaddsub.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask, i32 4) nounwind125 ret <8 x double> %res126}127 128define <8 x double>@test_int_x86_avx512_mask_vfmaddsub_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3){129; CHECK-LABEL: test_int_x86_avx512_mask_vfmaddsub_pd_512:130; CHECK: ## %bb.0:131; CHECK-NEXT: kmovw %edi, %k1132; CHECK-NEXT: vfmaddsub132pd {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) +/- zmm2133; CHECK-NEXT: retq134 %res = call <8 x double> @llvm.x86.avx512.mask.vfmaddsub.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3, i32 4)135 ret <8 x double> %res136}137 138declare <8 x double> @llvm.x86.avx512.mask3.vfmaddsub.pd.512(<8 x double>, <8 x double>, <8 x double>, i8, i32)139 140define <8 x double>@test_int_x86_avx512_mask3_vfmaddsub_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3){141; CHECK-LABEL: test_int_x86_avx512_mask3_vfmaddsub_pd_512:142; CHECK: ## %bb.0:143; CHECK-NEXT: kmovw %edi, %k1144; CHECK-NEXT: vfmaddsub231pd {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) +/- zmm2145; CHECK-NEXT: vmovapd %zmm2, %zmm0146; CHECK-NEXT: retq147 %res = call <8 x double> @llvm.x86.avx512.mask3.vfmaddsub.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3, i32 4)148 ret <8 x double> %res149}150 151declare <8 x double> @llvm.x86.avx512.maskz.vfmaddsub.pd.512(<8 x double>, <8 x double>, <8 x double>, i8, i32)152 153define <8 x double>@test_int_x86_avx512_maskz_vfmaddsub_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3){154; CHECK-LABEL: test_int_x86_avx512_maskz_vfmaddsub_pd_512:155; CHECK: ## %bb.0:156; CHECK-NEXT: kmovw %edi, %k1157; CHECK-NEXT: vfmaddsub213pd {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) +/- zmm2158; CHECK-NEXT: retq159 %res = call <8 x double> @llvm.x86.avx512.maskz.vfmaddsub.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3, i32 4)160 ret <8 x double> %res161}162 163define <16 x float>@test_int_x86_avx512_mask_vfmaddsub_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){164; CHECK-LABEL: test_int_x86_avx512_mask_vfmaddsub_ps_512:165; CHECK: ## %bb.0:166; CHECK-NEXT: kmovw %edi, %k1167; CHECK-NEXT: vfmaddsub132ps {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) +/- zmm2168; CHECK-NEXT: retq169 %res = call <16 x float> @llvm.x86.avx512.mask.vfmaddsub.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 4)170 ret <16 x float> %res171}172 173declare <16 x float> @llvm.x86.avx512.mask3.vfmaddsub.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)174 175define <16 x float>@test_int_x86_avx512_mask3_vfmaddsub_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){176; CHECK-LABEL: test_int_x86_avx512_mask3_vfmaddsub_ps_512:177; CHECK: ## %bb.0:178; CHECK-NEXT: kmovw %edi, %k1179; CHECK-NEXT: vfmaddsub231ps {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) +/- zmm2180; CHECK-NEXT: vmovaps %zmm2, %zmm0181; CHECK-NEXT: retq182 %res = call <16 x float> @llvm.x86.avx512.mask3.vfmaddsub.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 4)183 ret <16 x float> %res184}185 186declare <16 x float> @llvm.x86.avx512.maskz.vfmaddsub.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)187 188define <16 x float>@test_int_x86_avx512_maskz_vfmaddsub_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){189; CHECK-LABEL: test_int_x86_avx512_maskz_vfmaddsub_ps_512:190; CHECK: ## %bb.0:191; CHECK-NEXT: kmovw %edi, %k1192; CHECK-NEXT: vfmaddsub213ps {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) +/- zmm2193; CHECK-NEXT: retq194 %res = call <16 x float> @llvm.x86.avx512.maskz.vfmaddsub.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 4)195 ret <16 x float> %res196}197 198declare <8 x double> @llvm.x86.avx512.mask3.vfmsubadd.pd.512(<8 x double>, <8 x double>, <8 x double>, i8, i32)199 200define <8 x double>@test_int_x86_avx512_mask3_vfmsubadd_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3){201; CHECK-LABEL: test_int_x86_avx512_mask3_vfmsubadd_pd_512:202; CHECK: ## %bb.0:203; CHECK-NEXT: kmovw %edi, %k1204; CHECK-NEXT: vfmsubadd231pd {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) -/+ zmm2205; CHECK-NEXT: vmovapd %zmm2, %zmm0206; CHECK-NEXT: retq207 %res = call <8 x double> @llvm.x86.avx512.mask3.vfmsubadd.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3, i32 4)208 ret <8 x double> %res209}210 211declare <16 x float> @llvm.x86.avx512.mask3.vfmsubadd.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)212 213define <16 x float>@test_int_x86_avx512_mask3_vfmsubadd_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){214; CHECK-LABEL: test_int_x86_avx512_mask3_vfmsubadd_ps_512:215; CHECK: ## %bb.0:216; CHECK-NEXT: kmovw %edi, %k1217; CHECK-NEXT: vfmsubadd231ps {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) -/+ zmm2218; CHECK-NEXT: vmovaps %zmm2, %zmm0219; CHECK-NEXT: retq220 %res = call <16 x float> @llvm.x86.avx512.mask3.vfmsubadd.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 4)221 ret <16 x float> %res222}223 224define <16 x float> @test_mask_round_vfmadd512_ps_rrb_rne(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 %mask) {225; CHECK-LABEL: test_mask_round_vfmadd512_ps_rrb_rne:226; CHECK: ## %bb.0:227; CHECK-NEXT: kmovw %edi, %k1228; CHECK-NEXT: vfmadd132ps {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}229; CHECK-NEXT: retq230 %res = call <16 x float> @llvm.x86.avx512.mask.vfmadd.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 %mask, i32 8) nounwind231 ret <16 x float> %res232}233 234define <16 x float> @test_mask_round_vfmadd512_ps_rrb_rtn(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 %mask) {235; CHECK-LABEL: test_mask_round_vfmadd512_ps_rrb_rtn:236; CHECK: ## %bb.0:237; CHECK-NEXT: kmovw %edi, %k1238; CHECK-NEXT: vfmadd132ps {rd-sae}, %zmm1, %zmm2, %zmm0 {%k1}239; CHECK-NEXT: retq240 %res = call <16 x float> @llvm.x86.avx512.mask.vfmadd.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 %mask, i32 9) nounwind241 ret <16 x float> %res242}243 244define <16 x float> @test_mask_round_vfmadd512_ps_rrb_rtp(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 %mask) {245; CHECK-LABEL: test_mask_round_vfmadd512_ps_rrb_rtp:246; CHECK: ## %bb.0:247; CHECK-NEXT: kmovw %edi, %k1248; CHECK-NEXT: vfmadd132ps {ru-sae}, %zmm1, %zmm2, %zmm0 {%k1}249; CHECK-NEXT: retq250 %res = call <16 x float> @llvm.x86.avx512.mask.vfmadd.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 %mask, i32 10) nounwind251 ret <16 x float> %res252}253 254define <16 x float> @test_mask_round_vfmadd512_ps_rrb_rtz(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 %mask) {255; CHECK-LABEL: test_mask_round_vfmadd512_ps_rrb_rtz:256; CHECK: ## %bb.0:257; CHECK-NEXT: kmovw %edi, %k1258; CHECK-NEXT: vfmadd132ps {rz-sae}, %zmm1, %zmm2, %zmm0 {%k1}259; CHECK-NEXT: retq260 %res = call <16 x float> @llvm.x86.avx512.mask.vfmadd.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 %mask, i32 11) nounwind261 ret <16 x float> %res262}263 264define <16 x float> @test_mask_round_vfmadd512_ps_rrb_current(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 %mask) {265; CHECK-LABEL: test_mask_round_vfmadd512_ps_rrb_current:266; CHECK: ## %bb.0:267; CHECK-NEXT: kmovw %edi, %k1268; CHECK-NEXT: vfmadd132ps {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) + zmm2269; CHECK-NEXT: retq270 %res = call <16 x float> @llvm.x86.avx512.mask.vfmadd.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 %mask, i32 4) nounwind271 ret <16 x float> %res272}273 274define <16 x float> @test_mask_round_vfmadd512_ps_rrbz_rne(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {275; CHECK-LABEL: test_mask_round_vfmadd512_ps_rrbz_rne:276; CHECK: ## %bb.0:277; CHECK-NEXT: vfmadd213ps {rn-sae}, %zmm2, %zmm1, %zmm0278; CHECK-NEXT: retq279 %res = call <16 x float> @llvm.x86.avx512.mask.vfmadd.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 -1, i32 8) nounwind280 ret <16 x float> %res281}282 283define <16 x float> @test_mask_round_vfmadd512_ps_rrbz_rtn(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {284; CHECK-LABEL: test_mask_round_vfmadd512_ps_rrbz_rtn:285; CHECK: ## %bb.0:286; CHECK-NEXT: vfmadd213ps {rd-sae}, %zmm2, %zmm1, %zmm0287; CHECK-NEXT: retq288 %res = call <16 x float> @llvm.x86.avx512.mask.vfmadd.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 -1, i32 9) nounwind289 ret <16 x float> %res290}291 292define <16 x float> @test_mask_round_vfmadd512_ps_rrbz_rtp(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {293; CHECK-LABEL: test_mask_round_vfmadd512_ps_rrbz_rtp:294; CHECK: ## %bb.0:295; CHECK-NEXT: vfmadd213ps {ru-sae}, %zmm2, %zmm1, %zmm0296; CHECK-NEXT: retq297 %res = call <16 x float> @llvm.x86.avx512.mask.vfmadd.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 -1, i32 10) nounwind298 ret <16 x float> %res299}300 301define <16 x float> @test_mask_round_vfmadd512_ps_rrbz_rtz(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {302; CHECK-LABEL: test_mask_round_vfmadd512_ps_rrbz_rtz:303; CHECK: ## %bb.0:304; CHECK-NEXT: vfmadd213ps {rz-sae}, %zmm2, %zmm1, %zmm0305; CHECK-NEXT: retq306 %res = call <16 x float> @llvm.x86.avx512.mask.vfmadd.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 -1, i32 11) nounwind307 ret <16 x float> %res308}309 310define <16 x float> @test_mask_round_vfmadd512_ps_rrbz_current(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {311; CHECK-LABEL: test_mask_round_vfmadd512_ps_rrbz_current:312; CHECK: ## %bb.0:313; CHECK-NEXT: vfmadd213ps {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm2314; CHECK-NEXT: retq315 %res = call <16 x float> @llvm.x86.avx512.mask.vfmadd.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2, i16 -1, i32 4) nounwind316 ret <16 x float> %res317}318 319declare <8 x double> @llvm.x86.avx512.mask3.vfmsub.pd.512(<8 x double>, <8 x double>, <8 x double>, i8, i32)320 321define <8 x double>@test_int_x86_avx512_mask3_vfmsub_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3){322; CHECK-LABEL: test_int_x86_avx512_mask3_vfmsub_pd_512:323; CHECK: ## %bb.0:324; CHECK-NEXT: kmovw %edi, %k1325; CHECK-NEXT: vfmsub231pd {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) - zmm2326; CHECK-NEXT: vmovapd %zmm2, %zmm0327; CHECK-NEXT: retq328 %res = call <8 x double> @llvm.x86.avx512.mask3.vfmsub.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3, i32 4)329 ret <8 x double> %res330}331 332declare <16 x float> @llvm.x86.avx512.mask3.vfmsub.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)333 334define <16 x float>@test_int_x86_avx512_mask3_vfmsub_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){335; CHECK-LABEL: test_int_x86_avx512_mask3_vfmsub_ps_512:336; CHECK: ## %bb.0:337; CHECK-NEXT: kmovw %edi, %k1338; CHECK-NEXT: vfmsub231ps {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) - zmm2339; CHECK-NEXT: vmovaps %zmm2, %zmm0340; CHECK-NEXT: retq341 %res = call <16 x float> @llvm.x86.avx512.mask3.vfmsub.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 4)342 ret <16 x float> %res343}344 345define <8 x double> @test_mask_round_vfmadd512_pd_rrb_rne(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask) {346; CHECK-LABEL: test_mask_round_vfmadd512_pd_rrb_rne:347; CHECK: ## %bb.0:348; CHECK-NEXT: kmovw %edi, %k1349; CHECK-NEXT: vfmadd132pd {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}350; CHECK-NEXT: retq351 %res = call <8 x double> @llvm.x86.avx512.mask.vfmadd.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask, i32 8) nounwind352 ret <8 x double> %res353}354 355define <8 x double> @test_mask_round_vfmadd512_pd_rrb_rtn(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask) {356; CHECK-LABEL: test_mask_round_vfmadd512_pd_rrb_rtn:357; CHECK: ## %bb.0:358; CHECK-NEXT: kmovw %edi, %k1359; CHECK-NEXT: vfmadd132pd {rd-sae}, %zmm1, %zmm2, %zmm0 {%k1}360; CHECK-NEXT: retq361 %res = call <8 x double> @llvm.x86.avx512.mask.vfmadd.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask, i32 9) nounwind362 ret <8 x double> %res363}364 365define <8 x double> @test_mask_round_vfmadd512_pd_rrb_rtp(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask) {366; CHECK-LABEL: test_mask_round_vfmadd512_pd_rrb_rtp:367; CHECK: ## %bb.0:368; CHECK-NEXT: kmovw %edi, %k1369; CHECK-NEXT: vfmadd132pd {ru-sae}, %zmm1, %zmm2, %zmm0 {%k1}370; CHECK-NEXT: retq371 %res = call <8 x double> @llvm.x86.avx512.mask.vfmadd.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask, i32 10) nounwind372 ret <8 x double> %res373}374 375define <8 x double> @test_mask_round_vfmadd512_pd_rrb_rtz(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask) {376; CHECK-LABEL: test_mask_round_vfmadd512_pd_rrb_rtz:377; CHECK: ## %bb.0:378; CHECK-NEXT: kmovw %edi, %k1379; CHECK-NEXT: vfmadd132pd {rz-sae}, %zmm1, %zmm2, %zmm0 {%k1}380; CHECK-NEXT: retq381 %res = call <8 x double> @llvm.x86.avx512.mask.vfmadd.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask, i32 11) nounwind382 ret <8 x double> %res383}384 385define <8 x double> @test_mask_round_vfmadd512_pd_rrb_current(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask) {386; CHECK-LABEL: test_mask_round_vfmadd512_pd_rrb_current:387; CHECK: ## %bb.0:388; CHECK-NEXT: kmovw %edi, %k1389; CHECK-NEXT: vfmadd132pd {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) + zmm2390; CHECK-NEXT: retq391 %res = call <8 x double> @llvm.x86.avx512.mask.vfmadd.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask, i32 4) nounwind392 ret <8 x double> %res393}394 395define <8 x double> @test_mask_round_vfmadd512_pd_rrbz_rne(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {396; CHECK-LABEL: test_mask_round_vfmadd512_pd_rrbz_rne:397; CHECK: ## %bb.0:398; CHECK-NEXT: vfmadd213pd {rn-sae}, %zmm2, %zmm1, %zmm0399; CHECK-NEXT: retq400 %res = call <8 x double> @llvm.x86.avx512.mask.vfmadd.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 -1, i32 8) nounwind401 ret <8 x double> %res402}403 404define <8 x double> @test_mask_round_vfmadd512_pd_rrbz_rtn(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {405; CHECK-LABEL: test_mask_round_vfmadd512_pd_rrbz_rtn:406; CHECK: ## %bb.0:407; CHECK-NEXT: vfmadd213pd {rd-sae}, %zmm2, %zmm1, %zmm0408; CHECK-NEXT: retq409 %res = call <8 x double> @llvm.x86.avx512.mask.vfmadd.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 -1, i32 9) nounwind410 ret <8 x double> %res411}412 413define <8 x double> @test_mask_round_vfmadd512_pd_rrbz_rtp(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {414; CHECK-LABEL: test_mask_round_vfmadd512_pd_rrbz_rtp:415; CHECK: ## %bb.0:416; CHECK-NEXT: vfmadd213pd {ru-sae}, %zmm2, %zmm1, %zmm0417; CHECK-NEXT: retq418 %res = call <8 x double> @llvm.x86.avx512.mask.vfmadd.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 -1, i32 10) nounwind419 ret <8 x double> %res420}421 422define <8 x double> @test_mask_round_vfmadd512_pd_rrbz_rtz(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {423; CHECK-LABEL: test_mask_round_vfmadd512_pd_rrbz_rtz:424; CHECK: ## %bb.0:425; CHECK-NEXT: vfmadd213pd {rz-sae}, %zmm2, %zmm1, %zmm0426; CHECK-NEXT: retq427 %res = call <8 x double> @llvm.x86.avx512.mask.vfmadd.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 -1, i32 11) nounwind428 ret <8 x double> %res429}430 431define <8 x double> @test_mask_round_vfmadd512_pd_rrbz_current(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {432; CHECK-LABEL: test_mask_round_vfmadd512_pd_rrbz_current:433; CHECK: ## %bb.0:434; CHECK-NEXT: vfmadd213pd {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm2435; CHECK-NEXT: retq436 %res = call <8 x double> @llvm.x86.avx512.mask.vfmadd.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 -1, i32 4) nounwind437 ret <8 x double> %res438}439 440define <8 x double>@test_int_x86_avx512_mask_vfmadd_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3){441; CHECK-LABEL: test_int_x86_avx512_mask_vfmadd_pd_512:442; CHECK: ## %bb.0:443; CHECK-NEXT: kmovw %edi, %k1444; CHECK-NEXT: vfmadd132pd {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) + zmm2445; CHECK-NEXT: retq446 %res = call <8 x double> @llvm.x86.avx512.mask.vfmadd.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3, i32 4)447 ret <8 x double> %res448}449 450declare <8 x double> @llvm.x86.avx512.mask3.vfmadd.pd.512(<8 x double>, <8 x double>, <8 x double>, i8, i32)451 452define <8 x double>@test_int_x86_avx512_mask3_vfmadd_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3){453; CHECK-LABEL: test_int_x86_avx512_mask3_vfmadd_pd_512:454; CHECK: ## %bb.0:455; CHECK-NEXT: kmovw %edi, %k1456; CHECK-NEXT: vfmadd231pd {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) + zmm2457; CHECK-NEXT: vmovapd %zmm2, %zmm0458; CHECK-NEXT: retq459 %res = call <8 x double> @llvm.x86.avx512.mask3.vfmadd.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3, i32 4)460 ret <8 x double> %res461}462 463declare <8 x double> @llvm.x86.avx512.maskz.vfmadd.pd.512(<8 x double>, <8 x double>, <8 x double>, i8, i32)464 465define <8 x double>@test_int_x86_avx512_maskz_vfmadd_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3){466; CHECK-LABEL: test_int_x86_avx512_maskz_vfmadd_pd_512:467; CHECK: ## %bb.0:468; CHECK-NEXT: kmovw %edi, %k1469; CHECK-NEXT: vfmadd213pd {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) + zmm2470; CHECK-NEXT: retq471 %res = call <8 x double> @llvm.x86.avx512.maskz.vfmadd.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3, i32 4)472 ret <8 x double> %res473}474 475define <16 x float>@test_int_x86_avx512_mask_vfmadd_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){476; CHECK-LABEL: test_int_x86_avx512_mask_vfmadd_ps_512:477; CHECK: ## %bb.0:478; CHECK-NEXT: kmovw %edi, %k1479; CHECK-NEXT: vfmadd132ps {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) + zmm2480; CHECK-NEXT: retq481 %res = call <16 x float> @llvm.x86.avx512.mask.vfmadd.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 4)482 ret <16 x float> %res483}484 485declare <16 x float> @llvm.x86.avx512.mask3.vfmadd.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)486 487define <16 x float>@test_int_x86_avx512_mask3_vfmadd_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){488; CHECK-LABEL: test_int_x86_avx512_mask3_vfmadd_ps_512:489; CHECK: ## %bb.0:490; CHECK-NEXT: kmovw %edi, %k1491; CHECK-NEXT: vfmadd231ps {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) + zmm2492; CHECK-NEXT: vmovaps %zmm2, %zmm0493; CHECK-NEXT: retq494 %res = call <16 x float> @llvm.x86.avx512.mask3.vfmadd.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 4)495 ret <16 x float> %res496}497 498declare <16 x float> @llvm.x86.avx512.maskz.vfmadd.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)499 500define <16 x float>@test_int_x86_avx512_maskz_vfmadd_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){501; CHECK-LABEL: test_int_x86_avx512_maskz_vfmadd_ps_512:502; CHECK: ## %bb.0:503; CHECK-NEXT: kmovw %edi, %k1504; CHECK-NEXT: vfmadd213ps {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) + zmm2505; CHECK-NEXT: retq506 %res = call <16 x float> @llvm.x86.avx512.maskz.vfmadd.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 4)507 ret <16 x float> %res508}509 510 511define <8 x double> @test_mask_round_vfnmsub512_pd_rrb_rne(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask) {512; CHECK-LABEL: test_mask_round_vfnmsub512_pd_rrb_rne:513; CHECK: ## %bb.0:514; CHECK-NEXT: kmovw %edi, %k1515; CHECK-NEXT: vfnmsub132pd {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}516; CHECK-NEXT: retq517 %res = call <8 x double> @llvm.x86.avx512.mask.vfnmsub.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask, i32 8) nounwind518 ret <8 x double> %res519}520 521define <8 x double> @test_mask_round_vfnmsub512_pd_rrb_rtn(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask) {522; CHECK-LABEL: test_mask_round_vfnmsub512_pd_rrb_rtn:523; CHECK: ## %bb.0:524; CHECK-NEXT: kmovw %edi, %k1525; CHECK-NEXT: vfnmsub132pd {rd-sae}, %zmm1, %zmm2, %zmm0 {%k1}526; CHECK-NEXT: retq527 %res = call <8 x double> @llvm.x86.avx512.mask.vfnmsub.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask, i32 9) nounwind528 ret <8 x double> %res529}530 531define <8 x double> @test_mask_round_vfnmsub512_pd_rrb_rtp(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask) {532; CHECK-LABEL: test_mask_round_vfnmsub512_pd_rrb_rtp:533; CHECK: ## %bb.0:534; CHECK-NEXT: kmovw %edi, %k1535; CHECK-NEXT: vfnmsub132pd {ru-sae}, %zmm1, %zmm2, %zmm0 {%k1}536; CHECK-NEXT: retq537 %res = call <8 x double> @llvm.x86.avx512.mask.vfnmsub.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask, i32 10) nounwind538 ret <8 x double> %res539}540 541define <8 x double> @test_mask_round_vfnmsub512_pd_rrb_rtz(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask) {542; CHECK-LABEL: test_mask_round_vfnmsub512_pd_rrb_rtz:543; CHECK: ## %bb.0:544; CHECK-NEXT: kmovw %edi, %k1545; CHECK-NEXT: vfnmsub132pd {rz-sae}, %zmm1, %zmm2, %zmm0 {%k1}546; CHECK-NEXT: retq547 %res = call <8 x double> @llvm.x86.avx512.mask.vfnmsub.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask, i32 11) nounwind548 ret <8 x double> %res549}550 551define <8 x double> @test_mask_round_vfnmsub512_pd_rrb_current(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask) {552; CHECK-LABEL: test_mask_round_vfnmsub512_pd_rrb_current:553; CHECK: ## %bb.0:554; CHECK-NEXT: kmovw %edi, %k1555; CHECK-NEXT: vfnmsub132pd {{.*#+}} zmm0 {%k1} = -(zmm0 * zmm1) - zmm2556; CHECK-NEXT: retq557 %res = call <8 x double> @llvm.x86.avx512.mask.vfnmsub.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 %mask, i32 4) nounwind558 ret <8 x double> %res559}560 561define <8 x double> @test_mask_round_vfnmsub512_pd_rrbz_rne(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {562; CHECK-LABEL: test_mask_round_vfnmsub512_pd_rrbz_rne:563; CHECK: ## %bb.0:564; CHECK-NEXT: vfnmsub213pd {rn-sae}, %zmm2, %zmm1, %zmm0565; CHECK-NEXT: retq566 %res = call <8 x double> @llvm.x86.avx512.mask.vfnmsub.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 -1, i32 8) nounwind567 ret <8 x double> %res568}569 570define <8 x double> @test_mask_round_vfnmsub512_pd_rrbz_rtn(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {571; CHECK-LABEL: test_mask_round_vfnmsub512_pd_rrbz_rtn:572; CHECK: ## %bb.0:573; CHECK-NEXT: vfnmsub213pd {rd-sae}, %zmm2, %zmm1, %zmm0574; CHECK-NEXT: retq575 %res = call <8 x double> @llvm.x86.avx512.mask.vfnmsub.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 -1, i32 9) nounwind576 ret <8 x double> %res577}578 579define <8 x double> @test_mask_round_vfnmsub512_pd_rrbz_rtp(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {580; CHECK-LABEL: test_mask_round_vfnmsub512_pd_rrbz_rtp:581; CHECK: ## %bb.0:582; CHECK-NEXT: vfnmsub213pd {ru-sae}, %zmm2, %zmm1, %zmm0583; CHECK-NEXT: retq584 %res = call <8 x double> @llvm.x86.avx512.mask.vfnmsub.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 -1, i32 10) nounwind585 ret <8 x double> %res586}587 588define <8 x double> @test_mask_round_vfnmsub512_pd_rrbz_rtz(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {589; CHECK-LABEL: test_mask_round_vfnmsub512_pd_rrbz_rtz:590; CHECK: ## %bb.0:591; CHECK-NEXT: vfnmsub213pd {rz-sae}, %zmm2, %zmm1, %zmm0592; CHECK-NEXT: retq593 %res = call <8 x double> @llvm.x86.avx512.mask.vfnmsub.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 -1, i32 11) nounwind594 ret <8 x double> %res595}596 597define <8 x double> @test_mask_round_vfnmsub512_pd_rrbz_current(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2) {598; CHECK-LABEL: test_mask_round_vfnmsub512_pd_rrbz_current:599; CHECK: ## %bb.0:600; CHECK-NEXT: vfnmsub213pd {{.*#+}} zmm0 = -(zmm1 * zmm0) - zmm2601; CHECK-NEXT: retq602 %res = call <8 x double> @llvm.x86.avx512.mask.vfnmsub.pd.512(<8 x double> %a0, <8 x double> %a1, <8 x double> %a2, i8 -1, i32 4) nounwind603 ret <8 x double> %res604}605 606define <8 x double>@test_int_x86_avx512_mask_vfnmsub_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3){607; CHECK-LABEL: test_int_x86_avx512_mask_vfnmsub_pd_512:608; CHECK: ## %bb.0:609; CHECK-NEXT: kmovw %edi, %k1610; CHECK-NEXT: vfnmsub132pd {{.*#+}} zmm0 {%k1} = -(zmm0 * zmm1) - zmm2611; CHECK-NEXT: retq612 %res = call <8 x double> @llvm.x86.avx512.mask.vfnmsub.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3, i32 4)613 ret <8 x double> %res614}615 616declare <8 x double> @llvm.x86.avx512.mask3.vfnmsub.pd.512(<8 x double>, <8 x double>, <8 x double>, i8, i32)617 618define <8 x double>@test_int_x86_avx512_mask3_vfnmsub_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3){619; CHECK-LABEL: test_int_x86_avx512_mask3_vfnmsub_pd_512:620; CHECK: ## %bb.0:621; CHECK-NEXT: kmovw %edi, %k1622; CHECK-NEXT: vfnmsub231pd {{.*#+}} zmm2 {%k1} = -(zmm0 * zmm1) - zmm2623; CHECK-NEXT: vmovapd %zmm2, %zmm0624; CHECK-NEXT: retq625 %res = call <8 x double> @llvm.x86.avx512.mask3.vfnmsub.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3, i32 4)626 ret <8 x double> %res627}628 629define <16 x float>@test_int_x86_avx512_mask_vfnmsub_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){630; CHECK-LABEL: test_int_x86_avx512_mask_vfnmsub_ps_512:631; CHECK: ## %bb.0:632; CHECK-NEXT: kmovw %edi, %k1633; CHECK-NEXT: vfnmsub132ps {{.*#+}} zmm0 {%k1} = -(zmm0 * zmm1) - zmm2634; CHECK-NEXT: retq635 %res = call <16 x float> @llvm.x86.avx512.mask.vfnmsub.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 4)636 ret <16 x float> %res637}638 639declare <16 x float> @llvm.x86.avx512.mask3.vfnmsub.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)640 641define <16 x float>@test_int_x86_avx512_mask3_vfnmsub_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){642; CHECK-LABEL: test_int_x86_avx512_mask3_vfnmsub_ps_512:643; CHECK: ## %bb.0:644; CHECK-NEXT: kmovw %edi, %k1645; CHECK-NEXT: vfnmsub231ps {{.*#+}} zmm2 {%k1} = -(zmm0 * zmm1) - zmm2646; CHECK-NEXT: vmovaps %zmm2, %zmm0647; CHECK-NEXT: retq648 %res = call <16 x float> @llvm.x86.avx512.mask3.vfnmsub.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 4)649 ret <16 x float> %res650}651 652define <8 x double>@test_int_x86_avx512_mask_vfnmadd_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3){653; CHECK-LABEL: test_int_x86_avx512_mask_vfnmadd_pd_512:654; CHECK: ## %bb.0:655; CHECK-NEXT: kmovw %edi, %k1656; CHECK-NEXT: vfnmadd132pd {{.*#+}} zmm0 {%k1} = -(zmm0 * zmm1) + zmm2657; CHECK-NEXT: retq658 %res = call <8 x double> @llvm.x86.avx512.mask.vfnmadd.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3, i32 4)659 ret <8 x double> %res660}661 662define <16 x float>@test_int_x86_avx512_mask_vfnmadd_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){663; CHECK-LABEL: test_int_x86_avx512_mask_vfnmadd_ps_512:664; CHECK: ## %bb.0:665; CHECK-NEXT: kmovw %edi, %k1666; CHECK-NEXT: vfnmadd132ps {{.*#+}} zmm0 {%k1} = -(zmm0 * zmm1) + zmm2667; CHECK-NEXT: retq668 %res = call <16 x float> @llvm.x86.avx512.mask.vfnmadd.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 4)669 ret <16 x float> %res670}671 672define <8 x double>@test_int_x86_avx512_mask_vfmaddsub_pd_512_rne(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3){673; CHECK-LABEL: test_int_x86_avx512_mask_vfmaddsub_pd_512_rne:674; CHECK: ## %bb.0:675; CHECK-NEXT: kmovw %edi, %k1676; CHECK-NEXT: vfmaddsub132pd {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}677; CHECK-NEXT: retq678 %res = call <8 x double> @llvm.x86.avx512.mask.vfmaddsub.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3, i32 8)679 ret <8 x double> %res680}681 682define <8 x double>@test_int_x86_avx512_mask3_vfmaddsub_pd_512_rne(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3){683; CHECK-LABEL: test_int_x86_avx512_mask3_vfmaddsub_pd_512_rne:684; CHECK: ## %bb.0:685; CHECK-NEXT: kmovw %edi, %k1686; CHECK-NEXT: vfmaddsub231pd {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}687; CHECK-NEXT: vmovapd %zmm2, %zmm0688; CHECK-NEXT: retq689 %res = call <8 x double> @llvm.x86.avx512.mask3.vfmaddsub.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3, i32 8)690 ret <8 x double> %res691}692 693define <8 x double>@test_int_x86_avx512_maskz_vfmaddsub_pd_512_rne(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3){694; CHECK-LABEL: test_int_x86_avx512_maskz_vfmaddsub_pd_512_rne:695; CHECK: ## %bb.0:696; CHECK-NEXT: kmovw %edi, %k1697; CHECK-NEXT: vfmaddsub213pd {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}698; CHECK-NEXT: retq699 %res = call <8 x double> @llvm.x86.avx512.maskz.vfmaddsub.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3, i32 8)700 ret <8 x double> %res701}702 703define <16 x float>@test_int_x86_avx512_mask_vfmaddsub_ps_512_rne(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){704; CHECK-LABEL: test_int_x86_avx512_mask_vfmaddsub_ps_512_rne:705; CHECK: ## %bb.0:706; CHECK-NEXT: kmovw %edi, %k1707; CHECK-NEXT: vfmaddsub132ps {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}708; CHECK-NEXT: retq709 %res = call <16 x float> @llvm.x86.avx512.mask.vfmaddsub.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 8)710 ret <16 x float> %res711}712 713define <16 x float>@test_int_x86_avx512_mask3_vfmaddsub_ps_512_rne(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){714; CHECK-LABEL: test_int_x86_avx512_mask3_vfmaddsub_ps_512_rne:715; CHECK: ## %bb.0:716; CHECK-NEXT: kmovw %edi, %k1717; CHECK-NEXT: vfmaddsub231ps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}718; CHECK-NEXT: vmovaps %zmm2, %zmm0719; CHECK-NEXT: retq720 %res = call <16 x float> @llvm.x86.avx512.mask3.vfmaddsub.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 8)721 ret <16 x float> %res722}723 724define <16 x float>@test_int_x86_avx512_maskz_vfmaddsub_ps_512_rne(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){725; CHECK-LABEL: test_int_x86_avx512_maskz_vfmaddsub_ps_512_rne:726; CHECK: ## %bb.0:727; CHECK-NEXT: kmovw %edi, %k1728; CHECK-NEXT: vfmaddsub213ps {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}729; CHECK-NEXT: retq730 %res = call <16 x float> @llvm.x86.avx512.maskz.vfmaddsub.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 8)731 ret <16 x float> %res732}733 734define <8 x double>@test_int_x86_avx512_mask3_vfmsubadd_pd_512_rne(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3){735; CHECK-LABEL: test_int_x86_avx512_mask3_vfmsubadd_pd_512_rne:736; CHECK: ## %bb.0:737; CHECK-NEXT: kmovw %edi, %k1738; CHECK-NEXT: vfmsubadd231pd {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}739; CHECK-NEXT: vmovapd %zmm2, %zmm0740; CHECK-NEXT: retq741 %res = call <8 x double> @llvm.x86.avx512.mask3.vfmsubadd.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3, i32 8)742 ret <8 x double> %res743}744 745define <16 x float>@test_int_x86_avx512_mask3_vfmsubadd_ps_512_rne(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){746; CHECK-LABEL: test_int_x86_avx512_mask3_vfmsubadd_ps_512_rne:747; CHECK: ## %bb.0:748; CHECK-NEXT: kmovw %edi, %k1749; CHECK-NEXT: vfmsubadd231ps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}750; CHECK-NEXT: vmovaps %zmm2, %zmm0751; CHECK-NEXT: retq752 %res = call <16 x float> @llvm.x86.avx512.mask3.vfmsubadd.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 8)753 ret <16 x float> %res754}755