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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X863; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X644 5; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx512f-builtins.c6 7 8define zeroext i16 @test_mm512_kunpackb(<8 x i64> %__A, <8 x i64> %__B, <8 x i64> %__C, <8 x i64> %__D, <8 x i64> %__E, <8 x i64> %__F) local_unnamed_addr #0 {9; X86-LABEL: test_mm512_kunpackb:10; X86: # %bb.0: # %entry11; X86-NEXT: pushl %ebp12; X86-NEXT: .cfi_def_cfa_offset 813; X86-NEXT: .cfi_offset %ebp, -814; X86-NEXT: movl %esp, %ebp15; X86-NEXT: .cfi_def_cfa_register %ebp16; X86-NEXT: andl $-64, %esp17; X86-NEXT: subl $64, %esp18; X86-NEXT: vmovdqa64 136(%ebp), %zmm319; X86-NEXT: vpcmpneqd %zmm1, %zmm0, %k020; X86-NEXT: vpcmpneqd 8(%ebp), %zmm2, %k121; X86-NEXT: kunpckbw %k0, %k1, %k122; X86-NEXT: vpcmpneqd 72(%ebp), %zmm3, %k0 {%k1}23; X86-NEXT: kmovw %k0, %eax24; X86-NEXT: # kill: def $ax killed $ax killed $eax25; X86-NEXT: movl %ebp, %esp26; X86-NEXT: popl %ebp27; X86-NEXT: .cfi_def_cfa %esp, 428; X86-NEXT: vzeroupper29; X86-NEXT: retl30;31; X64-LABEL: test_mm512_kunpackb:32; X64: # %bb.0: # %entry33; X64-NEXT: vpcmpneqd %zmm1, %zmm0, %k034; X64-NEXT: vpcmpneqd %zmm3, %zmm2, %k135; X64-NEXT: kunpckbw %k0, %k1, %k136; X64-NEXT: vpcmpneqd %zmm5, %zmm4, %k0 {%k1}37; X64-NEXT: kmovw %k0, %eax38; X64-NEXT: # kill: def $ax killed $ax killed $eax39; X64-NEXT: vzeroupper40; X64-NEXT: retq41entry:42 %0 = bitcast <8 x i64> %__E to <16 x i32>43 %1 = bitcast <8 x i64> %__F to <16 x i32>44 %2 = bitcast <8 x i64> %__A to <16 x i32>45 %3 = bitcast <8 x i64> %__B to <16 x i32>46 %4 = icmp ne <16 x i32> %2, %347 %5 = bitcast <8 x i64> %__C to <16 x i32>48 %6 = bitcast <8 x i64> %__D to <16 x i32>49 %7 = icmp ne <16 x i32> %5, %650 %8 = shufflevector <16 x i1> %4, <16 x i1> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>51 %9 = shufflevector <16 x i1> %7, <16 x i1> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>52 %10 = shufflevector <8 x i1> %8, <8 x i1> %9, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>53 %11 = icmp ne <16 x i32> %0, %154 %12 = and <16 x i1> %11, %1055 %13 = bitcast <16 x i1> %12 to i1656 ret i16 %1357}58 59define i32 @test_mm512_kortestc(<8 x i64> %__A, <8 x i64> %__B, <8 x i64> %__C, <8 x i64> %__D) {60; X86-LABEL: test_mm512_kortestc:61; X86: # %bb.0: # %entry62; X86-NEXT: pushl %ebp63; X86-NEXT: .cfi_def_cfa_offset 864; X86-NEXT: .cfi_offset %ebp, -865; X86-NEXT: movl %esp, %ebp66; X86-NEXT: .cfi_def_cfa_register %ebp67; X86-NEXT: andl $-64, %esp68; X86-NEXT: subl $64, %esp69; X86-NEXT: vpcmpneqd %zmm1, %zmm0, %k070; X86-NEXT: vpcmpneqd 8(%ebp), %zmm2, %k171; X86-NEXT: korw %k0, %k1, %k072; X86-NEXT: kmovw %k0, %eax73; X86-NEXT: cmpw $-1, %ax74; X86-NEXT: sete %al75; X86-NEXT: andb $1, %al76; X86-NEXT: movzbl %al, %eax77; X86-NEXT: movl %ebp, %esp78; X86-NEXT: popl %ebp79; X86-NEXT: .cfi_def_cfa %esp, 480; X86-NEXT: vzeroupper81; X86-NEXT: retl82;83; X64-LABEL: test_mm512_kortestc:84; X64: # %bb.0: # %entry85; X64-NEXT: vpcmpneqd %zmm1, %zmm0, %k086; X64-NEXT: vpcmpneqd %zmm3, %zmm2, %k187; X64-NEXT: korw %k0, %k1, %k088; X64-NEXT: kmovw %k0, %eax89; X64-NEXT: cmpw $-1, %ax90; X64-NEXT: sete %al91; X64-NEXT: andb $1, %al92; X64-NEXT: movzbl %al, %eax93; X64-NEXT: vzeroupper94; X64-NEXT: retq95entry:96 %0 = bitcast <8 x i64> %__A to <16 x i32>97 %1 = bitcast <8 x i64> %__B to <16 x i32>98 %2 = icmp ne <16 x i32> %0, %199 %3 = bitcast <8 x i64> %__C to <16 x i32>100 %4 = bitcast <8 x i64> %__D to <16 x i32>101 %5 = icmp ne <16 x i32> %3, %4102 %6 = or <16 x i1> %5, %2 %7 = bitcast <16 x i1> %6 to i16103 %8 = icmp eq i16 %7, -1104 %9 = zext i1 %8 to i32105 ret i32 %9106}107 108define i32 @test_mm512_kortestz(<8 x i64> %__A, <8 x i64> %__B, <8 x i64> %__C, <8 x i64> %__D) {109; X86-LABEL: test_mm512_kortestz:110; X86: # %bb.0: # %entry111; X86-NEXT: pushl %ebp112; X86-NEXT: .cfi_def_cfa_offset 8113; X86-NEXT: .cfi_offset %ebp, -8114; X86-NEXT: movl %esp, %ebp115; X86-NEXT: .cfi_def_cfa_register %ebp116; X86-NEXT: andl $-64, %esp117; X86-NEXT: subl $64, %esp118; X86-NEXT: vpcmpneqd %zmm1, %zmm0, %k0119; X86-NEXT: vpcmpneqd 8(%ebp), %zmm2, %k1120; X86-NEXT: korw %k0, %k1, %k0121; X86-NEXT: kmovw %k0, %eax122; X86-NEXT: cmpw $0, %ax123; X86-NEXT: sete %al124; X86-NEXT: andb $1, %al125; X86-NEXT: movzbl %al, %eax126; X86-NEXT: movl %ebp, %esp127; X86-NEXT: popl %ebp128; X86-NEXT: .cfi_def_cfa %esp, 4129; X86-NEXT: vzeroupper130; X86-NEXT: retl131;132; X64-LABEL: test_mm512_kortestz:133; X64: # %bb.0: # %entry134; X64-NEXT: vpcmpneqd %zmm1, %zmm0, %k0135; X64-NEXT: vpcmpneqd %zmm3, %zmm2, %k1136; X64-NEXT: korw %k0, %k1, %k0137; X64-NEXT: kmovw %k0, %eax138; X64-NEXT: cmpw $0, %ax139; X64-NEXT: sete %al140; X64-NEXT: andb $1, %al141; X64-NEXT: movzbl %al, %eax142; X64-NEXT: vzeroupper143; X64-NEXT: retq144entry:145 %0 = bitcast <8 x i64> %__A to <16 x i32>146 %1 = bitcast <8 x i64> %__B to <16 x i32>147 %2 = icmp ne <16 x i32> %0, %1148 %3 = bitcast <8 x i64> %__C to <16 x i32>149 %4 = bitcast <8 x i64> %__D to <16 x i32>150 %5 = icmp ne <16 x i32> %3, %4151 %6 = or <16 x i1> %5, %2152 %7 = bitcast <16 x i1> %6 to i16153 %8 = icmp eq i16 %7, 0154 %9 = zext i1 %8 to i32155 ret i32 %9156}157 158define <16 x float> @test_mm512_shuffle_f32x4(<16 x float> %__A, <16 x float> %__B) {159; CHECK-LABEL: test_mm512_shuffle_f32x4:160; CHECK: # %bb.0: # %entry161; CHECK-NEXT: vshuff64x2 {{.*#+}} zmm0 = zmm0[0,1,2,3],zmm1[0,1,0,1]162; CHECK-NEXT: ret{{[l|q]}}163entry:164 %shuffle = shufflevector <16 x float> %__A, <16 x float> %__B, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 16, i32 17, i32 18, i32 19>165 ret <16 x float> %shuffle166}167 168 169define <16 x float> @test_mm512_mask_shuffle_f32x4(<16 x float> %__W, i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B) {170; X86-LABEL: test_mm512_mask_shuffle_f32x4:171; X86: # %bb.0: # %entry172; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax173; X86-NEXT: kmovw %eax, %k1174; X86-NEXT: vshuff32x4 {{.*#+}} zmm0 {%k1} = zmm1[0,1,2,3,4,5,6,7],zmm2[0,1,2,3,0,1,2,3]175; X86-NEXT: retl176;177; X64-LABEL: test_mm512_mask_shuffle_f32x4:178; X64: # %bb.0: # %entry179; X64-NEXT: kmovw %edi, %k1180; X64-NEXT: vshuff32x4 {{.*#+}} zmm0 {%k1} = zmm1[0,1,2,3,4,5,6,7],zmm2[0,1,2,3,0,1,2,3]181; X64-NEXT: retq182entry:183 %shuffle = shufflevector <16 x float> %__A, <16 x float> %__B, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 16, i32 17, i32 18, i32 19>184 %0 = bitcast i16 %__U to <16 x i1>185 %1 = select <16 x i1> %0, <16 x float> %shuffle, <16 x float> %__W186 ret <16 x float> %1187}188 189define <16 x float> @test_mm512_maskz_shuffle_f32x4(i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B) {190; X86-LABEL: test_mm512_maskz_shuffle_f32x4:191; X86: # %bb.0: # %entry192; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax193; X86-NEXT: kmovw %eax, %k1194; X86-NEXT: vshuff32x4 {{.*#+}} zmm0 {%k1} {z} = zmm0[0,1,2,3,4,5,6,7],zmm1[0,1,2,3,0,1,2,3]195; X86-NEXT: retl196;197; X64-LABEL: test_mm512_maskz_shuffle_f32x4:198; X64: # %bb.0: # %entry199; X64-NEXT: kmovw %edi, %k1200; X64-NEXT: vshuff32x4 {{.*#+}} zmm0 {%k1} {z} = zmm0[0,1,2,3,4,5,6,7],zmm1[0,1,2,3,0,1,2,3]201; X64-NEXT: retq202entry:203 %shuffle = shufflevector <16 x float> %__A, <16 x float> %__B, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 16, i32 17, i32 18, i32 19>204 %0 = bitcast i16 %__U to <16 x i1>205 %1 = select <16 x i1> %0, <16 x float> %shuffle, <16 x float> zeroinitializer206 ret <16 x float> %1207}208 209define <8 x double> @test_mm512_shuffle_f64x2(<8 x double> %__A, <8 x double> %__B) {210; CHECK-LABEL: test_mm512_shuffle_f64x2:211; CHECK: # %bb.0: # %entry212; CHECK-NEXT: vshuff64x2 {{.*#+}} zmm0 = zmm0[0,1,2,3],zmm1[0,1,0,1]213; CHECK-NEXT: ret{{[l|q]}}214entry:215 %shuffle = shufflevector <8 x double> %__A, <8 x double> %__B, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 8, i32 9>216 ret <8 x double> %shuffle217}218 219define <8 x double> @test_mm512_mask_shuffle_f64x2(<8 x double> %__W, i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B) {220; X86-LABEL: test_mm512_mask_shuffle_f64x2:221; X86: # %bb.0: # %entry222; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax223; X86-NEXT: kmovw %eax, %k1224; X86-NEXT: vshuff64x2 {{.*#+}} zmm0 {%k1} = zmm1[0,1,2,3],zmm2[0,1,0,1]225; X86-NEXT: retl226;227; X64-LABEL: test_mm512_mask_shuffle_f64x2:228; X64: # %bb.0: # %entry229; X64-NEXT: kmovw %edi, %k1230; X64-NEXT: vshuff64x2 {{.*#+}} zmm0 {%k1} = zmm1[0,1,2,3],zmm2[0,1,0,1]231; X64-NEXT: retq232entry:233 %shuffle = shufflevector <8 x double> %__A, <8 x double> %__B, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 8, i32 9>234 %0 = bitcast i8 %__U to <8 x i1>235 %1 = select <8 x i1> %0, <8 x double> %shuffle, <8 x double> %__W236 ret <8 x double> %1237}238 239define <8 x double> @test_mm512_maskz_shuffle_f64x2(i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B) {240; X86-LABEL: test_mm512_maskz_shuffle_f64x2:241; X86: # %bb.0: # %entry242; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax243; X86-NEXT: kmovw %eax, %k1244; X86-NEXT: vshuff64x2 {{.*#+}} zmm0 {%k1} {z} = zmm0[0,1,2,3],zmm1[0,1,0,1]245; X86-NEXT: retl246;247; X64-LABEL: test_mm512_maskz_shuffle_f64x2:248; X64: # %bb.0: # %entry249; X64-NEXT: kmovw %edi, %k1250; X64-NEXT: vshuff64x2 {{.*#+}} zmm0 {%k1} {z} = zmm0[0,1,2,3],zmm1[0,1,0,1]251; X64-NEXT: retq252entry:253 %shuffle = shufflevector <8 x double> %__A, <8 x double> %__B, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 8, i32 9>254 %0 = bitcast i8 %__U to <8 x i1>255 %1 = select <8 x i1> %0, <8 x double> %shuffle, <8 x double> zeroinitializer256 ret <8 x double> %1257}258 259define <8 x i64> @test_mm512_shuffle_i32x4(<8 x i64> %__A, <8 x i64> %__B) local_unnamed_addr #0 {260; CHECK-LABEL: test_mm512_shuffle_i32x4:261; CHECK: # %bb.0: # %entry262; CHECK-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm0[0,1,2,3],zmm1[0,1,0,1]263; CHECK-NEXT: ret{{[l|q]}}264entry:265 %shuffle = shufflevector <8 x i64> %__A, <8 x i64> %__B, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 8, i32 9>266 ret <8 x i64> %shuffle267}268 269define <8 x i64> @test_mm512_mask_shuffle_i32x4(<8 x i64> %__W, i16 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) local_unnamed_addr #0 {270; X86-LABEL: test_mm512_mask_shuffle_i32x4:271; X86: # %bb.0: # %entry272; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax273; X86-NEXT: kmovw %eax, %k1274; X86-NEXT: vshufi32x4 {{.*#+}} zmm0 {%k1} = zmm1[0,1,2,3,4,5,6,7],zmm2[0,1,2,3,0,1,2,3]275; X86-NEXT: retl276;277; X64-LABEL: test_mm512_mask_shuffle_i32x4:278; X64: # %bb.0: # %entry279; X64-NEXT: kmovw %edi, %k1280; X64-NEXT: vshufi32x4 {{.*#+}} zmm0 {%k1} = zmm1[0,1,2,3,4,5,6,7],zmm2[0,1,2,3,0,1,2,3]281; X64-NEXT: retq282entry:283 %shuffle = shufflevector <8 x i64> %__A, <8 x i64> %__B, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 8, i32 9>284 %0 = bitcast <8 x i64> %shuffle to <16 x i32>285 %1 = bitcast <8 x i64> %__W to <16 x i32>286 %2 = bitcast i16 %__U to <16 x i1>287 %3 = select <16 x i1> %2, <16 x i32> %0, <16 x i32> %1288 %4 = bitcast <16 x i32> %3 to <8 x i64>289 ret <8 x i64> %4290}291 292define <8 x i64> @test_mm512_maskz_shuffle_i32x4(i16 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) local_unnamed_addr #0 {293; X86-LABEL: test_mm512_maskz_shuffle_i32x4:294; X86: # %bb.0: # %entry295; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax296; X86-NEXT: kmovw %eax, %k1297; X86-NEXT: vshufi32x4 {{.*#+}} zmm0 {%k1} {z} = zmm0[0,1,2,3,4,5,6,7],zmm1[0,1,2,3,0,1,2,3]298; X86-NEXT: retl299;300; X64-LABEL: test_mm512_maskz_shuffle_i32x4:301; X64: # %bb.0: # %entry302; X64-NEXT: kmovw %edi, %k1303; X64-NEXT: vshufi32x4 {{.*#+}} zmm0 {%k1} {z} = zmm0[0,1,2,3,4,5,6,7],zmm1[0,1,2,3,0,1,2,3]304; X64-NEXT: retq305entry:306 %shuffle = shufflevector <8 x i64> %__A, <8 x i64> %__B, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 8, i32 9>307 %0 = bitcast <8 x i64> %shuffle to <16 x i32>308 %1 = bitcast i16 %__U to <16 x i1>309 %2 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> zeroinitializer310 %3 = bitcast <16 x i32> %2 to <8 x i64>311 ret <8 x i64> %3312}313 314define <8 x i64> @test_mm512_shuffle_i64x2(<8 x i64> %__A, <8 x i64> %__B) local_unnamed_addr #0 {315; CHECK-LABEL: test_mm512_shuffle_i64x2:316; CHECK: # %bb.0: # %entry317; CHECK-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm0[0,1,2,3],zmm1[0,1,0,1]318; CHECK-NEXT: ret{{[l|q]}}319entry:320 %shuffle = shufflevector <8 x i64> %__A, <8 x i64> %__B, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 8, i32 9>321 ret <8 x i64> %shuffle322}323 324define <8 x i64> @test_mm512_mask_shuffle_i64x2(<8 x i64> %__W, i8 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) local_unnamed_addr #0 {325; X86-LABEL: test_mm512_mask_shuffle_i64x2:326; X86: # %bb.0: # %entry327; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax328; X86-NEXT: kmovw %eax, %k1329; X86-NEXT: vshufi64x2 {{.*#+}} zmm0 {%k1} = zmm1[0,1,2,3],zmm2[0,1,0,1]330; X86-NEXT: retl331;332; X64-LABEL: test_mm512_mask_shuffle_i64x2:333; X64: # %bb.0: # %entry334; X64-NEXT: kmovw %edi, %k1335; X64-NEXT: vshufi64x2 {{.*#+}} zmm0 {%k1} = zmm1[0,1,2,3],zmm2[0,1,0,1]336; X64-NEXT: retq337entry:338 %shuffle = shufflevector <8 x i64> %__A, <8 x i64> %__B, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 8, i32 9>339 %0 = bitcast i8 %__U to <8 x i1>340 %1 = select <8 x i1> %0, <8 x i64> %shuffle, <8 x i64> %__W341 ret <8 x i64> %1342}343 344define <8 x i64> @test_mm512_maskz_shuffle_i64x2(i8 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) local_unnamed_addr #0 {345; X86-LABEL: test_mm512_maskz_shuffle_i64x2:346; X86: # %bb.0: # %entry347; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax348; X86-NEXT: kmovw %eax, %k1349; X86-NEXT: vshufi64x2 {{.*#+}} zmm0 {%k1} {z} = zmm0[0,1,2,3],zmm1[0,1,0,1]350; X86-NEXT: retl351;352; X64-LABEL: test_mm512_maskz_shuffle_i64x2:353; X64: # %bb.0: # %entry354; X64-NEXT: kmovw %edi, %k1355; X64-NEXT: vshufi64x2 {{.*#+}} zmm0 {%k1} {z} = zmm0[0,1,2,3],zmm1[0,1,0,1]356; X64-NEXT: retq357entry:358 %shuffle = shufflevector <8 x i64> %__A, <8 x i64> %__B, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 8, i32 9>359 %0 = bitcast i8 %__U to <8 x i1>360 %1 = select <8 x i1> %0, <8 x i64> %shuffle, <8 x i64> zeroinitializer361 ret <8 x i64> %1362}363 364 365define zeroext i16 @test_mm512_testn_epi32_mask(<8 x i64> %__A, <8 x i64> %__B) {366; CHECK-LABEL: test_mm512_testn_epi32_mask:367; CHECK: # %bb.0: # %entry368; CHECK-NEXT: vptestnmd %zmm0, %zmm1, %k0369; CHECK-NEXT: kmovw %k0, %eax370; CHECK-NEXT: # kill: def $ax killed $ax killed $eax371; CHECK-NEXT: vzeroupper372; CHECK-NEXT: ret{{[l|q]}}373entry:374 %and1.i.i = and <8 x i64> %__B, %__A375 %0 = bitcast <8 x i64> %and1.i.i to <16 x i32>376 %1 = icmp eq <16 x i32> %0, zeroinitializer377 %2 = bitcast <16 x i1> %1 to i16378 ret i16 %2379}380 381define zeroext i16 @test_mm512_mask_testn_epi32_mask(i16 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) {382; X86-LABEL: test_mm512_mask_testn_epi32_mask:383; X86: # %bb.0: # %entry384; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax385; X86-NEXT: kmovw %eax, %k1386; X86-NEXT: vptestnmd %zmm0, %zmm1, %k0 {%k1}387; X86-NEXT: kmovw %k0, %eax388; X86-NEXT: # kill: def $ax killed $ax killed $eax389; X86-NEXT: vzeroupper390; X86-NEXT: retl391;392; X64-LABEL: test_mm512_mask_testn_epi32_mask:393; X64: # %bb.0: # %entry394; X64-NEXT: kmovw %edi, %k1395; X64-NEXT: vptestnmd %zmm0, %zmm1, %k0 {%k1}396; X64-NEXT: kmovw %k0, %eax397; X64-NEXT: # kill: def $ax killed $ax killed $eax398; X64-NEXT: vzeroupper399; X64-NEXT: retq400entry:401 %and1.i.i = and <8 x i64> %__B, %__A402 %0 = bitcast <8 x i64> %and1.i.i to <16 x i32>403 %1 = icmp eq <16 x i32> %0, zeroinitializer404 %2 = bitcast i16 %__U to <16 x i1>405 %3 = and <16 x i1> %1, %2406 %4 = bitcast <16 x i1> %3 to i16407 ret i16 %4408}409 410define zeroext i8 @test_mm512_testn_epi64_mask(<8 x i64> %__A, <8 x i64> %__B) {411; CHECK-LABEL: test_mm512_testn_epi64_mask:412; CHECK: # %bb.0: # %entry413; CHECK-NEXT: vptestnmq %zmm0, %zmm1, %k0414; CHECK-NEXT: kmovw %k0, %eax415; CHECK-NEXT: # kill: def $al killed $al killed $eax416; CHECK-NEXT: vzeroupper417; CHECK-NEXT: ret{{[l|q]}}418entry:419 %and1.i.i = and <8 x i64> %__B, %__A420 %0 = icmp eq <8 x i64> %and1.i.i, zeroinitializer421 %1 = bitcast <8 x i1> %0 to i8422 ret i8 %1423}424 425define zeroext i8 @test_mm512_mask_testn_epi64_mask(i8 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) {426; X86-LABEL: test_mm512_mask_testn_epi64_mask:427; X86: # %bb.0: # %entry428; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax429; X86-NEXT: kmovw %eax, %k1430; X86-NEXT: vptestnmq %zmm0, %zmm1, %k0 {%k1}431; X86-NEXT: kmovw %k0, %eax432; X86-NEXT: # kill: def $al killed $al killed $eax433; X86-NEXT: vzeroupper434; X86-NEXT: retl435;436; X64-LABEL: test_mm512_mask_testn_epi64_mask:437; X64: # %bb.0: # %entry438; X64-NEXT: kmovw %edi, %k1439; X64-NEXT: vptestnmq %zmm0, %zmm1, %k0 {%k1}440; X64-NEXT: kmovw %k0, %eax441; X64-NEXT: # kill: def $al killed $al killed $eax442; X64-NEXT: vzeroupper443; X64-NEXT: retq444entry:445 %and1.i.i = and <8 x i64> %__B, %__A446 %0 = icmp eq <8 x i64> %and1.i.i, zeroinitializer447 %1 = bitcast i8 %__U to <8 x i1>448 %2 = and <8 x i1> %0, %1449 %3 = bitcast <8 x i1> %2 to i8450 ret i8 %3451}452 453define zeroext i16 @test_mm512_mask_test_epi32_mask(i16 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) {454; X86-LABEL: test_mm512_mask_test_epi32_mask:455; X86: # %bb.0: # %entry456; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax457; X86-NEXT: kmovw %eax, %k1458; X86-NEXT: vptestmd %zmm0, %zmm1, %k0 {%k1}459; X86-NEXT: kmovw %k0, %eax460; X86-NEXT: # kill: def $ax killed $ax killed $eax461; X86-NEXT: vzeroupper462; X86-NEXT: retl463;464; X64-LABEL: test_mm512_mask_test_epi32_mask:465; X64: # %bb.0: # %entry466; X64-NEXT: kmovw %edi, %k1467; X64-NEXT: vptestmd %zmm0, %zmm1, %k0 {%k1}468; X64-NEXT: kmovw %k0, %eax469; X64-NEXT: # kill: def $ax killed $ax killed $eax470; X64-NEXT: vzeroupper471; X64-NEXT: retq472entry:473 %and1.i.i = and <8 x i64> %__B, %__A474 %0 = bitcast <8 x i64> %and1.i.i to <16 x i32>475 %1 = icmp ne <16 x i32> %0, zeroinitializer476 %2 = bitcast i16 %__U to <16 x i1>477 %3 = and <16 x i1> %1, %2478 %4 = bitcast <16 x i1> %3 to i16479 ret i16 %4480}481 482define zeroext i8 @test_mm512_mask_test_epi64_mask(i8 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) {483; X86-LABEL: test_mm512_mask_test_epi64_mask:484; X86: # %bb.0: # %entry485; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax486; X86-NEXT: kmovw %eax, %k1487; X86-NEXT: vptestmq %zmm0, %zmm1, %k0 {%k1}488; X86-NEXT: kmovw %k0, %eax489; X86-NEXT: # kill: def $al killed $al killed $eax490; X86-NEXT: vzeroupper491; X86-NEXT: retl492;493; X64-LABEL: test_mm512_mask_test_epi64_mask:494; X64: # %bb.0: # %entry495; X64-NEXT: kmovw %edi, %k1496; X64-NEXT: vptestmq %zmm0, %zmm1, %k0 {%k1}497; X64-NEXT: kmovw %k0, %eax498; X64-NEXT: # kill: def $al killed $al killed $eax499; X64-NEXT: vzeroupper500; X64-NEXT: retq501entry:502 %and1.i.i = and <8 x i64> %__B, %__A503 %0 = icmp ne <8 x i64> %and1.i.i, zeroinitializer504 %1 = bitcast i8 %__U to <8 x i1>505 %2 = and <8 x i1> %0, %1506 %3 = bitcast <8 x i1> %2 to i8507 ret i8 %3508}509 510define <8 x i64> @test_mm512_mask_set1_epi32(<8 x i64> %__O, i16 zeroext %__M, i32 %__A) {511; X86-LABEL: test_mm512_mask_set1_epi32:512; X86: # %bb.0: # %entry513; X86-NEXT: movl {{[0-9]+}}(%esp), %eax514; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx515; X86-NEXT: kmovw %ecx, %k1516; X86-NEXT: vpbroadcastd %eax, %zmm0 {%k1}517; X86-NEXT: retl518;519; X64-LABEL: test_mm512_mask_set1_epi32:520; X64: # %bb.0: # %entry521; X64-NEXT: kmovw %edi, %k1522; X64-NEXT: vpbroadcastd %esi, %zmm0 {%k1}523; X64-NEXT: retq524entry:525 %vecinit.i.i = insertelement <16 x i32> undef, i32 %__A, i32 0526 %vecinit15.i.i = shufflevector <16 x i32> %vecinit.i.i, <16 x i32> undef, <16 x i32> zeroinitializer527 %0 = bitcast <8 x i64> %__O to <16 x i32>528 %1 = bitcast i16 %__M to <16 x i1>529 %2 = select <16 x i1> %1, <16 x i32> %vecinit15.i.i, <16 x i32> %0530 %3 = bitcast <16 x i32> %2 to <8 x i64>531 ret <8 x i64> %3532}533 534define <8 x i64> @test_mm512_maskz_set1_epi32(i16 zeroext %__M, i32 %__A) {535; X86-LABEL: test_mm512_maskz_set1_epi32:536; X86: # %bb.0: # %entry537; X86-NEXT: movl {{[0-9]+}}(%esp), %eax538; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx539; X86-NEXT: kmovw %ecx, %k1540; X86-NEXT: vpbroadcastd %eax, %zmm0 {%k1} {z}541; X86-NEXT: retl542;543; X64-LABEL: test_mm512_maskz_set1_epi32:544; X64: # %bb.0: # %entry545; X64-NEXT: kmovw %edi, %k1546; X64-NEXT: vpbroadcastd %esi, %zmm0 {%k1} {z}547; X64-NEXT: retq548entry:549 %vecinit.i.i = insertelement <16 x i32> undef, i32 %__A, i32 0550 %vecinit15.i.i = shufflevector <16 x i32> %vecinit.i.i, <16 x i32> undef, <16 x i32> zeroinitializer551 %0 = bitcast i16 %__M to <16 x i1>552 %1 = select <16 x i1> %0, <16 x i32> %vecinit15.i.i, <16 x i32> zeroinitializer553 %2 = bitcast <16 x i32> %1 to <8 x i64>554 ret <8 x i64> %2555}556 557define <8 x i64> @test_mm512_mask_set1_epi64(<8 x i64> %__O, i8 zeroext %__M, i64 %__A) {558; X86-LABEL: test_mm512_mask_set1_epi64:559; X86: # %bb.0: # %entry560; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax561; X86-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero562; X86-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm1563; X86-NEXT: kmovw %eax, %k1564; X86-NEXT: vpbroadcastq %xmm1, %zmm0 {%k1}565; X86-NEXT: retl566;567; X64-LABEL: test_mm512_mask_set1_epi64:568; X64: # %bb.0: # %entry569; X64-NEXT: kmovw %edi, %k1570; X64-NEXT: vpbroadcastq %rsi, %zmm0 {%k1}571; X64-NEXT: retq572entry:573 %vecinit.i.i = insertelement <8 x i64> undef, i64 %__A, i32 0574 %vecinit7.i.i = shufflevector <8 x i64> %vecinit.i.i, <8 x i64> undef, <8 x i32> zeroinitializer575 %0 = bitcast i8 %__M to <8 x i1>576 %1 = select <8 x i1> %0, <8 x i64> %vecinit7.i.i, <8 x i64> %__O577 ret <8 x i64> %1578}579 580define <8 x i64> @test_mm512_maskz_set1_epi64(i8 zeroext %__M, i64 %__A) {581; X86-LABEL: test_mm512_maskz_set1_epi64:582; X86: # %bb.0: # %entry583; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax584; X86-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero585; X86-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm0, %xmm0586; X86-NEXT: kmovw %eax, %k1587; X86-NEXT: vpbroadcastq %xmm0, %zmm0 {%k1} {z}588; X86-NEXT: retl589;590; X64-LABEL: test_mm512_maskz_set1_epi64:591; X64: # %bb.0: # %entry592; X64-NEXT: kmovw %edi, %k1593; X64-NEXT: vpbroadcastq %rsi, %zmm0 {%k1} {z}594; X64-NEXT: retq595entry:596 %vecinit.i.i = insertelement <8 x i64> undef, i64 %__A, i32 0597 %vecinit7.i.i = shufflevector <8 x i64> %vecinit.i.i, <8 x i64> undef, <8 x i32> zeroinitializer598 %0 = bitcast i8 %__M to <8 x i1>599 %1 = select <8 x i1> %0, <8 x i64> %vecinit7.i.i, <8 x i64> zeroinitializer600 ret <8 x i64> %1601}602 603 604define <8 x i64> @test_mm512_broadcastd_epi32(<2 x i64> %a0) {605; CHECK-LABEL: test_mm512_broadcastd_epi32:606; CHECK: # %bb.0:607; CHECK-NEXT: vbroadcastss %xmm0, %zmm0608; CHECK-NEXT: ret{{[l|q]}}609 %arg0 = bitcast <2 x i64> %a0 to <4 x i32>610 %res0 = shufflevector <4 x i32> %arg0, <4 x i32> undef, <16 x i32> zeroinitializer611 %res1 = bitcast <16 x i32> %res0 to <8 x i64>612 ret <8 x i64> %res1613}614 615define <8 x i64> @test_mm512_mask_broadcastd_epi32(<8 x i64> %a0, i16 %a1, <2 x i64> %a2) {616; X86-LABEL: test_mm512_mask_broadcastd_epi32:617; X86: # %bb.0:618; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax619; X86-NEXT: kmovw %eax, %k1620; X86-NEXT: vpbroadcastd %xmm1, %zmm0 {%k1}621; X86-NEXT: retl622;623; X64-LABEL: test_mm512_mask_broadcastd_epi32:624; X64: # %bb.0:625; X64-NEXT: kmovw %edi, %k1626; X64-NEXT: vpbroadcastd %xmm1, %zmm0 {%k1}627; X64-NEXT: retq628 %arg0 = bitcast <8 x i64> %a0 to <16 x i32>629 %arg1 = bitcast i16 %a1 to <16 x i1>630 %arg2 = bitcast <2 x i64> %a2 to <4 x i32>631 %res0 = shufflevector <4 x i32> %arg2, <4 x i32> undef, <16 x i32> zeroinitializer632 %res1 = select <16 x i1> %arg1, <16 x i32> %res0, <16 x i32> %arg0633 %res2 = bitcast <16 x i32> %res1 to <8 x i64>634 ret <8 x i64> %res2635}636 637define <8 x i64> @test_mm512_maskz_broadcastd_epi32(i16 %a0, <2 x i64> %a1) {638; X86-LABEL: test_mm512_maskz_broadcastd_epi32:639; X86: # %bb.0:640; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax641; X86-NEXT: kmovw %eax, %k1642; X86-NEXT: vpbroadcastd %xmm0, %zmm0 {%k1} {z}643; X86-NEXT: retl644;645; X64-LABEL: test_mm512_maskz_broadcastd_epi32:646; X64: # %bb.0:647; X64-NEXT: kmovw %edi, %k1648; X64-NEXT: vpbroadcastd %xmm0, %zmm0 {%k1} {z}649; X64-NEXT: retq650 %arg0 = bitcast i16 %a0 to <16 x i1>651 %arg1 = bitcast <2 x i64> %a1 to <4 x i32>652 %res0 = shufflevector <4 x i32> %arg1, <4 x i32> undef, <16 x i32> zeroinitializer653 %res1 = select <16 x i1> %arg0, <16 x i32> %res0, <16 x i32> zeroinitializer654 %res2 = bitcast <16 x i32> %res1 to <8 x i64>655 ret <8 x i64> %res2656}657 658define <8 x i64> @test_mm512_broadcastq_epi64(<2 x i64> %a0) {659; CHECK-LABEL: test_mm512_broadcastq_epi64:660; CHECK: # %bb.0:661; CHECK-NEXT: vbroadcastsd %xmm0, %zmm0662; CHECK-NEXT: ret{{[l|q]}}663 %res = shufflevector <2 x i64> %a0, <2 x i64> undef, <8 x i32> zeroinitializer664 ret <8 x i64> %res665}666 667define <8 x i64> @test_mm512_mask_broadcastq_epi64(<8 x i64> %a0, i8 %a1, <2 x i64> %a2) {668; X86-LABEL: test_mm512_mask_broadcastq_epi64:669; X86: # %bb.0:670; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax671; X86-NEXT: kmovw %eax, %k1672; X86-NEXT: vpbroadcastq %xmm1, %zmm0 {%k1}673; X86-NEXT: retl674;675; X64-LABEL: test_mm512_mask_broadcastq_epi64:676; X64: # %bb.0:677; X64-NEXT: kmovw %edi, %k1678; X64-NEXT: vpbroadcastq %xmm1, %zmm0 {%k1}679; X64-NEXT: retq680 %arg1 = bitcast i8 %a1 to <8 x i1>681 %res0 = shufflevector <2 x i64> %a2, <2 x i64> undef, <8 x i32> zeroinitializer682 %res1 = select <8 x i1> %arg1, <8 x i64> %res0, <8 x i64> %a0683 ret <8 x i64> %res1684}685 686define <8 x i64> @test_mm512_maskz_broadcastq_epi64(i8 %a0, <2 x i64> %a1) {687; X86-LABEL: test_mm512_maskz_broadcastq_epi64:688; X86: # %bb.0:689; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax690; X86-NEXT: kmovw %eax, %k1691; X86-NEXT: vpbroadcastq %xmm0, %zmm0 {%k1} {z}692; X86-NEXT: retl693;694; X64-LABEL: test_mm512_maskz_broadcastq_epi64:695; X64: # %bb.0:696; X64-NEXT: kmovw %edi, %k1697; X64-NEXT: vpbroadcastq %xmm0, %zmm0 {%k1} {z}698; X64-NEXT: retq699 %arg0 = bitcast i8 %a0 to <8 x i1>700 %res0 = shufflevector <2 x i64> %a1, <2 x i64> undef, <8 x i32> zeroinitializer701 %res1 = select <8 x i1> %arg0, <8 x i64> %res0, <8 x i64> zeroinitializer702 ret <8 x i64> %res1703}704 705define <8 x double> @test_mm512_broadcastsd_pd(<2 x double> %a0) {706; CHECK-LABEL: test_mm512_broadcastsd_pd:707; CHECK: # %bb.0:708; CHECK-NEXT: vbroadcastsd %xmm0, %zmm0709; CHECK-NEXT: ret{{[l|q]}}710 %res = shufflevector <2 x double> %a0, <2 x double> undef, <8 x i32> zeroinitializer711 ret <8 x double> %res712}713 714define <8 x double> @test_mm512_mask_broadcastsd_pd(<8 x double> %a0, i8 %a1, <2 x double> %a2) {715; X86-LABEL: test_mm512_mask_broadcastsd_pd:716; X86: # %bb.0:717; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax718; X86-NEXT: kmovw %eax, %k1719; X86-NEXT: vbroadcastsd %xmm1, %zmm0 {%k1}720; X86-NEXT: retl721;722; X64-LABEL: test_mm512_mask_broadcastsd_pd:723; X64: # %bb.0:724; X64-NEXT: kmovw %edi, %k1725; X64-NEXT: vbroadcastsd %xmm1, %zmm0 {%k1}726; X64-NEXT: retq727 %arg1 = bitcast i8 %a1 to <8 x i1>728 %res0 = shufflevector <2 x double> %a2, <2 x double> undef, <8 x i32> zeroinitializer729 %res1 = select <8 x i1> %arg1, <8 x double> %res0, <8 x double> %a0730 ret <8 x double> %res1731}732 733define <8 x double> @test_mm512_maskz_broadcastsd_pd(i8 %a0, <2 x double> %a1) {734; X86-LABEL: test_mm512_maskz_broadcastsd_pd:735; X86: # %bb.0:736; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax737; X86-NEXT: kmovw %eax, %k1738; X86-NEXT: vbroadcastsd %xmm0, %zmm0 {%k1} {z}739; X86-NEXT: retl740;741; X64-LABEL: test_mm512_maskz_broadcastsd_pd:742; X64: # %bb.0:743; X64-NEXT: kmovw %edi, %k1744; X64-NEXT: vbroadcastsd %xmm0, %zmm0 {%k1} {z}745; X64-NEXT: retq746 %arg0 = bitcast i8 %a0 to <8 x i1>747 %res0 = shufflevector <2 x double> %a1, <2 x double> undef, <8 x i32> zeroinitializer748 %res1 = select <8 x i1> %arg0, <8 x double> %res0, <8 x double> zeroinitializer749 ret <8 x double> %res1750}751 752define <16 x float> @test_mm512_broadcastss_ps(<4 x float> %a0) {753; CHECK-LABEL: test_mm512_broadcastss_ps:754; CHECK: # %bb.0:755; CHECK-NEXT: vbroadcastss %xmm0, %zmm0756; CHECK-NEXT: ret{{[l|q]}}757 %res = shufflevector <4 x float> %a0, <4 x float> undef, <16 x i32> zeroinitializer758 ret <16 x float> %res759}760 761define <16 x float> @test_mm512_mask_broadcastss_ps(<16 x float> %a0, i16 %a1, <4 x float> %a2) {762; X86-LABEL: test_mm512_mask_broadcastss_ps:763; X86: # %bb.0:764; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax765; X86-NEXT: kmovw %eax, %k1766; X86-NEXT: vbroadcastss %xmm1, %zmm0 {%k1}767; X86-NEXT: retl768;769; X64-LABEL: test_mm512_mask_broadcastss_ps:770; X64: # %bb.0:771; X64-NEXT: kmovw %edi, %k1772; X64-NEXT: vbroadcastss %xmm1, %zmm0 {%k1}773; X64-NEXT: retq774 %arg1 = bitcast i16 %a1 to <16 x i1>775 %res0 = shufflevector <4 x float> %a2, <4 x float> undef, <16 x i32> zeroinitializer776 %res1 = select <16 x i1> %arg1, <16 x float> %res0, <16 x float> %a0777 ret <16 x float> %res1778}779 780define <16 x float> @test_mm512_maskz_broadcastss_ps(i16 %a0, <4 x float> %a1) {781; X86-LABEL: test_mm512_maskz_broadcastss_ps:782; X86: # %bb.0:783; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax784; X86-NEXT: kmovw %eax, %k1785; X86-NEXT: vbroadcastss %xmm0, %zmm0 {%k1} {z}786; X86-NEXT: retl787;788; X64-LABEL: test_mm512_maskz_broadcastss_ps:789; X64: # %bb.0:790; X64-NEXT: kmovw %edi, %k1791; X64-NEXT: vbroadcastss %xmm0, %zmm0 {%k1} {z}792; X64-NEXT: retq793 %arg0 = bitcast i16 %a0 to <16 x i1>794 %res0 = shufflevector <4 x float> %a1, <4 x float> undef, <16 x i32> zeroinitializer795 %res1 = select <16 x i1> %arg0, <16 x float> %res0, <16 x float> zeroinitializer796 ret <16 x float> %res1797}798 799define <8 x double> @test_mm512_movedup_pd(<8 x double> %a0) {800; CHECK-LABEL: test_mm512_movedup_pd:801; CHECK: # %bb.0:802; CHECK-NEXT: vmovddup {{.*#+}} zmm0 = zmm0[0,0,2,2,4,4,6,6]803; CHECK-NEXT: ret{{[l|q]}}804 %res = shufflevector <8 x double> %a0, <8 x double> undef, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>805 ret <8 x double> %res806}807 808define <8 x double> @test_mm512_mask_movedup_pd(<8 x double> %a0, i8 %a1, <8 x double> %a2) {809; X86-LABEL: test_mm512_mask_movedup_pd:810; X86: # %bb.0:811; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax812; X86-NEXT: kmovw %eax, %k1813; X86-NEXT: vmovddup {{.*#+}} zmm0 {%k1} = zmm1[0,0,2,2,4,4,6,6]814; X86-NEXT: retl815;816; X64-LABEL: test_mm512_mask_movedup_pd:817; X64: # %bb.0:818; X64-NEXT: kmovw %edi, %k1819; X64-NEXT: vmovddup {{.*#+}} zmm0 {%k1} = zmm1[0,0,2,2,4,4,6,6]820; X64-NEXT: retq821 %arg1 = bitcast i8 %a1 to <8 x i1>822 %res0 = shufflevector <8 x double> %a2, <8 x double> undef, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>823 %res1 = select <8 x i1> %arg1, <8 x double> %res0, <8 x double> %a0824 ret <8 x double> %res1825}826 827define <8 x double> @test_mm512_maskz_movedup_pd(i8 %a0, <8 x double> %a1) {828; X86-LABEL: test_mm512_maskz_movedup_pd:829; X86: # %bb.0:830; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax831; X86-NEXT: kmovw %eax, %k1832; X86-NEXT: vmovddup {{.*#+}} zmm0 {%k1} {z} = zmm0[0,0,2,2,4,4,6,6]833; X86-NEXT: retl834;835; X64-LABEL: test_mm512_maskz_movedup_pd:836; X64: # %bb.0:837; X64-NEXT: kmovw %edi, %k1838; X64-NEXT: vmovddup {{.*#+}} zmm0 {%k1} {z} = zmm0[0,0,2,2,4,4,6,6]839; X64-NEXT: retq840 %arg0 = bitcast i8 %a0 to <8 x i1>841 %res0 = shufflevector <8 x double> %a1, <8 x double> undef, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>842 %res1 = select <8 x i1> %arg0, <8 x double> %res0, <8 x double> zeroinitializer843 ret <8 x double> %res1844}845 846define <16 x float> @test_mm512_movehdup_ps(<16 x float> %a0) {847; CHECK-LABEL: test_mm512_movehdup_ps:848; CHECK: # %bb.0:849; CHECK-NEXT: vmovshdup {{.*#+}} zmm0 = zmm0[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15]850; CHECK-NEXT: ret{{[l|q]}}851 %res = shufflevector <16 x float> %a0, <16 x float> undef, <16 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7, i32 9, i32 9, i32 11, i32 11, i32 13, i32 13, i32 15, i32 15>852 ret <16 x float> %res853}854 855define <16 x float> @test_mm512_mask_movehdup_ps(<16 x float> %a0, i16 %a1, <16 x float> %a2) {856; X86-LABEL: test_mm512_mask_movehdup_ps:857; X86: # %bb.0:858; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax859; X86-NEXT: kmovw %eax, %k1860; X86-NEXT: vmovshdup {{.*#+}} zmm0 {%k1} = zmm1[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15]861; X86-NEXT: retl862;863; X64-LABEL: test_mm512_mask_movehdup_ps:864; X64: # %bb.0:865; X64-NEXT: kmovw %edi, %k1866; X64-NEXT: vmovshdup {{.*#+}} zmm0 {%k1} = zmm1[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15]867; X64-NEXT: retq868 %arg1 = bitcast i16 %a1 to <16 x i1>869 %res0 = shufflevector <16 x float> %a2, <16 x float> undef, <16 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7, i32 9, i32 9, i32 11, i32 11, i32 13, i32 13, i32 15, i32 15>870 %res1 = select <16 x i1> %arg1, <16 x float> %res0, <16 x float> %a0871 ret <16 x float> %res1872}873 874define <16 x float> @test_mm512_maskz_movehdup_ps(i16 %a0, <16 x float> %a1) {875; X86-LABEL: test_mm512_maskz_movehdup_ps:876; X86: # %bb.0:877; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax878; X86-NEXT: kmovw %eax, %k1879; X86-NEXT: vmovshdup {{.*#+}} zmm0 {%k1} {z} = zmm0[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15]880; X86-NEXT: retl881;882; X64-LABEL: test_mm512_maskz_movehdup_ps:883; X64: # %bb.0:884; X64-NEXT: kmovw %edi, %k1885; X64-NEXT: vmovshdup {{.*#+}} zmm0 {%k1} {z} = zmm0[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15]886; X64-NEXT: retq887 %arg0 = bitcast i16 %a0 to <16 x i1>888 %res0 = shufflevector <16 x float> %a1, <16 x float> undef, <16 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7, i32 9, i32 9, i32 11, i32 11, i32 13, i32 13, i32 15, i32 15>889 %res1 = select <16 x i1> %arg0, <16 x float> %res0, <16 x float> zeroinitializer890 ret <16 x float> %res1891}892 893define <16 x float> @test_mm512_moveldup_ps(<16 x float> %a0) {894; CHECK-LABEL: test_mm512_moveldup_ps:895; CHECK: # %bb.0:896; CHECK-NEXT: vmovsldup {{.*#+}} zmm0 = zmm0[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]897; CHECK-NEXT: ret{{[l|q]}}898 %res = shufflevector <16 x float> %a0, <16 x float> undef, <16 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14>899 ret <16 x float> %res900}901 902define <16 x float> @test_mm512_mask_moveldup_ps(<16 x float> %a0, i16 %a1, <16 x float> %a2) {903; X86-LABEL: test_mm512_mask_moveldup_ps:904; X86: # %bb.0:905; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax906; X86-NEXT: kmovw %eax, %k1907; X86-NEXT: vmovsldup {{.*#+}} zmm0 {%k1} = zmm1[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]908; X86-NEXT: retl909;910; X64-LABEL: test_mm512_mask_moveldup_ps:911; X64: # %bb.0:912; X64-NEXT: kmovw %edi, %k1913; X64-NEXT: vmovsldup {{.*#+}} zmm0 {%k1} = zmm1[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]914; X64-NEXT: retq915 %arg1 = bitcast i16 %a1 to <16 x i1>916 %res0 = shufflevector <16 x float> %a2, <16 x float> undef, <16 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14>917 %res1 = select <16 x i1> %arg1, <16 x float> %res0, <16 x float> %a0918 ret <16 x float> %res1919}920 921define <16 x float> @test_mm512_maskz_moveldup_ps(i16 %a0, <16 x float> %a1) {922; X86-LABEL: test_mm512_maskz_moveldup_ps:923; X86: # %bb.0:924; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax925; X86-NEXT: kmovw %eax, %k1926; X86-NEXT: vmovsldup {{.*#+}} zmm0 {%k1} {z} = zmm0[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]927; X86-NEXT: retl928;929; X64-LABEL: test_mm512_maskz_moveldup_ps:930; X64: # %bb.0:931; X64-NEXT: kmovw %edi, %k1932; X64-NEXT: vmovsldup {{.*#+}} zmm0 {%k1} {z} = zmm0[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]933; X64-NEXT: retq934 %arg0 = bitcast i16 %a0 to <16 x i1>935 %res0 = shufflevector <16 x float> %a1, <16 x float> undef, <16 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14>936 %res1 = select <16 x i1> %arg0, <16 x float> %res0, <16 x float> zeroinitializer937 ret <16 x float> %res1938}939 940define <8 x double> @test_mm512_permute_pd(<8 x double> %a0) {941; CHECK-LABEL: test_mm512_permute_pd:942; CHECK: # %bb.0:943; CHECK-NEXT: vshufpd {{.*#+}} zmm0 = zmm0[0,1,2,2,4,4,6,6]944; CHECK-NEXT: ret{{[l|q]}}945 %res = shufflevector <8 x double> %a0, <8 x double> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>946 ret <8 x double> %res947}948 949define <8 x double> @test_mm512_mask_permute_pd(<8 x double> %a0, i8 %a1, <8 x double> %a2) {950; X86-LABEL: test_mm512_mask_permute_pd:951; X86: # %bb.0:952; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax953; X86-NEXT: kmovw %eax, %k1954; X86-NEXT: vshufpd {{.*#+}} zmm0 {%k1} = zmm1[0,1,2,2,4,4,6,6]955; X86-NEXT: retl956;957; X64-LABEL: test_mm512_mask_permute_pd:958; X64: # %bb.0:959; X64-NEXT: kmovw %edi, %k1960; X64-NEXT: vshufpd {{.*#+}} zmm0 {%k1} = zmm1[0,1,2,2,4,4,6,6]961; X64-NEXT: retq962 %arg1 = bitcast i8 %a1 to <8 x i1>963 %res0 = shufflevector <8 x double> %a2, <8 x double> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>964 %res1 = select <8 x i1> %arg1, <8 x double> %res0, <8 x double> %a0965 ret <8 x double> %res1966}967 968define <8 x double> @test_mm512_maskz_permute_pd(i8 %a0, <8 x double> %a1) {969; X86-LABEL: test_mm512_maskz_permute_pd:970; X86: # %bb.0:971; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax972; X86-NEXT: kmovw %eax, %k1973; X86-NEXT: vshufpd {{.*#+}} zmm0 {%k1} {z} = zmm0[0,1,2,2,4,4,6,6]974; X86-NEXT: retl975;976; X64-LABEL: test_mm512_maskz_permute_pd:977; X64: # %bb.0:978; X64-NEXT: kmovw %edi, %k1979; X64-NEXT: vshufpd {{.*#+}} zmm0 {%k1} {z} = zmm0[0,1,2,2,4,4,6,6]980; X64-NEXT: retq981 %arg0 = bitcast i8 %a0 to <8 x i1>982 %res0 = shufflevector <8 x double> %a1, <8 x double> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>983 %res1 = select <8 x i1> %arg0, <8 x double> %res0, <8 x double> zeroinitializer984 ret <8 x double> %res1985}986 987define <16 x float> @test_mm512_permute_ps(<16 x float> %a0) {988; CHECK-LABEL: test_mm512_permute_ps:989; CHECK: # %bb.0:990; CHECK-NEXT: vshufps {{.*#+}} zmm0 = zmm0[2,0,0,0,6,4,4,4,10,8,8,8,14,12,12,12]991; CHECK-NEXT: ret{{[l|q]}}992 %res = shufflevector <16 x float> %a0, <16 x float> undef, <16 x i32> <i32 2, i32 0, i32 0, i32 0, i32 6, i32 4, i32 4, i32 4, i32 10, i32 8, i32 8, i32 8, i32 14, i32 12, i32 12, i32 12>993 ret <16 x float> %res994}995 996define <16 x float> @test_mm512_mask_permute_ps(<16 x float> %a0, i16 %a1, <16 x float> %a2) {997; X86-LABEL: test_mm512_mask_permute_ps:998; X86: # %bb.0:999; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax1000; X86-NEXT: kmovw %eax, %k11001; X86-NEXT: vshufps {{.*#+}} zmm0 {%k1} = zmm1[2,0,0,0,6,4,4,4,10,8,8,8,14,12,12,12]1002; X86-NEXT: retl1003;1004; X64-LABEL: test_mm512_mask_permute_ps:1005; X64: # %bb.0:1006; X64-NEXT: kmovw %edi, %k11007; X64-NEXT: vshufps {{.*#+}} zmm0 {%k1} = zmm1[2,0,0,0,6,4,4,4,10,8,8,8,14,12,12,12]1008; X64-NEXT: retq1009 %arg1 = bitcast i16 %a1 to <16 x i1>1010 %res0 = shufflevector <16 x float> %a2, <16 x float> undef, <16 x i32> <i32 2, i32 0, i32 0, i32 0, i32 6, i32 4, i32 4, i32 4, i32 10, i32 8, i32 8, i32 8, i32 14, i32 12, i32 12, i32 12>1011 %res1 = select <16 x i1> %arg1, <16 x float> %res0, <16 x float> %a01012 ret <16 x float> %res11013}1014 1015define <16 x float> @test_mm512_maskz_permute_ps(i16 %a0, <16 x float> %a1) {1016; X86-LABEL: test_mm512_maskz_permute_ps:1017; X86: # %bb.0:1018; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax1019; X86-NEXT: kmovw %eax, %k11020; X86-NEXT: vshufps {{.*#+}} zmm0 {%k1} {z} = zmm0[2,0,0,0,6,4,4,4,10,8,8,8,14,12,12,12]1021; X86-NEXT: retl1022;1023; X64-LABEL: test_mm512_maskz_permute_ps:1024; X64: # %bb.0:1025; X64-NEXT: kmovw %edi, %k11026; X64-NEXT: vshufps {{.*#+}} zmm0 {%k1} {z} = zmm0[2,0,0,0,6,4,4,4,10,8,8,8,14,12,12,12]1027; X64-NEXT: retq1028 %arg0 = bitcast i16 %a0 to <16 x i1>1029 %res0 = shufflevector <16 x float> %a1, <16 x float> undef, <16 x i32> <i32 2, i32 0, i32 0, i32 0, i32 6, i32 4, i32 4, i32 4, i32 10, i32 8, i32 8, i32 8, i32 14, i32 12, i32 12, i32 12>1030 %res1 = select <16 x i1> %arg0, <16 x float> %res0, <16 x float> zeroinitializer1031 ret <16 x float> %res11032}1033 1034define <8 x i64> @test_mm512_permutex_epi64(<8 x i64> %a0) {1035; CHECK-LABEL: test_mm512_permutex_epi64:1036; CHECK: # %bb.0:1037; CHECK-NEXT: vpermpd {{.*#+}} zmm0 = zmm0[0,0,0,0,4,4,4,4]1038; CHECK-NEXT: ret{{[l|q]}}1039 %res = shufflevector <8 x i64> %a0, <8 x i64> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>1040 ret <8 x i64> %res1041}1042 1043define <8 x i64> @test_mm512_mask_permutex_epi64(<8 x i64> %a0, i8 %a1, <8 x i64> %a2) {1044; X86-LABEL: test_mm512_mask_permutex_epi64:1045; X86: # %bb.0:1046; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1047; X86-NEXT: kmovw %eax, %k11048; X86-NEXT: vpermq {{.*#+}} zmm0 {%k1} = zmm1[0,0,0,0,4,4,4,4]1049; X86-NEXT: retl1050;1051; X64-LABEL: test_mm512_mask_permutex_epi64:1052; X64: # %bb.0:1053; X64-NEXT: kmovw %edi, %k11054; X64-NEXT: vpermq {{.*#+}} zmm0 {%k1} = zmm1[0,0,0,0,4,4,4,4]1055; X64-NEXT: retq1056 %arg1 = bitcast i8 %a1 to <8 x i1>1057 %res0 = shufflevector <8 x i64> %a2, <8 x i64> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>1058 %res1 = select <8 x i1> %arg1, <8 x i64> %res0, <8 x i64> %a01059 ret <8 x i64> %res11060}1061 1062define <8 x i64> @test_mm512_maskz_permutex_epi64(i8 %a0, <8 x i64> %a1) {1063; X86-LABEL: test_mm512_maskz_permutex_epi64:1064; X86: # %bb.0:1065; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1066; X86-NEXT: kmovw %eax, %k11067; X86-NEXT: vpermq {{.*#+}} zmm0 {%k1} {z} = zmm0[0,0,0,0,4,4,4,4]1068; X86-NEXT: retl1069;1070; X64-LABEL: test_mm512_maskz_permutex_epi64:1071; X64: # %bb.0:1072; X64-NEXT: kmovw %edi, %k11073; X64-NEXT: vpermq {{.*#+}} zmm0 {%k1} {z} = zmm0[0,0,0,0,4,4,4,4]1074; X64-NEXT: retq1075 %arg0 = bitcast i8 %a0 to <8 x i1>1076 %res0 = shufflevector <8 x i64> %a1, <8 x i64> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>1077 %res1 = select <8 x i1> %arg0, <8 x i64> %res0, <8 x i64> zeroinitializer1078 ret <8 x i64> %res11079}1080 1081define <8 x double> @test_mm512_permutex_pd(<8 x double> %a0) {1082; CHECK-LABEL: test_mm512_permutex_pd:1083; CHECK: # %bb.0:1084; CHECK-NEXT: vpermpd {{.*#+}} zmm0 = zmm0[0,0,0,0,4,4,4,4]1085; CHECK-NEXT: ret{{[l|q]}}1086 %res = shufflevector <8 x double> %a0, <8 x double> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>1087 ret <8 x double> %res1088}1089 1090define <8 x double> @test_mm512_mask_permutex_pd(<8 x double> %a0, i8 %a1, <8 x double> %a2) {1091; X86-LABEL: test_mm512_mask_permutex_pd:1092; X86: # %bb.0:1093; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1094; X86-NEXT: kmovw %eax, %k11095; X86-NEXT: vpermpd {{.*#+}} zmm0 {%k1} = zmm1[0,0,0,0,4,4,4,4]1096; X86-NEXT: retl1097;1098; X64-LABEL: test_mm512_mask_permutex_pd:1099; X64: # %bb.0:1100; X64-NEXT: kmovw %edi, %k11101; X64-NEXT: vpermpd {{.*#+}} zmm0 {%k1} = zmm1[0,0,0,0,4,4,4,4]1102; X64-NEXT: retq1103 %arg1 = bitcast i8 %a1 to <8 x i1>1104 %res0 = shufflevector <8 x double> %a2, <8 x double> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>1105 %res1 = select <8 x i1> %arg1, <8 x double> %res0, <8 x double> %a01106 ret <8 x double> %res11107}1108 1109define <8 x double> @test_mm512_maskz_permutex_pd(i8 %a0, <8 x double> %a1) {1110; X86-LABEL: test_mm512_maskz_permutex_pd:1111; X86: # %bb.0:1112; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1113; X86-NEXT: kmovw %eax, %k11114; X86-NEXT: vpermpd {{.*#+}} zmm0 {%k1} {z} = zmm0[0,0,0,0,4,4,4,4]1115; X86-NEXT: retl1116;1117; X64-LABEL: test_mm512_maskz_permutex_pd:1118; X64: # %bb.0:1119; X64-NEXT: kmovw %edi, %k11120; X64-NEXT: vpermpd {{.*#+}} zmm0 {%k1} {z} = zmm0[0,0,0,0,4,4,4,4]1121; X64-NEXT: retq1122 %arg0 = bitcast i8 %a0 to <8 x i1>1123 %res0 = shufflevector <8 x double> %a1, <8 x double> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>1124 %res1 = select <8 x i1> %arg0, <8 x double> %res0, <8 x double> zeroinitializer1125 ret <8 x double> %res11126}1127 1128define <8 x i64> @test_mm512_shuffle_epi32(<8 x i64> %a0) {1129; CHECK-LABEL: test_mm512_shuffle_epi32:1130; CHECK: # %bb.0:1131; CHECK-NEXT: vshufps {{.*#+}} zmm0 = zmm0[1,0,0,0,5,4,4,4,9,8,8,8,13,12,12,12]1132; CHECK-NEXT: ret{{[l|q]}}1133 %arg0 = bitcast <8 x i64> %a0 to <16 x i32>1134 %res0 = shufflevector <16 x i32> %arg0, <16 x i32> undef, <16 x i32> <i32 1, i32 0, i32 0, i32 0, i32 5, i32 4, i32 4, i32 4, i32 9, i32 8, i32 8, i32 8, i32 13, i32 12, i32 12, i32 12>1135 %res1 = bitcast <16 x i32> %res0 to <8 x i64>1136 ret <8 x i64> %res11137}1138 1139define <8 x i64> @test_mm512_mask_shuffle_epi32(<8 x i64> %a0, i16 %a1, <8 x i64> %a2) {1140; X86-LABEL: test_mm512_mask_shuffle_epi32:1141; X86: # %bb.0:1142; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax1143; X86-NEXT: kmovw %eax, %k11144; X86-NEXT: vpshufd {{.*#+}} zmm0 {%k1} = zmm1[1,0,0,0,5,4,4,4,9,8,8,8,13,12,12,12]1145; X86-NEXT: retl1146;1147; X64-LABEL: test_mm512_mask_shuffle_epi32:1148; X64: # %bb.0:1149; X64-NEXT: kmovw %edi, %k11150; X64-NEXT: vpshufd {{.*#+}} zmm0 {%k1} = zmm1[1,0,0,0,5,4,4,4,9,8,8,8,13,12,12,12]1151; X64-NEXT: retq1152 %arg0 = bitcast <8 x i64> %a0 to <16 x i32>1153 %arg1 = bitcast i16 %a1 to <16 x i1>1154 %arg2 = bitcast <8 x i64> %a2 to <16 x i32>1155 %res0 = shufflevector <16 x i32> %arg2, <16 x i32> undef, <16 x i32> <i32 1, i32 0, i32 0, i32 0, i32 5, i32 4, i32 4, i32 4, i32 9, i32 8, i32 8, i32 8, i32 13, i32 12, i32 12, i32 12>1156 %res1 = select <16 x i1> %arg1, <16 x i32> %res0, <16 x i32> %arg01157 %res2 = bitcast <16 x i32> %res1 to <8 x i64>1158 ret <8 x i64> %res21159}1160 1161define <8 x i64> @test_mm512_maskz_shuffle_epi32(i16 %a0, <8 x i64> %a1) {1162; X86-LABEL: test_mm512_maskz_shuffle_epi32:1163; X86: # %bb.0:1164; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax1165; X86-NEXT: kmovw %eax, %k11166; X86-NEXT: vpshufd {{.*#+}} zmm0 {%k1} {z} = zmm0[1,0,0,0,5,4,4,4,9,8,8,8,13,12,12,12]1167; X86-NEXT: retl1168;1169; X64-LABEL: test_mm512_maskz_shuffle_epi32:1170; X64: # %bb.0:1171; X64-NEXT: kmovw %edi, %k11172; X64-NEXT: vpshufd {{.*#+}} zmm0 {%k1} {z} = zmm0[1,0,0,0,5,4,4,4,9,8,8,8,13,12,12,12]1173; X64-NEXT: retq1174 %arg0 = bitcast i16 %a0 to <16 x i1>1175 %arg1 = bitcast <8 x i64> %a1 to <16 x i32>1176 %res0 = shufflevector <16 x i32> %arg1, <16 x i32> undef, <16 x i32> <i32 1, i32 0, i32 0, i32 0, i32 5, i32 4, i32 4, i32 4, i32 9, i32 8, i32 8, i32 8, i32 13, i32 12, i32 12, i32 12>1177 %res1 = select <16 x i1> %arg0, <16 x i32> %res0, <16 x i32> zeroinitializer1178 %res2 = bitcast <16 x i32> %res1 to <8 x i64>1179 ret <8 x i64> %res21180}1181 1182define <8 x double> @test_mm512_shuffle_pd(<8 x double> %a0, <8 x double> %a1) {1183; CHECK-LABEL: test_mm512_shuffle_pd:1184; CHECK: # %bb.0:1185; CHECK-NEXT: vshufpd {{.*#+}} zmm0 = zmm0[0],zmm1[0],zmm0[3],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]1186; CHECK-NEXT: ret{{[l|q]}}1187 %res = shufflevector <8 x double> %a0, <8 x double> %a1, <8 x i32> <i32 0, i32 8, i32 3, i32 10, i32 4, i32 12, i32 6, i32 14>1188 ret <8 x double> %res1189}1190 1191define <8 x double> @test_mm512_mask_shuffle_pd(<8 x double> %a0, i8 %a1, <8 x double> %a2, <8 x double> %a3) {1192; X86-LABEL: test_mm512_mask_shuffle_pd:1193; X86: # %bb.0:1194; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1195; X86-NEXT: kmovw %eax, %k11196; X86-NEXT: vshufpd {{.*#+}} zmm0 {%k1} = zmm1[0],zmm2[0],zmm1[3],zmm2[2],zmm1[4],zmm2[4],zmm1[6],zmm2[6]1197; X86-NEXT: retl1198;1199; X64-LABEL: test_mm512_mask_shuffle_pd:1200; X64: # %bb.0:1201; X64-NEXT: kmovw %edi, %k11202; X64-NEXT: vshufpd {{.*#+}} zmm0 {%k1} = zmm1[0],zmm2[0],zmm1[3],zmm2[2],zmm1[4],zmm2[4],zmm1[6],zmm2[6]1203; X64-NEXT: retq1204 %arg1 = bitcast i8 %a1 to <8 x i1>1205 %res0 = shufflevector <8 x double> %a2, <8 x double> %a3, <8 x i32> <i32 0, i32 8, i32 3, i32 10, i32 4, i32 12, i32 6, i32 14>1206 %res1 = select <8 x i1> %arg1, <8 x double> %res0, <8 x double> %a01207 ret <8 x double> %res11208}1209 1210define <8 x double> @test_mm512_maskz_shuffle_pd(i8 %a0, <8 x double> %a1, <8 x double> %a2) {1211; X86-LABEL: test_mm512_maskz_shuffle_pd:1212; X86: # %bb.0:1213; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1214; X86-NEXT: kmovw %eax, %k11215; X86-NEXT: vshufpd {{.*#+}} zmm0 {%k1} {z} = zmm0[0],zmm1[0],zmm0[3],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]1216; X86-NEXT: retl1217;1218; X64-LABEL: test_mm512_maskz_shuffle_pd:1219; X64: # %bb.0:1220; X64-NEXT: kmovw %edi, %k11221; X64-NEXT: vshufpd {{.*#+}} zmm0 {%k1} {z} = zmm0[0],zmm1[0],zmm0[3],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]1222; X64-NEXT: retq1223 %arg0 = bitcast i8 %a0 to <8 x i1>1224 %res0 = shufflevector <8 x double> %a1, <8 x double> %a2, <8 x i32> <i32 0, i32 8, i32 3, i32 10, i32 4, i32 12, i32 6, i32 14>1225 %res1 = select <8 x i1> %arg0, <8 x double> %res0, <8 x double> zeroinitializer1226 ret <8 x double> %res11227}1228 1229define <8 x i64> @test_mm512_unpackhi_epi32(<8 x i64> %a0, <8 x i64> %a1) {1230; CHECK-LABEL: test_mm512_unpackhi_epi32:1231; CHECK: # %bb.0:1232; CHECK-NEXT: vunpckhps {{.*#+}} zmm0 = zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[14],zmm1[14],zmm0[15],zmm1[15]1233; CHECK-NEXT: ret{{[l|q]}}1234 %arg0 = bitcast <8 x i64> %a0 to <16 x i32>1235 %arg1 = bitcast <8 x i64> %a1 to <16 x i32>1236 %res0 = shufflevector <16 x i32> %arg0, <16 x i32> %arg1, <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>1237 %res1 = bitcast <16 x i32> %res0 to <8 x i64>1238 ret <8 x i64> %res11239}1240 1241define <8 x i64> @test_mm512_mask_unpackhi_epi32(<8 x i64> %a0, i16 %a1, <8 x i64> %a2, <8 x i64> %a3) {1242; X86-LABEL: test_mm512_mask_unpackhi_epi32:1243; X86: # %bb.0:1244; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax1245; X86-NEXT: kmovw %eax, %k11246; X86-NEXT: vpunpckhdq {{.*#+}} zmm0 {%k1} = zmm1[2],zmm2[2],zmm1[3],zmm2[3],zmm1[6],zmm2[6],zmm1[7],zmm2[7],zmm1[10],zmm2[10],zmm1[11],zmm2[11],zmm1[14],zmm2[14],zmm1[15],zmm2[15]1247; X86-NEXT: retl1248;1249; X64-LABEL: test_mm512_mask_unpackhi_epi32:1250; X64: # %bb.0:1251; X64-NEXT: kmovw %edi, %k11252; X64-NEXT: vpunpckhdq {{.*#+}} zmm0 {%k1} = zmm1[2],zmm2[2],zmm1[3],zmm2[3],zmm1[6],zmm2[6],zmm1[7],zmm2[7],zmm1[10],zmm2[10],zmm1[11],zmm2[11],zmm1[14],zmm2[14],zmm1[15],zmm2[15]1253; X64-NEXT: retq1254 %arg0 = bitcast <8 x i64> %a0 to <16 x i32>1255 %arg1 = bitcast i16 %a1 to <16 x i1>1256 %arg2 = bitcast <8 x i64> %a2 to <16 x i32>1257 %arg3 = bitcast <8 x i64> %a3 to <16 x i32>1258 %res0 = shufflevector <16 x i32> %arg2, <16 x i32> %arg3, <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>1259 %res1 = select <16 x i1> %arg1, <16 x i32> %res0, <16 x i32> %arg01260 %res2 = bitcast <16 x i32> %res1 to <8 x i64>1261 ret <8 x i64> %res21262}1263 1264define <8 x i64> @test_mm512_maskz_unpackhi_epi32(i16 %a0, <8 x i64> %a1, <8 x i64> %a2) {1265; X86-LABEL: test_mm512_maskz_unpackhi_epi32:1266; X86: # %bb.0:1267; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax1268; X86-NEXT: kmovw %eax, %k11269; X86-NEXT: vpunpckhdq {{.*#+}} zmm0 {%k1} {z} = zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[14],zmm1[14],zmm0[15],zmm1[15]1270; X86-NEXT: retl1271;1272; X64-LABEL: test_mm512_maskz_unpackhi_epi32:1273; X64: # %bb.0:1274; X64-NEXT: kmovw %edi, %k11275; X64-NEXT: vpunpckhdq {{.*#+}} zmm0 {%k1} {z} = zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[14],zmm1[14],zmm0[15],zmm1[15]1276; X64-NEXT: retq1277 %arg0 = bitcast i16 %a0 to <16 x i1>1278 %arg1 = bitcast <8 x i64> %a1 to <16 x i32>1279 %arg2 = bitcast <8 x i64> %a2 to <16 x i32>1280 %res0 = shufflevector <16 x i32> %arg1, <16 x i32> %arg2, <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>1281 %res1 = select <16 x i1> %arg0, <16 x i32> %res0, <16 x i32> zeroinitializer1282 %res2 = bitcast <16 x i32> %res1 to <8 x i64>1283 ret <8 x i64> %res21284}1285 1286define <8 x i64> @test_mm512_unpackhi_epi64(<8 x i64> %a0, <8 x i64> %a1) {1287; CHECK-LABEL: test_mm512_unpackhi_epi64:1288; CHECK: # %bb.0:1289; CHECK-NEXT: vunpckhpd {{.*#+}} zmm0 = zmm0[1],zmm1[1],zmm0[3],zmm1[3],zmm0[5],zmm1[5],zmm0[7],zmm1[7]1290; CHECK-NEXT: ret{{[l|q]}}1291 %res = shufflevector <8 x i64> %a0, <8 x i64> %a1, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>1292 ret <8 x i64> %res1293}1294 1295define <8 x i64> @test_mm512_mask_unpackhi_epi64(<8 x i64> %a0, i8 %a1, <8 x i64> %a2, <8 x i64> %a3) {1296; X86-LABEL: test_mm512_mask_unpackhi_epi64:1297; X86: # %bb.0:1298; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1299; X86-NEXT: kmovw %eax, %k11300; X86-NEXT: vpunpckhqdq {{.*#+}} zmm0 {%k1} = zmm1[1],zmm2[1],zmm1[3],zmm2[3],zmm1[5],zmm2[5],zmm1[7],zmm2[7]1301; X86-NEXT: retl1302;1303; X64-LABEL: test_mm512_mask_unpackhi_epi64:1304; X64: # %bb.0:1305; X64-NEXT: kmovw %edi, %k11306; X64-NEXT: vpunpckhqdq {{.*#+}} zmm0 {%k1} = zmm1[1],zmm2[1],zmm1[3],zmm2[3],zmm1[5],zmm2[5],zmm1[7],zmm2[7]1307; X64-NEXT: retq1308 %arg1 = bitcast i8 %a1 to <8 x i1>1309 %res0 = shufflevector <8 x i64> %a2, <8 x i64> %a3, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>1310 %res1 = select <8 x i1> %arg1, <8 x i64> %res0, <8 x i64> %a01311 ret <8 x i64> %res11312}1313 1314define <8 x i64> @test_mm512_maskz_unpackhi_epi64(i8 %a0, <8 x i64> %a1, <8 x i64> %a2) {1315; X86-LABEL: test_mm512_maskz_unpackhi_epi64:1316; X86: # %bb.0:1317; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1318; X86-NEXT: kmovw %eax, %k11319; X86-NEXT: vpunpckhqdq {{.*#+}} zmm0 {%k1} {z} = zmm0[1],zmm1[1],zmm0[3],zmm1[3],zmm0[5],zmm1[5],zmm0[7],zmm1[7]1320; X86-NEXT: retl1321;1322; X64-LABEL: test_mm512_maskz_unpackhi_epi64:1323; X64: # %bb.0:1324; X64-NEXT: kmovw %edi, %k11325; X64-NEXT: vpunpckhqdq {{.*#+}} zmm0 {%k1} {z} = zmm0[1],zmm1[1],zmm0[3],zmm1[3],zmm0[5],zmm1[5],zmm0[7],zmm1[7]1326; X64-NEXT: retq1327 %arg0 = bitcast i8 %a0 to <8 x i1>1328 %res0 = shufflevector <8 x i64> %a1, <8 x i64> %a2, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>1329 %res1 = select <8 x i1> %arg0, <8 x i64> %res0, <8 x i64> zeroinitializer1330 ret <8 x i64> %res11331}1332 1333define <8 x double> @test_mm512_unpackhi_pd(<8 x double> %a0, <8 x double> %a1) {1334; CHECK-LABEL: test_mm512_unpackhi_pd:1335; CHECK: # %bb.0:1336; CHECK-NEXT: vunpckhpd {{.*#+}} zmm0 = zmm0[1],zmm1[1],zmm0[3],zmm1[3],zmm0[5],zmm1[5],zmm0[7],zmm1[7]1337; CHECK-NEXT: ret{{[l|q]}}1338 %res = shufflevector <8 x double> %a0, <8 x double> %a1, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>1339 ret <8 x double> %res1340}1341 1342define <8 x double> @test_mm512_mask_unpackhi_pd(<8 x double> %a0, i8 %a1, <8 x double> %a2, <8 x double> %a3) {1343; X86-LABEL: test_mm512_mask_unpackhi_pd:1344; X86: # %bb.0:1345; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1346; X86-NEXT: kmovw %eax, %k11347; X86-NEXT: vunpckhpd {{.*#+}} zmm0 {%k1} = zmm1[1],zmm2[1],zmm1[3],zmm2[3],zmm1[5],zmm2[5],zmm1[7],zmm2[7]1348; X86-NEXT: retl1349;1350; X64-LABEL: test_mm512_mask_unpackhi_pd:1351; X64: # %bb.0:1352; X64-NEXT: kmovw %edi, %k11353; X64-NEXT: vunpckhpd {{.*#+}} zmm0 {%k1} = zmm1[1],zmm2[1],zmm1[3],zmm2[3],zmm1[5],zmm2[5],zmm1[7],zmm2[7]1354; X64-NEXT: retq1355 %arg1 = bitcast i8 %a1 to <8 x i1>1356 %res0 = shufflevector <8 x double> %a2, <8 x double> %a3, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>1357 %res1 = select <8 x i1> %arg1, <8 x double> %res0, <8 x double> %a01358 ret <8 x double> %res11359}1360 1361define <8 x double> @test_mm512_maskz_unpackhi_pd(i8 %a0, <8 x double> %a1, <8 x double> %a2) {1362; X86-LABEL: test_mm512_maskz_unpackhi_pd:1363; X86: # %bb.0:1364; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1365; X86-NEXT: kmovw %eax, %k11366; X86-NEXT: vunpckhpd {{.*#+}} zmm0 {%k1} {z} = zmm0[1],zmm1[1],zmm0[3],zmm1[3],zmm0[5],zmm1[5],zmm0[7],zmm1[7]1367; X86-NEXT: retl1368;1369; X64-LABEL: test_mm512_maskz_unpackhi_pd:1370; X64: # %bb.0:1371; X64-NEXT: kmovw %edi, %k11372; X64-NEXT: vunpckhpd {{.*#+}} zmm0 {%k1} {z} = zmm0[1],zmm1[1],zmm0[3],zmm1[3],zmm0[5],zmm1[5],zmm0[7],zmm1[7]1373; X64-NEXT: retq1374 %arg0 = bitcast i8 %a0 to <8 x i1>1375 %res0 = shufflevector <8 x double> %a1, <8 x double> %a2, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>1376 %res1 = select <8 x i1> %arg0, <8 x double> %res0, <8 x double> zeroinitializer1377 ret <8 x double> %res11378}1379 1380define <16 x float> @test_mm512_unpackhi_ps(<16 x float> %a0, <16 x float> %a1) {1381; CHECK-LABEL: test_mm512_unpackhi_ps:1382; CHECK: # %bb.0:1383; CHECK-NEXT: vunpckhps {{.*#+}} zmm0 = zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[14],zmm1[14],zmm0[15],zmm1[15]1384; CHECK-NEXT: ret{{[l|q]}}1385 %res = shufflevector <16 x float> %a0, <16 x float> %a1, <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>1386 ret <16 x float> %res1387}1388 1389define <16 x float> @test_mm512_mask_unpackhi_ps(<16 x float> %a0, i16 %a1, <16 x float> %a2, <16 x float> %a3) {1390; X86-LABEL: test_mm512_mask_unpackhi_ps:1391; X86: # %bb.0:1392; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax1393; X86-NEXT: kmovw %eax, %k11394; X86-NEXT: vunpckhps {{.*#+}} zmm0 {%k1} = zmm1[2],zmm2[2],zmm1[3],zmm2[3],zmm1[6],zmm2[6],zmm1[7],zmm2[7],zmm1[10],zmm2[10],zmm1[11],zmm2[11],zmm1[14],zmm2[14],zmm1[15],zmm2[15]1395; X86-NEXT: retl1396;1397; X64-LABEL: test_mm512_mask_unpackhi_ps:1398; X64: # %bb.0:1399; X64-NEXT: kmovw %edi, %k11400; X64-NEXT: vunpckhps {{.*#+}} zmm0 {%k1} = zmm1[2],zmm2[2],zmm1[3],zmm2[3],zmm1[6],zmm2[6],zmm1[7],zmm2[7],zmm1[10],zmm2[10],zmm1[11],zmm2[11],zmm1[14],zmm2[14],zmm1[15],zmm2[15]1401; X64-NEXT: retq1402 %arg1 = bitcast i16 %a1 to <16 x i1>1403 %res0 = shufflevector <16 x float> %a2, <16 x float> %a3, <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>1404 %res1 = select <16 x i1> %arg1, <16 x float> %res0, <16 x float> %a01405 ret <16 x float> %res11406}1407 1408define <16 x float> @test_mm512_maskz_unpackhi_ps(i16 %a0, <16 x float> %a1, <16 x float> %a2) {1409; X86-LABEL: test_mm512_maskz_unpackhi_ps:1410; X86: # %bb.0:1411; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax1412; X86-NEXT: kmovw %eax, %k11413; X86-NEXT: vunpckhps {{.*#+}} zmm0 {%k1} {z} = zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[14],zmm1[14],zmm0[15],zmm1[15]1414; X86-NEXT: retl1415;1416; X64-LABEL: test_mm512_maskz_unpackhi_ps:1417; X64: # %bb.0:1418; X64-NEXT: kmovw %edi, %k11419; X64-NEXT: vunpckhps {{.*#+}} zmm0 {%k1} {z} = zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[14],zmm1[14],zmm0[15],zmm1[15]1420; X64-NEXT: retq1421 %arg0 = bitcast i16 %a0 to <16 x i1>1422 %res0 = shufflevector <16 x float> %a1, <16 x float> %a2, <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>1423 %res1 = select <16 x i1> %arg0, <16 x float> %res0, <16 x float> zeroinitializer1424 ret <16 x float> %res11425}1426 1427define <8 x i64> @test_mm512_unpacklo_epi32(<8 x i64> %a0, <8 x i64> %a1) {1428; CHECK-LABEL: test_mm512_unpacklo_epi32:1429; CHECK: # %bb.0:1430; CHECK-NEXT: vunpcklps {{.*#+}} zmm0 = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[12],zmm1[12],zmm0[13],zmm1[13]1431; CHECK-NEXT: ret{{[l|q]}}1432 %arg0 = bitcast <8 x i64> %a0 to <16 x i32>1433 %arg1 = bitcast <8 x i64> %a1 to <16 x i32>1434 %res0 = shufflevector <16 x i32> %arg0, <16 x i32> %arg1, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>1435 %res1 = bitcast <16 x i32> %res0 to <8 x i64>1436 ret <8 x i64> %res11437}1438 1439define <8 x i64> @test_mm512_mask_unpacklo_epi32(<8 x i64> %a0, i16 %a1, <8 x i64> %a2, <8 x i64> %a3) {1440; X86-LABEL: test_mm512_mask_unpacklo_epi32:1441; X86: # %bb.0:1442; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax1443; X86-NEXT: kmovw %eax, %k11444; X86-NEXT: vpunpckldq {{.*#+}} zmm0 {%k1} = zmm1[0],zmm2[0],zmm1[1],zmm2[1],zmm1[4],zmm2[4],zmm1[5],zmm2[5],zmm1[8],zmm2[8],zmm1[9],zmm2[9],zmm1[12],zmm2[12],zmm1[13],zmm2[13]1445; X86-NEXT: retl1446;1447; X64-LABEL: test_mm512_mask_unpacklo_epi32:1448; X64: # %bb.0:1449; X64-NEXT: kmovw %edi, %k11450; X64-NEXT: vpunpckldq {{.*#+}} zmm0 {%k1} = zmm1[0],zmm2[0],zmm1[1],zmm2[1],zmm1[4],zmm2[4],zmm1[5],zmm2[5],zmm1[8],zmm2[8],zmm1[9],zmm2[9],zmm1[12],zmm2[12],zmm1[13],zmm2[13]1451; X64-NEXT: retq1452 %arg0 = bitcast <8 x i64> %a0 to <16 x i32>1453 %arg1 = bitcast i16 %a1 to <16 x i1>1454 %arg2 = bitcast <8 x i64> %a2 to <16 x i32>1455 %arg3 = bitcast <8 x i64> %a3 to <16 x i32>1456 %res0 = shufflevector <16 x i32> %arg2, <16 x i32> %arg3, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>1457 %res1 = select <16 x i1> %arg1, <16 x i32> %res0, <16 x i32> %arg01458 %res2 = bitcast <16 x i32> %res1 to <8 x i64>1459 ret <8 x i64> %res21460}1461 1462define <8 x i64> @test_mm512_maskz_unpacklo_epi32(i16 %a0, <8 x i64> %a1, <8 x i64> %a2) {1463; X86-LABEL: test_mm512_maskz_unpacklo_epi32:1464; X86: # %bb.0:1465; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax1466; X86-NEXT: kmovw %eax, %k11467; X86-NEXT: vpunpckldq {{.*#+}} zmm0 {%k1} {z} = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[12],zmm1[12],zmm0[13],zmm1[13]1468; X86-NEXT: retl1469;1470; X64-LABEL: test_mm512_maskz_unpacklo_epi32:1471; X64: # %bb.0:1472; X64-NEXT: kmovw %edi, %k11473; X64-NEXT: vpunpckldq {{.*#+}} zmm0 {%k1} {z} = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[12],zmm1[12],zmm0[13],zmm1[13]1474; X64-NEXT: retq1475 %arg0 = bitcast i16 %a0 to <16 x i1>1476 %arg1 = bitcast <8 x i64> %a1 to <16 x i32>1477 %arg2 = bitcast <8 x i64> %a2 to <16 x i32>1478 %res0 = shufflevector <16 x i32> %arg1, <16 x i32> %arg2, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>1479 %res1 = select <16 x i1> %arg0, <16 x i32> %res0, <16 x i32> zeroinitializer1480 %res2 = bitcast <16 x i32> %res1 to <8 x i64>1481 ret <8 x i64> %res21482}1483 1484define <8 x i64> @test_mm512_unpacklo_epi64(<8 x i64> %a0, <8 x i64> %a1) {1485; CHECK-LABEL: test_mm512_unpacklo_epi64:1486; CHECK: # %bb.0:1487; CHECK-NEXT: vunpcklpd {{.*#+}} zmm0 = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]1488; CHECK-NEXT: ret{{[l|q]}}1489 %res = shufflevector <8 x i64> %a0, <8 x i64> %a1, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>1490 ret <8 x i64> %res1491}1492 1493define <8 x i64> @test_mm512_mask_unpacklo_epi64(<8 x i64> %a0, i8 %a1, <8 x i64> %a2, <8 x i64> %a3) {1494; X86-LABEL: test_mm512_mask_unpacklo_epi64:1495; X86: # %bb.0:1496; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1497; X86-NEXT: kmovw %eax, %k11498; X86-NEXT: vpunpcklqdq {{.*#+}} zmm0 {%k1} = zmm1[0],zmm2[0],zmm1[2],zmm2[2],zmm1[4],zmm2[4],zmm1[6],zmm2[6]1499; X86-NEXT: retl1500;1501; X64-LABEL: test_mm512_mask_unpacklo_epi64:1502; X64: # %bb.0:1503; X64-NEXT: kmovw %edi, %k11504; X64-NEXT: vpunpcklqdq {{.*#+}} zmm0 {%k1} = zmm1[0],zmm2[0],zmm1[2],zmm2[2],zmm1[4],zmm2[4],zmm1[6],zmm2[6]1505; X64-NEXT: retq1506 %arg1 = bitcast i8 %a1 to <8 x i1>1507 %res0 = shufflevector <8 x i64> %a2, <8 x i64> %a3, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>1508 %res1 = select <8 x i1> %arg1, <8 x i64> %res0, <8 x i64> %a01509 ret <8 x i64> %res11510}1511 1512define <8 x i64> @test_mm512_maskz_unpacklo_epi64(i8 %a0, <8 x i64> %a1, <8 x i64> %a2) {1513; X86-LABEL: test_mm512_maskz_unpacklo_epi64:1514; X86: # %bb.0:1515; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1516; X86-NEXT: kmovw %eax, %k11517; X86-NEXT: vpunpcklqdq {{.*#+}} zmm0 {%k1} {z} = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]1518; X86-NEXT: retl1519;1520; X64-LABEL: test_mm512_maskz_unpacklo_epi64:1521; X64: # %bb.0:1522; X64-NEXT: kmovw %edi, %k11523; X64-NEXT: vpunpcklqdq {{.*#+}} zmm0 {%k1} {z} = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]1524; X64-NEXT: retq1525 %arg0 = bitcast i8 %a0 to <8 x i1>1526 %res0 = shufflevector <8 x i64> %a1, <8 x i64> %a2, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>1527 %res1 = select <8 x i1> %arg0, <8 x i64> %res0, <8 x i64> zeroinitializer1528 ret <8 x i64> %res11529}1530 1531define <8 x double> @test_mm512_unpacklo_pd(<8 x double> %a0, <8 x double> %a1) {1532; CHECK-LABEL: test_mm512_unpacklo_pd:1533; CHECK: # %bb.0:1534; CHECK-NEXT: vunpcklpd {{.*#+}} zmm0 = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]1535; CHECK-NEXT: ret{{[l|q]}}1536 %res = shufflevector <8 x double> %a0, <8 x double> %a1, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>1537 ret <8 x double> %res1538}1539 1540define <8 x double> @test_mm512_mask_unpacklo_pd(<8 x double> %a0, i8 %a1, <8 x double> %a2, <8 x double> %a3) {1541; X86-LABEL: test_mm512_mask_unpacklo_pd:1542; X86: # %bb.0:1543; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1544; X86-NEXT: kmovw %eax, %k11545; X86-NEXT: vunpcklpd {{.*#+}} zmm0 {%k1} = zmm1[0],zmm2[0],zmm1[2],zmm2[2],zmm1[4],zmm2[4],zmm1[6],zmm2[6]1546; X86-NEXT: retl1547;1548; X64-LABEL: test_mm512_mask_unpacklo_pd:1549; X64: # %bb.0:1550; X64-NEXT: kmovw %edi, %k11551; X64-NEXT: vunpcklpd {{.*#+}} zmm0 {%k1} = zmm1[0],zmm2[0],zmm1[2],zmm2[2],zmm1[4],zmm2[4],zmm1[6],zmm2[6]1552; X64-NEXT: retq1553 %arg1 = bitcast i8 %a1 to <8 x i1>1554 %res0 = shufflevector <8 x double> %a2, <8 x double> %a3, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>1555 %res1 = select <8 x i1> %arg1, <8 x double> %res0, <8 x double> %a01556 ret <8 x double> %res11557}1558 1559define <8 x double> @test_mm512_maskz_unpacklo_pd(i8 %a0, <8 x double> %a1, <8 x double> %a2) {1560; X86-LABEL: test_mm512_maskz_unpacklo_pd:1561; X86: # %bb.0:1562; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1563; X86-NEXT: kmovw %eax, %k11564; X86-NEXT: vunpcklpd {{.*#+}} zmm0 {%k1} {z} = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]1565; X86-NEXT: retl1566;1567; X64-LABEL: test_mm512_maskz_unpacklo_pd:1568; X64: # %bb.0:1569; X64-NEXT: kmovw %edi, %k11570; X64-NEXT: vunpcklpd {{.*#+}} zmm0 {%k1} {z} = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]1571; X64-NEXT: retq1572 %arg0 = bitcast i8 %a0 to <8 x i1>1573 %res0 = shufflevector <8 x double> %a1, <8 x double> %a2, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>1574 %res1 = select <8 x i1> %arg0, <8 x double> %res0, <8 x double> zeroinitializer1575 ret <8 x double> %res11576}1577 1578define <16 x float> @test_mm512_unpacklo_ps(<16 x float> %a0, <16 x float> %a1) {1579; CHECK-LABEL: test_mm512_unpacklo_ps:1580; CHECK: # %bb.0:1581; CHECK-NEXT: vunpcklps {{.*#+}} zmm0 = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[12],zmm1[12],zmm0[13],zmm1[13]1582; CHECK-NEXT: ret{{[l|q]}}1583 %res = shufflevector <16 x float> %a0, <16 x float> %a1, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>1584 ret <16 x float> %res1585}1586 1587define <16 x float> @test_mm512_mask_unpacklo_ps(<16 x float> %a0, i16 %a1, <16 x float> %a2, <16 x float> %a3) {1588; X86-LABEL: test_mm512_mask_unpacklo_ps:1589; X86: # %bb.0:1590; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax1591; X86-NEXT: kmovw %eax, %k11592; X86-NEXT: vunpcklps {{.*#+}} zmm0 {%k1} = zmm1[0],zmm2[0],zmm1[1],zmm2[1],zmm1[4],zmm2[4],zmm1[5],zmm2[5],zmm1[8],zmm2[8],zmm1[9],zmm2[9],zmm1[12],zmm2[12],zmm1[13],zmm2[13]1593; X86-NEXT: retl1594;1595; X64-LABEL: test_mm512_mask_unpacklo_ps:1596; X64: # %bb.0:1597; X64-NEXT: kmovw %edi, %k11598; X64-NEXT: vunpcklps {{.*#+}} zmm0 {%k1} = zmm1[0],zmm2[0],zmm1[1],zmm2[1],zmm1[4],zmm2[4],zmm1[5],zmm2[5],zmm1[8],zmm2[8],zmm1[9],zmm2[9],zmm1[12],zmm2[12],zmm1[13],zmm2[13]1599; X64-NEXT: retq1600 %arg1 = bitcast i16 %a1 to <16 x i1>1601 %res0 = shufflevector <16 x float> %a2, <16 x float> %a3, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>1602 %res1 = select <16 x i1> %arg1, <16 x float> %res0, <16 x float> %a01603 ret <16 x float> %res11604}1605 1606define <16 x float> @test_mm512_maskz_unpacklo_ps(i16 %a0, <16 x float> %a1, <16 x float> %a2) {1607; X86-LABEL: test_mm512_maskz_unpacklo_ps:1608; X86: # %bb.0:1609; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax1610; X86-NEXT: kmovw %eax, %k11611; X86-NEXT: vunpcklps {{.*#+}} zmm0 {%k1} {z} = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[12],zmm1[12],zmm0[13],zmm1[13]1612; X86-NEXT: retl1613;1614; X64-LABEL: test_mm512_maskz_unpacklo_ps:1615; X64: # %bb.0:1616; X64-NEXT: kmovw %edi, %k11617; X64-NEXT: vunpcklps {{.*#+}} zmm0 {%k1} {z} = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[12],zmm1[12],zmm0[13],zmm1[13]1618; X64-NEXT: retq1619 %arg0 = bitcast i16 %a0 to <16 x i1>1620 %res0 = shufflevector <16 x float> %a1, <16 x float> %a2, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>1621 %res1 = select <16 x i1> %arg0, <16 x float> %res0, <16 x float> zeroinitializer1622 ret <16 x float> %res11623}1624 1625define <8 x double> @test_mm512_zextpd128_pd512(<2 x double> %a0) nounwind {1626; CHECK-LABEL: test_mm512_zextpd128_pd512:1627; CHECK: # %bb.0:1628; CHECK-NEXT: vmovaps %xmm0, %xmm01629; CHECK-NEXT: ret{{[l|q]}}1630 %res = shufflevector <2 x double> %a0, <2 x double> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3>1631 ret <8 x double> %res1632}1633 1634define <8 x double> @test_mm512_zextpd256_pd512(<4 x double> %a0) nounwind {1635; CHECK-LABEL: test_mm512_zextpd256_pd512:1636; CHECK: # %bb.0:1637; CHECK-NEXT: vmovaps %ymm0, %ymm01638; CHECK-NEXT: ret{{[l|q]}}1639 %res = shufflevector <4 x double> %a0, <4 x double> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>1640 ret <8 x double> %res1641}1642 1643define <16 x float> @test_mm512_zextps128_ps512(<4 x float> %a0) nounwind {1644; CHECK-LABEL: test_mm512_zextps128_ps512:1645; CHECK: # %bb.0:1646; CHECK-NEXT: vmovaps %xmm0, %xmm01647; CHECK-NEXT: ret{{[l|q]}}1648 %res = shufflevector <4 x float> %a0, <4 x float> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>1649 ret <16 x float> %res1650}1651 1652define <16 x float> @test_mm512_zextps256_ps512(<8 x float> %a0) nounwind {1653; CHECK-LABEL: test_mm512_zextps256_ps512:1654; CHECK: # %bb.0:1655; CHECK-NEXT: vmovaps %ymm0, %ymm01656; CHECK-NEXT: ret{{[l|q]}}1657 %res = shufflevector <8 x float> %a0, <8 x float> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>1658 ret <16 x float> %res1659}1660 1661define <8 x i64> @test_mm512_zextsi128_si512(<2 x i64> %a0) nounwind {1662; CHECK-LABEL: test_mm512_zextsi128_si512:1663; CHECK: # %bb.0:1664; CHECK-NEXT: vmovaps %xmm0, %xmm01665; CHECK-NEXT: ret{{[l|q]}}1666 %res = shufflevector <2 x i64> %a0, <2 x i64> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3>1667 ret <8 x i64> %res1668}1669 1670define <8 x i64> @test_mm512_zextsi256_si512(<4 x i64> %a0) nounwind {1671; CHECK-LABEL: test_mm512_zextsi256_si512:1672; CHECK: # %bb.0:1673; CHECK-NEXT: vmovaps %ymm0, %ymm01674; CHECK-NEXT: ret{{[l|q]}}1675 %res = shufflevector <4 x i64> %a0, <4 x i64> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>1676 ret <8 x i64> %res1677}1678 1679define <8 x i64> @test_mm512_mul_epi32(<8 x i64> %__A, <8 x i64> %__B) nounwind {1680; CHECK-LABEL: test_mm512_mul_epi32:1681; CHECK: # %bb.0:1682; CHECK-NEXT: vpmuldq %zmm0, %zmm1, %zmm01683; CHECK-NEXT: ret{{[l|q]}}1684 %tmp = shl <8 x i64> %__A, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>1685 %tmp1 = ashr exact <8 x i64> %tmp, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>1686 %tmp2 = shl <8 x i64> %__B, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>1687 %tmp3 = ashr exact <8 x i64> %tmp2, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>1688 %tmp4 = mul nsw <8 x i64> %tmp3, %tmp11689 ret <8 x i64> %tmp41690}1691 1692define <8 x i64> @test_mm512_maskz_mul_epi32(i8 zeroext %__k, <8 x i64> %__A, <8 x i64> %__B) nounwind {1693; X86-LABEL: test_mm512_maskz_mul_epi32:1694; X86: # %bb.0: # %entry1695; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1696; X86-NEXT: kmovw %eax, %k11697; X86-NEXT: vpmuldq %zmm0, %zmm1, %zmm0 {%k1} {z}1698; X86-NEXT: retl1699;1700; X64-LABEL: test_mm512_maskz_mul_epi32:1701; X64: # %bb.0: # %entry1702; X64-NEXT: kmovw %edi, %k11703; X64-NEXT: vpmuldq %zmm0, %zmm1, %zmm0 {%k1} {z}1704; X64-NEXT: retq1705entry:1706 %0 = shl <8 x i64> %__A, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>1707 %1 = ashr exact <8 x i64> %0, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>1708 %2 = shl <8 x i64> %__B, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>1709 %3 = ashr exact <8 x i64> %2, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>1710 %4 = mul nsw <8 x i64> %3, %11711 %5 = bitcast i8 %__k to <8 x i1>1712 %6 = select <8 x i1> %5, <8 x i64> %4, <8 x i64> zeroinitializer1713 ret <8 x i64> %61714}1715 1716define <8 x i64> @test_mm512_mask_mul_epi32(i8 zeroext %__k, <8 x i64> %__A, <8 x i64> %__B, <8 x i64> %__src) nounwind {1717; X86-LABEL: test_mm512_mask_mul_epi32:1718; X86: # %bb.0: # %entry1719; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1720; X86-NEXT: kmovw %eax, %k11721; X86-NEXT: vpmuldq %zmm0, %zmm1, %zmm2 {%k1}1722; X86-NEXT: vmovdqa64 %zmm2, %zmm01723; X86-NEXT: retl1724;1725; X64-LABEL: test_mm512_mask_mul_epi32:1726; X64: # %bb.0: # %entry1727; X64-NEXT: kmovw %edi, %k11728; X64-NEXT: vpmuldq %zmm0, %zmm1, %zmm2 {%k1}1729; X64-NEXT: vmovdqa64 %zmm2, %zmm01730; X64-NEXT: retq1731entry:1732 %0 = shl <8 x i64> %__A, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>1733 %1 = ashr exact <8 x i64> %0, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>1734 %2 = shl <8 x i64> %__B, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>1735 %3 = ashr exact <8 x i64> %2, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>1736 %4 = mul nsw <8 x i64> %3, %11737 %5 = bitcast i8 %__k to <8 x i1>1738 %6 = select <8 x i1> %5, <8 x i64> %4, <8 x i64> %__src1739 ret <8 x i64> %61740}1741 1742define <8 x i64> @test_mm512_mul_epu32(<8 x i64> %__A, <8 x i64> %__B) nounwind {1743; CHECK-LABEL: test_mm512_mul_epu32:1744; CHECK: # %bb.0:1745; CHECK-NEXT: vpmuludq %zmm0, %zmm1, %zmm01746; CHECK-NEXT: ret{{[l|q]}}1747 %tmp = and <8 x i64> %__A, <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>1748 %tmp1 = and <8 x i64> %__B, <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>1749 %tmp2 = mul nuw <8 x i64> %tmp1, %tmp1750 ret <8 x i64> %tmp21751}1752 1753define <8 x i64> @test_mm512_maskz_mul_epu32(i8 zeroext %__k, <8 x i64> %__A, <8 x i64> %__B) nounwind {1754; X86-LABEL: test_mm512_maskz_mul_epu32:1755; X86: # %bb.0: # %entry1756; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1757; X86-NEXT: kmovw %eax, %k11758; X86-NEXT: vpmuludq %zmm0, %zmm1, %zmm0 {%k1} {z}1759; X86-NEXT: retl1760;1761; X64-LABEL: test_mm512_maskz_mul_epu32:1762; X64: # %bb.0: # %entry1763; X64-NEXT: kmovw %edi, %k11764; X64-NEXT: vpmuludq %zmm0, %zmm1, %zmm0 {%k1} {z}1765; X64-NEXT: retq1766entry:1767 %0 = and <8 x i64> %__A, <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>1768 %1 = and <8 x i64> %__B, <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>1769 %2 = mul nuw <8 x i64> %1, %01770 %3 = bitcast i8 %__k to <8 x i1>1771 %4 = select <8 x i1> %3, <8 x i64> %2, <8 x i64> zeroinitializer1772 ret <8 x i64> %41773}1774 1775define <8 x i64> @test_mm512_mask_mul_epu32(i8 zeroext %__k, <8 x i64> %__A, <8 x i64> %__B, <8 x i64> %__src) nounwind {1776; X86-LABEL: test_mm512_mask_mul_epu32:1777; X86: # %bb.0: # %entry1778; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1779; X86-NEXT: kmovw %eax, %k11780; X86-NEXT: vpmuludq %zmm0, %zmm1, %zmm2 {%k1}1781; X86-NEXT: vmovdqa64 %zmm2, %zmm01782; X86-NEXT: retl1783;1784; X64-LABEL: test_mm512_mask_mul_epu32:1785; X64: # %bb.0: # %entry1786; X64-NEXT: kmovw %edi, %k11787; X64-NEXT: vpmuludq %zmm0, %zmm1, %zmm2 {%k1}1788; X64-NEXT: vmovdqa64 %zmm2, %zmm01789; X64-NEXT: retq1790entry:1791 %0 = and <8 x i64> %__A, <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>1792 %1 = and <8 x i64> %__B, <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>1793 %2 = mul nuw <8 x i64> %1, %01794 %3 = bitcast i8 %__k to <8 x i1>1795 %4 = select <8 x i1> %3, <8 x i64> %2, <8 x i64> %__src1796 ret <8 x i64> %41797}1798 1799define <8 x double> @test_mm512_set1_epi8(i8 signext %d) nounwind {1800; X86-LABEL: test_mm512_set1_epi8:1801; X86: # %bb.0: # %entry1802; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1803; X86-NEXT: vmovd %eax, %xmm01804; X86-NEXT: vpbroadcastb %xmm0, %ymm01805; X86-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm01806; X86-NEXT: retl1807;1808; X64-LABEL: test_mm512_set1_epi8:1809; X64: # %bb.0: # %entry1810; X64-NEXT: vmovd %edi, %xmm01811; X64-NEXT: vpbroadcastb %xmm0, %ymm01812; X64-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm01813; X64-NEXT: retq1814entry:1815 %vecinit.i = insertelement <64 x i8> undef, i8 %d, i32 01816 %vecinit63.i = shufflevector <64 x i8> %vecinit.i, <64 x i8> undef, <64 x i32> zeroinitializer1817 %0 = bitcast <64 x i8> %vecinit63.i to <8 x double>1818 ret <8 x double> %01819}1820 1821define <2 x double> @test_mm_cvtu32_sd(<2 x double> %__A, i32 %__B) {1822; X86-LABEL: test_mm_cvtu32_sd:1823; X86: # %bb.0: # %entry1824; X86-NEXT: vcvtusi2sdl {{[0-9]+}}(%esp), %xmm0, %xmm01825; X86-NEXT: retl1826;1827; X64-LABEL: test_mm_cvtu32_sd:1828; X64: # %bb.0: # %entry1829; X64-NEXT: vcvtusi2sd %edi, %xmm0, %xmm01830; X64-NEXT: retq1831entry:1832 %conv.i = uitofp i32 %__B to double1833 %vecins.i = insertelement <2 x double> %__A, double %conv.i, i32 01834 ret <2 x double> %vecins.i1835}1836 1837define <2 x double> @test_mm_cvtu64_sd(<2 x double> %__A, i64 %__B) {1838; X86-LABEL: test_mm_cvtu64_sd:1839; X86: # %bb.0: # %entry1840; X86-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero1841; X86-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm11842; X86-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]1843; X86-NEXT: vsubpd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1, %xmm11844; X86-NEXT: vshufpd {{.*#+}} xmm2 = xmm1[1,0]1845; X86-NEXT: vaddsd %xmm1, %xmm2, %xmm11846; X86-NEXT: vmovsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]1847; X86-NEXT: retl1848;1849; X64-LABEL: test_mm_cvtu64_sd:1850; X64: # %bb.0: # %entry1851; X64-NEXT: vcvtusi2sd %rdi, %xmm0, %xmm01852; X64-NEXT: retq1853entry:1854 %conv.i = uitofp i64 %__B to double1855 %vecins.i = insertelement <2 x double> %__A, double %conv.i, i32 01856 ret <2 x double> %vecins.i1857}1858 1859define <4 x float> @test_mm_cvtu32_ss(<4 x float> %__A, i32 %__B) {1860; X86-LABEL: test_mm_cvtu32_ss:1861; X86: # %bb.0: # %entry1862; X86-NEXT: vcvtusi2ssl {{[0-9]+}}(%esp), %xmm0, %xmm01863; X86-NEXT: retl1864;1865; X64-LABEL: test_mm_cvtu32_ss:1866; X64: # %bb.0: # %entry1867; X64-NEXT: vcvtusi2ss %edi, %xmm0, %xmm01868; X64-NEXT: retq1869entry:1870 %conv.i = uitofp i32 %__B to float1871 %vecins.i = insertelement <4 x float> %__A, float %conv.i, i32 01872 ret <4 x float> %vecins.i1873}1874 1875define <4 x float> @test_mm_cvtu64_ss(<4 x float> %__A, i64 %__B) {1876; X86-LABEL: test_mm_cvtu64_ss:1877; X86: # %bb.0: # %entry1878; X86-NEXT: pushl %ebp1879; X86-NEXT: .cfi_def_cfa_offset 81880; X86-NEXT: .cfi_offset %ebp, -81881; X86-NEXT: movl %esp, %ebp1882; X86-NEXT: .cfi_def_cfa_register %ebp1883; X86-NEXT: andl $-8, %esp1884; X86-NEXT: subl $16, %esp1885; X86-NEXT: movl 12(%ebp), %eax1886; X86-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero1887; X86-NEXT: vpinsrd $1, %eax, %xmm1, %xmm11888; X86-NEXT: vmovq %xmm1, {{[0-9]+}}(%esp)1889; X86-NEXT: shrl $31, %eax1890; X86-NEXT: fildll {{[0-9]+}}(%esp)1891; X86-NEXT: fadds {{\.?LCPI[0-9]+_[0-9]+}}(,%eax,4)1892; X86-NEXT: fstps {{[0-9]+}}(%esp)1893; X86-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero1894; X86-NEXT: vmovss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]1895; X86-NEXT: movl %ebp, %esp1896; X86-NEXT: popl %ebp1897; X86-NEXT: .cfi_def_cfa %esp, 41898; X86-NEXT: retl1899;1900; X64-LABEL: test_mm_cvtu64_ss:1901; X64: # %bb.0: # %entry1902; X64-NEXT: vcvtusi2ss %rdi, %xmm0, %xmm01903; X64-NEXT: retq1904entry:1905 %conv.i = uitofp i64 %__B to float1906 %vecins.i = insertelement <4 x float> %__A, float %conv.i, i32 01907 ret <4 x float> %vecins.i1908}1909 1910define <16 x float> @test_mm512_cvtph_ps(<4 x i64> %__A) {1911; CHECK-LABEL: test_mm512_cvtph_ps:1912; CHECK: # %bb.0: # %entry1913; CHECK-NEXT: vcvtph2ps %ymm0, %zmm01914; CHECK-NEXT: ret{{[l|q]}}1915entry:1916 %0 = bitcast <4 x i64> %__A to <16 x i16>1917 %1 = bitcast <16 x i16> %0 to <16 x half>1918 %2 = fpext <16 x half> %1 to <16 x float>1919 ret <16 x float> %21920}1921 1922define <16 x float> @test_mm512_mask_cvtph_ps(<16 x float> %__W, i16 zeroext %__U, <4 x i64> %__A) {1923; X86-LABEL: test_mm512_mask_cvtph_ps:1924; X86: # %bb.0: # %entry1925; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax1926; X86-NEXT: kmovw %eax, %k11927; X86-NEXT: vcvtph2ps %ymm1, %zmm0 {%k1}1928; X86-NEXT: retl1929;1930; X64-LABEL: test_mm512_mask_cvtph_ps:1931; X64: # %bb.0: # %entry1932; X64-NEXT: kmovw %edi, %k11933; X64-NEXT: vcvtph2ps %ymm1, %zmm0 {%k1}1934; X64-NEXT: retq1935entry:1936 %0 = bitcast <4 x i64> %__A to <16 x i16>1937 %1 = bitcast <16 x i16> %0 to <16 x half>1938 %2 = bitcast i16 %__U to <16 x i1>1939 %3 = fpext <16 x half> %1 to <16 x float>1940 %4 = select <16 x i1> %2, <16 x float> %3, <16 x float> %__W1941 ret <16 x float> %41942}1943 1944define <16 x float> @test_mm512_maskz_cvtph_ps(i16 zeroext %__U, <4 x i64> %__A) {1945; X86-LABEL: test_mm512_maskz_cvtph_ps:1946; X86: # %bb.0: # %entry1947; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax1948; X86-NEXT: kmovw %eax, %k11949; X86-NEXT: vcvtph2ps %ymm0, %zmm0 {%k1} {z}1950; X86-NEXT: retl1951;1952; X64-LABEL: test_mm512_maskz_cvtph_ps:1953; X64: # %bb.0: # %entry1954; X64-NEXT: kmovw %edi, %k11955; X64-NEXT: vcvtph2ps %ymm0, %zmm0 {%k1} {z}1956; X64-NEXT: retq1957entry:1958 %0 = bitcast <4 x i64> %__A to <16 x i16>1959 %1 = bitcast <16 x i16> %0 to <16 x half>1960 %2 = bitcast i16 %__U to <16 x i1>1961 %3 = fpext <16 x half> %1 to <16 x float>1962 %4 = select <16 x i1> %2, <16 x float> %3, <16 x float> zeroinitializer1963 ret <16 x float> %41964}1965 1966define <8 x double> @test_mm512_cvtps_pd(<8 x float> %__A) {1967; CHECK-LABEL: test_mm512_cvtps_pd:1968; CHECK: # %bb.0: # %entry1969; CHECK-NEXT: vcvtps2pd %ymm0, %zmm01970; CHECK-NEXT: ret{{[l|q]}}1971entry:1972 %conv.i = fpext <8 x float> %__A to <8 x double>1973 ret <8 x double> %conv.i1974}1975 1976define <8 x double> @test_mm512_cvtpslo_pd(<16 x float> %__A) {1977; CHECK-LABEL: test_mm512_cvtpslo_pd:1978; CHECK: # %bb.0: # %entry1979; CHECK-NEXT: vcvtps2pd %ymm0, %zmm01980; CHECK-NEXT: ret{{[l|q]}}1981entry:1982 %shuffle.i.i = shufflevector <16 x float> %__A, <16 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>1983 %conv.i.i = fpext <8 x float> %shuffle.i.i to <8 x double>1984 ret <8 x double> %conv.i.i1985}1986 1987define <8 x double> @test_mm512_mask_cvtps_pd(<8 x double> %__W, i8 zeroext %__U, <8 x float> %__A) {1988; X86-LABEL: test_mm512_mask_cvtps_pd:1989; X86: # %bb.0: # %entry1990; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax1991; X86-NEXT: kmovw %eax, %k11992; X86-NEXT: vcvtps2pd %ymm1, %zmm0 {%k1}1993; X86-NEXT: retl1994;1995; X64-LABEL: test_mm512_mask_cvtps_pd:1996; X64: # %bb.0: # %entry1997; X64-NEXT: kmovw %edi, %k11998; X64-NEXT: vcvtps2pd %ymm1, %zmm0 {%k1}1999; X64-NEXT: retq2000entry:2001 %conv.i.i = fpext <8 x float> %__A to <8 x double>2002 %0 = bitcast i8 %__U to <8 x i1>2003 %1 = select <8 x i1> %0, <8 x double> %conv.i.i, <8 x double> %__W2004 ret <8 x double> %12005}2006 2007define <8 x double> @test_mm512_mask_cvtpslo_pd(<8 x double> %__W, i8 zeroext %__U, <16 x float> %__A) {2008; X86-LABEL: test_mm512_mask_cvtpslo_pd:2009; X86: # %bb.0: # %entry2010; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2011; X86-NEXT: kmovw %eax, %k12012; X86-NEXT: vcvtps2pd %ymm1, %zmm0 {%k1}2013; X86-NEXT: retl2014;2015; X64-LABEL: test_mm512_mask_cvtpslo_pd:2016; X64: # %bb.0: # %entry2017; X64-NEXT: kmovw %edi, %k12018; X64-NEXT: vcvtps2pd %ymm1, %zmm0 {%k1}2019; X64-NEXT: retq2020entry:2021 %shuffle.i.i = shufflevector <16 x float> %__A, <16 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>2022 %conv.i.i.i = fpext <8 x float> %shuffle.i.i to <8 x double>2023 %0 = bitcast i8 %__U to <8 x i1>2024 %1 = select <8 x i1> %0, <8 x double> %conv.i.i.i, <8 x double> %__W2025 ret <8 x double> %12026}2027 2028define <8 x double> @test_mm512_maskz_cvtps_pd(i8 zeroext %__U, <8 x float> %__A) {2029; X86-LABEL: test_mm512_maskz_cvtps_pd:2030; X86: # %bb.0: # %entry2031; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2032; X86-NEXT: kmovw %eax, %k12033; X86-NEXT: vcvtps2pd %ymm0, %zmm0 {%k1} {z}2034; X86-NEXT: retl2035;2036; X64-LABEL: test_mm512_maskz_cvtps_pd:2037; X64: # %bb.0: # %entry2038; X64-NEXT: kmovw %edi, %k12039; X64-NEXT: vcvtps2pd %ymm0, %zmm0 {%k1} {z}2040; X64-NEXT: retq2041entry:2042 %conv.i.i = fpext <8 x float> %__A to <8 x double>2043 %0 = bitcast i8 %__U to <8 x i1>2044 %1 = select <8 x i1> %0, <8 x double> %conv.i.i, <8 x double> zeroinitializer2045 ret <8 x double> %12046}2047 2048define <2 x i64> @test_mm512_cvtepi32_epi8(<8 x i64> %__A) {2049; CHECK-LABEL: test_mm512_cvtepi32_epi8:2050; CHECK: # %bb.0: # %entry2051; CHECK-NEXT: vpmovdb %zmm0, %xmm02052; CHECK-NEXT: vzeroupper2053; CHECK-NEXT: ret{{[l|q]}}2054entry:2055 %0 = bitcast <8 x i64> %__A to <16 x i32>2056 %conv.i = trunc <16 x i32> %0 to <16 x i8>2057 %1 = bitcast <16 x i8> %conv.i to <2 x i64>2058 ret <2 x i64> %12059}2060 2061define <2 x i64> @test_mm512_mask_cvtepi32_epi8(<2 x i64> %__O, i16 zeroext %__M, <8 x i64> %__A) {2062; X86-LABEL: test_mm512_mask_cvtepi32_epi8:2063; X86: # %bb.0: # %entry2064; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax2065; X86-NEXT: kmovw %eax, %k12066; X86-NEXT: vpmovdb %zmm1, %xmm0 {%k1}2067; X86-NEXT: vzeroupper2068; X86-NEXT: retl2069;2070; X64-LABEL: test_mm512_mask_cvtepi32_epi8:2071; X64: # %bb.0: # %entry2072; X64-NEXT: kmovw %edi, %k12073; X64-NEXT: vpmovdb %zmm1, %xmm0 {%k1}2074; X64-NEXT: vzeroupper2075; X64-NEXT: retq2076entry:2077 %0 = bitcast <8 x i64> %__A to <16 x i32>2078 %1 = bitcast <2 x i64> %__O to <16 x i8>2079 %2 = tail call <16 x i8> @llvm.x86.avx512.mask.pmov.db.512(<16 x i32> %0, <16 x i8> %1, i16 %__M)2080 %3 = bitcast <16 x i8> %2 to <2 x i64>2081 ret <2 x i64> %32082}2083 2084define <2 x i64> @test_mm512_maskz_cvtepi32_epi8(i16 zeroext %__M, <8 x i64> %__A) {2085; X86-LABEL: test_mm512_maskz_cvtepi32_epi8:2086; X86: # %bb.0: # %entry2087; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax2088; X86-NEXT: kmovw %eax, %k12089; X86-NEXT: vpmovdb %zmm0, %xmm0 {%k1} {z}2090; X86-NEXT: vzeroupper2091; X86-NEXT: retl2092;2093; X64-LABEL: test_mm512_maskz_cvtepi32_epi8:2094; X64: # %bb.0: # %entry2095; X64-NEXT: kmovw %edi, %k12096; X64-NEXT: vpmovdb %zmm0, %xmm0 {%k1} {z}2097; X64-NEXT: vzeroupper2098; X64-NEXT: retq2099entry:2100 %0 = bitcast <8 x i64> %__A to <16 x i32>2101 %1 = tail call <16 x i8> @llvm.x86.avx512.mask.pmov.db.512(<16 x i32> %0, <16 x i8> zeroinitializer, i16 %__M)2102 %2 = bitcast <16 x i8> %1 to <2 x i64>2103 ret <2 x i64> %22104}2105 2106define <4 x i64> @test_mm512_cvtepi64_epi32(<8 x i64> %__A) {2107; CHECK-LABEL: test_mm512_cvtepi64_epi32:2108; CHECK: # %bb.0: # %entry2109; CHECK-NEXT: vpmovqd %zmm0, %ymm02110; CHECK-NEXT: ret{{[l|q]}}2111entry:2112 %conv.i = trunc <8 x i64> %__A to <8 x i32>2113 %0 = bitcast <8 x i32> %conv.i to <4 x i64>2114 ret <4 x i64> %02115}2116 2117define <4 x i64> @test_mm512_mask_cvtepi64_epi32(<4 x i64> %__O, i8 zeroext %__M, <8 x i64> %__A) {2118; X86-LABEL: test_mm512_mask_cvtepi64_epi32:2119; X86: # %bb.0: # %entry2120; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2121; X86-NEXT: kmovw %eax, %k12122; X86-NEXT: vpmovqd %zmm1, %ymm0 {%k1}2123; X86-NEXT: retl2124;2125; X64-LABEL: test_mm512_mask_cvtepi64_epi32:2126; X64: # %bb.0: # %entry2127; X64-NEXT: kmovw %edi, %k12128; X64-NEXT: vpmovqd %zmm1, %ymm0 {%k1}2129; X64-NEXT: retq2130entry:2131 %conv.i.i = trunc <8 x i64> %__A to <8 x i32>2132 %0 = bitcast <4 x i64> %__O to <8 x i32>2133 %1 = bitcast i8 %__M to <8 x i1>2134 %2 = select <8 x i1> %1, <8 x i32> %conv.i.i, <8 x i32> %02135 %3 = bitcast <8 x i32> %2 to <4 x i64>2136 ret <4 x i64> %32137}2138 2139define <4 x i64> @test_mm512_maskz_cvtepi64_epi32(i8 zeroext %__M, <8 x i64> %__A) {2140; X86-LABEL: test_mm512_maskz_cvtepi64_epi32:2141; X86: # %bb.0: # %entry2142; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2143; X86-NEXT: kmovw %eax, %k12144; X86-NEXT: vpmovqd %zmm0, %ymm0 {%k1} {z}2145; X86-NEXT: retl2146;2147; X64-LABEL: test_mm512_maskz_cvtepi64_epi32:2148; X64: # %bb.0: # %entry2149; X64-NEXT: kmovw %edi, %k12150; X64-NEXT: vpmovqd %zmm0, %ymm0 {%k1} {z}2151; X64-NEXT: retq2152entry:2153 %conv.i.i = trunc <8 x i64> %__A to <8 x i32>2154 %0 = bitcast i8 %__M to <8 x i1>2155 %1 = select <8 x i1> %0, <8 x i32> %conv.i.i, <8 x i32> zeroinitializer2156 %2 = bitcast <8 x i32> %1 to <4 x i64>2157 ret <4 x i64> %22158}2159 2160define <2 x i64> @test_mm512_cvtepi64_epi16(<8 x i64> %__A) {2161; CHECK-LABEL: test_mm512_cvtepi64_epi16:2162; CHECK: # %bb.0: # %entry2163; CHECK-NEXT: vpmovqw %zmm0, %xmm02164; CHECK-NEXT: vzeroupper2165; CHECK-NEXT: ret{{[l|q]}}2166entry:2167 %conv.i = trunc <8 x i64> %__A to <8 x i16>2168 %0 = bitcast <8 x i16> %conv.i to <2 x i64>2169 ret <2 x i64> %02170}2171 2172define <2 x i64> @test_mm512_mask_cvtepi64_epi16(<2 x i64> %__O, i8 zeroext %__M, <8 x i64> %__A) {2173; X86-LABEL: test_mm512_mask_cvtepi64_epi16:2174; X86: # %bb.0: # %entry2175; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2176; X86-NEXT: kmovw %eax, %k12177; X86-NEXT: vpmovqw %zmm1, %xmm0 {%k1}2178; X86-NEXT: vzeroupper2179; X86-NEXT: retl2180;2181; X64-LABEL: test_mm512_mask_cvtepi64_epi16:2182; X64: # %bb.0: # %entry2183; X64-NEXT: kmovw %edi, %k12184; X64-NEXT: vpmovqw %zmm1, %xmm0 {%k1}2185; X64-NEXT: vzeroupper2186; X64-NEXT: retq2187entry:2188 %0 = bitcast <2 x i64> %__O to <8 x i16>2189 %1 = tail call <8 x i16> @llvm.x86.avx512.mask.pmov.qw.512(<8 x i64> %__A, <8 x i16> %0, i8 %__M)2190 %2 = bitcast <8 x i16> %1 to <2 x i64>2191 ret <2 x i64> %22192}2193 2194define <2 x i64> @test_mm512_maskz_cvtepi64_epi16(i8 zeroext %__M, <8 x i64> %__A) {2195; X86-LABEL: test_mm512_maskz_cvtepi64_epi16:2196; X86: # %bb.0: # %entry2197; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2198; X86-NEXT: kmovw %eax, %k12199; X86-NEXT: vpmovqw %zmm0, %xmm0 {%k1} {z}2200; X86-NEXT: vzeroupper2201; X86-NEXT: retl2202;2203; X64-LABEL: test_mm512_maskz_cvtepi64_epi16:2204; X64: # %bb.0: # %entry2205; X64-NEXT: kmovw %edi, %k12206; X64-NEXT: vpmovqw %zmm0, %xmm0 {%k1} {z}2207; X64-NEXT: vzeroupper2208; X64-NEXT: retq2209entry:2210 %0 = tail call <8 x i16> @llvm.x86.avx512.mask.pmov.qw.512(<8 x i64> %__A, <8 x i16> zeroinitializer, i8 %__M)2211 %1 = bitcast <8 x i16> %0 to <2 x i64>2212 ret <2 x i64> %12213}2214 2215declare <16 x i8> @llvm.x86.avx512.mask.pmov.db.512(<16 x i32>, <16 x i8>, i16)2216declare <8 x i16> @llvm.x86.avx512.mask.pmov.qw.512(<8 x i64>, <8 x i16>, i8)2217 2218define <8 x i64> @test_mm512_ternarylogic_epi32(<8 x i64> %__A, <8 x i64> %__B, <8 x i64> %__C) {2219; CHECK-LABEL: test_mm512_ternarylogic_epi32:2220; CHECK: # %bb.0: # %entry2221; CHECK-NEXT: vpternlogd {{.*#+}} zmm0 = zmm1 & ~(zmm0 | zmm2)2222; CHECK-NEXT: ret{{[l|q]}}2223entry:2224 %0 = bitcast <8 x i64> %__A to <16 x i32>2225 %1 = bitcast <8 x i64> %__B to <16 x i32>2226 %2 = bitcast <8 x i64> %__C to <16 x i32>2227 %3 = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %0, <16 x i32> %1, <16 x i32> %2, i32 4)2228 %4 = bitcast <16 x i32> %3 to <8 x i64>2229 ret <8 x i64> %42230}2231 2232declare <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i32) #12233 2234define <8 x i64> @test_mm512_mask_ternarylogic_epi32(<8 x i64> %__A, i16 zeroext %__U, <8 x i64> %__B, <8 x i64> %__C) {2235; X86-LABEL: test_mm512_mask_ternarylogic_epi32:2236; X86: # %bb.0: # %entry2237; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax2238; X86-NEXT: kmovw %eax, %k12239; X86-NEXT: vpternlogd {{.*#+}} zmm0 {%k1} = zmm1 & ~(zmm0 | zmm2)2240; X86-NEXT: retl2241;2242; X64-LABEL: test_mm512_mask_ternarylogic_epi32:2243; X64: # %bb.0: # %entry2244; X64-NEXT: kmovw %edi, %k12245; X64-NEXT: vpternlogd {{.*#+}} zmm0 {%k1} = zmm1 & ~(zmm0 | zmm2)2246; X64-NEXT: retq2247entry:2248 %0 = bitcast <8 x i64> %__A to <16 x i32>2249 %1 = bitcast <8 x i64> %__B to <16 x i32>2250 %2 = bitcast <8 x i64> %__C to <16 x i32>2251 %3 = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %0, <16 x i32> %1, <16 x i32> %2, i32 4)2252 %4 = bitcast i16 %__U to <16 x i1>2253 %5 = select <16 x i1> %4, <16 x i32> %3, <16 x i32> %02254 %6 = bitcast <16 x i32> %5 to <8 x i64>2255 ret <8 x i64> %62256}2257 2258define <8 x i64> @test_mm512_maskz_ternarylogic_epi32(i16 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B, <8 x i64> %__C) {2259; X86-LABEL: test_mm512_maskz_ternarylogic_epi32:2260; X86: # %bb.0: # %entry2261; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax2262; X86-NEXT: kmovw %eax, %k12263; X86-NEXT: vpternlogd {{.*#+}} zmm0 {%k1} {z} = zmm1 & ~(zmm0 | zmm2)2264; X86-NEXT: retl2265;2266; X64-LABEL: test_mm512_maskz_ternarylogic_epi32:2267; X64: # %bb.0: # %entry2268; X64-NEXT: kmovw %edi, %k12269; X64-NEXT: vpternlogd {{.*#+}} zmm0 {%k1} {z} = zmm1 & ~(zmm0 | zmm2)2270; X64-NEXT: retq2271entry:2272 %0 = bitcast <8 x i64> %__A to <16 x i32>2273 %1 = bitcast <8 x i64> %__B to <16 x i32>2274 %2 = bitcast <8 x i64> %__C to <16 x i32>2275 %3 = tail call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %0, <16 x i32> %1, <16 x i32> %2, i32 4)2276 %4 = bitcast i16 %__U to <16 x i1>2277 %5 = select <16 x i1> %4, <16 x i32> %3, <16 x i32> zeroinitializer2278 %6 = bitcast <16 x i32> %5 to <8 x i64>2279 ret <8 x i64> %62280}2281 2282define <8 x i64> @test_mm512_ternarylogic_epi64(<8 x i64> %__A, <8 x i64> %__B, <8 x i64> %__C) {2283; CHECK-LABEL: test_mm512_ternarylogic_epi64:2284; CHECK: # %bb.0: # %entry2285; CHECK-NEXT: vpternlogq {{.*#+}} zmm0 = zmm1 & ~(zmm0 | zmm2)2286; CHECK-NEXT: ret{{[l|q]}}2287entry:2288 %0 = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %__A, <8 x i64> %__B, <8 x i64> %__C, i32 4)2289 ret <8 x i64> %02290}2291 2292declare <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i32) #12293 2294define <8 x i64> @test_mm512_mask_ternarylogic_epi64(<8 x i64> %__A, i8 zeroext %__U, <8 x i64> %__B, <8 x i64> %__C) {2295; X86-LABEL: test_mm512_mask_ternarylogic_epi64:2296; X86: # %bb.0: # %entry2297; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2298; X86-NEXT: kmovw %eax, %k12299; X86-NEXT: vpternlogq {{.*#+}} zmm0 {%k1} = zmm1 & ~(zmm0 | zmm2)2300; X86-NEXT: retl2301;2302; X64-LABEL: test_mm512_mask_ternarylogic_epi64:2303; X64: # %bb.0: # %entry2304; X64-NEXT: kmovw %edi, %k12305; X64-NEXT: vpternlogq {{.*#+}} zmm0 {%k1} = zmm1 & ~(zmm0 | zmm2)2306; X64-NEXT: retq2307entry:2308 %0 = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %__A, <8 x i64> %__B, <8 x i64> %__C, i32 4)2309 %1 = bitcast i8 %__U to <8 x i1>2310 %2 = select <8 x i1> %1, <8 x i64> %0, <8 x i64> %__A2311 ret <8 x i64> %22312}2313 2314define <8 x i64> @test_mm512_maskz_ternarylogic_epi64(i8 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B, <8 x i64> %__C) {2315; X86-LABEL: test_mm512_maskz_ternarylogic_epi64:2316; X86: # %bb.0: # %entry2317; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2318; X86-NEXT: kmovw %eax, %k12319; X86-NEXT: vpternlogq {{.*#+}} zmm0 {%k1} {z} = zmm1 & ~(zmm0 | zmm2)2320; X86-NEXT: retl2321;2322; X64-LABEL: test_mm512_maskz_ternarylogic_epi64:2323; X64: # %bb.0: # %entry2324; X64-NEXT: kmovw %edi, %k12325; X64-NEXT: vpternlogq {{.*#+}} zmm0 {%k1} {z} = zmm1 & ~(zmm0 | zmm2)2326; X64-NEXT: retq2327entry:2328 %0 = tail call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %__A, <8 x i64> %__B, <8 x i64> %__C, i32 4)2329 %1 = bitcast i8 %__U to <8 x i1>2330 %2 = select <8 x i1> %1, <8 x i64> %0, <8 x i64> zeroinitializer2331 ret <8 x i64> %22332}2333 2334declare <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32>, <16 x i32>, <16 x i32>)2335 2336define <8 x i64> @test_mm512_mask2_permutex2var_epi32(<8 x i64> %__A, <8 x i64> %__I, i16 zeroext %__U, <8 x i64> %__B) {2337; X86-LABEL: test_mm512_mask2_permutex2var_epi32:2338; X86: # %bb.0: # %entry2339; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax2340; X86-NEXT: kmovw %eax, %k12341; X86-NEXT: vpermi2d %zmm2, %zmm0, %zmm1 {%k1}2342; X86-NEXT: vmovdqa64 %zmm1, %zmm02343; X86-NEXT: retl2344;2345; X64-LABEL: test_mm512_mask2_permutex2var_epi32:2346; X64: # %bb.0: # %entry2347; X64-NEXT: kmovw %edi, %k12348; X64-NEXT: vpermi2d %zmm2, %zmm0, %zmm1 {%k1}2349; X64-NEXT: vmovdqa64 %zmm1, %zmm02350; X64-NEXT: retq2351entry:2352 %0 = bitcast <8 x i64> %__A to <16 x i32>2353 %1 = bitcast <8 x i64> %__I to <16 x i32>2354 %2 = bitcast <8 x i64> %__B to <16 x i32>2355 %3 = tail call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> %0, <16 x i32> %1, <16 x i32> %2)2356 %4 = bitcast i16 %__U to <16 x i1>2357 %5 = select <16 x i1> %4, <16 x i32> %3, <16 x i32> %12358 %6 = bitcast <16 x i32> %5 to <8 x i64>2359 ret <8 x i64> %62360}2361 2362declare <8 x double> @llvm.x86.avx512.vpermi2var.pd.512(<8 x double>, <8 x i64>, <8 x double>)2363 2364define <8 x double> @test_mm512_mask2_permutex2var_pd(<8 x double> %__A, <8 x i64> %__I, i8 zeroext %__U, <8 x double> %__B) {2365; X86-LABEL: test_mm512_mask2_permutex2var_pd:2366; X86: # %bb.0: # %entry2367; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2368; X86-NEXT: kmovw %eax, %k12369; X86-NEXT: vpermi2pd %zmm2, %zmm0, %zmm1 {%k1}2370; X86-NEXT: vmovapd %zmm1, %zmm02371; X86-NEXT: retl2372;2373; X64-LABEL: test_mm512_mask2_permutex2var_pd:2374; X64: # %bb.0: # %entry2375; X64-NEXT: kmovw %edi, %k12376; X64-NEXT: vpermi2pd %zmm2, %zmm0, %zmm1 {%k1}2377; X64-NEXT: vmovapd %zmm1, %zmm02378; X64-NEXT: retq2379entry:2380 %0 = tail call <8 x double> @llvm.x86.avx512.vpermi2var.pd.512(<8 x double> %__A, <8 x i64> %__I, <8 x double> %__B)2381 %1 = bitcast <8 x i64> %__I to <8 x double>2382 %2 = bitcast i8 %__U to <8 x i1>2383 %3 = select <8 x i1> %2, <8 x double> %0, <8 x double> %12384 ret <8 x double> %32385}2386 2387declare <16 x float> @llvm.x86.avx512.vpermi2var.ps.512(<16 x float>, <16 x i32>, <16 x float>)2388 2389define <16 x float> @test_mm512_mask2_permutex2var_ps(<16 x float> %__A, <8 x i64> %__I, i16 zeroext %__U, <16 x float> %__B) {2390; X86-LABEL: test_mm512_mask2_permutex2var_ps:2391; X86: # %bb.0: # %entry2392; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax2393; X86-NEXT: kmovw %eax, %k12394; X86-NEXT: vpermi2ps %zmm2, %zmm0, %zmm1 {%k1}2395; X86-NEXT: vmovaps %zmm1, %zmm02396; X86-NEXT: retl2397;2398; X64-LABEL: test_mm512_mask2_permutex2var_ps:2399; X64: # %bb.0: # %entry2400; X64-NEXT: kmovw %edi, %k12401; X64-NEXT: vpermi2ps %zmm2, %zmm0, %zmm1 {%k1}2402; X64-NEXT: vmovaps %zmm1, %zmm02403; X64-NEXT: retq2404entry:2405 %0 = bitcast <8 x i64> %__I to <16 x i32>2406 %1 = tail call <16 x float> @llvm.x86.avx512.vpermi2var.ps.512(<16 x float> %__A, <16 x i32> %0, <16 x float> %__B)2407 %2 = bitcast <8 x i64> %__I to <16 x float>2408 %3 = bitcast i16 %__U to <16 x i1>2409 %4 = select <16 x i1> %3, <16 x float> %1, <16 x float> %22410 ret <16 x float> %42411}2412 2413declare <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64>, <8 x i64>, <8 x i64>)2414 2415define <8 x i64> @test_mm512_mask2_permutex2var_epi64(<8 x i64> %__A, <8 x i64> %__I, i8 zeroext %__U, <8 x i64> %__B) {2416; X86-LABEL: test_mm512_mask2_permutex2var_epi64:2417; X86: # %bb.0: # %entry2418; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2419; X86-NEXT: kmovw %eax, %k12420; X86-NEXT: vpermi2q %zmm2, %zmm0, %zmm1 {%k1}2421; X86-NEXT: vmovdqa64 %zmm1, %zmm02422; X86-NEXT: retl2423;2424; X64-LABEL: test_mm512_mask2_permutex2var_epi64:2425; X64: # %bb.0: # %entry2426; X64-NEXT: kmovw %edi, %k12427; X64-NEXT: vpermi2q %zmm2, %zmm0, %zmm1 {%k1}2428; X64-NEXT: vmovdqa64 %zmm1, %zmm02429; X64-NEXT: retq2430entry:2431 %0 = tail call <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64> %__A, <8 x i64> %__I, <8 x i64> %__B)2432 %1 = bitcast i8 %__U to <8 x i1>2433 %2 = select <8 x i1> %1, <8 x i64> %0, <8 x i64> %__I2434 ret <8 x i64> %22435}2436 2437define <8 x i64> @test_mm512_permutex2var_epi32(<8 x i64> %__A, <8 x i64> %__I, <8 x i64> %__B) {2438; CHECK-LABEL: test_mm512_permutex2var_epi32:2439; CHECK: # %bb.0: # %entry2440; CHECK-NEXT: vpermt2d %zmm2, %zmm1, %zmm02441; CHECK-NEXT: ret{{[l|q]}}2442entry:2443 %0 = bitcast <8 x i64> %__A to <16 x i32>2444 %1 = bitcast <8 x i64> %__I to <16 x i32>2445 %2 = bitcast <8 x i64> %__B to <16 x i32>2446 %3 = tail call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> %0, <16 x i32> %1, <16 x i32> %2)2447 %4 = bitcast <16 x i32> %3 to <8 x i64>2448 ret <8 x i64> %42449}2450 2451define <8 x i64> @test_mm512_maskz_permutex2var_epi32(i16 zeroext %__U, <8 x i64> %__A, <8 x i64> %__I, <8 x i64> %__B) {2452; X86-LABEL: test_mm512_maskz_permutex2var_epi32:2453; X86: # %bb.0: # %entry2454; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax2455; X86-NEXT: kmovw %eax, %k12456; X86-NEXT: vpermt2d %zmm2, %zmm1, %zmm0 {%k1} {z}2457; X86-NEXT: retl2458;2459; X64-LABEL: test_mm512_maskz_permutex2var_epi32:2460; X64: # %bb.0: # %entry2461; X64-NEXT: kmovw %edi, %k12462; X64-NEXT: vpermt2d %zmm2, %zmm1, %zmm0 {%k1} {z}2463; X64-NEXT: retq2464entry:2465 %0 = bitcast <8 x i64> %__A to <16 x i32>2466 %1 = bitcast <8 x i64> %__I to <16 x i32>2467 %2 = bitcast <8 x i64> %__B to <16 x i32>2468 %3 = tail call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> %0, <16 x i32> %1, <16 x i32> %2)2469 %4 = bitcast i16 %__U to <16 x i1>2470 %5 = select <16 x i1> %4, <16 x i32> %3, <16 x i32> zeroinitializer2471 %6 = bitcast <16 x i32> %5 to <8 x i64>2472 ret <8 x i64> %62473}2474 2475define <8 x i64> @test_mm512_mask_permutex2var_epi32(<8 x i64> %__A, i16 zeroext %__U, <8 x i64> %__I, <8 x i64> %__B) {2476; X86-LABEL: test_mm512_mask_permutex2var_epi32:2477; X86: # %bb.0: # %entry2478; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax2479; X86-NEXT: kmovw %eax, %k12480; X86-NEXT: vpermt2d %zmm2, %zmm1, %zmm0 {%k1}2481; X86-NEXT: retl2482;2483; X64-LABEL: test_mm512_mask_permutex2var_epi32:2484; X64: # %bb.0: # %entry2485; X64-NEXT: kmovw %edi, %k12486; X64-NEXT: vpermt2d %zmm2, %zmm1, %zmm0 {%k1}2487; X64-NEXT: retq2488entry:2489 %0 = bitcast <8 x i64> %__A to <16 x i32>2490 %1 = bitcast <8 x i64> %__I to <16 x i32>2491 %2 = bitcast <8 x i64> %__B to <16 x i32>2492 %3 = tail call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> %0, <16 x i32> %1, <16 x i32> %2)2493 %4 = bitcast i16 %__U to <16 x i1>2494 %5 = select <16 x i1> %4, <16 x i32> %3, <16 x i32> %02495 %6 = bitcast <16 x i32> %5 to <8 x i64>2496 ret <8 x i64> %62497}2498 2499define <8 x double> @test_mm512_permutex2var_pd(<8 x double> %__A, <8 x i64> %__I, <8 x double> %__B) {2500; CHECK-LABEL: test_mm512_permutex2var_pd:2501; CHECK: # %bb.0: # %entry2502; CHECK-NEXT: vpermt2pd %zmm2, %zmm1, %zmm02503; CHECK-NEXT: ret{{[l|q]}}2504entry:2505 %0 = tail call <8 x double> @llvm.x86.avx512.vpermi2var.pd.512(<8 x double> %__A, <8 x i64> %__I, <8 x double> %__B)2506 ret <8 x double> %02507}2508 2509define <8 x double> @test_mm512_mask_permutex2var_pd(<8 x double> %__A, i8 zeroext %__U, <8 x i64> %__I, <8 x double> %__B) {2510; X86-LABEL: test_mm512_mask_permutex2var_pd:2511; X86: # %bb.0: # %entry2512; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2513; X86-NEXT: kmovw %eax, %k12514; X86-NEXT: vpermt2pd %zmm2, %zmm1, %zmm0 {%k1}2515; X86-NEXT: retl2516;2517; X64-LABEL: test_mm512_mask_permutex2var_pd:2518; X64: # %bb.0: # %entry2519; X64-NEXT: kmovw %edi, %k12520; X64-NEXT: vpermt2pd %zmm2, %zmm1, %zmm0 {%k1}2521; X64-NEXT: retq2522entry:2523 %0 = tail call <8 x double> @llvm.x86.avx512.vpermi2var.pd.512(<8 x double> %__A, <8 x i64> %__I, <8 x double> %__B)2524 %1 = bitcast i8 %__U to <8 x i1>2525 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__A2526 ret <8 x double> %22527}2528 2529define <8 x double> @test_mm512_maskz_permutex2var_pd(i8 zeroext %__U, <8 x double> %__A, <8 x i64> %__I, <8 x double> %__B) {2530; X86-LABEL: test_mm512_maskz_permutex2var_pd:2531; X86: # %bb.0: # %entry2532; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2533; X86-NEXT: kmovw %eax, %k12534; X86-NEXT: vpermt2pd %zmm2, %zmm1, %zmm0 {%k1} {z}2535; X86-NEXT: retl2536;2537; X64-LABEL: test_mm512_maskz_permutex2var_pd:2538; X64: # %bb.0: # %entry2539; X64-NEXT: kmovw %edi, %k12540; X64-NEXT: vpermt2pd %zmm2, %zmm1, %zmm0 {%k1} {z}2541; X64-NEXT: retq2542entry:2543 %0 = tail call <8 x double> @llvm.x86.avx512.vpermi2var.pd.512(<8 x double> %__A, <8 x i64> %__I, <8 x double> %__B)2544 %1 = bitcast i8 %__U to <8 x i1>2545 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> zeroinitializer2546 ret <8 x double> %22547}2548 2549define <16 x float> @test_mm512_permutex2var_ps(<16 x float> %__A, <8 x i64> %__I, <16 x float> %__B) {2550; CHECK-LABEL: test_mm512_permutex2var_ps:2551; CHECK: # %bb.0: # %entry2552; CHECK-NEXT: vpermt2ps %zmm2, %zmm1, %zmm02553; CHECK-NEXT: ret{{[l|q]}}2554entry:2555 %0 = bitcast <8 x i64> %__I to <16 x i32>2556 %1 = tail call <16 x float> @llvm.x86.avx512.vpermi2var.ps.512(<16 x float> %__A, <16 x i32> %0, <16 x float> %__B)2557 ret <16 x float> %12558}2559 2560define <16 x float> @test_mm512_mask_permutex2var_ps(<16 x float> %__A, i16 zeroext %__U, <8 x i64> %__I, <16 x float> %__B) {2561; X86-LABEL: test_mm512_mask_permutex2var_ps:2562; X86: # %bb.0: # %entry2563; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax2564; X86-NEXT: kmovw %eax, %k12565; X86-NEXT: vpermt2ps %zmm2, %zmm1, %zmm0 {%k1}2566; X86-NEXT: retl2567;2568; X64-LABEL: test_mm512_mask_permutex2var_ps:2569; X64: # %bb.0: # %entry2570; X64-NEXT: kmovw %edi, %k12571; X64-NEXT: vpermt2ps %zmm2, %zmm1, %zmm0 {%k1}2572; X64-NEXT: retq2573entry:2574 %0 = bitcast <8 x i64> %__I to <16 x i32>2575 %1 = tail call <16 x float> @llvm.x86.avx512.vpermi2var.ps.512(<16 x float> %__A, <16 x i32> %0, <16 x float> %__B)2576 %2 = bitcast i16 %__U to <16 x i1>2577 %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %__A2578 ret <16 x float> %32579}2580 2581define <16 x float> @test_mm512_maskz_permutex2var_ps(i16 zeroext %__U, <16 x float> %__A, <8 x i64> %__I, <16 x float> %__B) {2582; X86-LABEL: test_mm512_maskz_permutex2var_ps:2583; X86: # %bb.0: # %entry2584; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax2585; X86-NEXT: kmovw %eax, %k12586; X86-NEXT: vpermt2ps %zmm2, %zmm1, %zmm0 {%k1} {z}2587; X86-NEXT: retl2588;2589; X64-LABEL: test_mm512_maskz_permutex2var_ps:2590; X64: # %bb.0: # %entry2591; X64-NEXT: kmovw %edi, %k12592; X64-NEXT: vpermt2ps %zmm2, %zmm1, %zmm0 {%k1} {z}2593; X64-NEXT: retq2594entry:2595 %0 = bitcast <8 x i64> %__I to <16 x i32>2596 %1 = tail call <16 x float> @llvm.x86.avx512.vpermi2var.ps.512(<16 x float> %__A, <16 x i32> %0, <16 x float> %__B)2597 %2 = bitcast i16 %__U to <16 x i1>2598 %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer2599 ret <16 x float> %32600}2601 2602define <8 x i64> @test_mm512_permutex2var_epi64(<8 x i64> %__A, <8 x i64> %__I, <8 x i64> %__B) {2603; CHECK-LABEL: test_mm512_permutex2var_epi64:2604; CHECK: # %bb.0: # %entry2605; CHECK-NEXT: vpermt2q %zmm2, %zmm1, %zmm02606; CHECK-NEXT: ret{{[l|q]}}2607entry:2608 %0 = tail call <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64> %__A, <8 x i64> %__I, <8 x i64> %__B)2609 ret <8 x i64> %02610}2611 2612define <8 x i64> @test_mm512_mask_permutex2var_epi64(<8 x i64> %__A, i8 zeroext %__U, <8 x i64> %__I, <8 x i64> %__B) {2613; X86-LABEL: test_mm512_mask_permutex2var_epi64:2614; X86: # %bb.0: # %entry2615; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2616; X86-NEXT: kmovw %eax, %k12617; X86-NEXT: vpermt2q %zmm2, %zmm1, %zmm0 {%k1}2618; X86-NEXT: retl2619;2620; X64-LABEL: test_mm512_mask_permutex2var_epi64:2621; X64: # %bb.0: # %entry2622; X64-NEXT: kmovw %edi, %k12623; X64-NEXT: vpermt2q %zmm2, %zmm1, %zmm0 {%k1}2624; X64-NEXT: retq2625entry:2626 %0 = tail call <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64> %__A, <8 x i64> %__I, <8 x i64> %__B)2627 %1 = bitcast i8 %__U to <8 x i1>2628 %2 = select <8 x i1> %1, <8 x i64> %0, <8 x i64> %__A2629 ret <8 x i64> %22630}2631 2632define <8 x i64> @test_mm512_maskz_permutex2var_epi64(i8 zeroext %__U, <8 x i64> %__A, <8 x i64> %__I, <8 x i64> %__B) {2633; X86-LABEL: test_mm512_maskz_permutex2var_epi64:2634; X86: # %bb.0: # %entry2635; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2636; X86-NEXT: kmovw %eax, %k12637; X86-NEXT: vpermt2q %zmm2, %zmm1, %zmm0 {%k1} {z}2638; X86-NEXT: retl2639;2640; X64-LABEL: test_mm512_maskz_permutex2var_epi64:2641; X64: # %bb.0: # %entry2642; X64-NEXT: kmovw %edi, %k12643; X64-NEXT: vpermt2q %zmm2, %zmm1, %zmm0 {%k1} {z}2644; X64-NEXT: retq2645entry:2646 %0 = tail call <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64> %__A, <8 x i64> %__I, <8 x i64> %__B)2647 %1 = bitcast i8 %__U to <8 x i1>2648 %2 = select <8 x i1> %1, <8 x i64> %0, <8 x i64> zeroinitializer2649 ret <8 x i64> %22650}2651define <4 x float> @test_mm_mask_add_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {2652; X86-LABEL: test_mm_mask_add_ss:2653; X86: # %bb.0: # %entry2654; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2655; X86-NEXT: kmovw %eax, %k12656; X86-NEXT: vaddss %xmm2, %xmm1, %xmm0 {%k1}2657; X86-NEXT: retl2658;2659; X64-LABEL: test_mm_mask_add_ss:2660; X64: # %bb.0: # %entry2661; X64-NEXT: kmovw %edi, %k12662; X64-NEXT: vaddss %xmm2, %xmm1, %xmm0 {%k1}2663; X64-NEXT: retq2664entry:2665 %vecext.i.i = extractelement <4 x float> %__B, i32 02666 %vecext1.i.i = extractelement <4 x float> %__A, i32 02667 %add.i.i = fadd float %vecext1.i.i, %vecext.i.i2668 %0 = and i8 %__U, 12669 %tobool.i = icmp eq i8 %0, 02670 %vecext1.i = extractelement <4 x float> %__W, i32 02671 %cond.i = select i1 %tobool.i, float %vecext1.i, float %add.i.i2672 %vecins.i = insertelement <4 x float> %__A, float %cond.i, i32 02673 ret <4 x float> %vecins.i2674}2675 2676define <4 x float> @test_mm_maskz_add_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {2677; X86-LABEL: test_mm_maskz_add_ss:2678; X86: # %bb.0: # %entry2679; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2680; X86-NEXT: kmovw %eax, %k12681; X86-NEXT: vaddss %xmm1, %xmm0, %xmm0 {%k1} {z}2682; X86-NEXT: retl2683;2684; X64-LABEL: test_mm_maskz_add_ss:2685; X64: # %bb.0: # %entry2686; X64-NEXT: kmovw %edi, %k12687; X64-NEXT: vaddss %xmm1, %xmm0, %xmm0 {%k1} {z}2688; X64-NEXT: retq2689entry:2690 %vecext.i.i = extractelement <4 x float> %__B, i32 02691 %vecext1.i.i = extractelement <4 x float> %__A, i32 02692 %add.i.i = fadd float %vecext1.i.i, %vecext.i.i2693 %0 = and i8 %__U, 12694 %tobool.i = icmp eq i8 %0, 02695 %cond.i = select i1 %tobool.i, float 0.000000e+00, float %add.i.i2696 %vecins.i = insertelement <4 x float> %__A, float %cond.i, i32 02697 ret <4 x float> %vecins.i2698}2699 2700define <2 x double> @test_mm_mask_add_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {2701; X86-LABEL: test_mm_mask_add_sd:2702; X86: # %bb.0: # %entry2703; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2704; X86-NEXT: kmovw %eax, %k12705; X86-NEXT: vaddsd %xmm2, %xmm1, %xmm0 {%k1}2706; X86-NEXT: retl2707;2708; X64-LABEL: test_mm_mask_add_sd:2709; X64: # %bb.0: # %entry2710; X64-NEXT: kmovw %edi, %k12711; X64-NEXT: vaddsd %xmm2, %xmm1, %xmm0 {%k1}2712; X64-NEXT: retq2713entry:2714 %vecext.i.i = extractelement <2 x double> %__B, i32 02715 %vecext1.i.i = extractelement <2 x double> %__A, i32 02716 %add.i.i = fadd double %vecext1.i.i, %vecext.i.i2717 %0 = and i8 %__U, 12718 %tobool.i = icmp eq i8 %0, 02719 %vecext1.i = extractelement <2 x double> %__W, i32 02720 %cond.i = select i1 %tobool.i, double %vecext1.i, double %add.i.i2721 %vecins.i = insertelement <2 x double> %__A, double %cond.i, i32 02722 ret <2 x double> %vecins.i2723}2724 2725define <2 x double> @test_mm_maskz_add_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {2726; X86-LABEL: test_mm_maskz_add_sd:2727; X86: # %bb.0: # %entry2728; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2729; X86-NEXT: kmovw %eax, %k12730; X86-NEXT: vaddsd %xmm1, %xmm0, %xmm0 {%k1} {z}2731; X86-NEXT: retl2732;2733; X64-LABEL: test_mm_maskz_add_sd:2734; X64: # %bb.0: # %entry2735; X64-NEXT: kmovw %edi, %k12736; X64-NEXT: vaddsd %xmm1, %xmm0, %xmm0 {%k1} {z}2737; X64-NEXT: retq2738entry:2739 %vecext.i.i = extractelement <2 x double> %__B, i32 02740 %vecext1.i.i = extractelement <2 x double> %__A, i32 02741 %add.i.i = fadd double %vecext1.i.i, %vecext.i.i2742 %0 = and i8 %__U, 12743 %tobool.i = icmp eq i8 %0, 02744 %cond.i = select i1 %tobool.i, double 0.000000e+00, double %add.i.i2745 %vecins.i = insertelement <2 x double> %__A, double %cond.i, i32 02746 ret <2 x double> %vecins.i2747}2748 2749define <4 x float> @test_mm_mask_sub_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {2750; X86-LABEL: test_mm_mask_sub_ss:2751; X86: # %bb.0: # %entry2752; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2753; X86-NEXT: kmovw %eax, %k12754; X86-NEXT: vsubss %xmm2, %xmm1, %xmm0 {%k1}2755; X86-NEXT: retl2756;2757; X64-LABEL: test_mm_mask_sub_ss:2758; X64: # %bb.0: # %entry2759; X64-NEXT: kmovw %edi, %k12760; X64-NEXT: vsubss %xmm2, %xmm1, %xmm0 {%k1}2761; X64-NEXT: retq2762entry:2763 %vecext.i.i = extractelement <4 x float> %__B, i32 02764 %vecext1.i.i = extractelement <4 x float> %__A, i32 02765 %sub.i.i = fsub float %vecext1.i.i, %vecext.i.i2766 %0 = and i8 %__U, 12767 %tobool.i = icmp eq i8 %0, 02768 %vecext1.i = extractelement <4 x float> %__W, i32 02769 %cond.i = select i1 %tobool.i, float %vecext1.i, float %sub.i.i2770 %vecins.i = insertelement <4 x float> %__A, float %cond.i, i32 02771 ret <4 x float> %vecins.i2772}2773 2774define <4 x float> @test_mm_maskz_sub_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {2775; X86-LABEL: test_mm_maskz_sub_ss:2776; X86: # %bb.0: # %entry2777; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2778; X86-NEXT: kmovw %eax, %k12779; X86-NEXT: vsubss %xmm1, %xmm0, %xmm0 {%k1} {z}2780; X86-NEXT: retl2781;2782; X64-LABEL: test_mm_maskz_sub_ss:2783; X64: # %bb.0: # %entry2784; X64-NEXT: kmovw %edi, %k12785; X64-NEXT: vsubss %xmm1, %xmm0, %xmm0 {%k1} {z}2786; X64-NEXT: retq2787entry:2788 %vecext.i.i = extractelement <4 x float> %__B, i32 02789 %vecext1.i.i = extractelement <4 x float> %__A, i32 02790 %sub.i.i = fsub float %vecext1.i.i, %vecext.i.i2791 %0 = and i8 %__U, 12792 %tobool.i = icmp eq i8 %0, 02793 %cond.i = select i1 %tobool.i, float 0.000000e+00, float %sub.i.i2794 %vecins.i = insertelement <4 x float> %__A, float %cond.i, i32 02795 ret <4 x float> %vecins.i2796}2797 2798define <2 x double> @test_mm_mask_sub_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {2799; X86-LABEL: test_mm_mask_sub_sd:2800; X86: # %bb.0: # %entry2801; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2802; X86-NEXT: kmovw %eax, %k12803; X86-NEXT: vsubsd %xmm2, %xmm1, %xmm0 {%k1}2804; X86-NEXT: retl2805;2806; X64-LABEL: test_mm_mask_sub_sd:2807; X64: # %bb.0: # %entry2808; X64-NEXT: kmovw %edi, %k12809; X64-NEXT: vsubsd %xmm2, %xmm1, %xmm0 {%k1}2810; X64-NEXT: retq2811entry:2812 %vecext.i.i = extractelement <2 x double> %__B, i32 02813 %vecext1.i.i = extractelement <2 x double> %__A, i32 02814 %sub.i.i = fsub double %vecext1.i.i, %vecext.i.i2815 %0 = and i8 %__U, 12816 %tobool.i = icmp eq i8 %0, 02817 %vecext1.i = extractelement <2 x double> %__W, i32 02818 %cond.i = select i1 %tobool.i, double %vecext1.i, double %sub.i.i2819 %vecins.i = insertelement <2 x double> %__A, double %cond.i, i32 02820 ret <2 x double> %vecins.i2821}2822 2823define <2 x double> @test_mm_maskz_sub_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {2824; X86-LABEL: test_mm_maskz_sub_sd:2825; X86: # %bb.0: # %entry2826; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2827; X86-NEXT: kmovw %eax, %k12828; X86-NEXT: vsubsd %xmm1, %xmm0, %xmm0 {%k1} {z}2829; X86-NEXT: retl2830;2831; X64-LABEL: test_mm_maskz_sub_sd:2832; X64: # %bb.0: # %entry2833; X64-NEXT: kmovw %edi, %k12834; X64-NEXT: vsubsd %xmm1, %xmm0, %xmm0 {%k1} {z}2835; X64-NEXT: retq2836entry:2837 %vecext.i.i = extractelement <2 x double> %__B, i32 02838 %vecext1.i.i = extractelement <2 x double> %__A, i32 02839 %sub.i.i = fsub double %vecext1.i.i, %vecext.i.i2840 %0 = and i8 %__U, 12841 %tobool.i = icmp eq i8 %0, 02842 %cond.i = select i1 %tobool.i, double 0.000000e+00, double %sub.i.i2843 %vecins.i = insertelement <2 x double> %__A, double %cond.i, i32 02844 ret <2 x double> %vecins.i2845}2846 2847define <4 x float> @test_mm_mask_mul_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {2848; X86-LABEL: test_mm_mask_mul_ss:2849; X86: # %bb.0: # %entry2850; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2851; X86-NEXT: kmovw %eax, %k12852; X86-NEXT: vmulss %xmm2, %xmm1, %xmm0 {%k1}2853; X86-NEXT: retl2854;2855; X64-LABEL: test_mm_mask_mul_ss:2856; X64: # %bb.0: # %entry2857; X64-NEXT: kmovw %edi, %k12858; X64-NEXT: vmulss %xmm2, %xmm1, %xmm0 {%k1}2859; X64-NEXT: retq2860entry:2861 %vecext.i.i = extractelement <4 x float> %__B, i32 02862 %vecext1.i.i = extractelement <4 x float> %__A, i32 02863 %mul.i.i = fmul float %vecext1.i.i, %vecext.i.i2864 %0 = and i8 %__U, 12865 %tobool.i = icmp eq i8 %0, 02866 %vecext1.i = extractelement <4 x float> %__W, i32 02867 %cond.i = select i1 %tobool.i, float %vecext1.i, float %mul.i.i2868 %vecins.i = insertelement <4 x float> %__A, float %cond.i, i32 02869 ret <4 x float> %vecins.i2870}2871 2872define <4 x float> @test_mm_maskz_mul_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {2873; X86-LABEL: test_mm_maskz_mul_ss:2874; X86: # %bb.0: # %entry2875; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2876; X86-NEXT: kmovw %eax, %k12877; X86-NEXT: vmulss %xmm1, %xmm0, %xmm0 {%k1} {z}2878; X86-NEXT: retl2879;2880; X64-LABEL: test_mm_maskz_mul_ss:2881; X64: # %bb.0: # %entry2882; X64-NEXT: kmovw %edi, %k12883; X64-NEXT: vmulss %xmm1, %xmm0, %xmm0 {%k1} {z}2884; X64-NEXT: retq2885entry:2886 %vecext.i.i = extractelement <4 x float> %__B, i32 02887 %vecext1.i.i = extractelement <4 x float> %__A, i32 02888 %mul.i.i = fmul float %vecext1.i.i, %vecext.i.i2889 %0 = and i8 %__U, 12890 %tobool.i = icmp eq i8 %0, 02891 %cond.i = select i1 %tobool.i, float 0.000000e+00, float %mul.i.i2892 %vecins.i = insertelement <4 x float> %__A, float %cond.i, i32 02893 ret <4 x float> %vecins.i2894}2895 2896define <2 x double> @test_mm_mask_mul_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {2897; X86-LABEL: test_mm_mask_mul_sd:2898; X86: # %bb.0: # %entry2899; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2900; X86-NEXT: kmovw %eax, %k12901; X86-NEXT: vmulsd %xmm2, %xmm1, %xmm0 {%k1}2902; X86-NEXT: retl2903;2904; X64-LABEL: test_mm_mask_mul_sd:2905; X64: # %bb.0: # %entry2906; X64-NEXT: kmovw %edi, %k12907; X64-NEXT: vmulsd %xmm2, %xmm1, %xmm0 {%k1}2908; X64-NEXT: retq2909entry:2910 %vecext.i.i = extractelement <2 x double> %__B, i32 02911 %vecext1.i.i = extractelement <2 x double> %__A, i32 02912 %mul.i.i = fmul double %vecext1.i.i, %vecext.i.i2913 %0 = and i8 %__U, 12914 %tobool.i = icmp eq i8 %0, 02915 %vecext1.i = extractelement <2 x double> %__W, i32 02916 %cond.i = select i1 %tobool.i, double %vecext1.i, double %mul.i.i2917 %vecins.i = insertelement <2 x double> %__A, double %cond.i, i32 02918 ret <2 x double> %vecins.i2919}2920 2921define <2 x double> @test_mm_maskz_mul_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {2922; X86-LABEL: test_mm_maskz_mul_sd:2923; X86: # %bb.0: # %entry2924; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2925; X86-NEXT: kmovw %eax, %k12926; X86-NEXT: vmulsd %xmm1, %xmm0, %xmm0 {%k1} {z}2927; X86-NEXT: retl2928;2929; X64-LABEL: test_mm_maskz_mul_sd:2930; X64: # %bb.0: # %entry2931; X64-NEXT: kmovw %edi, %k12932; X64-NEXT: vmulsd %xmm1, %xmm0, %xmm0 {%k1} {z}2933; X64-NEXT: retq2934entry:2935 %vecext.i.i = extractelement <2 x double> %__B, i32 02936 %vecext1.i.i = extractelement <2 x double> %__A, i32 02937 %mul.i.i = fmul double %vecext1.i.i, %vecext.i.i2938 %0 = and i8 %__U, 12939 %tobool.i = icmp eq i8 %0, 02940 %cond.i = select i1 %tobool.i, double 0.000000e+00, double %mul.i.i2941 %vecins.i = insertelement <2 x double> %__A, double %cond.i, i32 02942 ret <2 x double> %vecins.i2943}2944 2945define <4 x float> @test_mm_mask_div_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {2946; X86-LABEL: test_mm_mask_div_ss:2947; X86: # %bb.0: # %entry2948; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2949; X86-NEXT: kmovw %eax, %k12950; X86-NEXT: vdivss %xmm2, %xmm1, %xmm0 {%k1}2951; X86-NEXT: retl2952;2953; X64-LABEL: test_mm_mask_div_ss:2954; X64: # %bb.0: # %entry2955; X64-NEXT: kmovw %edi, %k12956; X64-NEXT: vdivss %xmm2, %xmm1, %xmm0 {%k1}2957; X64-NEXT: retq2958entry:2959 %0 = extractelement <4 x float> %__A, i64 02960 %1 = extractelement <4 x float> %__B, i64 02961 %2 = extractelement <4 x float> %__W, i64 02962 %3 = fdiv float %0, %12963 %4 = bitcast i8 %__U to <8 x i1>2964 %5 = extractelement <8 x i1> %4, i64 02965 %6 = select i1 %5, float %3, float %22966 %7 = insertelement <4 x float> %__A, float %6, i64 02967 ret <4 x float> %72968}2969 2970define <4 x float> @test_mm_maskz_div_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {2971; X86-LABEL: test_mm_maskz_div_ss:2972; X86: # %bb.0: # %entry2973; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2974; X86-NEXT: kmovw %eax, %k12975; X86-NEXT: vdivss %xmm1, %xmm0, %xmm0 {%k1} {z}2976; X86-NEXT: retl2977;2978; X64-LABEL: test_mm_maskz_div_ss:2979; X64: # %bb.0: # %entry2980; X64-NEXT: kmovw %edi, %k12981; X64-NEXT: vdivss %xmm1, %xmm0, %xmm0 {%k1} {z}2982; X64-NEXT: retq2983entry:2984 %0 = extractelement <4 x float> %__A, i64 02985 %1 = extractelement <4 x float> %__B, i64 02986 %2 = fdiv float %0, %12987 %3 = bitcast i8 %__U to <8 x i1>2988 %4 = extractelement <8 x i1> %3, i64 02989 %5 = select i1 %4, float %2, float 0.000000e+002990 %6 = insertelement <4 x float> %__A, float %5, i64 02991 ret <4 x float> %62992}2993 2994define <2 x double> @test_mm_mask_div_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {2995; X86-LABEL: test_mm_mask_div_sd:2996; X86: # %bb.0: # %entry2997; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax2998; X86-NEXT: kmovw %eax, %k12999; X86-NEXT: vdivsd %xmm2, %xmm1, %xmm0 {%k1}3000; X86-NEXT: retl3001;3002; X64-LABEL: test_mm_mask_div_sd:3003; X64: # %bb.0: # %entry3004; X64-NEXT: kmovw %edi, %k13005; X64-NEXT: vdivsd %xmm2, %xmm1, %xmm0 {%k1}3006; X64-NEXT: retq3007entry:3008 %0 = extractelement <2 x double> %__A, i64 03009 %1 = extractelement <2 x double> %__B, i64 03010 %2 = extractelement <2 x double> %__W, i64 03011 %3 = fdiv double %0, %13012 %4 = bitcast i8 %__U to <8 x i1>3013 %5 = extractelement <8 x i1> %4, i64 03014 %6 = select i1 %5, double %3, double %23015 %7 = insertelement <2 x double> %__A, double %6, i64 03016 ret <2 x double> %73017}3018 3019define <2 x double> @test_mm_maskz_div_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {3020; X86-LABEL: test_mm_maskz_div_sd:3021; X86: # %bb.0: # %entry3022; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax3023; X86-NEXT: kmovw %eax, %k13024; X86-NEXT: vdivsd %xmm1, %xmm0, %xmm0 {%k1} {z}3025; X86-NEXT: retl3026;3027; X64-LABEL: test_mm_maskz_div_sd:3028; X64: # %bb.0: # %entry3029; X64-NEXT: kmovw %edi, %k13030; X64-NEXT: vdivsd %xmm1, %xmm0, %xmm0 {%k1} {z}3031; X64-NEXT: retq3032entry:3033 %0 = extractelement <2 x double> %__A, i64 03034 %1 = extractelement <2 x double> %__B, i64 03035 %2 = fdiv double %0, %13036 %3 = bitcast i8 %__U to <8 x i1>3037 %4 = extractelement <8 x i1> %3, i64 03038 %5 = select i1 %4, double %2, double 0.000000e+003039 %6 = insertelement <2 x double> %__A, double %5, i64 03040 ret <2 x double> %63041}3042 3043 3044define <8 x double> @test_mm512_fmadd_round_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {3045; CHECK-LABEL: test_mm512_fmadd_round_pd:3046; CHECK: # %bb.0: # %entry3047; CHECK-NEXT: vfmadd213pd {rn-sae}, %zmm2, %zmm1, %zmm03048; CHECK-NEXT: ret{{[l|q]}}3049entry:3050 %0 = tail call <8 x double> @llvm.x86.avx512.vfmadd.pd.512(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i32 8)3051 ret <8 x double> %03052}3053 3054declare <8 x double> @llvm.x86.avx512.vfmadd.pd.512(<8 x double>, <8 x double>, <8 x double>, i32) #13055 3056define <8 x double> @test_mm512_mask_fmadd_round_pd(<8 x double> %__A, i8 zeroext %__U, <8 x double> %__B, <8 x double> %__C) {3057; X86-LABEL: test_mm512_mask_fmadd_round_pd:3058; X86: # %bb.0: # %entry3059; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax3060; X86-NEXT: kmovw %eax, %k13061; X86-NEXT: vfmadd132pd {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}3062; X86-NEXT: retl3063;3064; X64-LABEL: test_mm512_mask_fmadd_round_pd:3065; X64: # %bb.0: # %entry3066; X64-NEXT: kmovw %edi, %k13067; X64-NEXT: vfmadd132pd {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}3068; X64-NEXT: retq3069entry:3070 %0 = tail call <8 x double> @llvm.x86.avx512.vfmadd.pd.512(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i32 8)3071 %1 = bitcast i8 %__U to <8 x i1>3072 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__A3073 ret <8 x double> %23074}3075 3076define <8 x double> @test_mm512_mask3_fmadd_round_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i8 zeroext %__U) {3077; X86-LABEL: test_mm512_mask3_fmadd_round_pd:3078; X86: # %bb.0: # %entry3079; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax3080; X86-NEXT: kmovw %eax, %k13081; X86-NEXT: vfmadd231pd {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}3082; X86-NEXT: vmovapd %zmm2, %zmm03083; X86-NEXT: retl3084;3085; X64-LABEL: test_mm512_mask3_fmadd_round_pd:3086; X64: # %bb.0: # %entry3087; X64-NEXT: kmovw %edi, %k13088; X64-NEXT: vfmadd231pd {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}3089; X64-NEXT: vmovapd %zmm2, %zmm03090; X64-NEXT: retq3091entry:3092 %0 = tail call <8 x double> @llvm.x86.avx512.vfmadd.pd.512(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i32 8)3093 %1 = bitcast i8 %__U to <8 x i1>3094 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__C3095 ret <8 x double> %23096}3097 3098define <8 x double> @test_mm512_maskz_fmadd_round_pd(i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {3099; X86-LABEL: test_mm512_maskz_fmadd_round_pd:3100; X86: # %bb.0: # %entry3101; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax3102; X86-NEXT: kmovw %eax, %k13103; X86-NEXT: vfmadd213pd {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}3104; X86-NEXT: retl3105;3106; X64-LABEL: test_mm512_maskz_fmadd_round_pd:3107; X64: # %bb.0: # %entry3108; X64-NEXT: kmovw %edi, %k13109; X64-NEXT: vfmadd213pd {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}3110; X64-NEXT: retq3111entry:3112 %0 = tail call <8 x double> @llvm.x86.avx512.vfmadd.pd.512(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i32 8)3113 %1 = bitcast i8 %__U to <8 x i1>3114 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> zeroinitializer3115 ret <8 x double> %23116}3117 3118define <8 x double> @test_mm512_fmsub_round_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {3119; X86-LABEL: test_mm512_fmsub_round_pd:3120; X86: # %bb.0: # %entry3121; X86-NEXT: vpxorq {{\.?LCPI[0-9]+_[0-9]+}}{1to8}, %zmm2, %zmm23122; X86-NEXT: vfmadd213pd {rn-sae}, %zmm2, %zmm1, %zmm03123; X86-NEXT: retl3124;3125; X64-LABEL: test_mm512_fmsub_round_pd:3126; X64: # %bb.0: # %entry3127; X64-NEXT: vpxorq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm2, %zmm23128; X64-NEXT: vfmadd213pd {rn-sae}, %zmm2, %zmm1, %zmm03129; X64-NEXT: retq3130entry:3131 %sub = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C3132 %0 = tail call <8 x double> @llvm.x86.avx512.vfmadd.pd.512(<8 x double> %__A, <8 x double> %__B, <8 x double> %sub, i32 8)3133 ret <8 x double> %03134}3135 3136define <8 x double> @test_mm512_mask_fmsub_round_pd(<8 x double> %__A, i8 zeroext %__U, <8 x double> %__B, <8 x double> %__C) {3137; X86-LABEL: test_mm512_mask_fmsub_round_pd:3138; X86: # %bb.0: # %entry3139; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax3140; X86-NEXT: kmovw %eax, %k13141; X86-NEXT: vfmsub132pd {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}3142; X86-NEXT: retl3143;3144; X64-LABEL: test_mm512_mask_fmsub_round_pd:3145; X64: # %bb.0: # %entry3146; X64-NEXT: kmovw %edi, %k13147; X64-NEXT: vfmsub132pd {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}3148; X64-NEXT: retq3149entry:3150 %sub = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C3151 %0 = tail call <8 x double> @llvm.x86.avx512.vfmadd.pd.512(<8 x double> %__A, <8 x double> %__B, <8 x double> %sub, i32 8)3152 %1 = bitcast i8 %__U to <8 x i1>3153 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__A3154 ret <8 x double> %23155}3156 3157define <8 x double> @test_mm512_maskz_fmsub_round_pd(i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {3158; X86-LABEL: test_mm512_maskz_fmsub_round_pd:3159; X86: # %bb.0: # %entry3160; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax3161; X86-NEXT: kmovw %eax, %k13162; X86-NEXT: vfmsub213pd {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}3163; X86-NEXT: retl3164;3165; X64-LABEL: test_mm512_maskz_fmsub_round_pd:3166; X64: # %bb.0: # %entry3167; X64-NEXT: kmovw %edi, %k13168; X64-NEXT: vfmsub213pd {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}3169; X64-NEXT: retq3170entry:3171 %sub = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C3172 %0 = tail call <8 x double> @llvm.x86.avx512.vfmadd.pd.512(<8 x double> %__A, <8 x double> %__B, <8 x double> %sub, i32 8)3173 %1 = bitcast i8 %__U to <8 x i1>3174 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> zeroinitializer3175 ret <8 x double> %23176}3177 3178define <8 x double> @test_mm512_fnmadd_round_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {3179; X86-LABEL: test_mm512_fnmadd_round_pd:3180; X86: # %bb.0: # %entry3181; X86-NEXT: vpxorq {{\.?LCPI[0-9]+_[0-9]+}}{1to8}, %zmm0, %zmm03182; X86-NEXT: vfmadd213pd {rn-sae}, %zmm2, %zmm1, %zmm03183; X86-NEXT: retl3184;3185; X64-LABEL: test_mm512_fnmadd_round_pd:3186; X64: # %bb.0: # %entry3187; X64-NEXT: vpxorq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %zmm03188; X64-NEXT: vfmadd213pd {rn-sae}, %zmm2, %zmm1, %zmm03189; X64-NEXT: retq3190entry:3191 %sub = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__A3192 %0 = tail call <8 x double> @llvm.x86.avx512.vfmadd.pd.512(<8 x double> %sub, <8 x double> %__B, <8 x double> %__C, i32 8)3193 ret <8 x double> %03194}3195 3196define <8 x double> @test_mm512_mask3_fnmadd_round_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i8 zeroext %__U) {3197; X86-LABEL: test_mm512_mask3_fnmadd_round_pd:3198; X86: # %bb.0: # %entry3199; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax3200; X86-NEXT: kmovw %eax, %k13201; X86-NEXT: vfnmadd231pd {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}3202; X86-NEXT: vmovapd %zmm2, %zmm03203; X86-NEXT: retl3204;3205; X64-LABEL: test_mm512_mask3_fnmadd_round_pd:3206; X64: # %bb.0: # %entry3207; X64-NEXT: kmovw %edi, %k13208; X64-NEXT: vfnmadd231pd {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}3209; X64-NEXT: vmovapd %zmm2, %zmm03210; X64-NEXT: retq3211entry:3212 %sub = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__A3213 %0 = tail call <8 x double> @llvm.x86.avx512.vfmadd.pd.512(<8 x double> %sub, <8 x double> %__B, <8 x double> %__C, i32 8)3214 %1 = bitcast i8 %__U to <8 x i1>3215 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__C3216 ret <8 x double> %23217}3218 3219define <8 x double> @test_mm512_maskz_fnmadd_round_pd(i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {3220; X86-LABEL: test_mm512_maskz_fnmadd_round_pd:3221; X86: # %bb.0: # %entry3222; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax3223; X86-NEXT: kmovw %eax, %k13224; X86-NEXT: vfnmadd213pd {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}3225; X86-NEXT: retl3226;3227; X64-LABEL: test_mm512_maskz_fnmadd_round_pd:3228; X64: # %bb.0: # %entry3229; X64-NEXT: kmovw %edi, %k13230; X64-NEXT: vfnmadd213pd {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}3231; X64-NEXT: retq3232entry:3233 %sub = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__A3234 %0 = tail call <8 x double> @llvm.x86.avx512.vfmadd.pd.512(<8 x double> %sub, <8 x double> %__B, <8 x double> %__C, i32 8)3235 %1 = bitcast i8 %__U to <8 x i1>3236 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> zeroinitializer3237 ret <8 x double> %23238}3239 3240define <8 x double> @test_mm512_fnmsub_round_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {3241; CHECK-LABEL: test_mm512_fnmsub_round_pd:3242; CHECK: # %bb.0: # %entry3243; CHECK-NEXT: vpbroadcastq {{.*#+}} zmm3 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]3244; CHECK-NEXT: vpxorq %zmm3, %zmm0, %zmm43245; CHECK-NEXT: vpxorq %zmm3, %zmm2, %zmm03246; CHECK-NEXT: vfmadd231pd {rn-sae}, %zmm4, %zmm1, %zmm03247; CHECK-NEXT: ret{{[l|q]}}3248entry:3249 %sub = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__A3250 %sub1 = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C3251 %0 = tail call <8 x double> @llvm.x86.avx512.vfmadd.pd.512(<8 x double> %sub, <8 x double> %__B, <8 x double> %sub1, i32 8)3252 ret <8 x double> %03253}3254 3255define <8 x double> @test_mm512_maskz_fnmsub_round_pd(i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {3256; X86-LABEL: test_mm512_maskz_fnmsub_round_pd:3257; X86: # %bb.0: # %entry3258; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax3259; X86-NEXT: kmovw %eax, %k13260; X86-NEXT: vfnmsub213pd {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}3261; X86-NEXT: retl3262;3263; X64-LABEL: test_mm512_maskz_fnmsub_round_pd:3264; X64: # %bb.0: # %entry3265; X64-NEXT: kmovw %edi, %k13266; X64-NEXT: vfnmsub213pd {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}3267; X64-NEXT: retq3268entry:3269 %sub = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__A3270 %sub1 = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C3271 %0 = tail call <8 x double> @llvm.x86.avx512.vfmadd.pd.512(<8 x double> %sub, <8 x double> %__B, <8 x double> %sub1, i32 8)3272 %1 = bitcast i8 %__U to <8 x i1>3273 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> zeroinitializer3274 ret <8 x double> %23275}3276 3277define <8 x double> @test_mm512_fmadd_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {3278; CHECK-LABEL: test_mm512_fmadd_pd:3279; CHECK: # %bb.0: # %entry3280; CHECK-NEXT: vfmadd213pd {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm23281; CHECK-NEXT: ret{{[l|q]}}3282entry:3283 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) #103284 ret <8 x double> %03285}3286 3287define <8 x double> @test_mm512_mask_fmadd_pd(<8 x double> %__A, i8 zeroext %__U, <8 x double> %__B, <8 x double> %__C) {3288; X86-LABEL: test_mm512_mask_fmadd_pd:3289; X86: # %bb.0: # %entry3290; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax3291; X86-NEXT: kmovw %eax, %k13292; X86-NEXT: vfmadd132pd {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) + zmm23293; X86-NEXT: retl3294;3295; X64-LABEL: test_mm512_mask_fmadd_pd:3296; X64: # %bb.0: # %entry3297; X64-NEXT: kmovw %edi, %k13298; X64-NEXT: vfmadd132pd {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) + zmm23299; X64-NEXT: retq3300entry:3301 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) #103302 %1 = bitcast i8 %__U to <8 x i1>3303 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__A3304 ret <8 x double> %23305}3306 3307define <8 x double> @test_mm512_mask3_fmadd_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i8 zeroext %__U) {3308; X86-LABEL: test_mm512_mask3_fmadd_pd:3309; X86: # %bb.0: # %entry3310; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax3311; X86-NEXT: kmovw %eax, %k13312; X86-NEXT: vfmadd231pd {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) + zmm23313; X86-NEXT: vmovapd %zmm2, %zmm03314; X86-NEXT: retl3315;3316; X64-LABEL: test_mm512_mask3_fmadd_pd:3317; X64: # %bb.0: # %entry3318; X64-NEXT: kmovw %edi, %k13319; X64-NEXT: vfmadd231pd {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) + zmm23320; X64-NEXT: vmovapd %zmm2, %zmm03321; X64-NEXT: retq3322entry:3323 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) #103324 %1 = bitcast i8 %__U to <8 x i1>3325 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__C3326 ret <8 x double> %23327}3328 3329define <8 x double> @test_mm512_maskz_fmadd_pd(i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {3330; X86-LABEL: test_mm512_maskz_fmadd_pd:3331; X86: # %bb.0: # %entry3332; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax3333; X86-NEXT: kmovw %eax, %k13334; X86-NEXT: vfmadd213pd {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) + zmm23335; X86-NEXT: retl3336;3337; X64-LABEL: test_mm512_maskz_fmadd_pd:3338; X64: # %bb.0: # %entry3339; X64-NEXT: kmovw %edi, %k13340; X64-NEXT: vfmadd213pd {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) + zmm23341; X64-NEXT: retq3342entry:3343 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) #103344 %1 = bitcast i8 %__U to <8 x i1>3345 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> zeroinitializer3346 ret <8 x double> %23347}3348 3349define <8 x double> @test_mm512_fmsub_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {3350; X86-LABEL: test_mm512_fmsub_pd:3351; X86: # %bb.0: # %entry3352; X86-NEXT: vpxorq {{\.?LCPI[0-9]+_[0-9]+}}{1to8}, %zmm2, %zmm23353; X86-NEXT: vfmadd213pd {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm23354; X86-NEXT: retl3355;3356; X64-LABEL: test_mm512_fmsub_pd:3357; X64: # %bb.0: # %entry3358; X64-NEXT: vpxorq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm2, %zmm23359; X64-NEXT: vfmadd213pd {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm23360; X64-NEXT: retq3361entry:3362 %sub.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C3363 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %sub.i) #103364 ret <8 x double> %03365}3366 3367define <8 x double> @test_mm512_mask_fmsub_pd(<8 x double> %__A, i8 zeroext %__U, <8 x double> %__B, <8 x double> %__C) {3368; X86-LABEL: test_mm512_mask_fmsub_pd:3369; X86: # %bb.0: # %entry3370; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax3371; X86-NEXT: kmovw %eax, %k13372; X86-NEXT: vfmsub132pd {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) - zmm23373; X86-NEXT: retl3374;3375; X64-LABEL: test_mm512_mask_fmsub_pd:3376; X64: # %bb.0: # %entry3377; X64-NEXT: kmovw %edi, %k13378; X64-NEXT: vfmsub132pd {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) - zmm23379; X64-NEXT: retq3380entry:3381 %sub.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C3382 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %sub.i) #103383 %1 = bitcast i8 %__U to <8 x i1>3384 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__A3385 ret <8 x double> %23386}3387 3388define <8 x double> @test_mm512_maskz_fmsub_pd(i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {3389; X86-LABEL: test_mm512_maskz_fmsub_pd:3390; X86: # %bb.0: # %entry3391; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax3392; X86-NEXT: kmovw %eax, %k13393; X86-NEXT: vfmsub213pd {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) - zmm23394; X86-NEXT: retl3395;3396; X64-LABEL: test_mm512_maskz_fmsub_pd:3397; X64: # %bb.0: # %entry3398; X64-NEXT: kmovw %edi, %k13399; X64-NEXT: vfmsub213pd {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) - zmm23400; X64-NEXT: retq3401entry:3402 %sub.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C3403 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %sub.i) #103404 %1 = bitcast i8 %__U to <8 x i1>3405 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> zeroinitializer3406 ret <8 x double> %23407}3408 3409define <8 x double> @test_mm512_fnmadd_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {3410; X86-LABEL: test_mm512_fnmadd_pd:3411; X86: # %bb.0: # %entry3412; X86-NEXT: vpxorq {{\.?LCPI[0-9]+_[0-9]+}}{1to8}, %zmm0, %zmm03413; X86-NEXT: vfmadd213pd {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm23414; X86-NEXT: retl3415;3416; X64-LABEL: test_mm512_fnmadd_pd:3417; X64: # %bb.0: # %entry3418; X64-NEXT: vpxorq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %zmm03419; X64-NEXT: vfmadd213pd {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm23420; X64-NEXT: retq3421entry:3422 %sub.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__A3423 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %sub.i, <8 x double> %__B, <8 x double> %__C) #103424 ret <8 x double> %03425}3426 3427define <8 x double> @test_mm512_mask3_fnmadd_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i8 zeroext %__U) {3428; X86-LABEL: test_mm512_mask3_fnmadd_pd:3429; X86: # %bb.0: # %entry3430; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax3431; X86-NEXT: kmovw %eax, %k13432; X86-NEXT: vfnmadd231pd {{.*#+}} zmm2 {%k1} = -(zmm0 * zmm1) + zmm23433; X86-NEXT: vmovapd %zmm2, %zmm03434; X86-NEXT: retl3435;3436; X64-LABEL: test_mm512_mask3_fnmadd_pd:3437; X64: # %bb.0: # %entry3438; X64-NEXT: kmovw %edi, %k13439; X64-NEXT: vfnmadd231pd {{.*#+}} zmm2 {%k1} = -(zmm0 * zmm1) + zmm23440; X64-NEXT: vmovapd %zmm2, %zmm03441; X64-NEXT: retq3442entry:3443 %sub.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__A3444 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %sub.i, <8 x double> %__B, <8 x double> %__C) #103445 %1 = bitcast i8 %__U to <8 x i1>3446 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__C3447 ret <8 x double> %23448}3449 3450define <8 x double> @test_mm512_maskz_fnmadd_pd(i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {3451; X86-LABEL: test_mm512_maskz_fnmadd_pd:3452; X86: # %bb.0: # %entry3453; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax3454; X86-NEXT: kmovw %eax, %k13455; X86-NEXT: vfnmadd213pd {{.*#+}} zmm0 {%k1} {z} = -(zmm1 * zmm0) + zmm23456; X86-NEXT: retl3457;3458; X64-LABEL: test_mm512_maskz_fnmadd_pd:3459; X64: # %bb.0: # %entry3460; X64-NEXT: kmovw %edi, %k13461; X64-NEXT: vfnmadd213pd {{.*#+}} zmm0 {%k1} {z} = -(zmm1 * zmm0) + zmm23462; X64-NEXT: retq3463entry:3464 %sub.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__A3465 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %sub.i, <8 x double> %__B, <8 x double> %__C) #103466 %1 = bitcast i8 %__U to <8 x i1>3467 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> zeroinitializer3468 ret <8 x double> %23469}3470 3471define <8 x double> @test_mm512_fnmsub_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {3472; CHECK-LABEL: test_mm512_fnmsub_pd:3473; CHECK: # %bb.0: # %entry3474; CHECK-NEXT: vpbroadcastq {{.*#+}} zmm3 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]3475; CHECK-NEXT: vpxorq %zmm3, %zmm0, %zmm43476; CHECK-NEXT: vpxorq %zmm3, %zmm2, %zmm03477; CHECK-NEXT: vfmadd231pd {{.*#+}} zmm0 = (zmm1 * zmm4) + zmm03478; CHECK-NEXT: ret{{[l|q]}}3479entry:3480 %sub.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__A3481 %sub1.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C3482 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %sub.i, <8 x double> %__B, <8 x double> %sub1.i) #103483 ret <8 x double> %03484}3485 3486define <8 x double> @test_mm512_maskz_fnmsub_pd(i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {3487; X86-LABEL: test_mm512_maskz_fnmsub_pd:3488; X86: # %bb.0: # %entry3489; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax3490; X86-NEXT: kmovw %eax, %k13491; X86-NEXT: vfnmsub213pd {{.*#+}} zmm0 {%k1} {z} = -(zmm1 * zmm0) - zmm23492; X86-NEXT: retl3493;3494; X64-LABEL: test_mm512_maskz_fnmsub_pd:3495; X64: # %bb.0: # %entry3496; X64-NEXT: kmovw %edi, %k13497; X64-NEXT: vfnmsub213pd {{.*#+}} zmm0 {%k1} {z} = -(zmm1 * zmm0) - zmm23498; X64-NEXT: retq3499entry:3500 %sub.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__A3501 %sub1.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C3502 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %sub.i, <8 x double> %__B, <8 x double> %sub1.i) #103503 %1 = bitcast i8 %__U to <8 x i1>3504 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> zeroinitializer3505 ret <8 x double> %23506}3507 3508define <16 x float> @test_mm512_fmadd_round_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {3509; CHECK-LABEL: test_mm512_fmadd_round_ps:3510; CHECK: # %bb.0: # %entry3511; CHECK-NEXT: vfmadd213ps {rn-sae}, %zmm2, %zmm1, %zmm03512; CHECK-NEXT: ret{{[l|q]}}3513entry:3514 %0 = tail call <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i32 8)3515 ret <16 x float> %03516}3517 3518declare <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float>, <16 x float>, <16 x float>, i32) #13519 3520define <16 x float> @test_mm512_mask_fmadd_round_ps(<16 x float> %__A, i16 zeroext %__U, <16 x float> %__B, <16 x float> %__C) {3521; X86-LABEL: test_mm512_mask_fmadd_round_ps:3522; X86: # %bb.0: # %entry3523; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax3524; X86-NEXT: kmovw %eax, %k13525; X86-NEXT: vfmadd132ps {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}3526; X86-NEXT: retl3527;3528; X64-LABEL: test_mm512_mask_fmadd_round_ps:3529; X64: # %bb.0: # %entry3530; X64-NEXT: kmovw %edi, %k13531; X64-NEXT: vfmadd132ps {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}3532; X64-NEXT: retq3533entry:3534 %0 = tail call <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i32 8)3535 %1 = bitcast i16 %__U to <16 x i1>3536 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__A3537 ret <16 x float> %23538}3539 3540define <16 x float> @test_mm512_mask3_fmadd_round_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i16 zeroext %__U) {3541; X86-LABEL: test_mm512_mask3_fmadd_round_ps:3542; X86: # %bb.0: # %entry3543; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax3544; X86-NEXT: kmovw %eax, %k13545; X86-NEXT: vfmadd231ps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}3546; X86-NEXT: vmovaps %zmm2, %zmm03547; X86-NEXT: retl3548;3549; X64-LABEL: test_mm512_mask3_fmadd_round_ps:3550; X64: # %bb.0: # %entry3551; X64-NEXT: kmovw %edi, %k13552; X64-NEXT: vfmadd231ps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}3553; X64-NEXT: vmovaps %zmm2, %zmm03554; X64-NEXT: retq3555entry:3556 %0 = tail call <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i32 8)3557 %1 = bitcast i16 %__U to <16 x i1>3558 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__C3559 ret <16 x float> %23560}3561 3562define <16 x float> @test_mm512_maskz_fmadd_round_ps(i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {3563; X86-LABEL: test_mm512_maskz_fmadd_round_ps:3564; X86: # %bb.0: # %entry3565; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax3566; X86-NEXT: kmovw %eax, %k13567; X86-NEXT: vfmadd213ps {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}3568; X86-NEXT: retl3569;3570; X64-LABEL: test_mm512_maskz_fmadd_round_ps:3571; X64: # %bb.0: # %entry3572; X64-NEXT: kmovw %edi, %k13573; X64-NEXT: vfmadd213ps {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}3574; X64-NEXT: retq3575entry:3576 %0 = tail call <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i32 8)3577 %1 = bitcast i16 %__U to <16 x i1>3578 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> zeroinitializer3579 ret <16 x float> %23580}3581 3582define <16 x float> @test_mm512_fmsub_round_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {3583; X86-LABEL: test_mm512_fmsub_round_ps:3584; X86: # %bb.0: # %entry3585; X86-NEXT: vpxord {{\.?LCPI[0-9]+_[0-9]+}}{1to16}, %zmm2, %zmm23586; X86-NEXT: vfmadd213ps {rn-sae}, %zmm2, %zmm1, %zmm03587; X86-NEXT: retl3588;3589; X64-LABEL: test_mm512_fmsub_round_ps:3590; X64: # %bb.0: # %entry3591; X64-NEXT: vpxord {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm23592; X64-NEXT: vfmadd213ps {rn-sae}, %zmm2, %zmm1, %zmm03593; X64-NEXT: retq3594entry:3595 %sub = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C3596 %0 = tail call <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float> %__A, <16 x float> %__B, <16 x float> %sub, i32 8)3597 ret <16 x float> %03598}3599 3600define <16 x float> @test_mm512_mask_fmsub_round_ps(<16 x float> %__A, i16 zeroext %__U, <16 x float> %__B, <16 x float> %__C) {3601; X86-LABEL: test_mm512_mask_fmsub_round_ps:3602; X86: # %bb.0: # %entry3603; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax3604; X86-NEXT: kmovw %eax, %k13605; X86-NEXT: vfmsub132ps {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}3606; X86-NEXT: retl3607;3608; X64-LABEL: test_mm512_mask_fmsub_round_ps:3609; X64: # %bb.0: # %entry3610; X64-NEXT: kmovw %edi, %k13611; X64-NEXT: vfmsub132ps {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}3612; X64-NEXT: retq3613entry:3614 %sub = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C3615 %0 = tail call <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float> %__A, <16 x float> %__B, <16 x float> %sub, i32 8)3616 %1 = bitcast i16 %__U to <16 x i1>3617 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__A3618 ret <16 x float> %23619}3620 3621define <16 x float> @test_mm512_maskz_fmsub_round_ps(i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {3622; X86-LABEL: test_mm512_maskz_fmsub_round_ps:3623; X86: # %bb.0: # %entry3624; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax3625; X86-NEXT: kmovw %eax, %k13626; X86-NEXT: vfmsub213ps {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}3627; X86-NEXT: retl3628;3629; X64-LABEL: test_mm512_maskz_fmsub_round_ps:3630; X64: # %bb.0: # %entry3631; X64-NEXT: kmovw %edi, %k13632; X64-NEXT: vfmsub213ps {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}3633; X64-NEXT: retq3634entry:3635 %sub = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C3636 %0 = tail call <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float> %__A, <16 x float> %__B, <16 x float> %sub, i32 8)3637 %1 = bitcast i16 %__U to <16 x i1>3638 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> zeroinitializer3639 ret <16 x float> %23640}3641 3642define <16 x float> @test_mm512_fnmadd_round_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {3643; X86-LABEL: test_mm512_fnmadd_round_ps:3644; X86: # %bb.0: # %entry3645; X86-NEXT: vpxord {{\.?LCPI[0-9]+_[0-9]+}}{1to16}, %zmm0, %zmm03646; X86-NEXT: vfmadd213ps {rn-sae}, %zmm2, %zmm1, %zmm03647; X86-NEXT: retl3648;3649; X64-LABEL: test_mm512_fnmadd_round_ps:3650; X64: # %bb.0: # %entry3651; X64-NEXT: vpxord {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm0, %zmm03652; X64-NEXT: vfmadd213ps {rn-sae}, %zmm2, %zmm1, %zmm03653; X64-NEXT: retq3654entry:3655 %sub = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__A3656 %0 = tail call <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float> %sub, <16 x float> %__B, <16 x float> %__C, i32 8)3657 ret <16 x float> %03658}3659 3660define <16 x float> @test_mm512_mask3_fnmadd_round_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i16 zeroext %__U) {3661; X86-LABEL: test_mm512_mask3_fnmadd_round_ps:3662; X86: # %bb.0: # %entry3663; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax3664; X86-NEXT: kmovw %eax, %k13665; X86-NEXT: vfnmadd231ps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}3666; X86-NEXT: vmovaps %zmm2, %zmm03667; X86-NEXT: retl3668;3669; X64-LABEL: test_mm512_mask3_fnmadd_round_ps:3670; X64: # %bb.0: # %entry3671; X64-NEXT: kmovw %edi, %k13672; X64-NEXT: vfnmadd231ps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}3673; X64-NEXT: vmovaps %zmm2, %zmm03674; X64-NEXT: retq3675entry:3676 %sub = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__A3677 %0 = tail call <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float> %sub, <16 x float> %__B, <16 x float> %__C, i32 8)3678 %1 = bitcast i16 %__U to <16 x i1>3679 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__C3680 ret <16 x float> %23681}3682 3683define <16 x float> @test_mm512_maskz_fnmadd_round_ps(i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {3684; X86-LABEL: test_mm512_maskz_fnmadd_round_ps:3685; X86: # %bb.0: # %entry3686; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax3687; X86-NEXT: kmovw %eax, %k13688; X86-NEXT: vfnmadd213ps {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}3689; X86-NEXT: retl3690;3691; X64-LABEL: test_mm512_maskz_fnmadd_round_ps:3692; X64: # %bb.0: # %entry3693; X64-NEXT: kmovw %edi, %k13694; X64-NEXT: vfnmadd213ps {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}3695; X64-NEXT: retq3696entry:3697 %sub = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__A3698 %0 = tail call <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float> %sub, <16 x float> %__B, <16 x float> %__C, i32 8)3699 %1 = bitcast i16 %__U to <16 x i1>3700 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> zeroinitializer3701 ret <16 x float> %23702}3703 3704define <16 x float> @test_mm512_fnmsub_round_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {3705; CHECK-LABEL: test_mm512_fnmsub_round_ps:3706; CHECK: # %bb.0: # %entry3707; CHECK-NEXT: vpbroadcastd {{.*#+}} zmm3 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]3708; CHECK-NEXT: vpxord %zmm3, %zmm0, %zmm43709; CHECK-NEXT: vpxord %zmm3, %zmm2, %zmm03710; CHECK-NEXT: vfmadd231ps {rn-sae}, %zmm4, %zmm1, %zmm03711; CHECK-NEXT: ret{{[l|q]}}3712entry:3713 %sub = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__A3714 %sub1 = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C3715 %0 = tail call <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float> %sub, <16 x float> %__B, <16 x float> %sub1, i32 8)3716 ret <16 x float> %03717}3718 3719define <16 x float> @test_mm512_maskz_fnmsub_round_ps(i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {3720; X86-LABEL: test_mm512_maskz_fnmsub_round_ps:3721; X86: # %bb.0: # %entry3722; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax3723; X86-NEXT: kmovw %eax, %k13724; X86-NEXT: vfnmsub213ps {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}3725; X86-NEXT: retl3726;3727; X64-LABEL: test_mm512_maskz_fnmsub_round_ps:3728; X64: # %bb.0: # %entry3729; X64-NEXT: kmovw %edi, %k13730; X64-NEXT: vfnmsub213ps {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}3731; X64-NEXT: retq3732entry:3733 %sub = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__A3734 %sub1 = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C3735 %0 = tail call <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float> %sub, <16 x float> %__B, <16 x float> %sub1, i32 8)3736 %1 = bitcast i16 %__U to <16 x i1>3737 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> zeroinitializer3738 ret <16 x float> %23739}3740 3741define <16 x float> @test_mm512_fmadd_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {3742; CHECK-LABEL: test_mm512_fmadd_ps:3743; CHECK: # %bb.0: # %entry3744; CHECK-NEXT: vfmadd213ps {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm23745; CHECK-NEXT: ret{{[l|q]}}3746entry:3747 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) #103748 ret <16 x float> %03749}3750 3751define <16 x float> @test_mm512_mask_fmadd_ps(<16 x float> %__A, i16 zeroext %__U, <16 x float> %__B, <16 x float> %__C) {3752; X86-LABEL: test_mm512_mask_fmadd_ps:3753; X86: # %bb.0: # %entry3754; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax3755; X86-NEXT: kmovw %eax, %k13756; X86-NEXT: vfmadd132ps {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) + zmm23757; X86-NEXT: retl3758;3759; X64-LABEL: test_mm512_mask_fmadd_ps:3760; X64: # %bb.0: # %entry3761; X64-NEXT: kmovw %edi, %k13762; X64-NEXT: vfmadd132ps {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) + zmm23763; X64-NEXT: retq3764entry:3765 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) #103766 %1 = bitcast i16 %__U to <16 x i1>3767 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__A3768 ret <16 x float> %23769}3770 3771define <16 x float> @test_mm512_mask3_fmadd_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i16 zeroext %__U) {3772; X86-LABEL: test_mm512_mask3_fmadd_ps:3773; X86: # %bb.0: # %entry3774; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax3775; X86-NEXT: kmovw %eax, %k13776; X86-NEXT: vfmadd231ps {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) + zmm23777; X86-NEXT: vmovaps %zmm2, %zmm03778; X86-NEXT: retl3779;3780; X64-LABEL: test_mm512_mask3_fmadd_ps:3781; X64: # %bb.0: # %entry3782; X64-NEXT: kmovw %edi, %k13783; X64-NEXT: vfmadd231ps {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) + zmm23784; X64-NEXT: vmovaps %zmm2, %zmm03785; X64-NEXT: retq3786entry:3787 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) #103788 %1 = bitcast i16 %__U to <16 x i1>3789 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__C3790 ret <16 x float> %23791}3792 3793define <16 x float> @test_mm512_maskz_fmadd_ps(i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {3794; X86-LABEL: test_mm512_maskz_fmadd_ps:3795; X86: # %bb.0: # %entry3796; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax3797; X86-NEXT: kmovw %eax, %k13798; X86-NEXT: vfmadd213ps {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) + zmm23799; X86-NEXT: retl3800;3801; X64-LABEL: test_mm512_maskz_fmadd_ps:3802; X64: # %bb.0: # %entry3803; X64-NEXT: kmovw %edi, %k13804; X64-NEXT: vfmadd213ps {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) + zmm23805; X64-NEXT: retq3806entry:3807 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) #103808 %1 = bitcast i16 %__U to <16 x i1>3809 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> zeroinitializer3810 ret <16 x float> %23811}3812 3813define <16 x float> @test_mm512_fmsub_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {3814; X86-LABEL: test_mm512_fmsub_ps:3815; X86: # %bb.0: # %entry3816; X86-NEXT: vpxord {{\.?LCPI[0-9]+_[0-9]+}}{1to16}, %zmm2, %zmm23817; X86-NEXT: vfmadd213ps {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm23818; X86-NEXT: retl3819;3820; X64-LABEL: test_mm512_fmsub_ps:3821; X64: # %bb.0: # %entry3822; X64-NEXT: vpxord {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm23823; X64-NEXT: vfmadd213ps {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm23824; X64-NEXT: retq3825entry:3826 %sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C3827 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %sub.i) #103828 ret <16 x float> %03829}3830 3831define <16 x float> @test_mm512_mask_fmsub_ps(<16 x float> %__A, i16 zeroext %__U, <16 x float> %__B, <16 x float> %__C) {3832; X86-LABEL: test_mm512_mask_fmsub_ps:3833; X86: # %bb.0: # %entry3834; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax3835; X86-NEXT: kmovw %eax, %k13836; X86-NEXT: vfmsub132ps {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) - zmm23837; X86-NEXT: retl3838;3839; X64-LABEL: test_mm512_mask_fmsub_ps:3840; X64: # %bb.0: # %entry3841; X64-NEXT: kmovw %edi, %k13842; X64-NEXT: vfmsub132ps {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) - zmm23843; X64-NEXT: retq3844entry:3845 %sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C3846 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %sub.i) #103847 %1 = bitcast i16 %__U to <16 x i1>3848 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__A3849 ret <16 x float> %23850}3851 3852define <16 x float> @test_mm512_maskz_fmsub_ps(i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {3853; X86-LABEL: test_mm512_maskz_fmsub_ps:3854; X86: # %bb.0: # %entry3855; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax3856; X86-NEXT: kmovw %eax, %k13857; X86-NEXT: vfmsub213ps {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) - zmm23858; X86-NEXT: retl3859;3860; X64-LABEL: test_mm512_maskz_fmsub_ps:3861; X64: # %bb.0: # %entry3862; X64-NEXT: kmovw %edi, %k13863; X64-NEXT: vfmsub213ps {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) - zmm23864; X64-NEXT: retq3865entry:3866 %sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C3867 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %sub.i) #103868 %1 = bitcast i16 %__U to <16 x i1>3869 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> zeroinitializer3870 ret <16 x float> %23871}3872 3873define <16 x float> @test_mm512_fnmadd_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {3874; X86-LABEL: test_mm512_fnmadd_ps:3875; X86: # %bb.0: # %entry3876; X86-NEXT: vpxord {{\.?LCPI[0-9]+_[0-9]+}}{1to16}, %zmm0, %zmm03877; X86-NEXT: vfmadd213ps {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm23878; X86-NEXT: retl3879;3880; X64-LABEL: test_mm512_fnmadd_ps:3881; X64: # %bb.0: # %entry3882; X64-NEXT: vpxord {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm0, %zmm03883; X64-NEXT: vfmadd213ps {{.*#+}} zmm0 = (zmm1 * zmm0) + zmm23884; X64-NEXT: retq3885entry:3886 %sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__A3887 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %sub.i, <16 x float> %__B, <16 x float> %__C) #103888 ret <16 x float> %03889}3890 3891define <16 x float> @test_mm512_mask3_fnmadd_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i16 zeroext %__U) {3892; X86-LABEL: test_mm512_mask3_fnmadd_ps:3893; X86: # %bb.0: # %entry3894; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax3895; X86-NEXT: kmovw %eax, %k13896; X86-NEXT: vfnmadd231ps {{.*#+}} zmm2 {%k1} = -(zmm0 * zmm1) + zmm23897; X86-NEXT: vmovaps %zmm2, %zmm03898; X86-NEXT: retl3899;3900; X64-LABEL: test_mm512_mask3_fnmadd_ps:3901; X64: # %bb.0: # %entry3902; X64-NEXT: kmovw %edi, %k13903; X64-NEXT: vfnmadd231ps {{.*#+}} zmm2 {%k1} = -(zmm0 * zmm1) + zmm23904; X64-NEXT: vmovaps %zmm2, %zmm03905; X64-NEXT: retq3906entry:3907 %sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__A3908 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %sub.i, <16 x float> %__B, <16 x float> %__C) #103909 %1 = bitcast i16 %__U to <16 x i1>3910 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__C3911 ret <16 x float> %23912}3913 3914define <16 x float> @test_mm512_maskz_fnmadd_ps(i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {3915; X86-LABEL: test_mm512_maskz_fnmadd_ps:3916; X86: # %bb.0: # %entry3917; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax3918; X86-NEXT: kmovw %eax, %k13919; X86-NEXT: vfnmadd213ps {{.*#+}} zmm0 {%k1} {z} = -(zmm1 * zmm0) + zmm23920; X86-NEXT: retl3921;3922; X64-LABEL: test_mm512_maskz_fnmadd_ps:3923; X64: # %bb.0: # %entry3924; X64-NEXT: kmovw %edi, %k13925; X64-NEXT: vfnmadd213ps {{.*#+}} zmm0 {%k1} {z} = -(zmm1 * zmm0) + zmm23926; X64-NEXT: retq3927entry:3928 %sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__A3929 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %sub.i, <16 x float> %__B, <16 x float> %__C) #103930 %1 = bitcast i16 %__U to <16 x i1>3931 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> zeroinitializer3932 ret <16 x float> %23933}3934 3935define <16 x float> @test_mm512_fnmsub_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {3936; CHECK-LABEL: test_mm512_fnmsub_ps:3937; CHECK: # %bb.0: # %entry3938; CHECK-NEXT: vpbroadcastd {{.*#+}} zmm3 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]3939; CHECK-NEXT: vpxord %zmm3, %zmm0, %zmm43940; CHECK-NEXT: vpxord %zmm3, %zmm2, %zmm03941; CHECK-NEXT: vfmadd231ps {{.*#+}} zmm0 = (zmm1 * zmm4) + zmm03942; CHECK-NEXT: ret{{[l|q]}}3943entry:3944 %sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__A3945 %sub1.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C3946 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %sub.i, <16 x float> %__B, <16 x float> %sub1.i) #103947 ret <16 x float> %03948}3949 3950define <16 x float> @test_mm512_maskz_fnmsub_ps(i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {3951; X86-LABEL: test_mm512_maskz_fnmsub_ps:3952; X86: # %bb.0: # %entry3953; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax3954; X86-NEXT: kmovw %eax, %k13955; X86-NEXT: vfnmsub213ps {{.*#+}} zmm0 {%k1} {z} = -(zmm1 * zmm0) - zmm23956; X86-NEXT: retl3957;3958; X64-LABEL: test_mm512_maskz_fnmsub_ps:3959; X64: # %bb.0: # %entry3960; X64-NEXT: kmovw %edi, %k13961; X64-NEXT: vfnmsub213ps {{.*#+}} zmm0 {%k1} {z} = -(zmm1 * zmm0) - zmm23962; X64-NEXT: retq3963entry:3964 %sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__A3965 %sub1.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C3966 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %sub.i, <16 x float> %__B, <16 x float> %sub1.i) #103967 %1 = bitcast i16 %__U to <16 x i1>3968 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> zeroinitializer3969 ret <16 x float> %23970}3971 3972define <8 x double> @test_mm512_fmaddsub_round_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {3973; CHECK-LABEL: test_mm512_fmaddsub_round_pd:3974; CHECK: # %bb.0: # %entry3975; CHECK-NEXT: vfmaddsub213pd {rn-sae}, %zmm2, %zmm1, %zmm03976; CHECK-NEXT: ret{{[l|q]}}3977entry:3978 %0 = tail call <8 x double> @llvm.x86.avx512.vfmaddsub.pd.512(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i32 8)3979 ret <8 x double> %03980}3981 3982declare <8 x double> @llvm.x86.avx512.vfmaddsub.pd.512(<8 x double>, <8 x double>, <8 x double>, i32) #13983 3984define <8 x double> @test_mm512_mask_fmaddsub_round_pd(<8 x double> %__A, i8 zeroext %__U, <8 x double> %__B, <8 x double> %__C) {3985; X86-LABEL: test_mm512_mask_fmaddsub_round_pd:3986; X86: # %bb.0: # %entry3987; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax3988; X86-NEXT: kmovw %eax, %k13989; X86-NEXT: vfmaddsub132pd {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}3990; X86-NEXT: retl3991;3992; X64-LABEL: test_mm512_mask_fmaddsub_round_pd:3993; X64: # %bb.0: # %entry3994; X64-NEXT: kmovw %edi, %k13995; X64-NEXT: vfmaddsub132pd {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}3996; X64-NEXT: retq3997entry:3998 %0 = tail call <8 x double> @llvm.x86.avx512.vfmaddsub.pd.512(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i32 8)3999 %1 = bitcast i8 %__U to <8 x i1>4000 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__A4001 ret <8 x double> %24002}4003 4004define <8 x double> @test_mm512_mask3_fmaddsub_round_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i8 zeroext %__U) {4005; X86-LABEL: test_mm512_mask3_fmaddsub_round_pd:4006; X86: # %bb.0: # %entry4007; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4008; X86-NEXT: kmovw %eax, %k14009; X86-NEXT: vfmaddsub231pd {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}4010; X86-NEXT: vmovapd %zmm2, %zmm04011; X86-NEXT: retl4012;4013; X64-LABEL: test_mm512_mask3_fmaddsub_round_pd:4014; X64: # %bb.0: # %entry4015; X64-NEXT: kmovw %edi, %k14016; X64-NEXT: vfmaddsub231pd {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}4017; X64-NEXT: vmovapd %zmm2, %zmm04018; X64-NEXT: retq4019entry:4020 %0 = tail call <8 x double> @llvm.x86.avx512.vfmaddsub.pd.512(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i32 8)4021 %1 = bitcast i8 %__U to <8 x i1>4022 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__C4023 ret <8 x double> %24024}4025 4026define <8 x double> @test_mm512_maskz_fmaddsub_round_pd(i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {4027; X86-LABEL: test_mm512_maskz_fmaddsub_round_pd:4028; X86: # %bb.0: # %entry4029; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4030; X86-NEXT: kmovw %eax, %k14031; X86-NEXT: vfmaddsub213pd {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}4032; X86-NEXT: retl4033;4034; X64-LABEL: test_mm512_maskz_fmaddsub_round_pd:4035; X64: # %bb.0: # %entry4036; X64-NEXT: kmovw %edi, %k14037; X64-NEXT: vfmaddsub213pd {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}4038; X64-NEXT: retq4039entry:4040 %0 = tail call <8 x double> @llvm.x86.avx512.vfmaddsub.pd.512(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i32 8)4041 %1 = bitcast i8 %__U to <8 x i1>4042 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> zeroinitializer4043 ret <8 x double> %24044}4045 4046define <8 x double> @test_mm512_fmsubadd_round_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {4047; X86-LABEL: test_mm512_fmsubadd_round_pd:4048; X86: # %bb.0: # %entry4049; X86-NEXT: vpxorq {{\.?LCPI[0-9]+_[0-9]+}}{1to8}, %zmm2, %zmm24050; X86-NEXT: vfmaddsub213pd {rn-sae}, %zmm2, %zmm1, %zmm04051; X86-NEXT: retl4052;4053; X64-LABEL: test_mm512_fmsubadd_round_pd:4054; X64: # %bb.0: # %entry4055; X64-NEXT: vpxorq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm2, %zmm24056; X64-NEXT: vfmaddsub213pd {rn-sae}, %zmm2, %zmm1, %zmm04057; X64-NEXT: retq4058entry:4059 %sub = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C4060 %0 = tail call <8 x double> @llvm.x86.avx512.vfmaddsub.pd.512(<8 x double> %__A, <8 x double> %__B, <8 x double> %sub, i32 8)4061 ret <8 x double> %04062}4063 4064define <8 x double> @test_mm512_mask_fmsubadd_round_pd(<8 x double> %__A, i8 zeroext %__U, <8 x double> %__B, <8 x double> %__C) {4065; X86-LABEL: test_mm512_mask_fmsubadd_round_pd:4066; X86: # %bb.0: # %entry4067; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4068; X86-NEXT: kmovw %eax, %k14069; X86-NEXT: vfmsubadd132pd {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}4070; X86-NEXT: retl4071;4072; X64-LABEL: test_mm512_mask_fmsubadd_round_pd:4073; X64: # %bb.0: # %entry4074; X64-NEXT: kmovw %edi, %k14075; X64-NEXT: vfmsubadd132pd {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}4076; X64-NEXT: retq4077entry:4078 %sub = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C4079 %0 = tail call <8 x double> @llvm.x86.avx512.vfmaddsub.pd.512(<8 x double> %__A, <8 x double> %__B, <8 x double> %sub, i32 8)4080 %1 = bitcast i8 %__U to <8 x i1>4081 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__A4082 ret <8 x double> %24083}4084 4085define <8 x double> @test_mm512_maskz_fmsubadd_round_pd(i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {4086; X86-LABEL: test_mm512_maskz_fmsubadd_round_pd:4087; X86: # %bb.0: # %entry4088; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4089; X86-NEXT: kmovw %eax, %k14090; X86-NEXT: vfmsubadd213pd {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}4091; X86-NEXT: retl4092;4093; X64-LABEL: test_mm512_maskz_fmsubadd_round_pd:4094; X64: # %bb.0: # %entry4095; X64-NEXT: kmovw %edi, %k14096; X64-NEXT: vfmsubadd213pd {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}4097; X64-NEXT: retq4098entry:4099 %sub = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C4100 %0 = tail call <8 x double> @llvm.x86.avx512.vfmaddsub.pd.512(<8 x double> %__A, <8 x double> %__B, <8 x double> %sub, i32 8)4101 %1 = bitcast i8 %__U to <8 x i1>4102 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> zeroinitializer4103 ret <8 x double> %24104}4105 4106define <8 x double> @test_mm512_fmaddsub_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {4107; CHECK-LABEL: test_mm512_fmaddsub_pd:4108; CHECK: # %bb.0: # %entry4109; CHECK-NEXT: vfmaddsub213pd {{.*#+}} zmm0 = (zmm1 * zmm0) +/- zmm24110; CHECK-NEXT: ret{{[l|q]}}4111entry:4112 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) #104113 %1 = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C4114 %2 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %1) #104115 %3 = shufflevector <8 x double> %2, <8 x double> %0, <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>4116 ret <8 x double> %34117}4118 4119define <8 x double> @test_mm512_mask_fmaddsub_pd(<8 x double> %__A, i8 zeroext %__U, <8 x double> %__B, <8 x double> %__C) {4120; X86-LABEL: test_mm512_mask_fmaddsub_pd:4121; X86: # %bb.0: # %entry4122; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4123; X86-NEXT: kmovw %eax, %k14124; X86-NEXT: vfmaddsub132pd {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) +/- zmm24125; X86-NEXT: retl4126;4127; X64-LABEL: test_mm512_mask_fmaddsub_pd:4128; X64: # %bb.0: # %entry4129; X64-NEXT: kmovw %edi, %k14130; X64-NEXT: vfmaddsub132pd {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) +/- zmm24131; X64-NEXT: retq4132entry:4133 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) #104134 %1 = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C4135 %2 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %1) #104136 %3 = shufflevector <8 x double> %2, <8 x double> %0, <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>4137 %4 = bitcast i8 %__U to <8 x i1>4138 %5 = select <8 x i1> %4, <8 x double> %3, <8 x double> %__A4139 ret <8 x double> %54140}4141 4142define <8 x double> @test_mm512_mask3_fmaddsub_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i8 zeroext %__U) {4143; X86-LABEL: test_mm512_mask3_fmaddsub_pd:4144; X86: # %bb.0: # %entry4145; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4146; X86-NEXT: kmovw %eax, %k14147; X86-NEXT: vfmaddsub231pd {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) +/- zmm24148; X86-NEXT: vmovapd %zmm2, %zmm04149; X86-NEXT: retl4150;4151; X64-LABEL: test_mm512_mask3_fmaddsub_pd:4152; X64: # %bb.0: # %entry4153; X64-NEXT: kmovw %edi, %k14154; X64-NEXT: vfmaddsub231pd {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) +/- zmm24155; X64-NEXT: vmovapd %zmm2, %zmm04156; X64-NEXT: retq4157entry:4158 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) #104159 %1 = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C4160 %2 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %1) #104161 %3 = shufflevector <8 x double> %2, <8 x double> %0, <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>4162 %4 = bitcast i8 %__U to <8 x i1>4163 %5 = select <8 x i1> %4, <8 x double> %3, <8 x double> %__C4164 ret <8 x double> %54165}4166 4167define <8 x double> @test_mm512_maskz_fmaddsub_pd(i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {4168; X86-LABEL: test_mm512_maskz_fmaddsub_pd:4169; X86: # %bb.0: # %entry4170; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4171; X86-NEXT: kmovw %eax, %k14172; X86-NEXT: vfmaddsub213pd {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) +/- zmm24173; X86-NEXT: retl4174;4175; X64-LABEL: test_mm512_maskz_fmaddsub_pd:4176; X64: # %bb.0: # %entry4177; X64-NEXT: kmovw %edi, %k14178; X64-NEXT: vfmaddsub213pd {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) +/- zmm24179; X64-NEXT: retq4180entry:4181 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) #104182 %1 = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C4183 %2 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %1) #104184 %3 = shufflevector <8 x double> %2, <8 x double> %0, <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>4185 %4 = bitcast i8 %__U to <8 x i1>4186 %5 = select <8 x i1> %4, <8 x double> %3, <8 x double> zeroinitializer4187 ret <8 x double> %54188}4189 4190define <8 x double> @test_mm512_fmsubadd_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {4191; CHECK-LABEL: test_mm512_fmsubadd_pd:4192; CHECK: # %bb.0: # %entry4193; CHECK-NEXT: vfmsubadd213pd {{.*#+}} zmm0 = (zmm1 * zmm0) -/+ zmm24194; CHECK-NEXT: ret{{[l|q]}}4195entry:4196 %sub.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C4197 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %sub.i) #104198 %1 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) #104199 %2 = shufflevector <8 x double> %1, <8 x double> %0, <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>4200 ret <8 x double> %24201}4202 4203define <8 x double> @test_mm512_mask_fmsubadd_pd(<8 x double> %__A, i8 zeroext %__U, <8 x double> %__B, <8 x double> %__C) {4204; X86-LABEL: test_mm512_mask_fmsubadd_pd:4205; X86: # %bb.0: # %entry4206; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4207; X86-NEXT: kmovw %eax, %k14208; X86-NEXT: vfmsubadd132pd {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) -/+ zmm24209; X86-NEXT: retl4210;4211; X64-LABEL: test_mm512_mask_fmsubadd_pd:4212; X64: # %bb.0: # %entry4213; X64-NEXT: kmovw %edi, %k14214; X64-NEXT: vfmsubadd132pd {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) -/+ zmm24215; X64-NEXT: retq4216entry:4217 %sub.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C4218 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %sub.i) #104219 %1 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) #104220 %2 = shufflevector <8 x double> %1, <8 x double> %0, <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>4221 %3 = bitcast i8 %__U to <8 x i1>4222 %4 = select <8 x i1> %3, <8 x double> %2, <8 x double> %__A4223 ret <8 x double> %44224}4225 4226define <8 x double> @test_mm512_maskz_fmsubadd_pd(i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B, <8 x double> %__C) {4227; X86-LABEL: test_mm512_maskz_fmsubadd_pd:4228; X86: # %bb.0: # %entry4229; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4230; X86-NEXT: kmovw %eax, %k14231; X86-NEXT: vfmsubadd213pd {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) -/+ zmm24232; X86-NEXT: retl4233;4234; X64-LABEL: test_mm512_maskz_fmsubadd_pd:4235; X64: # %bb.0: # %entry4236; X64-NEXT: kmovw %edi, %k14237; X64-NEXT: vfmsubadd213pd {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) -/+ zmm24238; X64-NEXT: retq4239entry:4240 %sub.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C4241 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %sub.i) #104242 %1 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) #104243 %2 = shufflevector <8 x double> %1, <8 x double> %0, <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>4244 %3 = bitcast i8 %__U to <8 x i1>4245 %4 = select <8 x i1> %3, <8 x double> %2, <8 x double> zeroinitializer4246 ret <8 x double> %44247}4248 4249define <16 x float> @test_mm512_fmaddsub_round_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {4250; CHECK-LABEL: test_mm512_fmaddsub_round_ps:4251; CHECK: # %bb.0: # %entry4252; CHECK-NEXT: vfmaddsub213ps {rn-sae}, %zmm2, %zmm1, %zmm04253; CHECK-NEXT: ret{{[l|q]}}4254entry:4255 %0 = tail call <16 x float> @llvm.x86.avx512.vfmaddsub.ps.512(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i32 8)4256 ret <16 x float> %04257}4258 4259declare <16 x float> @llvm.x86.avx512.vfmaddsub.ps.512(<16 x float>, <16 x float>, <16 x float>, i32) #14260 4261define <16 x float> @test_mm512_mask_fmaddsub_round_ps(<16 x float> %__A, i16 zeroext %__U, <16 x float> %__B, <16 x float> %__C) {4262; X86-LABEL: test_mm512_mask_fmaddsub_round_ps:4263; X86: # %bb.0: # %entry4264; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4265; X86-NEXT: kmovw %eax, %k14266; X86-NEXT: vfmaddsub132ps {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}4267; X86-NEXT: retl4268;4269; X64-LABEL: test_mm512_mask_fmaddsub_round_ps:4270; X64: # %bb.0: # %entry4271; X64-NEXT: kmovw %edi, %k14272; X64-NEXT: vfmaddsub132ps {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}4273; X64-NEXT: retq4274entry:4275 %0 = tail call <16 x float> @llvm.x86.avx512.vfmaddsub.ps.512(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i32 8)4276 %1 = bitcast i16 %__U to <16 x i1>4277 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__A4278 ret <16 x float> %24279}4280 4281define <16 x float> @test_mm512_mask3_fmaddsub_round_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i16 zeroext %__U) {4282; X86-LABEL: test_mm512_mask3_fmaddsub_round_ps:4283; X86: # %bb.0: # %entry4284; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4285; X86-NEXT: kmovw %eax, %k14286; X86-NEXT: vfmaddsub231ps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}4287; X86-NEXT: vmovaps %zmm2, %zmm04288; X86-NEXT: retl4289;4290; X64-LABEL: test_mm512_mask3_fmaddsub_round_ps:4291; X64: # %bb.0: # %entry4292; X64-NEXT: kmovw %edi, %k14293; X64-NEXT: vfmaddsub231ps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}4294; X64-NEXT: vmovaps %zmm2, %zmm04295; X64-NEXT: retq4296entry:4297 %0 = tail call <16 x float> @llvm.x86.avx512.vfmaddsub.ps.512(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i32 8)4298 %1 = bitcast i16 %__U to <16 x i1>4299 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__C4300 ret <16 x float> %24301}4302 4303define <16 x float> @test_mm512_maskz_fmaddsub_round_ps(i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {4304; X86-LABEL: test_mm512_maskz_fmaddsub_round_ps:4305; X86: # %bb.0: # %entry4306; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4307; X86-NEXT: kmovw %eax, %k14308; X86-NEXT: vfmaddsub213ps {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}4309; X86-NEXT: retl4310;4311; X64-LABEL: test_mm512_maskz_fmaddsub_round_ps:4312; X64: # %bb.0: # %entry4313; X64-NEXT: kmovw %edi, %k14314; X64-NEXT: vfmaddsub213ps {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}4315; X64-NEXT: retq4316entry:4317 %0 = tail call <16 x float> @llvm.x86.avx512.vfmaddsub.ps.512(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i32 8)4318 %1 = bitcast i16 %__U to <16 x i1>4319 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> zeroinitializer4320 ret <16 x float> %24321}4322 4323define <16 x float> @test_mm512_fmsubadd_round_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {4324; X86-LABEL: test_mm512_fmsubadd_round_ps:4325; X86: # %bb.0: # %entry4326; X86-NEXT: vpxord {{\.?LCPI[0-9]+_[0-9]+}}{1to16}, %zmm2, %zmm24327; X86-NEXT: vfmaddsub213ps {rn-sae}, %zmm2, %zmm1, %zmm04328; X86-NEXT: retl4329;4330; X64-LABEL: test_mm512_fmsubadd_round_ps:4331; X64: # %bb.0: # %entry4332; X64-NEXT: vpxord {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm2, %zmm24333; X64-NEXT: vfmaddsub213ps {rn-sae}, %zmm2, %zmm1, %zmm04334; X64-NEXT: retq4335entry:4336 %sub = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C4337 %0 = tail call <16 x float> @llvm.x86.avx512.vfmaddsub.ps.512(<16 x float> %__A, <16 x float> %__B, <16 x float> %sub, i32 8)4338 ret <16 x float> %04339}4340 4341define <16 x float> @test_mm512_mask_fmsubadd_round_ps(<16 x float> %__A, i16 zeroext %__U, <16 x float> %__B, <16 x float> %__C) {4342; X86-LABEL: test_mm512_mask_fmsubadd_round_ps:4343; X86: # %bb.0: # %entry4344; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4345; X86-NEXT: kmovw %eax, %k14346; X86-NEXT: vfmsubadd132ps {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}4347; X86-NEXT: retl4348;4349; X64-LABEL: test_mm512_mask_fmsubadd_round_ps:4350; X64: # %bb.0: # %entry4351; X64-NEXT: kmovw %edi, %k14352; X64-NEXT: vfmsubadd132ps {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}4353; X64-NEXT: retq4354entry:4355 %sub = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C4356 %0 = tail call <16 x float> @llvm.x86.avx512.vfmaddsub.ps.512(<16 x float> %__A, <16 x float> %__B, <16 x float> %sub, i32 8)4357 %1 = bitcast i16 %__U to <16 x i1>4358 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__A4359 ret <16 x float> %24360}4361 4362define <16 x float> @test_mm512_maskz_fmsubadd_round_ps(i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {4363; X86-LABEL: test_mm512_maskz_fmsubadd_round_ps:4364; X86: # %bb.0: # %entry4365; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4366; X86-NEXT: kmovw %eax, %k14367; X86-NEXT: vfmsubadd213ps {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}4368; X86-NEXT: retl4369;4370; X64-LABEL: test_mm512_maskz_fmsubadd_round_ps:4371; X64: # %bb.0: # %entry4372; X64-NEXT: kmovw %edi, %k14373; X64-NEXT: vfmsubadd213ps {rn-sae}, %zmm2, %zmm1, %zmm0 {%k1} {z}4374; X64-NEXT: retq4375entry:4376 %sub = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C4377 %0 = tail call <16 x float> @llvm.x86.avx512.vfmaddsub.ps.512(<16 x float> %__A, <16 x float> %__B, <16 x float> %sub, i32 8)4378 %1 = bitcast i16 %__U to <16 x i1>4379 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> zeroinitializer4380 ret <16 x float> %24381}4382 4383define <16 x float> @test_mm512_fmaddsub_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {4384; CHECK-LABEL: test_mm512_fmaddsub_ps:4385; CHECK: # %bb.0: # %entry4386; CHECK-NEXT: vfmaddsub213ps {{.*#+}} zmm0 = (zmm1 * zmm0) +/- zmm24387; CHECK-NEXT: ret{{[l|q]}}4388entry:4389 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) #104390 %1 = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C4391 %2 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %1) #104392 %3 = shufflevector <16 x float> %2, <16 x float> %0, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>4393 ret <16 x float> %34394}4395 4396define <16 x float> @test_mm512_mask_fmaddsub_ps(<16 x float> %__A, i16 zeroext %__U, <16 x float> %__B, <16 x float> %__C) {4397; X86-LABEL: test_mm512_mask_fmaddsub_ps:4398; X86: # %bb.0: # %entry4399; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4400; X86-NEXT: kmovw %eax, %k14401; X86-NEXT: vfmaddsub132ps {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) +/- zmm24402; X86-NEXT: retl4403;4404; X64-LABEL: test_mm512_mask_fmaddsub_ps:4405; X64: # %bb.0: # %entry4406; X64-NEXT: kmovw %edi, %k14407; X64-NEXT: vfmaddsub132ps {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) +/- zmm24408; X64-NEXT: retq4409entry:4410 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) #104411 %1 = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C4412 %2 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %1) #104413 %3 = shufflevector <16 x float> %2, <16 x float> %0, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>4414 %4 = bitcast i16 %__U to <16 x i1>4415 %5 = select <16 x i1> %4, <16 x float> %3, <16 x float> %__A4416 ret <16 x float> %54417}4418 4419define <16 x float> @test_mm512_mask3_fmaddsub_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i16 zeroext %__U) {4420; X86-LABEL: test_mm512_mask3_fmaddsub_ps:4421; X86: # %bb.0: # %entry4422; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4423; X86-NEXT: kmovw %eax, %k14424; X86-NEXT: vfmaddsub231ps {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) +/- zmm24425; X86-NEXT: vmovaps %zmm2, %zmm04426; X86-NEXT: retl4427;4428; X64-LABEL: test_mm512_mask3_fmaddsub_ps:4429; X64: # %bb.0: # %entry4430; X64-NEXT: kmovw %edi, %k14431; X64-NEXT: vfmaddsub231ps {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) +/- zmm24432; X64-NEXT: vmovaps %zmm2, %zmm04433; X64-NEXT: retq4434entry:4435 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) #104436 %1 = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C4437 %2 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %1) #104438 %3 = shufflevector <16 x float> %2, <16 x float> %0, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>4439 %4 = bitcast i16 %__U to <16 x i1>4440 %5 = select <16 x i1> %4, <16 x float> %3, <16 x float> %__C4441 ret <16 x float> %54442}4443 4444define <16 x float> @test_mm512_maskz_fmaddsub_ps(i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {4445; X86-LABEL: test_mm512_maskz_fmaddsub_ps:4446; X86: # %bb.0: # %entry4447; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4448; X86-NEXT: kmovw %eax, %k14449; X86-NEXT: vfmaddsub213ps {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) +/- zmm24450; X86-NEXT: retl4451;4452; X64-LABEL: test_mm512_maskz_fmaddsub_ps:4453; X64: # %bb.0: # %entry4454; X64-NEXT: kmovw %edi, %k14455; X64-NEXT: vfmaddsub213ps {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) +/- zmm24456; X64-NEXT: retq4457entry:4458 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) #104459 %1 = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C4460 %2 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %1) #104461 %3 = shufflevector <16 x float> %2, <16 x float> %0, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>4462 %4 = bitcast i16 %__U to <16 x i1>4463 %5 = select <16 x i1> %4, <16 x float> %3, <16 x float> zeroinitializer4464 ret <16 x float> %54465}4466 4467define <16 x float> @test_mm512_fmsubadd_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {4468; CHECK-LABEL: test_mm512_fmsubadd_ps:4469; CHECK: # %bb.0: # %entry4470; CHECK-NEXT: vfmsubadd213ps {{.*#+}} zmm0 = (zmm1 * zmm0) -/+ zmm24471; CHECK-NEXT: ret{{[l|q]}}4472entry:4473 %sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C4474 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %sub.i) #104475 %1 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) #104476 %2 = shufflevector <16 x float> %1, <16 x float> %0, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>4477 ret <16 x float> %24478}4479 4480define <16 x float> @test_mm512_mask_fmsubadd_ps(<16 x float> %__A, i16 zeroext %__U, <16 x float> %__B, <16 x float> %__C) {4481; X86-LABEL: test_mm512_mask_fmsubadd_ps:4482; X86: # %bb.0: # %entry4483; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4484; X86-NEXT: kmovw %eax, %k14485; X86-NEXT: vfmsubadd132ps {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) -/+ zmm24486; X86-NEXT: retl4487;4488; X64-LABEL: test_mm512_mask_fmsubadd_ps:4489; X64: # %bb.0: # %entry4490; X64-NEXT: kmovw %edi, %k14491; X64-NEXT: vfmsubadd132ps {{.*#+}} zmm0 {%k1} = (zmm0 * zmm1) -/+ zmm24492; X64-NEXT: retq4493entry:4494 %sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C4495 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %sub.i) #104496 %1 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) #104497 %2 = shufflevector <16 x float> %1, <16 x float> %0, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>4498 %3 = bitcast i16 %__U to <16 x i1>4499 %4 = select <16 x i1> %3, <16 x float> %2, <16 x float> %__A4500 ret <16 x float> %44501}4502 4503define <16 x float> @test_mm512_maskz_fmsubadd_ps(i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B, <16 x float> %__C) {4504; X86-LABEL: test_mm512_maskz_fmsubadd_ps:4505; X86: # %bb.0: # %entry4506; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4507; X86-NEXT: kmovw %eax, %k14508; X86-NEXT: vfmsubadd213ps {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) -/+ zmm24509; X86-NEXT: retl4510;4511; X64-LABEL: test_mm512_maskz_fmsubadd_ps:4512; X64: # %bb.0: # %entry4513; X64-NEXT: kmovw %edi, %k14514; X64-NEXT: vfmsubadd213ps {{.*#+}} zmm0 {%k1} {z} = (zmm1 * zmm0) -/+ zmm24515; X64-NEXT: retq4516entry:4517 %sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C4518 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %sub.i) #104519 %1 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) #104520 %2 = shufflevector <16 x float> %1, <16 x float> %0, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>4521 %3 = bitcast i16 %__U to <16 x i1>4522 %4 = select <16 x i1> %3, <16 x float> %2, <16 x float> zeroinitializer4523 ret <16 x float> %44524}4525 4526define <8 x double> @test_mm512_mask3_fmsub_round_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i8 zeroext %__U) {4527; X86-LABEL: test_mm512_mask3_fmsub_round_pd:4528; X86: # %bb.0: # %entry4529; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4530; X86-NEXT: kmovw %eax, %k14531; X86-NEXT: vfmsub231pd {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}4532; X86-NEXT: vmovapd %zmm2, %zmm04533; X86-NEXT: retl4534;4535; X64-LABEL: test_mm512_mask3_fmsub_round_pd:4536; X64: # %bb.0: # %entry4537; X64-NEXT: kmovw %edi, %k14538; X64-NEXT: vfmsub231pd {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}4539; X64-NEXT: vmovapd %zmm2, %zmm04540; X64-NEXT: retq4541entry:4542 %sub = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C4543 %0 = tail call <8 x double> @llvm.x86.avx512.vfmadd.pd.512(<8 x double> %__A, <8 x double> %__B, <8 x double> %sub, i32 8)4544 %1 = bitcast i8 %__U to <8 x i1>4545 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__C4546 ret <8 x double> %24547}4548 4549define <8 x double> @test_mm512_mask3_fmsub_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i8 zeroext %__U) {4550; X86-LABEL: test_mm512_mask3_fmsub_pd:4551; X86: # %bb.0: # %entry4552; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4553; X86-NEXT: kmovw %eax, %k14554; X86-NEXT: vfmsub231pd {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) - zmm24555; X86-NEXT: vmovapd %zmm2, %zmm04556; X86-NEXT: retl4557;4558; X64-LABEL: test_mm512_mask3_fmsub_pd:4559; X64: # %bb.0: # %entry4560; X64-NEXT: kmovw %edi, %k14561; X64-NEXT: vfmsub231pd {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) - zmm24562; X64-NEXT: vmovapd %zmm2, %zmm04563; X64-NEXT: retq4564entry:4565 %sub.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C4566 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %sub.i) #104567 %1 = bitcast i8 %__U to <8 x i1>4568 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__C4569 ret <8 x double> %24570}4571 4572define <16 x float> @test_mm512_mask3_fmsub_round_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i16 zeroext %__U) {4573; X86-LABEL: test_mm512_mask3_fmsub_round_ps:4574; X86: # %bb.0: # %entry4575; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4576; X86-NEXT: kmovw %eax, %k14577; X86-NEXT: vfmsub231ps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}4578; X86-NEXT: vmovaps %zmm2, %zmm04579; X86-NEXT: retl4580;4581; X64-LABEL: test_mm512_mask3_fmsub_round_ps:4582; X64: # %bb.0: # %entry4583; X64-NEXT: kmovw %edi, %k14584; X64-NEXT: vfmsub231ps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}4585; X64-NEXT: vmovaps %zmm2, %zmm04586; X64-NEXT: retq4587entry:4588 %sub = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C4589 %0 = tail call <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float> %__A, <16 x float> %__B, <16 x float> %sub, i32 8)4590 %1 = bitcast i16 %__U to <16 x i1>4591 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__C4592 ret <16 x float> %24593}4594 4595define <16 x float> @test_mm512_mask3_fmsub_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i16 zeroext %__U) {4596; X86-LABEL: test_mm512_mask3_fmsub_ps:4597; X86: # %bb.0: # %entry4598; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4599; X86-NEXT: kmovw %eax, %k14600; X86-NEXT: vfmsub231ps {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) - zmm24601; X86-NEXT: vmovaps %zmm2, %zmm04602; X86-NEXT: retl4603;4604; X64-LABEL: test_mm512_mask3_fmsub_ps:4605; X64: # %bb.0: # %entry4606; X64-NEXT: kmovw %edi, %k14607; X64-NEXT: vfmsub231ps {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) - zmm24608; X64-NEXT: vmovaps %zmm2, %zmm04609; X64-NEXT: retq4610entry:4611 %sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C4612 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %sub.i) #104613 %1 = bitcast i16 %__U to <16 x i1>4614 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__C4615 ret <16 x float> %24616}4617 4618define <8 x double> @test_mm512_mask3_fmsubadd_round_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i8 zeroext %__U) {4619; X86-LABEL: test_mm512_mask3_fmsubadd_round_pd:4620; X86: # %bb.0: # %entry4621; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4622; X86-NEXT: kmovw %eax, %k14623; X86-NEXT: vfmsubadd231pd {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}4624; X86-NEXT: vmovapd %zmm2, %zmm04625; X86-NEXT: retl4626;4627; X64-LABEL: test_mm512_mask3_fmsubadd_round_pd:4628; X64: # %bb.0: # %entry4629; X64-NEXT: kmovw %edi, %k14630; X64-NEXT: vfmsubadd231pd {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}4631; X64-NEXT: vmovapd %zmm2, %zmm04632; X64-NEXT: retq4633entry:4634 %sub = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C4635 %0 = tail call <8 x double> @llvm.x86.avx512.vfmaddsub.pd.512(<8 x double> %__A, <8 x double> %__B, <8 x double> %sub, i32 8)4636 %1 = bitcast i8 %__U to <8 x i1>4637 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__C4638 ret <8 x double> %24639}4640 4641define <8 x double> @test_mm512_mask3_fmsubadd_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i8 zeroext %__U) {4642; X86-LABEL: test_mm512_mask3_fmsubadd_pd:4643; X86: # %bb.0: # %entry4644; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4645; X86-NEXT: kmovw %eax, %k14646; X86-NEXT: vfmsubadd231pd {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) -/+ zmm24647; X86-NEXT: vmovapd %zmm2, %zmm04648; X86-NEXT: retl4649;4650; X64-LABEL: test_mm512_mask3_fmsubadd_pd:4651; X64: # %bb.0: # %entry4652; X64-NEXT: kmovw %edi, %k14653; X64-NEXT: vfmsubadd231pd {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) -/+ zmm24654; X64-NEXT: vmovapd %zmm2, %zmm04655; X64-NEXT: retq4656entry:4657 %sub.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C4658 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %sub.i) #104659 %1 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) #104660 %2 = shufflevector <8 x double> %1, <8 x double> %0, <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>4661 %3 = bitcast i8 %__U to <8 x i1>4662 %4 = select <8 x i1> %3, <8 x double> %2, <8 x double> %__C4663 ret <8 x double> %44664}4665 4666define <16 x float> @test_mm512_mask3_fmsubadd_round_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i16 zeroext %__U) {4667; X86-LABEL: test_mm512_mask3_fmsubadd_round_ps:4668; X86: # %bb.0: # %entry4669; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4670; X86-NEXT: kmovw %eax, %k14671; X86-NEXT: vfmsubadd231ps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}4672; X86-NEXT: vmovaps %zmm2, %zmm04673; X86-NEXT: retl4674;4675; X64-LABEL: test_mm512_mask3_fmsubadd_round_ps:4676; X64: # %bb.0: # %entry4677; X64-NEXT: kmovw %edi, %k14678; X64-NEXT: vfmsubadd231ps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}4679; X64-NEXT: vmovaps %zmm2, %zmm04680; X64-NEXT: retq4681entry:4682 %sub = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C4683 %0 = tail call <16 x float> @llvm.x86.avx512.vfmaddsub.ps.512(<16 x float> %__A, <16 x float> %__B, <16 x float> %sub, i32 8)4684 %1 = bitcast i16 %__U to <16 x i1>4685 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__C4686 ret <16 x float> %24687}4688 4689define <16 x float> @test_mm512_mask3_fmsubadd_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i16 zeroext %__U) {4690; X86-LABEL: test_mm512_mask3_fmsubadd_ps:4691; X86: # %bb.0: # %entry4692; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4693; X86-NEXT: kmovw %eax, %k14694; X86-NEXT: vfmsubadd231ps {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) -/+ zmm24695; X86-NEXT: vmovaps %zmm2, %zmm04696; X86-NEXT: retl4697;4698; X64-LABEL: test_mm512_mask3_fmsubadd_ps:4699; X64: # %bb.0: # %entry4700; X64-NEXT: kmovw %edi, %k14701; X64-NEXT: vfmsubadd231ps {{.*#+}} zmm2 {%k1} = (zmm0 * zmm1) -/+ zmm24702; X64-NEXT: vmovaps %zmm2, %zmm04703; X64-NEXT: retq4704entry:4705 %sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C4706 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %sub.i) #104707 %1 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) #104708 %2 = shufflevector <16 x float> %1, <16 x float> %0, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>4709 %3 = bitcast i16 %__U to <16 x i1>4710 %4 = select <16 x i1> %3, <16 x float> %2, <16 x float> %__C4711 ret <16 x float> %44712}4713 4714define <8 x double> @test_mm512_mask_fnmadd_round_pd(<8 x double> %__A, i8 zeroext %__U, <8 x double> %__B, <8 x double> %__C) {4715; X86-LABEL: test_mm512_mask_fnmadd_round_pd:4716; X86: # %bb.0: # %entry4717; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4718; X86-NEXT: kmovw %eax, %k14719; X86-NEXT: vfnmadd132pd {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}4720; X86-NEXT: retl4721;4722; X64-LABEL: test_mm512_mask_fnmadd_round_pd:4723; X64: # %bb.0: # %entry4724; X64-NEXT: kmovw %edi, %k14725; X64-NEXT: vfnmadd132pd {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}4726; X64-NEXT: retq4727entry:4728 %sub = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__A4729 %0 = tail call <8 x double> @llvm.x86.avx512.vfmadd.pd.512(<8 x double> %sub, <8 x double> %__B, <8 x double> %__C, i32 8)4730 %1 = bitcast i8 %__U to <8 x i1>4731 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__A4732 ret <8 x double> %24733}4734 4735define <8 x double> @test_mm512_mask_fnmadd_pd(<8 x double> %__A, i8 zeroext %__U, <8 x double> %__B, <8 x double> %__C) {4736; X86-LABEL: test_mm512_mask_fnmadd_pd:4737; X86: # %bb.0: # %entry4738; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4739; X86-NEXT: kmovw %eax, %k14740; X86-NEXT: vfnmadd132pd {{.*#+}} zmm0 {%k1} = -(zmm0 * zmm1) + zmm24741; X86-NEXT: retl4742;4743; X64-LABEL: test_mm512_mask_fnmadd_pd:4744; X64: # %bb.0: # %entry4745; X64-NEXT: kmovw %edi, %k14746; X64-NEXT: vfnmadd132pd {{.*#+}} zmm0 {%k1} = -(zmm0 * zmm1) + zmm24747; X64-NEXT: retq4748entry:4749 %sub.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__A4750 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %sub.i, <8 x double> %__B, <8 x double> %__C) #104751 %1 = bitcast i8 %__U to <8 x i1>4752 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__A4753 ret <8 x double> %24754}4755 4756define <16 x float> @test_mm512_mask_fnmadd_round_ps(<16 x float> %__A, i16 zeroext %__U, <16 x float> %__B, <16 x float> %__C) {4757; X86-LABEL: test_mm512_mask_fnmadd_round_ps:4758; X86: # %bb.0: # %entry4759; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4760; X86-NEXT: kmovw %eax, %k14761; X86-NEXT: vfnmadd132ps {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}4762; X86-NEXT: retl4763;4764; X64-LABEL: test_mm512_mask_fnmadd_round_ps:4765; X64: # %bb.0: # %entry4766; X64-NEXT: kmovw %edi, %k14767; X64-NEXT: vfnmadd132ps {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}4768; X64-NEXT: retq4769entry:4770 %sub = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__A4771 %0 = tail call <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float> %sub, <16 x float> %__B, <16 x float> %__C, i32 8)4772 %1 = bitcast i16 %__U to <16 x i1>4773 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__A4774 ret <16 x float> %24775}4776 4777define <16 x float> @test_mm512_mask_fnmadd_ps(<16 x float> %__A, i16 zeroext %__U, <16 x float> %__B, <16 x float> %__C) {4778; X86-LABEL: test_mm512_mask_fnmadd_ps:4779; X86: # %bb.0: # %entry4780; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4781; X86-NEXT: kmovw %eax, %k14782; X86-NEXT: vfnmadd132ps {{.*#+}} zmm0 {%k1} = -(zmm0 * zmm1) + zmm24783; X86-NEXT: retl4784;4785; X64-LABEL: test_mm512_mask_fnmadd_ps:4786; X64: # %bb.0: # %entry4787; X64-NEXT: kmovw %edi, %k14788; X64-NEXT: vfnmadd132ps {{.*#+}} zmm0 {%k1} = -(zmm0 * zmm1) + zmm24789; X64-NEXT: retq4790entry:4791 %sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__A4792 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %sub.i, <16 x float> %__B, <16 x float> %__C) #104793 %1 = bitcast i16 %__U to <16 x i1>4794 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__A4795 ret <16 x float> %24796}4797 4798define <8 x double> @test_mm512_mask_fnmsub_round_pd(<8 x double> %__A, i8 zeroext %__U, <8 x double> %__B, <8 x double> %__C) {4799; X86-LABEL: test_mm512_mask_fnmsub_round_pd:4800; X86: # %bb.0: # %entry4801; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4802; X86-NEXT: kmovw %eax, %k14803; X86-NEXT: vfnmsub132pd {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}4804; X86-NEXT: retl4805;4806; X64-LABEL: test_mm512_mask_fnmsub_round_pd:4807; X64: # %bb.0: # %entry4808; X64-NEXT: kmovw %edi, %k14809; X64-NEXT: vfnmsub132pd {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}4810; X64-NEXT: retq4811entry:4812 %sub = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__B4813 %sub1 = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C4814 %0 = tail call <8 x double> @llvm.x86.avx512.vfmadd.pd.512(<8 x double> %__A, <8 x double> %sub, <8 x double> %sub1, i32 8)4815 %1 = bitcast i8 %__U to <8 x i1>4816 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__A4817 ret <8 x double> %24818}4819 4820define <8 x double> @test_mm512_mask3_fnmsub_round_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i8 zeroext %__U) {4821; X86-LABEL: test_mm512_mask3_fnmsub_round_pd:4822; X86: # %bb.0: # %entry4823; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4824; X86-NEXT: kmovw %eax, %k14825; X86-NEXT: vfnmsub231pd {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}4826; X86-NEXT: vmovapd %zmm2, %zmm04827; X86-NEXT: retl4828;4829; X64-LABEL: test_mm512_mask3_fnmsub_round_pd:4830; X64: # %bb.0: # %entry4831; X64-NEXT: kmovw %edi, %k14832; X64-NEXT: vfnmsub231pd {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}4833; X64-NEXT: vmovapd %zmm2, %zmm04834; X64-NEXT: retq4835entry:4836 %sub = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__B4837 %sub1 = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C4838 %0 = tail call <8 x double> @llvm.x86.avx512.vfmadd.pd.512(<8 x double> %__A, <8 x double> %sub, <8 x double> %sub1, i32 8)4839 %1 = bitcast i8 %__U to <8 x i1>4840 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__C4841 ret <8 x double> %24842}4843 4844define <8 x double> @test_mm512_mask_fnmsub_pd(<8 x double> %__A, i8 zeroext %__U, <8 x double> %__B, <8 x double> %__C) {4845; X86-LABEL: test_mm512_mask_fnmsub_pd:4846; X86: # %bb.0: # %entry4847; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4848; X86-NEXT: kmovw %eax, %k14849; X86-NEXT: vfnmsub132pd {{.*#+}} zmm0 {%k1} = -(zmm0 * zmm1) - zmm24850; X86-NEXT: retl4851;4852; X64-LABEL: test_mm512_mask_fnmsub_pd:4853; X64: # %bb.0: # %entry4854; X64-NEXT: kmovw %edi, %k14855; X64-NEXT: vfnmsub132pd {{.*#+}} zmm0 {%k1} = -(zmm0 * zmm1) - zmm24856; X64-NEXT: retq4857entry:4858 %sub.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__B4859 %sub2.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C4860 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %sub.i, <8 x double> %sub2.i) #104861 %1 = bitcast i8 %__U to <8 x i1>4862 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__A4863 ret <8 x double> %24864}4865 4866define <8 x double> @test_mm512_mask3_fnmsub_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C, i8 zeroext %__U) {4867; X86-LABEL: test_mm512_mask3_fnmsub_pd:4868; X86: # %bb.0: # %entry4869; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4870; X86-NEXT: kmovw %eax, %k14871; X86-NEXT: vfnmsub231pd {{.*#+}} zmm2 {%k1} = -(zmm0 * zmm1) - zmm24872; X86-NEXT: vmovapd %zmm2, %zmm04873; X86-NEXT: retl4874;4875; X64-LABEL: test_mm512_mask3_fnmsub_pd:4876; X64: # %bb.0: # %entry4877; X64-NEXT: kmovw %edi, %k14878; X64-NEXT: vfnmsub231pd {{.*#+}} zmm2 {%k1} = -(zmm0 * zmm1) - zmm24879; X64-NEXT: vmovapd %zmm2, %zmm04880; X64-NEXT: retq4881entry:4882 %sub.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__B4883 %sub2.i = fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %__C4884 %0 = tail call <8 x double> @llvm.fma.v8f64(<8 x double> %__A, <8 x double> %sub.i, <8 x double> %sub2.i) #104885 %1 = bitcast i8 %__U to <8 x i1>4886 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__C4887 ret <8 x double> %24888}4889 4890define <16 x float> @test_mm512_mask_fnmsub_round_ps(<16 x float> %__A, i16 zeroext %__U, <16 x float> %__B, <16 x float> %__C) {4891; X86-LABEL: test_mm512_mask_fnmsub_round_ps:4892; X86: # %bb.0: # %entry4893; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4894; X86-NEXT: kmovw %eax, %k14895; X86-NEXT: vfnmsub132ps {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}4896; X86-NEXT: retl4897;4898; X64-LABEL: test_mm512_mask_fnmsub_round_ps:4899; X64: # %bb.0: # %entry4900; X64-NEXT: kmovw %edi, %k14901; X64-NEXT: vfnmsub132ps {rn-sae}, %zmm1, %zmm2, %zmm0 {%k1}4902; X64-NEXT: retq4903entry:4904 %sub = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__B4905 %sub1 = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C4906 %0 = tail call <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float> %__A, <16 x float> %sub, <16 x float> %sub1, i32 8)4907 %1 = bitcast i16 %__U to <16 x i1>4908 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__A4909 ret <16 x float> %24910}4911 4912define <16 x float> @test_mm512_mask3_fnmsub_round_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i16 zeroext %__U) {4913; X86-LABEL: test_mm512_mask3_fnmsub_round_ps:4914; X86: # %bb.0: # %entry4915; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4916; X86-NEXT: kmovw %eax, %k14917; X86-NEXT: vfnmsub231ps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}4918; X86-NEXT: vmovaps %zmm2, %zmm04919; X86-NEXT: retl4920;4921; X64-LABEL: test_mm512_mask3_fnmsub_round_ps:4922; X64: # %bb.0: # %entry4923; X64-NEXT: kmovw %edi, %k14924; X64-NEXT: vfnmsub231ps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}4925; X64-NEXT: vmovaps %zmm2, %zmm04926; X64-NEXT: retq4927entry:4928 %sub = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__B4929 %sub1 = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C4930 %0 = tail call <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float> %__A, <16 x float> %sub, <16 x float> %sub1, i32 8)4931 %1 = bitcast i16 %__U to <16 x i1>4932 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__C4933 ret <16 x float> %24934}4935 4936define <16 x float> @test_mm512_mask_fnmsub_ps(<16 x float> %__A, i16 zeroext %__U, <16 x float> %__B, <16 x float> %__C) {4937; X86-LABEL: test_mm512_mask_fnmsub_ps:4938; X86: # %bb.0: # %entry4939; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4940; X86-NEXT: kmovw %eax, %k14941; X86-NEXT: vfnmsub132ps {{.*#+}} zmm0 {%k1} = -(zmm0 * zmm1) - zmm24942; X86-NEXT: retl4943;4944; X64-LABEL: test_mm512_mask_fnmsub_ps:4945; X64: # %bb.0: # %entry4946; X64-NEXT: kmovw %edi, %k14947; X64-NEXT: vfnmsub132ps {{.*#+}} zmm0 {%k1} = -(zmm0 * zmm1) - zmm24948; X64-NEXT: retq4949entry:4950 %sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__B4951 %sub1.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C4952 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %sub.i, <16 x float> %sub1.i) #104953 %1 = bitcast i16 %__U to <16 x i1>4954 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__A4955 ret <16 x float> %24956}4957 4958define <16 x float> @test_mm512_mask3_fnmsub_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C, i16 zeroext %__U) {4959; X86-LABEL: test_mm512_mask3_fnmsub_ps:4960; X86: # %bb.0: # %entry4961; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax4962; X86-NEXT: kmovw %eax, %k14963; X86-NEXT: vfnmsub231ps {{.*#+}} zmm2 {%k1} = -(zmm0 * zmm1) - zmm24964; X86-NEXT: vmovaps %zmm2, %zmm04965; X86-NEXT: retl4966;4967; X64-LABEL: test_mm512_mask3_fnmsub_ps:4968; X64: # %bb.0: # %entry4969; X64-NEXT: kmovw %edi, %k14970; X64-NEXT: vfnmsub231ps {{.*#+}} zmm2 {%k1} = -(zmm0 * zmm1) - zmm24971; X64-NEXT: vmovaps %zmm2, %zmm04972; X64-NEXT: retq4973entry:4974 %sub.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__B4975 %sub1.i = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %__C4976 %0 = tail call <16 x float> @llvm.fma.v16f32(<16 x float> %__A, <16 x float> %sub.i, <16 x float> %sub1.i) #104977 %1 = bitcast i16 %__U to <16 x i1>4978 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__C4979 ret <16 x float> %24980}4981 4982define <4 x float> @test_mm_mask_fmadd_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {4983; X86-LABEL: test_mm_mask_fmadd_ss:4984; X86: # %bb.0: # %entry4985; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax4986; X86-NEXT: kmovw %eax, %k14987; X86-NEXT: vfmadd213ss {{.*#+}} xmm0 {%k1} = (xmm1 * xmm0) + xmm24988; X86-NEXT: retl4989;4990; X64-LABEL: test_mm_mask_fmadd_ss:4991; X64: # %bb.0: # %entry4992; X64-NEXT: kmovw %edi, %k14993; X64-NEXT: vfmadd213ss {{.*#+}} xmm0 {%k1} = (xmm1 * xmm0) + xmm24994; X64-NEXT: retq4995entry:4996 %0 = extractelement <4 x float> %__W, i64 04997 %1 = extractelement <4 x float> %__A, i64 04998 %2 = extractelement <4 x float> %__B, i64 04999 %3 = tail call float @llvm.fma.f32(float %0, float %1, float %2) #105000 %4 = and i8 %__U, 15001 %tobool.i = icmp eq i8 %4, 05002 %vecext1.i = extractelement <4 x float> %__W, i32 05003 %cond.i = select i1 %tobool.i, float %vecext1.i, float %35004 %vecins.i = insertelement <4 x float> %__W, float %cond.i, i32 05005 ret <4 x float> %vecins.i5006}5007 5008define <4 x float> @test_mm_mask_fmadd_round_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {5009; X86-LABEL: test_mm_mask_fmadd_round_ss:5010; X86: # %bb.0: # %entry5011; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5012; X86-NEXT: kmovw %eax, %k15013; X86-NEXT: vfmadd213ss {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1}5014; X86-NEXT: retl5015;5016; X64-LABEL: test_mm_mask_fmadd_round_ss:5017; X64: # %bb.0: # %entry5018; X64-NEXT: kmovw %edi, %k15019; X64-NEXT: vfmadd213ss {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1}5020; X64-NEXT: retq5021entry:5022 %0 = extractelement <4 x float> %__W, i64 05023 %1 = extractelement <4 x float> %__A, i64 05024 %2 = extractelement <4 x float> %__B, i64 05025 %3 = tail call float @llvm.x86.avx512.vfmadd.f32(float %0, float %1, float %2, i32 8)5026 %4 = bitcast i8 %__U to <8 x i1>5027 %5 = extractelement <8 x i1> %4, i64 05028 %6 = select i1 %5, float %3, float %05029 %7 = insertelement <4 x float> %__W, float %6, i64 05030 ret <4 x float> %75031}5032 5033declare float @llvm.x86.avx512.vfmadd.f32(float, float, float, i32) #15034 5035define <4 x float> @test_mm_maskz_fmadd_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B, <4 x float> %__C) {5036; X86-LABEL: test_mm_maskz_fmadd_ss:5037; X86: # %bb.0: # %entry5038; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5039; X86-NEXT: kmovw %eax, %k15040; X86-NEXT: vfmadd213ss {{.*#+}} xmm0 {%k1} {z} = (xmm1 * xmm0) + xmm25041; X86-NEXT: retl5042;5043; X64-LABEL: test_mm_maskz_fmadd_ss:5044; X64: # %bb.0: # %entry5045; X64-NEXT: kmovw %edi, %k15046; X64-NEXT: vfmadd213ss {{.*#+}} xmm0 {%k1} {z} = (xmm1 * xmm0) + xmm25047; X64-NEXT: retq5048entry:5049 %0 = extractelement <4 x float> %__A, i64 05050 %1 = extractelement <4 x float> %__B, i64 05051 %2 = extractelement <4 x float> %__C, i64 05052 %3 = tail call float @llvm.fma.f32(float %0, float %1, float %2) #105053 %4 = and i8 %__U, 15054 %tobool.i = icmp eq i8 %4, 05055 %cond.i = select i1 %tobool.i, float 0.000000e+00, float %35056 %vecins.i = insertelement <4 x float> %__A, float %cond.i, i32 05057 ret <4 x float> %vecins.i5058}5059 5060define <4 x float> @test_mm_maskz_fmadd_round_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B, <4 x float> %__C) {5061; X86-LABEL: test_mm_maskz_fmadd_round_ss:5062; X86: # %bb.0: # %entry5063; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5064; X86-NEXT: kmovw %eax, %k15065; X86-NEXT: vfmadd213ss {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}5066; X86-NEXT: retl5067;5068; X64-LABEL: test_mm_maskz_fmadd_round_ss:5069; X64: # %bb.0: # %entry5070; X64-NEXT: kmovw %edi, %k15071; X64-NEXT: vfmadd213ss {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}5072; X64-NEXT: retq5073entry:5074 %0 = extractelement <4 x float> %__A, i64 05075 %1 = extractelement <4 x float> %__B, i64 05076 %2 = extractelement <4 x float> %__C, i64 05077 %3 = tail call float @llvm.x86.avx512.vfmadd.f32(float %0, float %1, float %2, i32 8)5078 %4 = bitcast i8 %__U to <8 x i1>5079 %5 = extractelement <8 x i1> %4, i64 05080 %6 = select i1 %5, float %3, float 0.000000e+005081 %7 = insertelement <4 x float> %__A, float %6, i64 05082 ret <4 x float> %75083}5084 5085define <4 x float> @test_mm_mask3_fmadd_ss(<4 x float> %__W, <4 x float> %__X, <4 x float> %__Y, i8 zeroext %__U) {5086; X86-LABEL: test_mm_mask3_fmadd_ss:5087; X86: # %bb.0: # %entry5088; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5089; X86-NEXT: kmovw %eax, %k15090; X86-NEXT: vfmadd231ss {{.*#+}} xmm2 {%k1} = (xmm0 * xmm1) + xmm25091; X86-NEXT: vmovaps %xmm2, %xmm05092; X86-NEXT: retl5093;5094; X64-LABEL: test_mm_mask3_fmadd_ss:5095; X64: # %bb.0: # %entry5096; X64-NEXT: kmovw %edi, %k15097; X64-NEXT: vfmadd231ss {{.*#+}} xmm2 {%k1} = (xmm0 * xmm1) + xmm25098; X64-NEXT: vmovaps %xmm2, %xmm05099; X64-NEXT: retq5100entry:5101 %0 = extractelement <4 x float> %__W, i64 05102 %1 = extractelement <4 x float> %__X, i64 05103 %2 = extractelement <4 x float> %__Y, i64 05104 %3 = tail call float @llvm.fma.f32(float %0, float %1, float %2) #105105 %4 = and i8 %__U, 15106 %tobool.i = icmp eq i8 %4, 05107 %vecext1.i = extractelement <4 x float> %__Y, i32 05108 %cond.i = select i1 %tobool.i, float %vecext1.i, float %35109 %vecins.i = insertelement <4 x float> %__Y, float %cond.i, i32 05110 ret <4 x float> %vecins.i5111}5112 5113define <4 x float> @test_mm_mask3_fmadd_round_ss(<4 x float> %__W, <4 x float> %__X, <4 x float> %__Y, i8 zeroext %__U) {5114; X86-LABEL: test_mm_mask3_fmadd_round_ss:5115; X86: # %bb.0: # %entry5116; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5117; X86-NEXT: kmovw %eax, %k15118; X86-NEXT: vfmadd231ss {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}5119; X86-NEXT: vmovaps %xmm2, %xmm05120; X86-NEXT: retl5121;5122; X64-LABEL: test_mm_mask3_fmadd_round_ss:5123; X64: # %bb.0: # %entry5124; X64-NEXT: kmovw %edi, %k15125; X64-NEXT: vfmadd231ss {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}5126; X64-NEXT: vmovaps %xmm2, %xmm05127; X64-NEXT: retq5128entry:5129 %0 = extractelement <4 x float> %__W, i64 05130 %1 = extractelement <4 x float> %__X, i64 05131 %2 = extractelement <4 x float> %__Y, i64 05132 %3 = tail call float @llvm.x86.avx512.vfmadd.f32(float %0, float %1, float %2, i32 8)5133 %4 = bitcast i8 %__U to <8 x i1>5134 %5 = extractelement <8 x i1> %4, i64 05135 %6 = select i1 %5, float %3, float %25136 %7 = insertelement <4 x float> %__Y, float %6, i64 05137 ret <4 x float> %75138}5139 5140define <4 x float> @test_mm_mask_fmsub_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {5141; X86-LABEL: test_mm_mask_fmsub_ss:5142; X86: # %bb.0: # %entry5143; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5144; X86-NEXT: kmovw %eax, %k15145; X86-NEXT: vfmsub213ss {{.*#+}} xmm0 {%k1} = (xmm1 * xmm0) - xmm25146; X86-NEXT: retl5147;5148; X64-LABEL: test_mm_mask_fmsub_ss:5149; X64: # %bb.0: # %entry5150; X64-NEXT: kmovw %edi, %k15151; X64-NEXT: vfmsub213ss {{.*#+}} xmm0 {%k1} = (xmm1 * xmm0) - xmm25152; X64-NEXT: retq5153entry:5154 %0 = extractelement <4 x float> %__W, i64 05155 %1 = extractelement <4 x float> %__A, i64 05156 %.rhs.i = extractelement <4 x float> %__B, i64 05157 %2 = fsub float -0.000000e+00, %.rhs.i5158 %3 = tail call float @llvm.fma.f32(float %0, float %1, float %2) #105159 %4 = and i8 %__U, 15160 %tobool.i = icmp eq i8 %4, 05161 %vecext1.i = extractelement <4 x float> %__W, i32 05162 %cond.i = select i1 %tobool.i, float %vecext1.i, float %35163 %vecins.i = insertelement <4 x float> %__W, float %cond.i, i32 05164 ret <4 x float> %vecins.i5165}5166 5167define <4 x float> @test_mm_mask_fmsub_round_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {5168; X86-LABEL: test_mm_mask_fmsub_round_ss:5169; X86: # %bb.0: # %entry5170; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5171; X86-NEXT: kmovw %eax, %k15172; X86-NEXT: vfmsub213ss {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1}5173; X86-NEXT: retl5174;5175; X64-LABEL: test_mm_mask_fmsub_round_ss:5176; X64: # %bb.0: # %entry5177; X64-NEXT: kmovw %edi, %k15178; X64-NEXT: vfmsub213ss {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1}5179; X64-NEXT: retq5180entry:5181 %0 = extractelement <4 x float> %__W, i64 05182 %1 = extractelement <4 x float> %__A, i64 05183 %.rhs = extractelement <4 x float> %__B, i64 05184 %2 = fsub float -0.000000e+00, %.rhs5185 %3 = tail call float @llvm.x86.avx512.vfmadd.f32(float %0, float %1, float %2, i32 8)5186 %4 = bitcast i8 %__U to <8 x i1>5187 %5 = extractelement <8 x i1> %4, i64 05188 %6 = select i1 %5, float %3, float %05189 %7 = insertelement <4 x float> %__W, float %6, i64 05190 ret <4 x float> %75191}5192 5193define <4 x float> @test_mm_maskz_fmsub_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B, <4 x float> %__C) {5194; X86-LABEL: test_mm_maskz_fmsub_ss:5195; X86: # %bb.0: # %entry5196; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5197; X86-NEXT: kmovw %eax, %k15198; X86-NEXT: vfmsub213ss {{.*#+}} xmm0 {%k1} {z} = (xmm1 * xmm0) - xmm25199; X86-NEXT: retl5200;5201; X64-LABEL: test_mm_maskz_fmsub_ss:5202; X64: # %bb.0: # %entry5203; X64-NEXT: kmovw %edi, %k15204; X64-NEXT: vfmsub213ss {{.*#+}} xmm0 {%k1} {z} = (xmm1 * xmm0) - xmm25205; X64-NEXT: retq5206entry:5207 %0 = extractelement <4 x float> %__A, i64 05208 %1 = extractelement <4 x float> %__B, i64 05209 %.rhs.i = extractelement <4 x float> %__C, i64 05210 %2 = fsub float -0.000000e+00, %.rhs.i5211 %3 = tail call float @llvm.fma.f32(float %0, float %1, float %2) #105212 %4 = and i8 %__U, 15213 %tobool.i = icmp eq i8 %4, 05214 %cond.i = select i1 %tobool.i, float 0.000000e+00, float %35215 %vecins.i = insertelement <4 x float> %__A, float %cond.i, i32 05216 ret <4 x float> %vecins.i5217}5218 5219define <4 x float> @test_mm_maskz_fmsub_round_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B, <4 x float> %__C) {5220; X86-LABEL: test_mm_maskz_fmsub_round_ss:5221; X86: # %bb.0: # %entry5222; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5223; X86-NEXT: kmovw %eax, %k15224; X86-NEXT: vfmsub213ss {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}5225; X86-NEXT: retl5226;5227; X64-LABEL: test_mm_maskz_fmsub_round_ss:5228; X64: # %bb.0: # %entry5229; X64-NEXT: kmovw %edi, %k15230; X64-NEXT: vfmsub213ss {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}5231; X64-NEXT: retq5232entry:5233 %0 = extractelement <4 x float> %__A, i64 05234 %1 = extractelement <4 x float> %__B, i64 05235 %.rhs = extractelement <4 x float> %__C, i64 05236 %2 = fsub float -0.000000e+00, %.rhs5237 %3 = tail call float @llvm.x86.avx512.vfmadd.f32(float %0, float %1, float %2, i32 8)5238 %4 = bitcast i8 %__U to <8 x i1>5239 %5 = extractelement <8 x i1> %4, i64 05240 %6 = select i1 %5, float %3, float 0.000000e+005241 %7 = insertelement <4 x float> %__A, float %6, i64 05242 ret <4 x float> %75243}5244 5245define <4 x float> @test_mm_mask3_fmsub_ss(<4 x float> %__W, <4 x float> %__X, <4 x float> %__Y, i8 zeroext %__U) {5246; X86-LABEL: test_mm_mask3_fmsub_ss:5247; X86: # %bb.0: # %entry5248; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5249; X86-NEXT: kmovw %eax, %k15250; X86-NEXT: vfmsub231ss {{.*#+}} xmm2 {%k1} = (xmm0 * xmm1) - xmm25251; X86-NEXT: vmovaps %xmm2, %xmm05252; X86-NEXT: retl5253;5254; X64-LABEL: test_mm_mask3_fmsub_ss:5255; X64: # %bb.0: # %entry5256; X64-NEXT: kmovw %edi, %k15257; X64-NEXT: vfmsub231ss {{.*#+}} xmm2 {%k1} = (xmm0 * xmm1) - xmm25258; X64-NEXT: vmovaps %xmm2, %xmm05259; X64-NEXT: retq5260entry:5261 %0 = extractelement <4 x float> %__W, i64 05262 %1 = extractelement <4 x float> %__X, i64 05263 %.rhs.i = extractelement <4 x float> %__Y, i64 05264 %2 = fsub float -0.000000e+00, %.rhs.i5265 %3 = tail call float @llvm.fma.f32(float %0, float %1, float %2) #105266 %4 = and i8 %__U, 15267 %tobool.i = icmp eq i8 %4, 05268 %vecext1.i = extractelement <4 x float> %__Y, i32 05269 %cond.i = select i1 %tobool.i, float %vecext1.i, float %35270 %vecins.i = insertelement <4 x float> %__Y, float %cond.i, i32 05271 ret <4 x float> %vecins.i5272}5273 5274define <4 x float> @test_mm_mask3_fmsub_round_ss(<4 x float> %__W, <4 x float> %__X, <4 x float> %__Y, i8 zeroext %__U) {5275; X86-LABEL: test_mm_mask3_fmsub_round_ss:5276; X86: # %bb.0: # %entry5277; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5278; X86-NEXT: kmovw %eax, %k15279; X86-NEXT: vfmsub231ss {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}5280; X86-NEXT: vmovaps %xmm2, %xmm05281; X86-NEXT: retl5282;5283; X64-LABEL: test_mm_mask3_fmsub_round_ss:5284; X64: # %bb.0: # %entry5285; X64-NEXT: kmovw %edi, %k15286; X64-NEXT: vfmsub231ss {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}5287; X64-NEXT: vmovaps %xmm2, %xmm05288; X64-NEXT: retq5289entry:5290 %0 = extractelement <4 x float> %__W, i64 05291 %1 = extractelement <4 x float> %__X, i64 05292 %.rhs = extractelement <4 x float> %__Y, i64 05293 %2 = fsub float -0.000000e+00, %.rhs5294 %3 = tail call float @llvm.x86.avx512.vfmadd.f32(float %0, float %1, float %2, i32 8)5295 %4 = bitcast i8 %__U to <8 x i1>5296 %5 = extractelement <8 x i1> %4, i64 05297 %6 = select i1 %5, float %3, float %.rhs5298 %7 = insertelement <4 x float> %__Y, float %6, i64 05299 ret <4 x float> %75300}5301 5302define <4 x float> @test_mm_mask_fnmadd_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {5303; X86-LABEL: test_mm_mask_fnmadd_ss:5304; X86: # %bb.0: # %entry5305; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5306; X86-NEXT: kmovw %eax, %k15307; X86-NEXT: vfnmadd213ss {{.*#+}} xmm0 {%k1} = -(xmm1 * xmm0) + xmm25308; X86-NEXT: retl5309;5310; X64-LABEL: test_mm_mask_fnmadd_ss:5311; X64: # %bb.0: # %entry5312; X64-NEXT: kmovw %edi, %k15313; X64-NEXT: vfnmadd213ss {{.*#+}} xmm0 {%k1} = -(xmm1 * xmm0) + xmm25314; X64-NEXT: retq5315entry:5316 %0 = extractelement <4 x float> %__W, i64 05317 %.rhs.i = extractelement <4 x float> %__A, i64 05318 %1 = fsub float -0.000000e+00, %.rhs.i5319 %2 = extractelement <4 x float> %__B, i64 05320 %3 = tail call float @llvm.fma.f32(float %0, float %1, float %2) #105321 %4 = and i8 %__U, 15322 %tobool.i = icmp eq i8 %4, 05323 %vecext1.i = extractelement <4 x float> %__W, i32 05324 %cond.i = select i1 %tobool.i, float %vecext1.i, float %35325 %vecins.i = insertelement <4 x float> %__W, float %cond.i, i32 05326 ret <4 x float> %vecins.i5327}5328 5329define <4 x float> @test_mm_mask_fnmadd_round_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {5330; X86-LABEL: test_mm_mask_fnmadd_round_ss:5331; X86: # %bb.0: # %entry5332; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5333; X86-NEXT: kmovw %eax, %k15334; X86-NEXT: vfnmadd213ss {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1}5335; X86-NEXT: retl5336;5337; X64-LABEL: test_mm_mask_fnmadd_round_ss:5338; X64: # %bb.0: # %entry5339; X64-NEXT: kmovw %edi, %k15340; X64-NEXT: vfnmadd213ss {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1}5341; X64-NEXT: retq5342entry:5343 %0 = extractelement <4 x float> %__W, i64 05344 %.rhs = extractelement <4 x float> %__A, i64 05345 %1 = fsub float -0.000000e+00, %.rhs5346 %2 = extractelement <4 x float> %__B, i64 05347 %3 = tail call float @llvm.x86.avx512.vfmadd.f32(float %0, float %1, float %2, i32 8)5348 %4 = bitcast i8 %__U to <8 x i1>5349 %5 = extractelement <8 x i1> %4, i64 05350 %6 = select i1 %5, float %3, float %05351 %7 = insertelement <4 x float> %__W, float %6, i64 05352 ret <4 x float> %75353}5354 5355define <4 x float> @test_mm_maskz_fnmadd_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B, <4 x float> %__C) {5356; X86-LABEL: test_mm_maskz_fnmadd_ss:5357; X86: # %bb.0: # %entry5358; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5359; X86-NEXT: kmovw %eax, %k15360; X86-NEXT: vfnmadd213ss {{.*#+}} xmm0 {%k1} {z} = -(xmm1 * xmm0) + xmm25361; X86-NEXT: retl5362;5363; X64-LABEL: test_mm_maskz_fnmadd_ss:5364; X64: # %bb.0: # %entry5365; X64-NEXT: kmovw %edi, %k15366; X64-NEXT: vfnmadd213ss {{.*#+}} xmm0 {%k1} {z} = -(xmm1 * xmm0) + xmm25367; X64-NEXT: retq5368entry:5369 %0 = extractelement <4 x float> %__A, i64 05370 %.rhs.i = extractelement <4 x float> %__B, i64 05371 %1 = fsub float -0.000000e+00, %.rhs.i5372 %2 = extractelement <4 x float> %__C, i64 05373 %3 = tail call float @llvm.fma.f32(float %0, float %1, float %2) #105374 %4 = and i8 %__U, 15375 %tobool.i = icmp eq i8 %4, 05376 %cond.i = select i1 %tobool.i, float 0.000000e+00, float %35377 %vecins.i = insertelement <4 x float> %__A, float %cond.i, i32 05378 ret <4 x float> %vecins.i5379}5380 5381define <4 x float> @test_mm_maskz_fnmadd_round_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B, <4 x float> %__C) {5382; X86-LABEL: test_mm_maskz_fnmadd_round_ss:5383; X86: # %bb.0: # %entry5384; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5385; X86-NEXT: kmovw %eax, %k15386; X86-NEXT: vfnmadd213ss {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}5387; X86-NEXT: retl5388;5389; X64-LABEL: test_mm_maskz_fnmadd_round_ss:5390; X64: # %bb.0: # %entry5391; X64-NEXT: kmovw %edi, %k15392; X64-NEXT: vfnmadd213ss {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}5393; X64-NEXT: retq5394entry:5395 %0 = extractelement <4 x float> %__A, i64 05396 %.rhs = extractelement <4 x float> %__B, i64 05397 %1 = fsub float -0.000000e+00, %.rhs5398 %2 = extractelement <4 x float> %__C, i64 05399 %3 = tail call float @llvm.x86.avx512.vfmadd.f32(float %0, float %1, float %2, i32 8)5400 %4 = bitcast i8 %__U to <8 x i1>5401 %5 = extractelement <8 x i1> %4, i64 05402 %6 = select i1 %5, float %3, float 0.000000e+005403 %7 = insertelement <4 x float> %__A, float %6, i64 05404 ret <4 x float> %75405}5406 5407define <4 x float> @test_mm_mask3_fnmadd_ss(<4 x float> %__W, <4 x float> %__X, <4 x float> %__Y, i8 zeroext %__U) {5408; X86-LABEL: test_mm_mask3_fnmadd_ss:5409; X86: # %bb.0: # %entry5410; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5411; X86-NEXT: kmovw %eax, %k15412; X86-NEXT: vfnmadd231ss {{.*#+}} xmm2 {%k1} = -(xmm0 * xmm1) + xmm25413; X86-NEXT: vmovaps %xmm2, %xmm05414; X86-NEXT: retl5415;5416; X64-LABEL: test_mm_mask3_fnmadd_ss:5417; X64: # %bb.0: # %entry5418; X64-NEXT: kmovw %edi, %k15419; X64-NEXT: vfnmadd231ss {{.*#+}} xmm2 {%k1} = -(xmm0 * xmm1) + xmm25420; X64-NEXT: vmovaps %xmm2, %xmm05421; X64-NEXT: retq5422entry:5423 %0 = extractelement <4 x float> %__W, i64 05424 %.rhs.i = extractelement <4 x float> %__X, i64 05425 %1 = fsub float -0.000000e+00, %.rhs.i5426 %2 = extractelement <4 x float> %__Y, i64 05427 %3 = tail call float @llvm.fma.f32(float %0, float %1, float %2) #105428 %4 = and i8 %__U, 15429 %tobool.i = icmp eq i8 %4, 05430 %vecext1.i = extractelement <4 x float> %__Y, i32 05431 %cond.i = select i1 %tobool.i, float %vecext1.i, float %35432 %vecins.i = insertelement <4 x float> %__Y, float %cond.i, i32 05433 ret <4 x float> %vecins.i5434}5435 5436define <4 x float> @test_mm_mask3_fnmadd_round_ss(<4 x float> %__W, <4 x float> %__X, <4 x float> %__Y, i8 zeroext %__U) {5437; X86-LABEL: test_mm_mask3_fnmadd_round_ss:5438; X86: # %bb.0: # %entry5439; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5440; X86-NEXT: kmovw %eax, %k15441; X86-NEXT: vfnmadd231ss {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}5442; X86-NEXT: vmovaps %xmm2, %xmm05443; X86-NEXT: retl5444;5445; X64-LABEL: test_mm_mask3_fnmadd_round_ss:5446; X64: # %bb.0: # %entry5447; X64-NEXT: kmovw %edi, %k15448; X64-NEXT: vfnmadd231ss {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}5449; X64-NEXT: vmovaps %xmm2, %xmm05450; X64-NEXT: retq5451entry:5452 %0 = extractelement <4 x float> %__W, i64 05453 %.rhs = extractelement <4 x float> %__X, i64 05454 %1 = fsub float -0.000000e+00, %.rhs5455 %2 = extractelement <4 x float> %__Y, i64 05456 %3 = tail call float @llvm.x86.avx512.vfmadd.f32(float %0, float %1, float %2, i32 8)5457 %4 = bitcast i8 %__U to <8 x i1>5458 %5 = extractelement <8 x i1> %4, i64 05459 %6 = select i1 %5, float %3, float %25460 %7 = insertelement <4 x float> %__Y, float %6, i64 05461 ret <4 x float> %75462}5463 5464define <4 x float> @test_mm_mask_fnmsub_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {5465; X86-LABEL: test_mm_mask_fnmsub_ss:5466; X86: # %bb.0: # %entry5467; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5468; X86-NEXT: kmovw %eax, %k15469; X86-NEXT: vfnmsub213ss {{.*#+}} xmm0 {%k1} = -(xmm1 * xmm0) - xmm25470; X86-NEXT: retl5471;5472; X64-LABEL: test_mm_mask_fnmsub_ss:5473; X64: # %bb.0: # %entry5474; X64-NEXT: kmovw %edi, %k15475; X64-NEXT: vfnmsub213ss {{.*#+}} xmm0 {%k1} = -(xmm1 * xmm0) - xmm25476; X64-NEXT: retq5477entry:5478 %0 = extractelement <4 x float> %__W, i64 05479 %.rhs.i = extractelement <4 x float> %__A, i64 05480 %1 = fsub float -0.000000e+00, %.rhs.i5481 %.rhs7.i = extractelement <4 x float> %__B, i64 05482 %2 = fsub float -0.000000e+00, %.rhs7.i5483 %3 = tail call float @llvm.fma.f32(float %0, float %1, float %2) #105484 %4 = and i8 %__U, 15485 %tobool.i = icmp eq i8 %4, 05486 %vecext2.i = extractelement <4 x float> %__W, i32 05487 %cond.i = select i1 %tobool.i, float %vecext2.i, float %35488 %vecins.i = insertelement <4 x float> %__W, float %cond.i, i32 05489 ret <4 x float> %vecins.i5490}5491 5492define <4 x float> @test_mm_mask_fnmsub_round_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {5493; X86-LABEL: test_mm_mask_fnmsub_round_ss:5494; X86: # %bb.0: # %entry5495; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5496; X86-NEXT: kmovw %eax, %k15497; X86-NEXT: vfnmsub213ss {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1}5498; X86-NEXT: retl5499;5500; X64-LABEL: test_mm_mask_fnmsub_round_ss:5501; X64: # %bb.0: # %entry5502; X64-NEXT: kmovw %edi, %k15503; X64-NEXT: vfnmsub213ss {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1}5504; X64-NEXT: retq5505entry:5506 %0 = extractelement <4 x float> %__W, i64 05507 %.rhs = extractelement <4 x float> %__A, i64 05508 %1 = fsub float -0.000000e+00, %.rhs5509 %.rhs2 = extractelement <4 x float> %__B, i64 05510 %2 = fsub float -0.000000e+00, %.rhs25511 %3 = tail call float @llvm.x86.avx512.vfmadd.f32(float %0, float %1, float %2, i32 8)5512 %4 = bitcast i8 %__U to <8 x i1>5513 %5 = extractelement <8 x i1> %4, i64 05514 %6 = select i1 %5, float %3, float %05515 %7 = insertelement <4 x float> %__W, float %6, i64 05516 ret <4 x float> %75517}5518 5519define <4 x float> @test_mm_maskz_fnmsub_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B, <4 x float> %__C) {5520; X86-LABEL: test_mm_maskz_fnmsub_ss:5521; X86: # %bb.0: # %entry5522; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5523; X86-NEXT: kmovw %eax, %k15524; X86-NEXT: vfnmsub213ss {{.*#+}} xmm0 {%k1} {z} = -(xmm1 * xmm0) - xmm25525; X86-NEXT: retl5526;5527; X64-LABEL: test_mm_maskz_fnmsub_ss:5528; X64: # %bb.0: # %entry5529; X64-NEXT: kmovw %edi, %k15530; X64-NEXT: vfnmsub213ss {{.*#+}} xmm0 {%k1} {z} = -(xmm1 * xmm0) - xmm25531; X64-NEXT: retq5532entry:5533 %0 = extractelement <4 x float> %__A, i64 05534 %.rhs.i = extractelement <4 x float> %__B, i64 05535 %1 = fsub float -0.000000e+00, %.rhs.i5536 %.rhs5.i = extractelement <4 x float> %__C, i64 05537 %2 = fsub float -0.000000e+00, %.rhs5.i5538 %3 = tail call float @llvm.fma.f32(float %0, float %1, float %2) #105539 %4 = and i8 %__U, 15540 %tobool.i = icmp eq i8 %4, 05541 %cond.i = select i1 %tobool.i, float 0.000000e+00, float %35542 %vecins.i = insertelement <4 x float> %__A, float %cond.i, i32 05543 ret <4 x float> %vecins.i5544}5545 5546define <4 x float> @test_mm_maskz_fnmsub_round_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B, <4 x float> %__C) {5547; X86-LABEL: test_mm_maskz_fnmsub_round_ss:5548; X86: # %bb.0: # %entry5549; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5550; X86-NEXT: kmovw %eax, %k15551; X86-NEXT: vfnmsub213ss {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}5552; X86-NEXT: retl5553;5554; X64-LABEL: test_mm_maskz_fnmsub_round_ss:5555; X64: # %bb.0: # %entry5556; X64-NEXT: kmovw %edi, %k15557; X64-NEXT: vfnmsub213ss {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}5558; X64-NEXT: retq5559entry:5560 %0 = extractelement <4 x float> %__A, i64 05561 %.rhs = extractelement <4 x float> %__B, i64 05562 %1 = fsub float -0.000000e+00, %.rhs5563 %.rhs2 = extractelement <4 x float> %__C, i64 05564 %2 = fsub float -0.000000e+00, %.rhs25565 %3 = tail call float @llvm.x86.avx512.vfmadd.f32(float %0, float %1, float %2, i32 8)5566 %4 = bitcast i8 %__U to <8 x i1>5567 %5 = extractelement <8 x i1> %4, i64 05568 %6 = select i1 %5, float %3, float 0.000000e+005569 %7 = insertelement <4 x float> %__A, float %6, i64 05570 ret <4 x float> %75571}5572 5573define <4 x float> @test_mm_mask3_fnmsub_ss(<4 x float> %__W, <4 x float> %__X, <4 x float> %__Y, i8 zeroext %__U) {5574; X86-LABEL: test_mm_mask3_fnmsub_ss:5575; X86: # %bb.0: # %entry5576; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5577; X86-NEXT: kmovw %eax, %k15578; X86-NEXT: vfnmsub231ss {{.*#+}} xmm2 {%k1} = -(xmm0 * xmm1) - xmm25579; X86-NEXT: vmovaps %xmm2, %xmm05580; X86-NEXT: retl5581;5582; X64-LABEL: test_mm_mask3_fnmsub_ss:5583; X64: # %bb.0: # %entry5584; X64-NEXT: kmovw %edi, %k15585; X64-NEXT: vfnmsub231ss {{.*#+}} xmm2 {%k1} = -(xmm0 * xmm1) - xmm25586; X64-NEXT: vmovaps %xmm2, %xmm05587; X64-NEXT: retq5588entry:5589 %0 = extractelement <4 x float> %__W, i64 05590 %.rhs.i = extractelement <4 x float> %__X, i64 05591 %1 = fsub float -0.000000e+00, %.rhs.i5592 %.rhs7.i = extractelement <4 x float> %__Y, i64 05593 %2 = fsub float -0.000000e+00, %.rhs7.i5594 %3 = tail call float @llvm.fma.f32(float %0, float %1, float %2) #105595 %4 = and i8 %__U, 15596 %tobool.i = icmp eq i8 %4, 05597 %vecext2.i = extractelement <4 x float> %__Y, i32 05598 %cond.i = select i1 %tobool.i, float %vecext2.i, float %35599 %vecins.i = insertelement <4 x float> %__Y, float %cond.i, i32 05600 ret <4 x float> %vecins.i5601}5602 5603define <4 x float> @test_mm_mask3_fnmsub_round_ss(<4 x float> %__W, <4 x float> %__X, <4 x float> %__Y, i8 zeroext %__U) {5604; X86-LABEL: test_mm_mask3_fnmsub_round_ss:5605; X86: # %bb.0: # %entry5606; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5607; X86-NEXT: kmovw %eax, %k15608; X86-NEXT: vfnmsub231ss {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}5609; X86-NEXT: vmovaps %xmm2, %xmm05610; X86-NEXT: retl5611;5612; X64-LABEL: test_mm_mask3_fnmsub_round_ss:5613; X64: # %bb.0: # %entry5614; X64-NEXT: kmovw %edi, %k15615; X64-NEXT: vfnmsub231ss {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}5616; X64-NEXT: vmovaps %xmm2, %xmm05617; X64-NEXT: retq5618entry:5619 %0 = extractelement <4 x float> %__W, i64 05620 %.rhs = extractelement <4 x float> %__X, i64 05621 %1 = fsub float -0.000000e+00, %.rhs5622 %.rhs1 = extractelement <4 x float> %__Y, i64 05623 %2 = fsub float -0.000000e+00, %.rhs15624 %3 = tail call float @llvm.x86.avx512.vfmadd.f32(float %0, float %1, float %2, i32 8)5625 %4 = bitcast i8 %__U to <8 x i1>5626 %5 = extractelement <8 x i1> %4, i64 05627 %6 = select i1 %5, float %3, float %.rhs15628 %7 = insertelement <4 x float> %__Y, float %6, i64 05629 ret <4 x float> %75630}5631 5632define <2 x double> @test_mm_mask_fmadd_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {5633; X86-LABEL: test_mm_mask_fmadd_sd:5634; X86: # %bb.0: # %entry5635; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5636; X86-NEXT: kmovw %eax, %k15637; X86-NEXT: vfmadd213sd {{.*#+}} xmm0 {%k1} = (xmm1 * xmm0) + xmm25638; X86-NEXT: retl5639;5640; X64-LABEL: test_mm_mask_fmadd_sd:5641; X64: # %bb.0: # %entry5642; X64-NEXT: kmovw %edi, %k15643; X64-NEXT: vfmadd213sd {{.*#+}} xmm0 {%k1} = (xmm1 * xmm0) + xmm25644; X64-NEXT: retq5645entry:5646 %0 = extractelement <2 x double> %__W, i64 05647 %1 = extractelement <2 x double> %__A, i64 05648 %2 = extractelement <2 x double> %__B, i64 05649 %3 = tail call double @llvm.fma.f64(double %0, double %1, double %2) #105650 %4 = and i8 %__U, 15651 %tobool.i = icmp eq i8 %4, 05652 %vecext1.i = extractelement <2 x double> %__W, i32 05653 %cond.i = select i1 %tobool.i, double %vecext1.i, double %35654 %vecins.i = insertelement <2 x double> %__W, double %cond.i, i32 05655 ret <2 x double> %vecins.i5656}5657 5658define <2 x double> @test_mm_mask_fmadd_round_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {5659; X86-LABEL: test_mm_mask_fmadd_round_sd:5660; X86: # %bb.0: # %entry5661; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5662; X86-NEXT: kmovw %eax, %k15663; X86-NEXT: vfmadd213sd {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1}5664; X86-NEXT: retl5665;5666; X64-LABEL: test_mm_mask_fmadd_round_sd:5667; X64: # %bb.0: # %entry5668; X64-NEXT: kmovw %edi, %k15669; X64-NEXT: vfmadd213sd {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1}5670; X64-NEXT: retq5671entry:5672 %0 = extractelement <2 x double> %__W, i64 05673 %1 = extractelement <2 x double> %__A, i64 05674 %2 = extractelement <2 x double> %__B, i64 05675 %3 = tail call double @llvm.x86.avx512.vfmadd.f64(double %0, double %1, double %2, i32 8)5676 %4 = bitcast i8 %__U to <8 x i1>5677 %5 = extractelement <8 x i1> %4, i64 05678 %6 = select i1 %5, double %3, double %05679 %7 = insertelement <2 x double> %__W, double %6, i64 05680 ret <2 x double> %75681}5682 5683declare double @llvm.x86.avx512.vfmadd.f64(double, double, double, i32) #15684 5685define <2 x double> @test_mm_maskz_fmadd_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B, <2 x double> %__C) {5686; X86-LABEL: test_mm_maskz_fmadd_sd:5687; X86: # %bb.0: # %entry5688; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5689; X86-NEXT: kmovw %eax, %k15690; X86-NEXT: vfmadd213sd {{.*#+}} xmm0 {%k1} {z} = (xmm1 * xmm0) + xmm25691; X86-NEXT: retl5692;5693; X64-LABEL: test_mm_maskz_fmadd_sd:5694; X64: # %bb.0: # %entry5695; X64-NEXT: kmovw %edi, %k15696; X64-NEXT: vfmadd213sd {{.*#+}} xmm0 {%k1} {z} = (xmm1 * xmm0) + xmm25697; X64-NEXT: retq5698entry:5699 %0 = extractelement <2 x double> %__A, i64 05700 %1 = extractelement <2 x double> %__B, i64 05701 %2 = extractelement <2 x double> %__C, i64 05702 %3 = tail call double @llvm.fma.f64(double %0, double %1, double %2) #105703 %4 = and i8 %__U, 15704 %tobool.i = icmp eq i8 %4, 05705 %cond.i = select i1 %tobool.i, double 0.000000e+00, double %35706 %vecins.i = insertelement <2 x double> %__A, double %cond.i, i32 05707 ret <2 x double> %vecins.i5708}5709 5710define <2 x double> @test_mm_maskz_fmadd_round_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B, <2 x double> %__C) {5711; X86-LABEL: test_mm_maskz_fmadd_round_sd:5712; X86: # %bb.0: # %entry5713; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5714; X86-NEXT: kmovw %eax, %k15715; X86-NEXT: vfmadd213sd {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}5716; X86-NEXT: retl5717;5718; X64-LABEL: test_mm_maskz_fmadd_round_sd:5719; X64: # %bb.0: # %entry5720; X64-NEXT: kmovw %edi, %k15721; X64-NEXT: vfmadd213sd {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}5722; X64-NEXT: retq5723entry:5724 %0 = extractelement <2 x double> %__A, i64 05725 %1 = extractelement <2 x double> %__B, i64 05726 %2 = extractelement <2 x double> %__C, i64 05727 %3 = tail call double @llvm.x86.avx512.vfmadd.f64(double %0, double %1, double %2, i32 8)5728 %4 = bitcast i8 %__U to <8 x i1>5729 %5 = extractelement <8 x i1> %4, i64 05730 %6 = select i1 %5, double %3, double 0.000000e+005731 %7 = insertelement <2 x double> %__A, double %6, i64 05732 ret <2 x double> %75733}5734 5735define <2 x double> @test_mm_mask3_fmadd_sd(<2 x double> %__W, <2 x double> %__X, <2 x double> %__Y, i8 zeroext %__U) {5736; X86-LABEL: test_mm_mask3_fmadd_sd:5737; X86: # %bb.0: # %entry5738; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5739; X86-NEXT: kmovw %eax, %k15740; X86-NEXT: vfmadd231sd {{.*#+}} xmm2 {%k1} = (xmm0 * xmm1) + xmm25741; X86-NEXT: vmovapd %xmm2, %xmm05742; X86-NEXT: retl5743;5744; X64-LABEL: test_mm_mask3_fmadd_sd:5745; X64: # %bb.0: # %entry5746; X64-NEXT: kmovw %edi, %k15747; X64-NEXT: vfmadd231sd {{.*#+}} xmm2 {%k1} = (xmm0 * xmm1) + xmm25748; X64-NEXT: vmovapd %xmm2, %xmm05749; X64-NEXT: retq5750entry:5751 %0 = extractelement <2 x double> %__W, i64 05752 %1 = extractelement <2 x double> %__X, i64 05753 %2 = extractelement <2 x double> %__Y, i64 05754 %3 = tail call double @llvm.fma.f64(double %0, double %1, double %2) #105755 %4 = and i8 %__U, 15756 %tobool.i = icmp eq i8 %4, 05757 %vecext1.i = extractelement <2 x double> %__Y, i32 05758 %cond.i = select i1 %tobool.i, double %vecext1.i, double %35759 %vecins.i = insertelement <2 x double> %__Y, double %cond.i, i32 05760 ret <2 x double> %vecins.i5761}5762 5763define <2 x double> @test_mm_mask3_fmadd_round_sd(<2 x double> %__W, <2 x double> %__X, <2 x double> %__Y, i8 zeroext %__U) {5764; X86-LABEL: test_mm_mask3_fmadd_round_sd:5765; X86: # %bb.0: # %entry5766; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5767; X86-NEXT: kmovw %eax, %k15768; X86-NEXT: vfmadd231sd {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}5769; X86-NEXT: vmovapd %xmm2, %xmm05770; X86-NEXT: retl5771;5772; X64-LABEL: test_mm_mask3_fmadd_round_sd:5773; X64: # %bb.0: # %entry5774; X64-NEXT: kmovw %edi, %k15775; X64-NEXT: vfmadd231sd {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}5776; X64-NEXT: vmovapd %xmm2, %xmm05777; X64-NEXT: retq5778entry:5779 %0 = extractelement <2 x double> %__W, i64 05780 %1 = extractelement <2 x double> %__X, i64 05781 %2 = extractelement <2 x double> %__Y, i64 05782 %3 = tail call double @llvm.x86.avx512.vfmadd.f64(double %0, double %1, double %2, i32 8)5783 %4 = bitcast i8 %__U to <8 x i1>5784 %5 = extractelement <8 x i1> %4, i64 05785 %6 = select i1 %5, double %3, double %25786 %7 = insertelement <2 x double> %__Y, double %6, i64 05787 ret <2 x double> %75788}5789 5790define <2 x double> @test_mm_mask_fmsub_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {5791; X86-LABEL: test_mm_mask_fmsub_sd:5792; X86: # %bb.0: # %entry5793; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5794; X86-NEXT: kmovw %eax, %k15795; X86-NEXT: vfmsub213sd {{.*#+}} xmm0 {%k1} = (xmm1 * xmm0) - xmm25796; X86-NEXT: retl5797;5798; X64-LABEL: test_mm_mask_fmsub_sd:5799; X64: # %bb.0: # %entry5800; X64-NEXT: kmovw %edi, %k15801; X64-NEXT: vfmsub213sd {{.*#+}} xmm0 {%k1} = (xmm1 * xmm0) - xmm25802; X64-NEXT: retq5803entry:5804 %0 = extractelement <2 x double> %__W, i64 05805 %1 = extractelement <2 x double> %__A, i64 05806 %.rhs.i = extractelement <2 x double> %__B, i64 05807 %2 = fsub double -0.000000e+00, %.rhs.i5808 %3 = tail call double @llvm.fma.f64(double %0, double %1, double %2) #105809 %4 = and i8 %__U, 15810 %tobool.i = icmp eq i8 %4, 05811 %vecext1.i = extractelement <2 x double> %__W, i32 05812 %cond.i = select i1 %tobool.i, double %vecext1.i, double %35813 %vecins.i = insertelement <2 x double> %__W, double %cond.i, i32 05814 ret <2 x double> %vecins.i5815}5816 5817define <2 x double> @test_mm_mask_fmsub_round_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {5818; X86-LABEL: test_mm_mask_fmsub_round_sd:5819; X86: # %bb.0: # %entry5820; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5821; X86-NEXT: kmovw %eax, %k15822; X86-NEXT: vfmsub213sd {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1}5823; X86-NEXT: retl5824;5825; X64-LABEL: test_mm_mask_fmsub_round_sd:5826; X64: # %bb.0: # %entry5827; X64-NEXT: kmovw %edi, %k15828; X64-NEXT: vfmsub213sd {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1}5829; X64-NEXT: retq5830entry:5831 %0 = extractelement <2 x double> %__W, i64 05832 %1 = extractelement <2 x double> %__A, i64 05833 %.rhs = extractelement <2 x double> %__B, i64 05834 %2 = fsub double -0.000000e+00, %.rhs5835 %3 = tail call double @llvm.x86.avx512.vfmadd.f64(double %0, double %1, double %2, i32 8)5836 %4 = bitcast i8 %__U to <8 x i1>5837 %5 = extractelement <8 x i1> %4, i64 05838 %6 = select i1 %5, double %3, double %05839 %7 = insertelement <2 x double> %__W, double %6, i64 05840 ret <2 x double> %75841}5842 5843define <2 x double> @test_mm_maskz_fmsub_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B, <2 x double> %__C) {5844; X86-LABEL: test_mm_maskz_fmsub_sd:5845; X86: # %bb.0: # %entry5846; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5847; X86-NEXT: kmovw %eax, %k15848; X86-NEXT: vfmsub213sd {{.*#+}} xmm0 {%k1} {z} = (xmm1 * xmm0) - xmm25849; X86-NEXT: retl5850;5851; X64-LABEL: test_mm_maskz_fmsub_sd:5852; X64: # %bb.0: # %entry5853; X64-NEXT: kmovw %edi, %k15854; X64-NEXT: vfmsub213sd {{.*#+}} xmm0 {%k1} {z} = (xmm1 * xmm0) - xmm25855; X64-NEXT: retq5856entry:5857 %0 = extractelement <2 x double> %__A, i64 05858 %1 = extractelement <2 x double> %__B, i64 05859 %.rhs.i = extractelement <2 x double> %__C, i64 05860 %2 = fsub double -0.000000e+00, %.rhs.i5861 %3 = tail call double @llvm.fma.f64(double %0, double %1, double %2) #105862 %4 = and i8 %__U, 15863 %tobool.i = icmp eq i8 %4, 05864 %cond.i = select i1 %tobool.i, double 0.000000e+00, double %35865 %vecins.i = insertelement <2 x double> %__A, double %cond.i, i32 05866 ret <2 x double> %vecins.i5867}5868 5869define <2 x double> @test_mm_maskz_fmsub_round_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B, <2 x double> %__C) {5870; X86-LABEL: test_mm_maskz_fmsub_round_sd:5871; X86: # %bb.0: # %entry5872; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5873; X86-NEXT: kmovw %eax, %k15874; X86-NEXT: vfmsub213sd {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}5875; X86-NEXT: retl5876;5877; X64-LABEL: test_mm_maskz_fmsub_round_sd:5878; X64: # %bb.0: # %entry5879; X64-NEXT: kmovw %edi, %k15880; X64-NEXT: vfmsub213sd {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}5881; X64-NEXT: retq5882entry:5883 %0 = extractelement <2 x double> %__A, i64 05884 %1 = extractelement <2 x double> %__B, i64 05885 %.rhs = extractelement <2 x double> %__C, i64 05886 %2 = fsub double -0.000000e+00, %.rhs5887 %3 = tail call double @llvm.x86.avx512.vfmadd.f64(double %0, double %1, double %2, i32 8)5888 %4 = bitcast i8 %__U to <8 x i1>5889 %5 = extractelement <8 x i1> %4, i64 05890 %6 = select i1 %5, double %3, double 0.000000e+005891 %7 = insertelement <2 x double> %__A, double %6, i64 05892 ret <2 x double> %75893}5894 5895define <2 x double> @test_mm_mask3_fmsub_sd(<2 x double> %__W, <2 x double> %__X, <2 x double> %__Y, i8 zeroext %__U) {5896; X86-LABEL: test_mm_mask3_fmsub_sd:5897; X86: # %bb.0: # %entry5898; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5899; X86-NEXT: kmovw %eax, %k15900; X86-NEXT: vfmsub231sd {{.*#+}} xmm2 {%k1} = (xmm0 * xmm1) - xmm25901; X86-NEXT: vmovapd %xmm2, %xmm05902; X86-NEXT: retl5903;5904; X64-LABEL: test_mm_mask3_fmsub_sd:5905; X64: # %bb.0: # %entry5906; X64-NEXT: kmovw %edi, %k15907; X64-NEXT: vfmsub231sd {{.*#+}} xmm2 {%k1} = (xmm0 * xmm1) - xmm25908; X64-NEXT: vmovapd %xmm2, %xmm05909; X64-NEXT: retq5910entry:5911 %0 = extractelement <2 x double> %__W, i64 05912 %1 = extractelement <2 x double> %__X, i64 05913 %.rhs.i = extractelement <2 x double> %__Y, i64 05914 %2 = fsub double -0.000000e+00, %.rhs.i5915 %3 = tail call double @llvm.fma.f64(double %0, double %1, double %2) #105916 %4 = and i8 %__U, 15917 %tobool.i = icmp eq i8 %4, 05918 %vecext1.i = extractelement <2 x double> %__Y, i32 05919 %cond.i = select i1 %tobool.i, double %vecext1.i, double %35920 %vecins.i = insertelement <2 x double> %__Y, double %cond.i, i32 05921 ret <2 x double> %vecins.i5922}5923 5924define <2 x double> @test_mm_mask3_fmsub_round_sd(<2 x double> %__W, <2 x double> %__X, <2 x double> %__Y, i8 zeroext %__U) {5925; X86-LABEL: test_mm_mask3_fmsub_round_sd:5926; X86: # %bb.0: # %entry5927; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5928; X86-NEXT: kmovw %eax, %k15929; X86-NEXT: vfmsub231sd {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}5930; X86-NEXT: vmovapd %xmm2, %xmm05931; X86-NEXT: retl5932;5933; X64-LABEL: test_mm_mask3_fmsub_round_sd:5934; X64: # %bb.0: # %entry5935; X64-NEXT: kmovw %edi, %k15936; X64-NEXT: vfmsub231sd {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}5937; X64-NEXT: vmovapd %xmm2, %xmm05938; X64-NEXT: retq5939entry:5940 %0 = extractelement <2 x double> %__W, i64 05941 %1 = extractelement <2 x double> %__X, i64 05942 %.rhs = extractelement <2 x double> %__Y, i64 05943 %2 = fsub double -0.000000e+00, %.rhs5944 %3 = tail call double @llvm.x86.avx512.vfmadd.f64(double %0, double %1, double %2, i32 8)5945 %4 = bitcast i8 %__U to <8 x i1>5946 %5 = extractelement <8 x i1> %4, i64 05947 %6 = select i1 %5, double %3, double %.rhs5948 %7 = insertelement <2 x double> %__Y, double %6, i64 05949 ret <2 x double> %75950}5951 5952define <2 x double> @test_mm_mask_fnmadd_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {5953; X86-LABEL: test_mm_mask_fnmadd_sd:5954; X86: # %bb.0: # %entry5955; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5956; X86-NEXT: kmovw %eax, %k15957; X86-NEXT: vfnmadd213sd {{.*#+}} xmm0 {%k1} = -(xmm1 * xmm0) + xmm25958; X86-NEXT: retl5959;5960; X64-LABEL: test_mm_mask_fnmadd_sd:5961; X64: # %bb.0: # %entry5962; X64-NEXT: kmovw %edi, %k15963; X64-NEXT: vfnmadd213sd {{.*#+}} xmm0 {%k1} = -(xmm1 * xmm0) + xmm25964; X64-NEXT: retq5965entry:5966 %0 = extractelement <2 x double> %__W, i64 05967 %.rhs.i = extractelement <2 x double> %__A, i64 05968 %1 = fsub double -0.000000e+00, %.rhs.i5969 %2 = extractelement <2 x double> %__B, i64 05970 %3 = tail call double @llvm.fma.f64(double %0, double %1, double %2) #105971 %4 = and i8 %__U, 15972 %tobool.i = icmp eq i8 %4, 05973 %vecext1.i = extractelement <2 x double> %__W, i32 05974 %cond.i = select i1 %tobool.i, double %vecext1.i, double %35975 %vecins.i = insertelement <2 x double> %__W, double %cond.i, i32 05976 ret <2 x double> %vecins.i5977}5978 5979define <2 x double> @test_mm_mask_fnmadd_round_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {5980; X86-LABEL: test_mm_mask_fnmadd_round_sd:5981; X86: # %bb.0: # %entry5982; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax5983; X86-NEXT: kmovw %eax, %k15984; X86-NEXT: vfnmadd213sd {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1}5985; X86-NEXT: retl5986;5987; X64-LABEL: test_mm_mask_fnmadd_round_sd:5988; X64: # %bb.0: # %entry5989; X64-NEXT: kmovw %edi, %k15990; X64-NEXT: vfnmadd213sd {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1}5991; X64-NEXT: retq5992entry:5993 %0 = extractelement <2 x double> %__W, i64 05994 %.rhs = extractelement <2 x double> %__A, i64 05995 %1 = fsub double -0.000000e+00, %.rhs5996 %2 = extractelement <2 x double> %__B, i64 05997 %3 = tail call double @llvm.x86.avx512.vfmadd.f64(double %0, double %1, double %2, i32 8)5998 %4 = bitcast i8 %__U to <8 x i1>5999 %5 = extractelement <8 x i1> %4, i64 06000 %6 = select i1 %5, double %3, double %06001 %7 = insertelement <2 x double> %__W, double %6, i64 06002 ret <2 x double> %76003}6004 6005define <2 x double> @test_mm_maskz_fnmadd_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B, <2 x double> %__C) {6006; X86-LABEL: test_mm_maskz_fnmadd_sd:6007; X86: # %bb.0: # %entry6008; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax6009; X86-NEXT: kmovw %eax, %k16010; X86-NEXT: vfnmadd213sd {{.*#+}} xmm0 {%k1} {z} = -(xmm1 * xmm0) + xmm26011; X86-NEXT: retl6012;6013; X64-LABEL: test_mm_maskz_fnmadd_sd:6014; X64: # %bb.0: # %entry6015; X64-NEXT: kmovw %edi, %k16016; X64-NEXT: vfnmadd213sd {{.*#+}} xmm0 {%k1} {z} = -(xmm1 * xmm0) + xmm26017; X64-NEXT: retq6018entry:6019 %0 = extractelement <2 x double> %__A, i64 06020 %.rhs.i = extractelement <2 x double> %__B, i64 06021 %1 = fsub double -0.000000e+00, %.rhs.i6022 %2 = extractelement <2 x double> %__C, i64 06023 %3 = tail call double @llvm.fma.f64(double %0, double %1, double %2) #106024 %4 = and i8 %__U, 16025 %tobool.i = icmp eq i8 %4, 06026 %cond.i = select i1 %tobool.i, double 0.000000e+00, double %36027 %vecins.i = insertelement <2 x double> %__A, double %cond.i, i32 06028 ret <2 x double> %vecins.i6029}6030 6031define <2 x double> @test_mm_maskz_fnmadd_round_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B, <2 x double> %__C) {6032; X86-LABEL: test_mm_maskz_fnmadd_round_sd:6033; X86: # %bb.0: # %entry6034; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax6035; X86-NEXT: kmovw %eax, %k16036; X86-NEXT: vfnmadd213sd {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}6037; X86-NEXT: retl6038;6039; X64-LABEL: test_mm_maskz_fnmadd_round_sd:6040; X64: # %bb.0: # %entry6041; X64-NEXT: kmovw %edi, %k16042; X64-NEXT: vfnmadd213sd {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}6043; X64-NEXT: retq6044entry:6045 %0 = extractelement <2 x double> %__A, i64 06046 %.rhs = extractelement <2 x double> %__B, i64 06047 %1 = fsub double -0.000000e+00, %.rhs6048 %2 = extractelement <2 x double> %__C, i64 06049 %3 = tail call double @llvm.x86.avx512.vfmadd.f64(double %0, double %1, double %2, i32 8)6050 %4 = bitcast i8 %__U to <8 x i1>6051 %5 = extractelement <8 x i1> %4, i64 06052 %6 = select i1 %5, double %3, double 0.000000e+006053 %7 = insertelement <2 x double> %__A, double %6, i64 06054 ret <2 x double> %76055}6056 6057define <2 x double> @test_mm_mask3_fnmadd_sd(<2 x double> %__W, <2 x double> %__X, <2 x double> %__Y, i8 zeroext %__U) {6058; X86-LABEL: test_mm_mask3_fnmadd_sd:6059; X86: # %bb.0: # %entry6060; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax6061; X86-NEXT: kmovw %eax, %k16062; X86-NEXT: vfnmadd231sd {{.*#+}} xmm2 {%k1} = -(xmm0 * xmm1) + xmm26063; X86-NEXT: vmovapd %xmm2, %xmm06064; X86-NEXT: retl6065;6066; X64-LABEL: test_mm_mask3_fnmadd_sd:6067; X64: # %bb.0: # %entry6068; X64-NEXT: kmovw %edi, %k16069; X64-NEXT: vfnmadd231sd {{.*#+}} xmm2 {%k1} = -(xmm0 * xmm1) + xmm26070; X64-NEXT: vmovapd %xmm2, %xmm06071; X64-NEXT: retq6072entry:6073 %0 = extractelement <2 x double> %__W, i64 06074 %.rhs.i = extractelement <2 x double> %__X, i64 06075 %1 = fsub double -0.000000e+00, %.rhs.i6076 %2 = extractelement <2 x double> %__Y, i64 06077 %3 = tail call double @llvm.fma.f64(double %0, double %1, double %2) #106078 %4 = and i8 %__U, 16079 %tobool.i = icmp eq i8 %4, 06080 %vecext1.i = extractelement <2 x double> %__Y, i32 06081 %cond.i = select i1 %tobool.i, double %vecext1.i, double %36082 %vecins.i = insertelement <2 x double> %__Y, double %cond.i, i32 06083 ret <2 x double> %vecins.i6084}6085 6086define <2 x double> @test_mm_mask3_fnmadd_round_sd(<2 x double> %__W, <2 x double> %__X, <2 x double> %__Y, i8 zeroext %__U) {6087; X86-LABEL: test_mm_mask3_fnmadd_round_sd:6088; X86: # %bb.0: # %entry6089; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax6090; X86-NEXT: kmovw %eax, %k16091; X86-NEXT: vfnmadd231sd {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}6092; X86-NEXT: vmovapd %xmm2, %xmm06093; X86-NEXT: retl6094;6095; X64-LABEL: test_mm_mask3_fnmadd_round_sd:6096; X64: # %bb.0: # %entry6097; X64-NEXT: kmovw %edi, %k16098; X64-NEXT: vfnmadd231sd {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}6099; X64-NEXT: vmovapd %xmm2, %xmm06100; X64-NEXT: retq6101entry:6102 %0 = extractelement <2 x double> %__W, i64 06103 %.rhs = extractelement <2 x double> %__X, i64 06104 %1 = fsub double -0.000000e+00, %.rhs6105 %2 = extractelement <2 x double> %__Y, i64 06106 %3 = tail call double @llvm.x86.avx512.vfmadd.f64(double %0, double %1, double %2, i32 8)6107 %4 = bitcast i8 %__U to <8 x i1>6108 %5 = extractelement <8 x i1> %4, i64 06109 %6 = select i1 %5, double %3, double %26110 %7 = insertelement <2 x double> %__Y, double %6, i64 06111 ret <2 x double> %76112}6113 6114define <2 x double> @test_mm_mask_fnmsub_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {6115; X86-LABEL: test_mm_mask_fnmsub_sd:6116; X86: # %bb.0: # %entry6117; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax6118; X86-NEXT: kmovw %eax, %k16119; X86-NEXT: vfnmsub213sd {{.*#+}} xmm0 {%k1} = -(xmm1 * xmm0) - xmm26120; X86-NEXT: retl6121;6122; X64-LABEL: test_mm_mask_fnmsub_sd:6123; X64: # %bb.0: # %entry6124; X64-NEXT: kmovw %edi, %k16125; X64-NEXT: vfnmsub213sd {{.*#+}} xmm0 {%k1} = -(xmm1 * xmm0) - xmm26126; X64-NEXT: retq6127entry:6128 %0 = extractelement <2 x double> %__W, i64 06129 %.rhs.i = extractelement <2 x double> %__A, i64 06130 %1 = fsub double -0.000000e+00, %.rhs.i6131 %.rhs7.i = extractelement <2 x double> %__B, i64 06132 %2 = fsub double -0.000000e+00, %.rhs7.i6133 %3 = tail call double @llvm.fma.f64(double %0, double %1, double %2) #106134 %4 = and i8 %__U, 16135 %tobool.i = icmp eq i8 %4, 06136 %vecext2.i = extractelement <2 x double> %__W, i32 06137 %cond.i = select i1 %tobool.i, double %vecext2.i, double %36138 %vecins.i = insertelement <2 x double> %__W, double %cond.i, i32 06139 ret <2 x double> %vecins.i6140}6141 6142define <2 x double> @test_mm_mask_fnmsub_round_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {6143; X86-LABEL: test_mm_mask_fnmsub_round_sd:6144; X86: # %bb.0: # %entry6145; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax6146; X86-NEXT: kmovw %eax, %k16147; X86-NEXT: vfnmsub213sd {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1}6148; X86-NEXT: retl6149;6150; X64-LABEL: test_mm_mask_fnmsub_round_sd:6151; X64: # %bb.0: # %entry6152; X64-NEXT: kmovw %edi, %k16153; X64-NEXT: vfnmsub213sd {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1}6154; X64-NEXT: retq6155entry:6156 %0 = extractelement <2 x double> %__W, i64 06157 %.rhs = extractelement <2 x double> %__A, i64 06158 %1 = fsub double -0.000000e+00, %.rhs6159 %.rhs2 = extractelement <2 x double> %__B, i64 06160 %2 = fsub double -0.000000e+00, %.rhs26161 %3 = tail call double @llvm.x86.avx512.vfmadd.f64(double %0, double %1, double %2, i32 8)6162 %4 = bitcast i8 %__U to <8 x i1>6163 %5 = extractelement <8 x i1> %4, i64 06164 %6 = select i1 %5, double %3, double %06165 %7 = insertelement <2 x double> %__W, double %6, i64 06166 ret <2 x double> %76167}6168 6169define <2 x double> @test_mm_maskz_fnmsub_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B, <2 x double> %__C) {6170; X86-LABEL: test_mm_maskz_fnmsub_sd:6171; X86: # %bb.0: # %entry6172; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax6173; X86-NEXT: kmovw %eax, %k16174; X86-NEXT: vfnmsub213sd {{.*#+}} xmm0 {%k1} {z} = -(xmm1 * xmm0) - xmm26175; X86-NEXT: retl6176;6177; X64-LABEL: test_mm_maskz_fnmsub_sd:6178; X64: # %bb.0: # %entry6179; X64-NEXT: kmovw %edi, %k16180; X64-NEXT: vfnmsub213sd {{.*#+}} xmm0 {%k1} {z} = -(xmm1 * xmm0) - xmm26181; X64-NEXT: retq6182entry:6183 %0 = extractelement <2 x double> %__A, i64 06184 %.rhs.i = extractelement <2 x double> %__B, i64 06185 %1 = fsub double -0.000000e+00, %.rhs.i6186 %.rhs5.i = extractelement <2 x double> %__C, i64 06187 %2 = fsub double -0.000000e+00, %.rhs5.i6188 %3 = tail call double @llvm.fma.f64(double %0, double %1, double %2) #106189 %4 = and i8 %__U, 16190 %tobool.i = icmp eq i8 %4, 06191 %cond.i = select i1 %tobool.i, double 0.000000e+00, double %36192 %vecins.i = insertelement <2 x double> %__A, double %cond.i, i32 06193 ret <2 x double> %vecins.i6194}6195 6196define <2 x double> @test_mm_maskz_fnmsub_round_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B, <2 x double> %__C) {6197; X86-LABEL: test_mm_maskz_fnmsub_round_sd:6198; X86: # %bb.0: # %entry6199; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax6200; X86-NEXT: kmovw %eax, %k16201; X86-NEXT: vfnmsub213sd {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}6202; X86-NEXT: retl6203;6204; X64-LABEL: test_mm_maskz_fnmsub_round_sd:6205; X64: # %bb.0: # %entry6206; X64-NEXT: kmovw %edi, %k16207; X64-NEXT: vfnmsub213sd {rn-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}6208; X64-NEXT: retq6209entry:6210 %0 = extractelement <2 x double> %__A, i64 06211 %.rhs = extractelement <2 x double> %__B, i64 06212 %1 = fsub double -0.000000e+00, %.rhs6213 %.rhs2 = extractelement <2 x double> %__C, i64 06214 %2 = fsub double -0.000000e+00, %.rhs26215 %3 = tail call double @llvm.x86.avx512.vfmadd.f64(double %0, double %1, double %2, i32 8)6216 %4 = bitcast i8 %__U to <8 x i1>6217 %5 = extractelement <8 x i1> %4, i64 06218 %6 = select i1 %5, double %3, double 0.000000e+006219 %7 = insertelement <2 x double> %__A, double %6, i64 06220 ret <2 x double> %76221}6222 6223define <2 x double> @test_mm_mask3_fnmsub_sd(<2 x double> %__W, <2 x double> %__X, <2 x double> %__Y, i8 zeroext %__U) {6224; X86-LABEL: test_mm_mask3_fnmsub_sd:6225; X86: # %bb.0: # %entry6226; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax6227; X86-NEXT: kmovw %eax, %k16228; X86-NEXT: vfnmsub231sd {{.*#+}} xmm2 {%k1} = -(xmm0 * xmm1) - xmm26229; X86-NEXT: vmovapd %xmm2, %xmm06230; X86-NEXT: retl6231;6232; X64-LABEL: test_mm_mask3_fnmsub_sd:6233; X64: # %bb.0: # %entry6234; X64-NEXT: kmovw %edi, %k16235; X64-NEXT: vfnmsub231sd {{.*#+}} xmm2 {%k1} = -(xmm0 * xmm1) - xmm26236; X64-NEXT: vmovapd %xmm2, %xmm06237; X64-NEXT: retq6238entry:6239 %0 = extractelement <2 x double> %__W, i64 06240 %.rhs.i = extractelement <2 x double> %__X, i64 06241 %1 = fsub double -0.000000e+00, %.rhs.i6242 %.rhs7.i = extractelement <2 x double> %__Y, i64 06243 %2 = fsub double -0.000000e+00, %.rhs7.i6244 %3 = tail call double @llvm.fma.f64(double %0, double %1, double %2) #106245 %4 = and i8 %__U, 16246 %tobool.i = icmp eq i8 %4, 06247 %vecext2.i = extractelement <2 x double> %__Y, i32 06248 %cond.i = select i1 %tobool.i, double %vecext2.i, double %36249 %vecins.i = insertelement <2 x double> %__Y, double %cond.i, i32 06250 ret <2 x double> %vecins.i6251}6252 6253define <2 x double> @test_mm_mask3_fnmsub_round_sd(<2 x double> %__W, <2 x double> %__X, <2 x double> %__Y, i8 zeroext %__U) {6254; X86-LABEL: test_mm_mask3_fnmsub_round_sd:6255; X86: # %bb.0: # %entry6256; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax6257; X86-NEXT: kmovw %eax, %k16258; X86-NEXT: vfnmsub231sd {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}6259; X86-NEXT: vmovapd %xmm2, %xmm06260; X86-NEXT: retl6261;6262; X64-LABEL: test_mm_mask3_fnmsub_round_sd:6263; X64: # %bb.0: # %entry6264; X64-NEXT: kmovw %edi, %k16265; X64-NEXT: vfnmsub231sd {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}6266; X64-NEXT: vmovapd %xmm2, %xmm06267; X64-NEXT: retq6268entry:6269 %0 = extractelement <2 x double> %__W, i64 06270 %.rhs = extractelement <2 x double> %__X, i64 06271 %1 = fsub double -0.000000e+00, %.rhs6272 %.rhs1 = extractelement <2 x double> %__Y, i64 06273 %2 = fsub double -0.000000e+00, %.rhs16274 %3 = tail call double @llvm.x86.avx512.vfmadd.f64(double %0, double %1, double %2, i32 8)6275 %4 = bitcast i8 %__U to <8 x i1>6276 %5 = extractelement <8 x i1> %4, i64 06277 %6 = select i1 %5, double %3, double %.rhs16278 %7 = insertelement <2 x double> %__Y, double %6, i64 06279 ret <2 x double> %76280}6281 6282define <8 x i64> @test_mm512_mask_expandloadu_epi64(<8 x i64> %__W, i8 zeroext %__U, ptr readonly %__P) {6283; X86-LABEL: test_mm512_mask_expandloadu_epi64:6284; X86: # %bb.0: # %entry6285; X86-NEXT: movl {{[0-9]+}}(%esp), %eax6286; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx6287; X86-NEXT: kmovw %ecx, %k16288; X86-NEXT: vpexpandq (%eax), %zmm0 {%k1}6289; X86-NEXT: retl6290;6291; X64-LABEL: test_mm512_mask_expandloadu_epi64:6292; X64: # %bb.0: # %entry6293; X64-NEXT: kmovw %edi, %k16294; X64-NEXT: vpexpandq (%rsi), %zmm0 {%k1}6295; X64-NEXT: retq6296entry:6297 %0 = bitcast i8 %__U to <8 x i1>6298 %1 = tail call <8 x i64> @llvm.masked.expandload.v8i64(ptr %__P, <8 x i1> %0, <8 x i64> %__W)6299 ret <8 x i64> %16300}6301 6302define <8 x i64> @test_mm512_maskz_expandloadu_epi64(i8 zeroext %__U, ptr readonly %__P) {6303; X86-LABEL: test_mm512_maskz_expandloadu_epi64:6304; X86: # %bb.0: # %entry6305; X86-NEXT: movl {{[0-9]+}}(%esp), %eax6306; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx6307; X86-NEXT: kmovw %ecx, %k16308; X86-NEXT: vpexpandq (%eax), %zmm0 {%k1} {z}6309; X86-NEXT: retl6310;6311; X64-LABEL: test_mm512_maskz_expandloadu_epi64:6312; X64: # %bb.0: # %entry6313; X64-NEXT: kmovw %edi, %k16314; X64-NEXT: vpexpandq (%rsi), %zmm0 {%k1} {z}6315; X64-NEXT: retq6316entry:6317 %0 = bitcast i8 %__U to <8 x i1>6318 %1 = tail call <8 x i64> @llvm.masked.expandload.v8i64(ptr %__P, <8 x i1> %0, <8 x i64> zeroinitializer)6319 ret <8 x i64> %16320}6321 6322define <8 x double> @test_mm512_mask_expandloadu_pd(<8 x double> %__W, i8 zeroext %__U, ptr readonly %__P) {6323; X86-LABEL: test_mm512_mask_expandloadu_pd:6324; X86: # %bb.0: # %entry6325; X86-NEXT: movl {{[0-9]+}}(%esp), %eax6326; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx6327; X86-NEXT: kmovw %ecx, %k16328; X86-NEXT: vexpandpd (%eax), %zmm0 {%k1}6329; X86-NEXT: retl6330;6331; X64-LABEL: test_mm512_mask_expandloadu_pd:6332; X64: # %bb.0: # %entry6333; X64-NEXT: kmovw %edi, %k16334; X64-NEXT: vexpandpd (%rsi), %zmm0 {%k1}6335; X64-NEXT: retq6336entry:6337 %0 = bitcast i8 %__U to <8 x i1>6338 %1 = tail call <8 x double> @llvm.masked.expandload.v8f64(ptr %__P, <8 x i1> %0, <8 x double> %__W)6339 ret <8 x double> %16340}6341 6342define <8 x double> @test_mm512_maskz_expandloadu_pd(i8 zeroext %__U, ptr readonly %__P) {6343; X86-LABEL: test_mm512_maskz_expandloadu_pd:6344; X86: # %bb.0: # %entry6345; X86-NEXT: movl {{[0-9]+}}(%esp), %eax6346; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx6347; X86-NEXT: kmovw %ecx, %k16348; X86-NEXT: vexpandpd (%eax), %zmm0 {%k1} {z}6349; X86-NEXT: retl6350;6351; X64-LABEL: test_mm512_maskz_expandloadu_pd:6352; X64: # %bb.0: # %entry6353; X64-NEXT: kmovw %edi, %k16354; X64-NEXT: vexpandpd (%rsi), %zmm0 {%k1} {z}6355; X64-NEXT: retq6356entry:6357 %0 = bitcast i8 %__U to <8 x i1>6358 %1 = tail call <8 x double> @llvm.masked.expandload.v8f64(ptr %__P, <8 x i1> %0, <8 x double> zeroinitializer)6359 ret <8 x double> %16360}6361 6362define <8 x i64> @test_mm512_mask_expandloadu_epi32(<8 x i64> %__W, i16 zeroext %__U, ptr readonly %__P) {6363; X86-LABEL: test_mm512_mask_expandloadu_epi32:6364; X86: # %bb.0: # %entry6365; X86-NEXT: movl {{[0-9]+}}(%esp), %eax6366; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx6367; X86-NEXT: kmovw %ecx, %k16368; X86-NEXT: vpexpandd (%eax), %zmm0 {%k1}6369; X86-NEXT: retl6370;6371; X64-LABEL: test_mm512_mask_expandloadu_epi32:6372; X64: # %bb.0: # %entry6373; X64-NEXT: kmovw %edi, %k16374; X64-NEXT: vpexpandd (%rsi), %zmm0 {%k1}6375; X64-NEXT: retq6376entry:6377 %0 = bitcast <8 x i64> %__W to <16 x i32>6378 %1 = bitcast i16 %__U to <16 x i1>6379 %2 = tail call <16 x i32> @llvm.masked.expandload.v16i32(ptr %__P, <16 x i1> %1, <16 x i32> %0) #116380 %3 = bitcast <16 x i32> %2 to <8 x i64>6381 ret <8 x i64> %36382}6383 6384define <8 x i64> @test_mm512_maskz_expandloadu_epi32(i16 zeroext %__U, ptr readonly %__P) {6385; X86-LABEL: test_mm512_maskz_expandloadu_epi32:6386; X86: # %bb.0: # %entry6387; X86-NEXT: movl {{[0-9]+}}(%esp), %eax6388; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx6389; X86-NEXT: kmovw %ecx, %k16390; X86-NEXT: vpexpandd (%eax), %zmm0 {%k1} {z}6391; X86-NEXT: retl6392;6393; X64-LABEL: test_mm512_maskz_expandloadu_epi32:6394; X64: # %bb.0: # %entry6395; X64-NEXT: kmovw %edi, %k16396; X64-NEXT: vpexpandd (%rsi), %zmm0 {%k1} {z}6397; X64-NEXT: retq6398entry:6399 %0 = bitcast i16 %__U to <16 x i1>6400 %1 = tail call <16 x i32> @llvm.masked.expandload.v16i32(ptr %__P, <16 x i1> %0, <16 x i32> zeroinitializer)6401 %2 = bitcast <16 x i32> %1 to <8 x i64>6402 ret <8 x i64> %26403}6404 6405define <16 x float> @test_mm512_mask_expandloadu_ps(<16 x float> %__W, i16 zeroext %__U, ptr readonly %__P) {6406; X86-LABEL: test_mm512_mask_expandloadu_ps:6407; X86: # %bb.0: # %entry6408; X86-NEXT: movl {{[0-9]+}}(%esp), %eax6409; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx6410; X86-NEXT: kmovw %ecx, %k16411; X86-NEXT: vexpandps (%eax), %zmm0 {%k1}6412; X86-NEXT: retl6413;6414; X64-LABEL: test_mm512_mask_expandloadu_ps:6415; X64: # %bb.0: # %entry6416; X64-NEXT: kmovw %edi, %k16417; X64-NEXT: vexpandps (%rsi), %zmm0 {%k1}6418; X64-NEXT: retq6419entry:6420 %0 = bitcast i16 %__U to <16 x i1>6421 %1 = tail call <16 x float> @llvm.masked.expandload.v16f32(ptr %__P, <16 x i1> %0, <16 x float> %__W) #116422 ret <16 x float> %16423}6424 6425define <16 x float> @test_mm512_maskz_expandloadu_ps(i16 zeroext %__U, ptr readonly %__P) {6426; X86-LABEL: test_mm512_maskz_expandloadu_ps:6427; X86: # %bb.0: # %entry6428; X86-NEXT: movl {{[0-9]+}}(%esp), %eax6429; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx6430; X86-NEXT: kmovw %ecx, %k16431; X86-NEXT: vexpandps (%eax), %zmm0 {%k1} {z}6432; X86-NEXT: retl6433;6434; X64-LABEL: test_mm512_maskz_expandloadu_ps:6435; X64: # %bb.0: # %entry6436; X64-NEXT: kmovw %edi, %k16437; X64-NEXT: vexpandps (%rsi), %zmm0 {%k1} {z}6438; X64-NEXT: retq6439entry:6440 %0 = bitcast i16 %__U to <16 x i1>6441 %1 = tail call <16 x float> @llvm.masked.expandload.v16f32(ptr %__P, <16 x i1> %0, <16 x float> zeroinitializer)6442 ret <16 x float> %16443}6444 6445define void @test_mm512_mask_compressstoreu_pd(ptr %__P, i8 zeroext %__U, <8 x double> %__A) {6446; X86-LABEL: test_mm512_mask_compressstoreu_pd:6447; X86: # %bb.0: # %entry6448; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax6449; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx6450; X86-NEXT: kmovw %eax, %k16451; X86-NEXT: vcompresspd %zmm0, (%ecx) {%k1}6452; X86-NEXT: vzeroupper6453; X86-NEXT: retl6454;6455; X64-LABEL: test_mm512_mask_compressstoreu_pd:6456; X64: # %bb.0: # %entry6457; X64-NEXT: kmovw %esi, %k16458; X64-NEXT: vcompresspd %zmm0, (%rdi) {%k1}6459; X64-NEXT: vzeroupper6460; X64-NEXT: retq6461entry:6462 %0 = bitcast i8 %__U to <8 x i1>6463 tail call void @llvm.masked.compressstore.v8f64(<8 x double> %__A, ptr %__P, <8 x i1> %0)6464 ret void6465}6466 6467define void @test_mm512_mask_compressstoreu_epi64(ptr %__P, i8 zeroext %__U, <8 x i64> %__A) {6468; X86-LABEL: test_mm512_mask_compressstoreu_epi64:6469; X86: # %bb.0: # %entry6470; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax6471; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx6472; X86-NEXT: kmovw %eax, %k16473; X86-NEXT: vpcompressq %zmm0, (%ecx) {%k1}6474; X86-NEXT: vzeroupper6475; X86-NEXT: retl6476;6477; X64-LABEL: test_mm512_mask_compressstoreu_epi64:6478; X64: # %bb.0: # %entry6479; X64-NEXT: kmovw %esi, %k16480; X64-NEXT: vpcompressq %zmm0, (%rdi) {%k1}6481; X64-NEXT: vzeroupper6482; X64-NEXT: retq6483entry:6484 %0 = bitcast i8 %__U to <8 x i1>6485 tail call void @llvm.masked.compressstore.v8i64(<8 x i64> %__A, ptr %__P, <8 x i1> %0)6486 ret void6487}6488 6489define void @test_mm512_mask_compressstoreu_ps(ptr %__P, i16 zeroext %__U, <16 x float> %__A) {6490; X86-LABEL: test_mm512_mask_compressstoreu_ps:6491; X86: # %bb.0: # %entry6492; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax6493; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx6494; X86-NEXT: kmovw %eax, %k16495; X86-NEXT: vcompressps %zmm0, (%ecx) {%k1}6496; X86-NEXT: vzeroupper6497; X86-NEXT: retl6498;6499; X64-LABEL: test_mm512_mask_compressstoreu_ps:6500; X64: # %bb.0: # %entry6501; X64-NEXT: kmovw %esi, %k16502; X64-NEXT: vcompressps %zmm0, (%rdi) {%k1}6503; X64-NEXT: vzeroupper6504; X64-NEXT: retq6505entry:6506 %0 = bitcast i16 %__U to <16 x i1>6507 tail call void @llvm.masked.compressstore.v16f32(<16 x float> %__A, ptr %__P, <16 x i1> %0)6508 ret void6509}6510 6511define void @test_mm512_mask_compressstoreu_epi32(ptr %__P, i16 zeroext %__U, <8 x i64> %__A) {6512; X86-LABEL: test_mm512_mask_compressstoreu_epi32:6513; X86: # %bb.0: # %entry6514; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax6515; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx6516; X86-NEXT: kmovw %eax, %k16517; X86-NEXT: vpcompressd %zmm0, (%ecx) {%k1}6518; X86-NEXT: vzeroupper6519; X86-NEXT: retl6520;6521; X64-LABEL: test_mm512_mask_compressstoreu_epi32:6522; X64: # %bb.0: # %entry6523; X64-NEXT: kmovw %esi, %k16524; X64-NEXT: vpcompressd %zmm0, (%rdi) {%k1}6525; X64-NEXT: vzeroupper6526; X64-NEXT: retq6527entry:6528 %0 = bitcast <8 x i64> %__A to <16 x i32>6529 %1 = bitcast i16 %__U to <16 x i1>6530 tail call void @llvm.masked.compressstore.v16i32(<16 x i32> %0, ptr %__P, <16 x i1> %1)6531 ret void6532}6533 6534define i64 @test_mm512_reduce_add_epi64(<8 x i64> %__W) {6535; X86-LABEL: test_mm512_reduce_add_epi64:6536; X86: # %bb.0: # %entry6537; X86-NEXT: vextracti64x4 $1, %zmm0, %ymm16538; X86-NEXT: vpaddq %ymm1, %ymm0, %ymm06539; X86-NEXT: vextracti128 $1, %ymm0, %xmm16540; X86-NEXT: vpaddq %xmm1, %xmm0, %xmm06541; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]6542; X86-NEXT: vpaddq %xmm0, %xmm1, %xmm06543; X86-NEXT: vmovd %xmm0, %eax6544; X86-NEXT: vpextrd $1, %xmm0, %edx6545; X86-NEXT: vzeroupper6546; X86-NEXT: retl6547;6548; X64-LABEL: test_mm512_reduce_add_epi64:6549; X64: # %bb.0: # %entry6550; X64-NEXT: vextracti64x4 $1, %zmm0, %ymm16551; X64-NEXT: vpaddq %ymm1, %ymm0, %ymm06552; X64-NEXT: vextracti128 $1, %ymm0, %xmm16553; X64-NEXT: vpaddq %xmm1, %xmm0, %xmm06554; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]6555; X64-NEXT: vpaddq %xmm0, %xmm1, %xmm06556; X64-NEXT: vmovq %xmm0, %rax6557; X64-NEXT: vzeroupper6558; X64-NEXT: retq6559entry:6560 %shuffle.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>6561 %shuffle1.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>6562 %add.i = add <4 x i64> %shuffle.i, %shuffle1.i6563 %shuffle2.i = shufflevector <4 x i64> %add.i, <4 x i64> undef, <2 x i32> <i32 0, i32 1>6564 %shuffle3.i = shufflevector <4 x i64> %add.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>6565 %add4.i = add <2 x i64> %shuffle2.i, %shuffle3.i6566 %shuffle6.i = shufflevector <2 x i64> %add4.i, <2 x i64> undef, <2 x i32> <i32 1, i32 undef>6567 %add7.i = add <2 x i64> %shuffle6.i, %add4.i6568 %vecext.i = extractelement <2 x i64> %add7.i, i32 06569 ret i64 %vecext.i6570}6571 6572define i64 @test_mm512_reduce_mul_epi64(<8 x i64> %__W) {6573; X86-LABEL: test_mm512_reduce_mul_epi64:6574; X86: # %bb.0: # %entry6575; X86-NEXT: vextracti64x4 $1, %zmm0, %ymm16576; X86-NEXT: vpsrlq $32, %ymm0, %ymm26577; X86-NEXT: vpmuludq %ymm1, %ymm2, %ymm26578; X86-NEXT: vpsrlq $32, %ymm1, %ymm36579; X86-NEXT: vpmuludq %ymm3, %ymm0, %ymm36580; X86-NEXT: vpaddq %ymm2, %ymm3, %ymm26581; X86-NEXT: vpsllq $32, %ymm2, %ymm26582; X86-NEXT: vpmuludq %ymm1, %ymm0, %ymm06583; X86-NEXT: vpaddq %ymm2, %ymm0, %ymm06584; X86-NEXT: vextracti128 $1, %ymm0, %xmm16585; X86-NEXT: vpsrlq $32, %xmm0, %xmm26586; X86-NEXT: vpmuludq %xmm1, %xmm2, %xmm26587; X86-NEXT: vpsrlq $32, %xmm1, %xmm36588; X86-NEXT: vpmuludq %xmm3, %xmm0, %xmm36589; X86-NEXT: vpaddq %xmm2, %xmm3, %xmm26590; X86-NEXT: vpsllq $32, %xmm2, %xmm26591; X86-NEXT: vpmuludq %xmm1, %xmm0, %xmm06592; X86-NEXT: vpaddq %xmm2, %xmm0, %xmm06593; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]6594; X86-NEXT: vpsrldq {{.*#+}} xmm2 = xmm0[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero6595; X86-NEXT: vpmuludq %xmm0, %xmm2, %xmm26596; X86-NEXT: vpsrlq $32, %xmm0, %xmm36597; X86-NEXT: vpmuludq %xmm3, %xmm1, %xmm36598; X86-NEXT: vpaddq %xmm2, %xmm3, %xmm26599; X86-NEXT: vpsllq $32, %xmm2, %xmm26600; X86-NEXT: vpmuludq %xmm0, %xmm1, %xmm06601; X86-NEXT: vpaddq %xmm2, %xmm0, %xmm06602; X86-NEXT: vmovd %xmm0, %eax6603; X86-NEXT: vpextrd $1, %xmm0, %edx6604; X86-NEXT: vzeroupper6605; X86-NEXT: retl6606;6607; X64-LABEL: test_mm512_reduce_mul_epi64:6608; X64: # %bb.0: # %entry6609; X64-NEXT: vextracti64x4 $1, %zmm0, %ymm16610; X64-NEXT: vpsrlq $32, %ymm0, %ymm26611; X64-NEXT: vpmuludq %ymm1, %ymm2, %ymm26612; X64-NEXT: vpsrlq $32, %ymm1, %ymm36613; X64-NEXT: vpmuludq %ymm3, %ymm0, %ymm36614; X64-NEXT: vpaddq %ymm2, %ymm3, %ymm26615; X64-NEXT: vpsllq $32, %ymm2, %ymm26616; X64-NEXT: vpmuludq %ymm1, %ymm0, %ymm06617; X64-NEXT: vpaddq %ymm2, %ymm0, %ymm06618; X64-NEXT: vextracti128 $1, %ymm0, %xmm16619; X64-NEXT: vpsrlq $32, %xmm0, %xmm26620; X64-NEXT: vpmuludq %xmm1, %xmm2, %xmm26621; X64-NEXT: vpsrlq $32, %xmm1, %xmm36622; X64-NEXT: vpmuludq %xmm3, %xmm0, %xmm36623; X64-NEXT: vpaddq %xmm2, %xmm3, %xmm26624; X64-NEXT: vpsllq $32, %xmm2, %xmm26625; X64-NEXT: vpmuludq %xmm1, %xmm0, %xmm06626; X64-NEXT: vpaddq %xmm2, %xmm0, %xmm06627; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]6628; X64-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[3,3,3,3]6629; X64-NEXT: vpmuludq %xmm0, %xmm2, %xmm26630; X64-NEXT: vpsrlq $32, %xmm0, %xmm36631; X64-NEXT: vpmuludq %xmm3, %xmm1, %xmm36632; X64-NEXT: vpaddq %xmm2, %xmm3, %xmm26633; X64-NEXT: vpsllq $32, %xmm2, %xmm26634; X64-NEXT: vpmuludq %xmm0, %xmm1, %xmm06635; X64-NEXT: vpaddq %xmm2, %xmm0, %xmm06636; X64-NEXT: vmovq %xmm0, %rax6637; X64-NEXT: vzeroupper6638; X64-NEXT: retq6639entry:6640 %shuffle.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>6641 %shuffle1.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>6642 %mul.i = mul <4 x i64> %shuffle.i, %shuffle1.i6643 %shuffle2.i = shufflevector <4 x i64> %mul.i, <4 x i64> undef, <2 x i32> <i32 0, i32 1>6644 %shuffle3.i = shufflevector <4 x i64> %mul.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>6645 %mul4.i = mul <2 x i64> %shuffle2.i, %shuffle3.i6646 %shuffle6.i = shufflevector <2 x i64> %mul4.i, <2 x i64> undef, <2 x i32> <i32 1, i32 undef>6647 %mul7.i = mul <2 x i64> %shuffle6.i, %mul4.i6648 %vecext.i = extractelement <2 x i64> %mul7.i, i32 06649 ret i64 %vecext.i6650}6651 6652define i64 @test_mm512_reduce_or_epi64(<8 x i64> %__W) {6653; X86-LABEL: test_mm512_reduce_or_epi64:6654; X86: # %bb.0: # %entry6655; X86-NEXT: vextracti64x4 $1, %zmm0, %ymm16656; X86-NEXT: vpor %ymm1, %ymm0, %ymm06657; X86-NEXT: vextracti128 $1, %ymm0, %xmm16658; X86-NEXT: vpor %xmm1, %xmm0, %xmm06659; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]6660; X86-NEXT: vpor %xmm0, %xmm1, %xmm06661; X86-NEXT: vmovd %xmm0, %eax6662; X86-NEXT: vpextrd $1, %xmm0, %edx6663; X86-NEXT: vzeroupper6664; X86-NEXT: retl6665;6666; X64-LABEL: test_mm512_reduce_or_epi64:6667; X64: # %bb.0: # %entry6668; X64-NEXT: vextracti64x4 $1, %zmm0, %ymm16669; X64-NEXT: vpor %ymm1, %ymm0, %ymm06670; X64-NEXT: vextracti128 $1, %ymm0, %xmm16671; X64-NEXT: vpor %xmm1, %xmm0, %xmm06672; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]6673; X64-NEXT: vpor %xmm0, %xmm1, %xmm06674; X64-NEXT: vmovq %xmm0, %rax6675; X64-NEXT: vzeroupper6676; X64-NEXT: retq6677entry:6678 %shuffle.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>6679 %shuffle1.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>6680 %or.i = or <4 x i64> %shuffle.i, %shuffle1.i6681 %shuffle2.i = shufflevector <4 x i64> %or.i, <4 x i64> undef, <2 x i32> <i32 0, i32 1>6682 %shuffle3.i = shufflevector <4 x i64> %or.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>6683 %or4.i = or <2 x i64> %shuffle2.i, %shuffle3.i6684 %shuffle6.i = shufflevector <2 x i64> %or4.i, <2 x i64> undef, <2 x i32> <i32 1, i32 undef>6685 %or7.i = or <2 x i64> %shuffle6.i, %or4.i6686 %vecext.i = extractelement <2 x i64> %or7.i, i32 06687 ret i64 %vecext.i6688}6689 6690define i64 @test_mm512_reduce_and_epi64(<8 x i64> %__W) {6691; X86-LABEL: test_mm512_reduce_and_epi64:6692; X86: # %bb.0: # %entry6693; X86-NEXT: vextracti64x4 $1, %zmm0, %ymm16694; X86-NEXT: vpand %ymm1, %ymm0, %ymm06695; X86-NEXT: vextracti128 $1, %ymm0, %xmm16696; X86-NEXT: vpand %xmm1, %xmm0, %xmm06697; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]6698; X86-NEXT: vpand %xmm0, %xmm1, %xmm06699; X86-NEXT: vmovd %xmm0, %eax6700; X86-NEXT: vpextrd $1, %xmm0, %edx6701; X86-NEXT: vzeroupper6702; X86-NEXT: retl6703;6704; X64-LABEL: test_mm512_reduce_and_epi64:6705; X64: # %bb.0: # %entry6706; X64-NEXT: vextracti64x4 $1, %zmm0, %ymm16707; X64-NEXT: vpand %ymm1, %ymm0, %ymm06708; X64-NEXT: vextracti128 $1, %ymm0, %xmm16709; X64-NEXT: vpand %xmm1, %xmm0, %xmm06710; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]6711; X64-NEXT: vpand %xmm0, %xmm1, %xmm06712; X64-NEXT: vmovq %xmm0, %rax6713; X64-NEXT: vzeroupper6714; X64-NEXT: retq6715entry:6716 %shuffle.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>6717 %shuffle1.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>6718 %and.i = and <4 x i64> %shuffle.i, %shuffle1.i6719 %shuffle2.i = shufflevector <4 x i64> %and.i, <4 x i64> undef, <2 x i32> <i32 0, i32 1>6720 %shuffle3.i = shufflevector <4 x i64> %and.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>6721 %and4.i = and <2 x i64> %shuffle2.i, %shuffle3.i6722 %shuffle6.i = shufflevector <2 x i64> %and4.i, <2 x i64> undef, <2 x i32> <i32 1, i32 undef>6723 %and7.i = and <2 x i64> %shuffle6.i, %and4.i6724 %vecext.i = extractelement <2 x i64> %and7.i, i32 06725 ret i64 %vecext.i6726}6727 6728define i64 @test_mm512_mask_reduce_add_epi64(i8 zeroext %__M, <8 x i64> %__W) {6729; X86-LABEL: test_mm512_mask_reduce_add_epi64:6730; X86: # %bb.0: # %entry6731; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax6732; X86-NEXT: kmovw %eax, %k16733; X86-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z}6734; X86-NEXT: vextracti64x4 $1, %zmm0, %ymm16735; X86-NEXT: vpaddq %ymm1, %ymm0, %ymm06736; X86-NEXT: vextracti128 $1, %ymm0, %xmm16737; X86-NEXT: vpaddq %xmm1, %xmm0, %xmm06738; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]6739; X86-NEXT: vpaddq %xmm0, %xmm1, %xmm06740; X86-NEXT: vmovd %xmm0, %eax6741; X86-NEXT: vpextrd $1, %xmm0, %edx6742; X86-NEXT: vzeroupper6743; X86-NEXT: retl6744;6745; X64-LABEL: test_mm512_mask_reduce_add_epi64:6746; X64: # %bb.0: # %entry6747; X64-NEXT: kmovw %edi, %k16748; X64-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z}6749; X64-NEXT: vextracti64x4 $1, %zmm0, %ymm16750; X64-NEXT: vpaddq %ymm1, %ymm0, %ymm06751; X64-NEXT: vextracti128 $1, %ymm0, %xmm16752; X64-NEXT: vpaddq %xmm1, %xmm0, %xmm06753; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]6754; X64-NEXT: vpaddq %xmm0, %xmm1, %xmm06755; X64-NEXT: vmovq %xmm0, %rax6756; X64-NEXT: vzeroupper6757; X64-NEXT: retq6758entry:6759 %0 = bitcast i8 %__M to <8 x i1>6760 %1 = select <8 x i1> %0, <8 x i64> %__W, <8 x i64> zeroinitializer6761 %shuffle.i = shufflevector <8 x i64> %1, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>6762 %shuffle1.i = shufflevector <8 x i64> %1, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>6763 %add.i = add <4 x i64> %shuffle.i, %shuffle1.i6764 %shuffle2.i = shufflevector <4 x i64> %add.i, <4 x i64> undef, <2 x i32> <i32 0, i32 1>6765 %shuffle3.i = shufflevector <4 x i64> %add.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>6766 %add4.i = add <2 x i64> %shuffle2.i, %shuffle3.i6767 %shuffle6.i = shufflevector <2 x i64> %add4.i, <2 x i64> undef, <2 x i32> <i32 1, i32 undef>6768 %add7.i = add <2 x i64> %shuffle6.i, %add4.i6769 %vecext.i = extractelement <2 x i64> %add7.i, i32 06770 ret i64 %vecext.i6771}6772 6773define i64 @test_mm512_mask_reduce_mul_epi64(i8 zeroext %__M, <8 x i64> %__W) {6774; X86-LABEL: test_mm512_mask_reduce_mul_epi64:6775; X86: # %bb.0: # %entry6776; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax6777; X86-NEXT: kmovw %eax, %k16778; X86-NEXT: vpbroadcastq {{.*#+}} zmm1 = [1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0]6779; X86-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}6780; X86-NEXT: vextracti64x4 $1, %zmm1, %ymm06781; X86-NEXT: vpsrlq $32, %ymm1, %ymm26782; X86-NEXT: vpmuludq %ymm0, %ymm2, %ymm26783; X86-NEXT: vpsrlq $32, %ymm0, %ymm36784; X86-NEXT: vpmuludq %ymm3, %ymm1, %ymm36785; X86-NEXT: vpaddq %ymm2, %ymm3, %ymm26786; X86-NEXT: vpsllq $32, %ymm2, %ymm26787; X86-NEXT: vpmuludq %ymm0, %ymm1, %ymm06788; X86-NEXT: vpaddq %ymm2, %ymm0, %ymm06789; X86-NEXT: vextracti128 $1, %ymm0, %xmm16790; X86-NEXT: vpsrlq $32, %xmm0, %xmm26791; X86-NEXT: vpmuludq %xmm1, %xmm2, %xmm26792; X86-NEXT: vpsrlq $32, %xmm1, %xmm36793; X86-NEXT: vpmuludq %xmm3, %xmm0, %xmm36794; X86-NEXT: vpaddq %xmm2, %xmm3, %xmm26795; X86-NEXT: vpsllq $32, %xmm2, %xmm26796; X86-NEXT: vpmuludq %xmm1, %xmm0, %xmm06797; X86-NEXT: vpaddq %xmm2, %xmm0, %xmm06798; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]6799; X86-NEXT: vpsrldq {{.*#+}} xmm2 = xmm0[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero6800; X86-NEXT: vpmuludq %xmm0, %xmm2, %xmm26801; X86-NEXT: vpsrlq $32, %xmm0, %xmm36802; X86-NEXT: vpmuludq %xmm3, %xmm1, %xmm36803; X86-NEXT: vpaddq %xmm2, %xmm3, %xmm26804; X86-NEXT: vpsllq $32, %xmm2, %xmm26805; X86-NEXT: vpmuludq %xmm0, %xmm1, %xmm06806; X86-NEXT: vpaddq %xmm2, %xmm0, %xmm06807; X86-NEXT: vmovd %xmm0, %eax6808; X86-NEXT: vpextrd $1, %xmm0, %edx6809; X86-NEXT: vzeroupper6810; X86-NEXT: retl6811;6812; X64-LABEL: test_mm512_mask_reduce_mul_epi64:6813; X64: # %bb.0: # %entry6814; X64-NEXT: kmovw %edi, %k16815; X64-NEXT: vpbroadcastq {{.*#+}} zmm1 = [1,1,1,1,1,1,1,1]6816; X64-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}6817; X64-NEXT: vextracti64x4 $1, %zmm1, %ymm06818; X64-NEXT: vpsrlq $32, %ymm1, %ymm26819; X64-NEXT: vpmuludq %ymm0, %ymm2, %ymm26820; X64-NEXT: vpsrlq $32, %ymm0, %ymm36821; X64-NEXT: vpmuludq %ymm3, %ymm1, %ymm36822; X64-NEXT: vpaddq %ymm2, %ymm3, %ymm26823; X64-NEXT: vpsllq $32, %ymm2, %ymm26824; X64-NEXT: vpmuludq %ymm0, %ymm1, %ymm06825; X64-NEXT: vpaddq %ymm2, %ymm0, %ymm06826; X64-NEXT: vextracti128 $1, %ymm0, %xmm16827; X64-NEXT: vpsrlq $32, %xmm0, %xmm26828; X64-NEXT: vpmuludq %xmm1, %xmm2, %xmm26829; X64-NEXT: vpsrlq $32, %xmm1, %xmm36830; X64-NEXT: vpmuludq %xmm3, %xmm0, %xmm36831; X64-NEXT: vpaddq %xmm2, %xmm3, %xmm26832; X64-NEXT: vpsllq $32, %xmm2, %xmm26833; X64-NEXT: vpmuludq %xmm1, %xmm0, %xmm06834; X64-NEXT: vpaddq %xmm2, %xmm0, %xmm06835; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]6836; X64-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[3,3,3,3]6837; X64-NEXT: vpmuludq %xmm0, %xmm2, %xmm26838; X64-NEXT: vpsrlq $32, %xmm0, %xmm36839; X64-NEXT: vpmuludq %xmm3, %xmm1, %xmm36840; X64-NEXT: vpaddq %xmm2, %xmm3, %xmm26841; X64-NEXT: vpsllq $32, %xmm2, %xmm26842; X64-NEXT: vpmuludq %xmm0, %xmm1, %xmm06843; X64-NEXT: vpaddq %xmm2, %xmm0, %xmm06844; X64-NEXT: vmovq %xmm0, %rax6845; X64-NEXT: vzeroupper6846; X64-NEXT: retq6847entry:6848 %0 = bitcast i8 %__M to <8 x i1>6849 %1 = select <8 x i1> %0, <8 x i64> %__W, <8 x i64> <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>6850 %shuffle.i = shufflevector <8 x i64> %1, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>6851 %shuffle1.i = shufflevector <8 x i64> %1, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>6852 %mul.i = mul <4 x i64> %shuffle.i, %shuffle1.i6853 %shuffle2.i = shufflevector <4 x i64> %mul.i, <4 x i64> undef, <2 x i32> <i32 0, i32 1>6854 %shuffle3.i = shufflevector <4 x i64> %mul.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>6855 %mul4.i = mul <2 x i64> %shuffle2.i, %shuffle3.i6856 %shuffle6.i = shufflevector <2 x i64> %mul4.i, <2 x i64> undef, <2 x i32> <i32 1, i32 undef>6857 %mul7.i = mul <2 x i64> %shuffle6.i, %mul4.i6858 %vecext.i = extractelement <2 x i64> %mul7.i, i32 06859 ret i64 %vecext.i6860}6861 6862define i64 @test_mm512_mask_reduce_and_epi64(i8 zeroext %__M, <8 x i64> %__W) {6863; X86-LABEL: test_mm512_mask_reduce_and_epi64:6864; X86: # %bb.0: # %entry6865; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax6866; X86-NEXT: kmovw %eax, %k16867; X86-NEXT: vpternlogd {{.*#+}} zmm1 = -16868; X86-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}6869; X86-NEXT: vextracti64x4 $1, %zmm1, %ymm06870; X86-NEXT: vpand %ymm0, %ymm1, %ymm06871; X86-NEXT: vextracti128 $1, %ymm0, %xmm16872; X86-NEXT: vpand %xmm1, %xmm0, %xmm06873; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]6874; X86-NEXT: vpand %xmm0, %xmm1, %xmm06875; X86-NEXT: vmovd %xmm0, %eax6876; X86-NEXT: vpextrd $1, %xmm0, %edx6877; X86-NEXT: vzeroupper6878; X86-NEXT: retl6879;6880; X64-LABEL: test_mm512_mask_reduce_and_epi64:6881; X64: # %bb.0: # %entry6882; X64-NEXT: kmovw %edi, %k16883; X64-NEXT: vpternlogd {{.*#+}} zmm1 = -16884; X64-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}6885; X64-NEXT: vextracti64x4 $1, %zmm1, %ymm06886; X64-NEXT: vpand %ymm0, %ymm1, %ymm06887; X64-NEXT: vextracti128 $1, %ymm0, %xmm16888; X64-NEXT: vpand %xmm1, %xmm0, %xmm06889; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]6890; X64-NEXT: vpand %xmm0, %xmm1, %xmm06891; X64-NEXT: vmovq %xmm0, %rax6892; X64-NEXT: vzeroupper6893; X64-NEXT: retq6894entry:6895 %0 = bitcast i8 %__M to <8 x i1>6896 %1 = select <8 x i1> %0, <8 x i64> %__W, <8 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>6897 %shuffle.i = shufflevector <8 x i64> %1, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>6898 %shuffle1.i = shufflevector <8 x i64> %1, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>6899 %and.i = and <4 x i64> %shuffle.i, %shuffle1.i6900 %shuffle2.i = shufflevector <4 x i64> %and.i, <4 x i64> undef, <2 x i32> <i32 0, i32 1>6901 %shuffle3.i = shufflevector <4 x i64> %and.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>6902 %and4.i = and <2 x i64> %shuffle2.i, %shuffle3.i6903 %shuffle6.i = shufflevector <2 x i64> %and4.i, <2 x i64> undef, <2 x i32> <i32 1, i32 undef>6904 %and7.i = and <2 x i64> %shuffle6.i, %and4.i6905 %vecext.i = extractelement <2 x i64> %and7.i, i32 06906 ret i64 %vecext.i6907}6908 6909define i64 @test_mm512_mask_reduce_or_epi64(i8 zeroext %__M, <8 x i64> %__W) {6910; X86-LABEL: test_mm512_mask_reduce_or_epi64:6911; X86: # %bb.0: # %entry6912; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax6913; X86-NEXT: kmovw %eax, %k16914; X86-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z}6915; X86-NEXT: vextracti64x4 $1, %zmm0, %ymm16916; X86-NEXT: vpor %ymm1, %ymm0, %ymm06917; X86-NEXT: vextracti128 $1, %ymm0, %xmm16918; X86-NEXT: vpor %xmm1, %xmm0, %xmm06919; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]6920; X86-NEXT: vpor %xmm0, %xmm1, %xmm06921; X86-NEXT: vmovd %xmm0, %eax6922; X86-NEXT: vpextrd $1, %xmm0, %edx6923; X86-NEXT: vzeroupper6924; X86-NEXT: retl6925;6926; X64-LABEL: test_mm512_mask_reduce_or_epi64:6927; X64: # %bb.0: # %entry6928; X64-NEXT: kmovw %edi, %k16929; X64-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z}6930; X64-NEXT: vextracti64x4 $1, %zmm0, %ymm16931; X64-NEXT: vpor %ymm1, %ymm0, %ymm06932; X64-NEXT: vextracti128 $1, %ymm0, %xmm16933; X64-NEXT: vpor %xmm1, %xmm0, %xmm06934; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]6935; X64-NEXT: vpor %xmm0, %xmm1, %xmm06936; X64-NEXT: vmovq %xmm0, %rax6937; X64-NEXT: vzeroupper6938; X64-NEXT: retq6939entry:6940 %0 = bitcast i8 %__M to <8 x i1>6941 %1 = select <8 x i1> %0, <8 x i64> %__W, <8 x i64> zeroinitializer6942 %shuffle.i = shufflevector <8 x i64> %1, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>6943 %shuffle1.i = shufflevector <8 x i64> %1, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>6944 %or.i = or <4 x i64> %shuffle.i, %shuffle1.i6945 %shuffle2.i = shufflevector <4 x i64> %or.i, <4 x i64> undef, <2 x i32> <i32 0, i32 1>6946 %shuffle3.i = shufflevector <4 x i64> %or.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>6947 %or4.i = or <2 x i64> %shuffle2.i, %shuffle3.i6948 %shuffle6.i = shufflevector <2 x i64> %or4.i, <2 x i64> undef, <2 x i32> <i32 1, i32 undef>6949 %or7.i = or <2 x i64> %shuffle6.i, %or4.i6950 %vecext.i = extractelement <2 x i64> %or7.i, i32 06951 ret i64 %vecext.i6952}6953 6954define i32 @test_mm512_reduce_add_epi32(<8 x i64> %__W) {6955; CHECK-LABEL: test_mm512_reduce_add_epi32:6956; CHECK: # %bb.0: # %entry6957; CHECK-NEXT: vextracti64x4 $1, %zmm0, %ymm16958; CHECK-NEXT: vpaddd %ymm1, %ymm0, %ymm06959; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm16960; CHECK-NEXT: vpaddd %xmm1, %xmm0, %xmm06961; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]6962; CHECK-NEXT: vpaddd %xmm0, %xmm1, %xmm06963; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]6964; CHECK-NEXT: vpaddd %xmm0, %xmm1, %xmm06965; CHECK-NEXT: vmovd %xmm0, %eax6966; CHECK-NEXT: vzeroupper6967; CHECK-NEXT: ret{{[l|q]}}6968entry:6969 %extract.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>6970 %0 = bitcast <4 x i64> %extract.i to <8 x i32>6971 %extract2.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>6972 %1 = bitcast <4 x i64> %extract2.i to <8 x i32>6973 %add.i = add <8 x i32> %0, %16974 %2 = bitcast <8 x i32> %add.i to <4 x i64>6975 %extract3.i = shufflevector <4 x i64> %2, <4 x i64> undef, <2 x i32> <i32 0, i32 1>6976 %3 = bitcast <2 x i64> %extract3.i to <4 x i32>6977 %extract4.i = shufflevector <4 x i64> %2, <4 x i64> undef, <2 x i32> <i32 2, i32 3>6978 %4 = bitcast <2 x i64> %extract4.i to <4 x i32>6979 %add5.i = add <4 x i32> %3, %46980 %shuffle.i = shufflevector <4 x i32> %add5.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>6981 %add6.i = add <4 x i32> %shuffle.i, %add5.i6982 %shuffle7.i = shufflevector <4 x i32> %add6.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>6983 %add8.i = add <4 x i32> %shuffle7.i, %add6.i6984 %vecext.i = extractelement <4 x i32> %add8.i, i32 06985 ret i32 %vecext.i6986}6987 6988define i32 @test_mm512_reduce_mul_epi32(<8 x i64> %__W) {6989; CHECK-LABEL: test_mm512_reduce_mul_epi32:6990; CHECK: # %bb.0: # %entry6991; CHECK-NEXT: vextracti64x4 $1, %zmm0, %ymm16992; CHECK-NEXT: vpmulld %ymm1, %ymm0, %ymm06993; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm16994; CHECK-NEXT: vpmulld %xmm1, %xmm0, %xmm06995; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]6996; CHECK-NEXT: vpmulld %xmm0, %xmm1, %xmm06997; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]6998; CHECK-NEXT: vpmulld %xmm0, %xmm1, %xmm06999; CHECK-NEXT: vmovd %xmm0, %eax7000; CHECK-NEXT: vzeroupper7001; CHECK-NEXT: ret{{[l|q]}}7002entry:7003 %extract.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7004 %0 = bitcast <4 x i64> %extract.i to <8 x i32>7005 %extract2.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7006 %1 = bitcast <4 x i64> %extract2.i to <8 x i32>7007 %mul.i = mul <8 x i32> %0, %17008 %2 = bitcast <8 x i32> %mul.i to <4 x i64>7009 %extract3.i = shufflevector <4 x i64> %2, <4 x i64> undef, <2 x i32> <i32 0, i32 1>7010 %3 = bitcast <2 x i64> %extract3.i to <4 x i32>7011 %extract4.i = shufflevector <4 x i64> %2, <4 x i64> undef, <2 x i32> <i32 2, i32 3>7012 %4 = bitcast <2 x i64> %extract4.i to <4 x i32>7013 %mul5.i = mul <4 x i32> %3, %47014 %shuffle.i = shufflevector <4 x i32> %mul5.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>7015 %mul6.i = mul <4 x i32> %shuffle.i, %mul5.i7016 %shuffle7.i = shufflevector <4 x i32> %mul6.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>7017 %mul8.i = mul <4 x i32> %shuffle7.i, %mul6.i7018 %vecext.i = extractelement <4 x i32> %mul8.i, i32 07019 ret i32 %vecext.i7020}7021 7022define i32 @test_mm512_reduce_or_epi32(<8 x i64> %__W) {7023; CHECK-LABEL: test_mm512_reduce_or_epi32:7024; CHECK: # %bb.0: # %entry7025; CHECK-NEXT: vextracti64x4 $1, %zmm0, %ymm17026; CHECK-NEXT: vpor %ymm1, %ymm0, %ymm07027; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm17028; CHECK-NEXT: vpor %xmm1, %xmm0, %xmm07029; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7030; CHECK-NEXT: vpor %xmm0, %xmm1, %xmm07031; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]7032; CHECK-NEXT: vpor %xmm0, %xmm1, %xmm07033; CHECK-NEXT: vmovd %xmm0, %eax7034; CHECK-NEXT: vzeroupper7035; CHECK-NEXT: ret{{[l|q]}}7036entry:7037 %extract.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7038 %extract2.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7039 %or25.i = or <4 x i64> %extract.i, %extract2.i7040 %extract3.i = shufflevector <4 x i64> %or25.i, <4 x i64> undef, <2 x i32> <i32 0, i32 1>7041 %extract4.i = shufflevector <4 x i64> %or25.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>7042 %or526.i = or <2 x i64> %extract3.i, %extract4.i7043 %or5.i = bitcast <2 x i64> %or526.i to <4 x i32>7044 %shuffle.i = shufflevector <4 x i32> %or5.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>7045 %or6.i = or <4 x i32> %shuffle.i, %or5.i7046 %shuffle7.i = shufflevector <4 x i32> %or6.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>7047 %or8.i = or <4 x i32> %shuffle7.i, %or6.i7048 %vecext.i = extractelement <4 x i32> %or8.i, i32 07049 ret i32 %vecext.i7050}7051 7052define i32 @test_mm512_reduce_and_epi32(<8 x i64> %__W) {7053; CHECK-LABEL: test_mm512_reduce_and_epi32:7054; CHECK: # %bb.0: # %entry7055; CHECK-NEXT: vextracti64x4 $1, %zmm0, %ymm17056; CHECK-NEXT: vpand %ymm1, %ymm0, %ymm07057; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm17058; CHECK-NEXT: vpand %xmm1, %xmm0, %xmm07059; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7060; CHECK-NEXT: vpand %xmm0, %xmm1, %xmm07061; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]7062; CHECK-NEXT: vpand %xmm0, %xmm1, %xmm07063; CHECK-NEXT: vmovd %xmm0, %eax7064; CHECK-NEXT: vzeroupper7065; CHECK-NEXT: ret{{[l|q]}}7066entry:7067 %extract.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7068 %extract2.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7069 %and25.i = and <4 x i64> %extract.i, %extract2.i7070 %extract3.i = shufflevector <4 x i64> %and25.i, <4 x i64> undef, <2 x i32> <i32 0, i32 1>7071 %extract4.i = shufflevector <4 x i64> %and25.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>7072 %and526.i = and <2 x i64> %extract3.i, %extract4.i7073 %and5.i = bitcast <2 x i64> %and526.i to <4 x i32>7074 %shuffle.i = shufflevector <4 x i32> %and5.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>7075 %and6.i = and <4 x i32> %shuffle.i, %and5.i7076 %shuffle7.i = shufflevector <4 x i32> %and6.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>7077 %and8.i = and <4 x i32> %shuffle7.i, %and6.i7078 %vecext.i = extractelement <4 x i32> %and8.i, i32 07079 ret i32 %vecext.i7080}7081 7082define i32 @test_mm512_mask_reduce_add_epi32(i16 zeroext %__M, <8 x i64> %__W) {7083; X86-LABEL: test_mm512_mask_reduce_add_epi32:7084; X86: # %bb.0: # %entry7085; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax7086; X86-NEXT: kmovw %eax, %k17087; X86-NEXT: vmovdqa32 %zmm0, %zmm0 {%k1} {z}7088; X86-NEXT: vextracti64x4 $1, %zmm0, %ymm17089; X86-NEXT: vpaddd %ymm1, %ymm0, %ymm07090; X86-NEXT: vextracti128 $1, %ymm0, %xmm17091; X86-NEXT: vpaddd %xmm1, %xmm0, %xmm07092; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7093; X86-NEXT: vpaddd %xmm0, %xmm1, %xmm07094; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]7095; X86-NEXT: vpaddd %xmm0, %xmm1, %xmm07096; X86-NEXT: vmovd %xmm0, %eax7097; X86-NEXT: vzeroupper7098; X86-NEXT: retl7099;7100; X64-LABEL: test_mm512_mask_reduce_add_epi32:7101; X64: # %bb.0: # %entry7102; X64-NEXT: kmovw %edi, %k17103; X64-NEXT: vmovdqa32 %zmm0, %zmm0 {%k1} {z}7104; X64-NEXT: vextracti64x4 $1, %zmm0, %ymm17105; X64-NEXT: vpaddd %ymm1, %ymm0, %ymm07106; X64-NEXT: vextracti128 $1, %ymm0, %xmm17107; X64-NEXT: vpaddd %xmm1, %xmm0, %xmm07108; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7109; X64-NEXT: vpaddd %xmm0, %xmm1, %xmm07110; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]7111; X64-NEXT: vpaddd %xmm0, %xmm1, %xmm07112; X64-NEXT: vmovd %xmm0, %eax7113; X64-NEXT: vzeroupper7114; X64-NEXT: retq7115entry:7116 %0 = bitcast <8 x i64> %__W to <16 x i32>7117 %1 = bitcast i16 %__M to <16 x i1>7118 %2 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> zeroinitializer7119 %3 = bitcast <16 x i32> %2 to <8 x i64>7120 %extract.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7121 %4 = bitcast <4 x i64> %extract.i to <8 x i32>7122 %extract3.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7123 %5 = bitcast <4 x i64> %extract3.i to <8 x i32>7124 %add.i = add <8 x i32> %4, %57125 %6 = bitcast <8 x i32> %add.i to <4 x i64>7126 %extract4.i = shufflevector <4 x i64> %6, <4 x i64> undef, <2 x i32> <i32 0, i32 1>7127 %7 = bitcast <2 x i64> %extract4.i to <4 x i32>7128 %extract5.i = shufflevector <4 x i64> %6, <4 x i64> undef, <2 x i32> <i32 2, i32 3>7129 %8 = bitcast <2 x i64> %extract5.i to <4 x i32>7130 %add6.i = add <4 x i32> %7, %87131 %shuffle.i = shufflevector <4 x i32> %add6.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>7132 %add7.i = add <4 x i32> %shuffle.i, %add6.i7133 %shuffle8.i = shufflevector <4 x i32> %add7.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>7134 %add9.i = add <4 x i32> %shuffle8.i, %add7.i7135 %vecext.i = extractelement <4 x i32> %add9.i, i32 07136 ret i32 %vecext.i7137}7138 7139define i32 @test_mm512_mask_reduce_mul_epi32(i16 zeroext %__M, <8 x i64> %__W) {7140; X86-LABEL: test_mm512_mask_reduce_mul_epi32:7141; X86: # %bb.0: # %entry7142; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax7143; X86-NEXT: kmovw %eax, %k17144; X86-NEXT: vpbroadcastd {{.*#+}} zmm1 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]7145; X86-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1}7146; X86-NEXT: vextracti64x4 $1, %zmm1, %ymm07147; X86-NEXT: vpmulld %ymm0, %ymm1, %ymm07148; X86-NEXT: vextracti128 $1, %ymm0, %xmm17149; X86-NEXT: vpmulld %xmm1, %xmm0, %xmm07150; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7151; X86-NEXT: vpmulld %xmm0, %xmm1, %xmm07152; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]7153; X86-NEXT: vpmulld %xmm0, %xmm1, %xmm07154; X86-NEXT: vmovd %xmm0, %eax7155; X86-NEXT: vzeroupper7156; X86-NEXT: retl7157;7158; X64-LABEL: test_mm512_mask_reduce_mul_epi32:7159; X64: # %bb.0: # %entry7160; X64-NEXT: kmovw %edi, %k17161; X64-NEXT: vpbroadcastd {{.*#+}} zmm1 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]7162; X64-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1}7163; X64-NEXT: vextracti64x4 $1, %zmm1, %ymm07164; X64-NEXT: vpmulld %ymm0, %ymm1, %ymm07165; X64-NEXT: vextracti128 $1, %ymm0, %xmm17166; X64-NEXT: vpmulld %xmm1, %xmm0, %xmm07167; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7168; X64-NEXT: vpmulld %xmm0, %xmm1, %xmm07169; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]7170; X64-NEXT: vpmulld %xmm0, %xmm1, %xmm07171; X64-NEXT: vmovd %xmm0, %eax7172; X64-NEXT: vzeroupper7173; X64-NEXT: retq7174entry:7175 %0 = bitcast <8 x i64> %__W to <16 x i32>7176 %1 = bitcast i16 %__M to <16 x i1>7177 %2 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>7178 %3 = bitcast <16 x i32> %2 to <8 x i64>7179 %extract.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7180 %4 = bitcast <4 x i64> %extract.i to <8 x i32>7181 %extract4.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7182 %5 = bitcast <4 x i64> %extract4.i to <8 x i32>7183 %mul.i = mul <8 x i32> %4, %57184 %6 = bitcast <8 x i32> %mul.i to <4 x i64>7185 %extract5.i = shufflevector <4 x i64> %6, <4 x i64> undef, <2 x i32> <i32 0, i32 1>7186 %7 = bitcast <2 x i64> %extract5.i to <4 x i32>7187 %extract6.i = shufflevector <4 x i64> %6, <4 x i64> undef, <2 x i32> <i32 2, i32 3>7188 %8 = bitcast <2 x i64> %extract6.i to <4 x i32>7189 %mul7.i = mul <4 x i32> %7, %87190 %shuffle.i = shufflevector <4 x i32> %mul7.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>7191 %mul8.i = mul <4 x i32> %shuffle.i, %mul7.i7192 %shuffle9.i = shufflevector <4 x i32> %mul8.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>7193 %mul10.i = mul <4 x i32> %shuffle9.i, %mul8.i7194 %vecext.i = extractelement <4 x i32> %mul10.i, i32 07195 ret i32 %vecext.i7196}7197 7198define i32 @test_mm512_mask_reduce_and_epi32(i16 zeroext %__M, <8 x i64> %__W) {7199; X86-LABEL: test_mm512_mask_reduce_and_epi32:7200; X86: # %bb.0: # %entry7201; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax7202; X86-NEXT: kmovw %eax, %k17203; X86-NEXT: vpternlogd {{.*#+}} zmm1 = -17204; X86-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1}7205; X86-NEXT: vextracti64x4 $1, %zmm1, %ymm07206; X86-NEXT: vpand %ymm0, %ymm1, %ymm07207; X86-NEXT: vextracti128 $1, %ymm0, %xmm17208; X86-NEXT: vpand %xmm1, %xmm0, %xmm07209; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7210; X86-NEXT: vpand %xmm0, %xmm1, %xmm07211; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]7212; X86-NEXT: vpand %xmm0, %xmm1, %xmm07213; X86-NEXT: vmovd %xmm0, %eax7214; X86-NEXT: vzeroupper7215; X86-NEXT: retl7216;7217; X64-LABEL: test_mm512_mask_reduce_and_epi32:7218; X64: # %bb.0: # %entry7219; X64-NEXT: kmovw %edi, %k17220; X64-NEXT: vpternlogd {{.*#+}} zmm1 = -17221; X64-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1}7222; X64-NEXT: vextracti64x4 $1, %zmm1, %ymm07223; X64-NEXT: vpand %ymm0, %ymm1, %ymm07224; X64-NEXT: vextracti128 $1, %ymm0, %xmm17225; X64-NEXT: vpand %xmm1, %xmm0, %xmm07226; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7227; X64-NEXT: vpand %xmm0, %xmm1, %xmm07228; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]7229; X64-NEXT: vpand %xmm0, %xmm1, %xmm07230; X64-NEXT: vmovd %xmm0, %eax7231; X64-NEXT: vzeroupper7232; X64-NEXT: retq7233entry:7234 %0 = bitcast <8 x i64> %__W to <16 x i32>7235 %1 = bitcast i16 %__M to <16 x i1>7236 %2 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>7237 %3 = bitcast <16 x i32> %2 to <8 x i64>7238 %extract.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7239 %extract4.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7240 %and28.i = and <4 x i64> %extract.i, %extract4.i7241 %extract5.i = shufflevector <4 x i64> %and28.i, <4 x i64> undef, <2 x i32> <i32 0, i32 1>7242 %extract6.i = shufflevector <4 x i64> %and28.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>7243 %and729.i = and <2 x i64> %extract5.i, %extract6.i7244 %and7.i = bitcast <2 x i64> %and729.i to <4 x i32>7245 %shuffle.i = shufflevector <4 x i32> %and7.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>7246 %and8.i = and <4 x i32> %shuffle.i, %and7.i7247 %shuffle9.i = shufflevector <4 x i32> %and8.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>7248 %and10.i = and <4 x i32> %shuffle9.i, %and8.i7249 %vecext.i = extractelement <4 x i32> %and10.i, i32 07250 ret i32 %vecext.i7251}7252 7253define i32 @test_mm512_mask_reduce_or_epi32(i16 zeroext %__M, <8 x i64> %__W) {7254; X86-LABEL: test_mm512_mask_reduce_or_epi32:7255; X86: # %bb.0: # %entry7256; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax7257; X86-NEXT: kmovw %eax, %k17258; X86-NEXT: vmovdqa32 %zmm0, %zmm0 {%k1} {z}7259; X86-NEXT: vextracti64x4 $1, %zmm0, %ymm17260; X86-NEXT: vpor %ymm1, %ymm0, %ymm07261; X86-NEXT: vextracti128 $1, %ymm0, %xmm17262; X86-NEXT: vpor %xmm1, %xmm0, %xmm07263; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7264; X86-NEXT: vpor %xmm0, %xmm1, %xmm07265; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]7266; X86-NEXT: vpor %xmm0, %xmm1, %xmm07267; X86-NEXT: vmovd %xmm0, %eax7268; X86-NEXT: vzeroupper7269; X86-NEXT: retl7270;7271; X64-LABEL: test_mm512_mask_reduce_or_epi32:7272; X64: # %bb.0: # %entry7273; X64-NEXT: kmovw %edi, %k17274; X64-NEXT: vmovdqa32 %zmm0, %zmm0 {%k1} {z}7275; X64-NEXT: vextracti64x4 $1, %zmm0, %ymm17276; X64-NEXT: vpor %ymm1, %ymm0, %ymm07277; X64-NEXT: vextracti128 $1, %ymm0, %xmm17278; X64-NEXT: vpor %xmm1, %xmm0, %xmm07279; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7280; X64-NEXT: vpor %xmm0, %xmm1, %xmm07281; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]7282; X64-NEXT: vpor %xmm0, %xmm1, %xmm07283; X64-NEXT: vmovd %xmm0, %eax7284; X64-NEXT: vzeroupper7285; X64-NEXT: retq7286entry:7287 %0 = bitcast <8 x i64> %__W to <16 x i32>7288 %1 = bitcast i16 %__M to <16 x i1>7289 %2 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> zeroinitializer7290 %3 = bitcast <16 x i32> %2 to <8 x i64>7291 %extract.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7292 %extract3.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7293 %or27.i = or <4 x i64> %extract.i, %extract3.i7294 %extract4.i = shufflevector <4 x i64> %or27.i, <4 x i64> undef, <2 x i32> <i32 0, i32 1>7295 %extract5.i = shufflevector <4 x i64> %or27.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>7296 %or628.i = or <2 x i64> %extract4.i, %extract5.i7297 %or6.i = bitcast <2 x i64> %or628.i to <4 x i32>7298 %shuffle.i = shufflevector <4 x i32> %or6.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>7299 %or7.i = or <4 x i32> %shuffle.i, %or6.i7300 %shuffle8.i = shufflevector <4 x i32> %or7.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>7301 %or9.i = or <4 x i32> %shuffle8.i, %or7.i7302 %vecext.i = extractelement <4 x i32> %or9.i, i32 07303 ret i32 %vecext.i7304}7305 7306define double @test_mm512_reduce_add_pd(<8 x double> %__W) {7307; X86-LABEL: test_mm512_reduce_add_pd:7308; X86: # %bb.0: # %entry7309; X86-NEXT: pushl %ebp7310; X86-NEXT: .cfi_def_cfa_offset 87311; X86-NEXT: .cfi_offset %ebp, -87312; X86-NEXT: movl %esp, %ebp7313; X86-NEXT: .cfi_def_cfa_register %ebp7314; X86-NEXT: andl $-8, %esp7315; X86-NEXT: subl $8, %esp7316; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm17317; X86-NEXT: vaddpd %ymm1, %ymm0, %ymm07318; X86-NEXT: vextractf128 $1, %ymm0, %xmm17319; X86-NEXT: vaddpd %xmm1, %xmm0, %xmm07320; X86-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7321; X86-NEXT: vaddsd %xmm1, %xmm0, %xmm07322; X86-NEXT: vmovsd %xmm0, (%esp)7323; X86-NEXT: fldl (%esp)7324; X86-NEXT: movl %ebp, %esp7325; X86-NEXT: popl %ebp7326; X86-NEXT: .cfi_def_cfa %esp, 47327; X86-NEXT: vzeroupper7328; X86-NEXT: retl7329;7330; X64-LABEL: test_mm512_reduce_add_pd:7331; X64: # %bb.0: # %entry7332; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm17333; X64-NEXT: vaddpd %ymm1, %ymm0, %ymm07334; X64-NEXT: vextractf128 $1, %ymm0, %xmm17335; X64-NEXT: vaddpd %xmm1, %xmm0, %xmm07336; X64-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7337; X64-NEXT: vaddsd %xmm1, %xmm0, %xmm07338; X64-NEXT: vzeroupper7339; X64-NEXT: retq7340entry:7341 %shuffle.i = shufflevector <8 x double> %__W, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7342 %shuffle1.i = shufflevector <8 x double> %__W, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7343 %add.i = fadd <4 x double> %shuffle.i, %shuffle1.i7344 %shuffle2.i = shufflevector <4 x double> %add.i, <4 x double> undef, <2 x i32> <i32 0, i32 1>7345 %shuffle3.i = shufflevector <4 x double> %add.i, <4 x double> undef, <2 x i32> <i32 2, i32 3>7346 %add4.i = fadd <2 x double> %shuffle2.i, %shuffle3.i7347 %shuffle6.i = shufflevector <2 x double> %add4.i, <2 x double> undef, <2 x i32> <i32 1, i32 0>7348 %add7.i = fadd <2 x double> %add4.i, %shuffle6.i7349 %vecext.i = extractelement <2 x double> %add7.i, i32 07350 ret double %vecext.i7351}7352 7353define double @test_mm512_reduce_mul_pd(<8 x double> %__W) {7354; X86-LABEL: test_mm512_reduce_mul_pd:7355; X86: # %bb.0: # %entry7356; X86-NEXT: pushl %ebp7357; X86-NEXT: .cfi_def_cfa_offset 87358; X86-NEXT: .cfi_offset %ebp, -87359; X86-NEXT: movl %esp, %ebp7360; X86-NEXT: .cfi_def_cfa_register %ebp7361; X86-NEXT: andl $-8, %esp7362; X86-NEXT: subl $8, %esp7363; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm17364; X86-NEXT: vmulpd %ymm1, %ymm0, %ymm07365; X86-NEXT: vextractf128 $1, %ymm0, %xmm17366; X86-NEXT: vmulpd %xmm1, %xmm0, %xmm07367; X86-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7368; X86-NEXT: vmulsd %xmm1, %xmm0, %xmm07369; X86-NEXT: vmovsd %xmm0, (%esp)7370; X86-NEXT: fldl (%esp)7371; X86-NEXT: movl %ebp, %esp7372; X86-NEXT: popl %ebp7373; X86-NEXT: .cfi_def_cfa %esp, 47374; X86-NEXT: vzeroupper7375; X86-NEXT: retl7376;7377; X64-LABEL: test_mm512_reduce_mul_pd:7378; X64: # %bb.0: # %entry7379; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm17380; X64-NEXT: vmulpd %ymm1, %ymm0, %ymm07381; X64-NEXT: vextractf128 $1, %ymm0, %xmm17382; X64-NEXT: vmulpd %xmm1, %xmm0, %xmm07383; X64-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7384; X64-NEXT: vmulsd %xmm1, %xmm0, %xmm07385; X64-NEXT: vzeroupper7386; X64-NEXT: retq7387entry:7388 %shuffle.i = shufflevector <8 x double> %__W, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7389 %shuffle1.i = shufflevector <8 x double> %__W, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7390 %mul.i = fmul <4 x double> %shuffle.i, %shuffle1.i7391 %shuffle2.i = shufflevector <4 x double> %mul.i, <4 x double> undef, <2 x i32> <i32 0, i32 1>7392 %shuffle3.i = shufflevector <4 x double> %mul.i, <4 x double> undef, <2 x i32> <i32 2, i32 3>7393 %mul4.i = fmul <2 x double> %shuffle2.i, %shuffle3.i7394 %shuffle6.i = shufflevector <2 x double> %mul4.i, <2 x double> undef, <2 x i32> <i32 1, i32 0>7395 %mul7.i = fmul <2 x double> %mul4.i, %shuffle6.i7396 %vecext.i = extractelement <2 x double> %mul7.i, i32 07397 ret double %vecext.i7398}7399 7400define float @test_mm512_reduce_add_ps(<16 x float> %__W) {7401; X86-LABEL: test_mm512_reduce_add_ps:7402; X86: # %bb.0: # %entry7403; X86-NEXT: pushl %eax7404; X86-NEXT: .cfi_def_cfa_offset 87405; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm17406; X86-NEXT: vaddps %ymm1, %ymm0, %ymm07407; X86-NEXT: vextractf128 $1, %ymm0, %xmm17408; X86-NEXT: vaddps %xmm1, %xmm0, %xmm07409; X86-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7410; X86-NEXT: vaddps %xmm1, %xmm0, %xmm07411; X86-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]7412; X86-NEXT: vaddss %xmm1, %xmm0, %xmm07413; X86-NEXT: vmovss %xmm0, (%esp)7414; X86-NEXT: flds (%esp)7415; X86-NEXT: popl %eax7416; X86-NEXT: .cfi_def_cfa_offset 47417; X86-NEXT: vzeroupper7418; X86-NEXT: retl7419;7420; X64-LABEL: test_mm512_reduce_add_ps:7421; X64: # %bb.0: # %entry7422; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm17423; X64-NEXT: vaddps %ymm1, %ymm0, %ymm07424; X64-NEXT: vextractf128 $1, %ymm0, %xmm17425; X64-NEXT: vaddps %xmm1, %xmm0, %xmm07426; X64-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7427; X64-NEXT: vaddps %xmm1, %xmm0, %xmm07428; X64-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]7429; X64-NEXT: vaddss %xmm1, %xmm0, %xmm07430; X64-NEXT: vzeroupper7431; X64-NEXT: retq7432entry:7433 %0 = bitcast <16 x float> %__W to <8 x double>7434 %extract.i = shufflevector <8 x double> %0, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7435 %1 = bitcast <4 x double> %extract.i to <8 x float>7436 %extract2.i = shufflevector <8 x double> %0, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7437 %2 = bitcast <4 x double> %extract2.i to <8 x float>7438 %add.i = fadd <8 x float> %1, %27439 %extract3.i = shufflevector <8 x float> %add.i, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7440 %extract4.i = shufflevector <8 x float> %add.i, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7441 %add5.i = fadd <4 x float> %extract3.i, %extract4.i7442 %shuffle.i = shufflevector <4 x float> %add5.i, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>7443 %add6.i = fadd <4 x float> %add5.i, %shuffle.i7444 %shuffle7.i = shufflevector <4 x float> %add6.i, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>7445 %add8.i = fadd <4 x float> %add6.i, %shuffle7.i7446 %vecext.i = extractelement <4 x float> %add8.i, i32 07447 ret float %vecext.i7448}7449 7450define float @test_mm512_reduce_mul_ps(<16 x float> %__W) {7451; X86-LABEL: test_mm512_reduce_mul_ps:7452; X86: # %bb.0: # %entry7453; X86-NEXT: pushl %eax7454; X86-NEXT: .cfi_def_cfa_offset 87455; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm17456; X86-NEXT: vmulps %ymm1, %ymm0, %ymm07457; X86-NEXT: vextractf128 $1, %ymm0, %xmm17458; X86-NEXT: vmulps %xmm1, %xmm0, %xmm07459; X86-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7460; X86-NEXT: vmulps %xmm1, %xmm0, %xmm07461; X86-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]7462; X86-NEXT: vmulss %xmm1, %xmm0, %xmm07463; X86-NEXT: vmovss %xmm0, (%esp)7464; X86-NEXT: flds (%esp)7465; X86-NEXT: popl %eax7466; X86-NEXT: .cfi_def_cfa_offset 47467; X86-NEXT: vzeroupper7468; X86-NEXT: retl7469;7470; X64-LABEL: test_mm512_reduce_mul_ps:7471; X64: # %bb.0: # %entry7472; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm17473; X64-NEXT: vmulps %ymm1, %ymm0, %ymm07474; X64-NEXT: vextractf128 $1, %ymm0, %xmm17475; X64-NEXT: vmulps %xmm1, %xmm0, %xmm07476; X64-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7477; X64-NEXT: vmulps %xmm1, %xmm0, %xmm07478; X64-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]7479; X64-NEXT: vmulss %xmm1, %xmm0, %xmm07480; X64-NEXT: vzeroupper7481; X64-NEXT: retq7482entry:7483 %0 = bitcast <16 x float> %__W to <8 x double>7484 %extract.i = shufflevector <8 x double> %0, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7485 %1 = bitcast <4 x double> %extract.i to <8 x float>7486 %extract2.i = shufflevector <8 x double> %0, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7487 %2 = bitcast <4 x double> %extract2.i to <8 x float>7488 %mul.i = fmul <8 x float> %1, %27489 %extract3.i = shufflevector <8 x float> %mul.i, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7490 %extract4.i = shufflevector <8 x float> %mul.i, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7491 %mul5.i = fmul <4 x float> %extract3.i, %extract4.i7492 %shuffle.i = shufflevector <4 x float> %mul5.i, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>7493 %mul6.i = fmul <4 x float> %mul5.i, %shuffle.i7494 %shuffle7.i = shufflevector <4 x float> %mul6.i, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>7495 %mul8.i = fmul <4 x float> %mul6.i, %shuffle7.i7496 %vecext.i = extractelement <4 x float> %mul8.i, i32 07497 ret float %vecext.i7498}7499 7500define double @test_mm512_mask_reduce_add_pd(i8 zeroext %__M, <8 x double> %__W) {7501; X86-LABEL: test_mm512_mask_reduce_add_pd:7502; X86: # %bb.0: # %entry7503; X86-NEXT: pushl %ebp7504; X86-NEXT: .cfi_def_cfa_offset 87505; X86-NEXT: .cfi_offset %ebp, -87506; X86-NEXT: movl %esp, %ebp7507; X86-NEXT: .cfi_def_cfa_register %ebp7508; X86-NEXT: andl $-8, %esp7509; X86-NEXT: subl $8, %esp7510; X86-NEXT: movzbl 8(%ebp), %eax7511; X86-NEXT: kmovw %eax, %k17512; X86-NEXT: vmovapd %zmm0, %zmm0 {%k1} {z}7513; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm17514; X86-NEXT: vaddpd %ymm1, %ymm0, %ymm07515; X86-NEXT: vextractf128 $1, %ymm0, %xmm17516; X86-NEXT: vaddpd %xmm1, %xmm0, %xmm07517; X86-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7518; X86-NEXT: vaddsd %xmm1, %xmm0, %xmm07519; X86-NEXT: vmovsd %xmm0, (%esp)7520; X86-NEXT: fldl (%esp)7521; X86-NEXT: movl %ebp, %esp7522; X86-NEXT: popl %ebp7523; X86-NEXT: .cfi_def_cfa %esp, 47524; X86-NEXT: vzeroupper7525; X86-NEXT: retl7526;7527; X64-LABEL: test_mm512_mask_reduce_add_pd:7528; X64: # %bb.0: # %entry7529; X64-NEXT: kmovw %edi, %k17530; X64-NEXT: vmovapd %zmm0, %zmm0 {%k1} {z}7531; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm17532; X64-NEXT: vaddpd %ymm1, %ymm0, %ymm07533; X64-NEXT: vextractf128 $1, %ymm0, %xmm17534; X64-NEXT: vaddpd %xmm1, %xmm0, %xmm07535; X64-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7536; X64-NEXT: vaddsd %xmm1, %xmm0, %xmm07537; X64-NEXT: vzeroupper7538; X64-NEXT: retq7539entry:7540 %0 = bitcast i8 %__M to <8 x i1>7541 %1 = select <8 x i1> %0, <8 x double> %__W, <8 x double> zeroinitializer7542 %shuffle.i = shufflevector <8 x double> %1, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7543 %shuffle1.i = shufflevector <8 x double> %1, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7544 %add.i = fadd <4 x double> %shuffle.i, %shuffle1.i7545 %shuffle2.i = shufflevector <4 x double> %add.i, <4 x double> undef, <2 x i32> <i32 0, i32 1>7546 %shuffle3.i = shufflevector <4 x double> %add.i, <4 x double> undef, <2 x i32> <i32 2, i32 3>7547 %add4.i = fadd <2 x double> %shuffle2.i, %shuffle3.i7548 %shuffle6.i = shufflevector <2 x double> %add4.i, <2 x double> undef, <2 x i32> <i32 1, i32 0>7549 %add7.i = fadd <2 x double> %add4.i, %shuffle6.i7550 %vecext.i = extractelement <2 x double> %add7.i, i32 07551 ret double %vecext.i7552}7553 7554define double @test_mm512_mask_reduce_mul_pd(i8 zeroext %__M, <8 x double> %__W) {7555; X86-LABEL: test_mm512_mask_reduce_mul_pd:7556; X86: # %bb.0: # %entry7557; X86-NEXT: pushl %ebp7558; X86-NEXT: .cfi_def_cfa_offset 87559; X86-NEXT: .cfi_offset %ebp, -87560; X86-NEXT: movl %esp, %ebp7561; X86-NEXT: .cfi_def_cfa_register %ebp7562; X86-NEXT: andl $-8, %esp7563; X86-NEXT: subl $8, %esp7564; X86-NEXT: movzbl 8(%ebp), %eax7565; X86-NEXT: kmovw %eax, %k17566; X86-NEXT: vbroadcastsd {{.*#+}} zmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]7567; X86-NEXT: vmovapd %zmm0, %zmm1 {%k1}7568; X86-NEXT: vextractf64x4 $1, %zmm1, %ymm07569; X86-NEXT: vmulpd %ymm0, %ymm1, %ymm07570; X86-NEXT: vextractf128 $1, %ymm0, %xmm17571; X86-NEXT: vmulpd %xmm1, %xmm0, %xmm07572; X86-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7573; X86-NEXT: vmulsd %xmm1, %xmm0, %xmm07574; X86-NEXT: vmovsd %xmm0, (%esp)7575; X86-NEXT: fldl (%esp)7576; X86-NEXT: movl %ebp, %esp7577; X86-NEXT: popl %ebp7578; X86-NEXT: .cfi_def_cfa %esp, 47579; X86-NEXT: vzeroupper7580; X86-NEXT: retl7581;7582; X64-LABEL: test_mm512_mask_reduce_mul_pd:7583; X64: # %bb.0: # %entry7584; X64-NEXT: kmovw %edi, %k17585; X64-NEXT: vbroadcastsd {{.*#+}} zmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]7586; X64-NEXT: vmovapd %zmm0, %zmm1 {%k1}7587; X64-NEXT: vextractf64x4 $1, %zmm1, %ymm07588; X64-NEXT: vmulpd %ymm0, %ymm1, %ymm07589; X64-NEXT: vextractf128 $1, %ymm0, %xmm17590; X64-NEXT: vmulpd %xmm1, %xmm0, %xmm07591; X64-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7592; X64-NEXT: vmulsd %xmm1, %xmm0, %xmm07593; X64-NEXT: vzeroupper7594; X64-NEXT: retq7595entry:7596 %0 = bitcast i8 %__M to <8 x i1>7597 %1 = select <8 x i1> %0, <8 x double> %__W, <8 x double> <double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00>7598 %shuffle.i = shufflevector <8 x double> %1, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7599 %shuffle1.i = shufflevector <8 x double> %1, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7600 %mul.i = fmul <4 x double> %shuffle.i, %shuffle1.i7601 %shuffle2.i = shufflevector <4 x double> %mul.i, <4 x double> undef, <2 x i32> <i32 0, i32 1>7602 %shuffle3.i = shufflevector <4 x double> %mul.i, <4 x double> undef, <2 x i32> <i32 2, i32 3>7603 %mul4.i = fmul <2 x double> %shuffle2.i, %shuffle3.i7604 %shuffle6.i = shufflevector <2 x double> %mul4.i, <2 x double> undef, <2 x i32> <i32 1, i32 0>7605 %mul7.i = fmul <2 x double> %mul4.i, %shuffle6.i7606 %vecext.i = extractelement <2 x double> %mul7.i, i32 07607 ret double %vecext.i7608}7609 7610define float @test_mm512_mask_reduce_add_ps(i16 zeroext %__M, <16 x float> %__W) {7611; X86-LABEL: test_mm512_mask_reduce_add_ps:7612; X86: # %bb.0: # %entry7613; X86-NEXT: pushl %eax7614; X86-NEXT: .cfi_def_cfa_offset 87615; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax7616; X86-NEXT: kmovw %eax, %k17617; X86-NEXT: vmovaps %zmm0, %zmm0 {%k1} {z}7618; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm17619; X86-NEXT: vaddps %ymm1, %ymm0, %ymm07620; X86-NEXT: vextractf128 $1, %ymm0, %xmm17621; X86-NEXT: vaddps %xmm1, %xmm0, %xmm07622; X86-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7623; X86-NEXT: vaddps %xmm1, %xmm0, %xmm07624; X86-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]7625; X86-NEXT: vaddss %xmm1, %xmm0, %xmm07626; X86-NEXT: vmovss %xmm0, (%esp)7627; X86-NEXT: flds (%esp)7628; X86-NEXT: popl %eax7629; X86-NEXT: .cfi_def_cfa_offset 47630; X86-NEXT: vzeroupper7631; X86-NEXT: retl7632;7633; X64-LABEL: test_mm512_mask_reduce_add_ps:7634; X64: # %bb.0: # %entry7635; X64-NEXT: kmovw %edi, %k17636; X64-NEXT: vmovaps %zmm0, %zmm0 {%k1} {z}7637; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm17638; X64-NEXT: vaddps %ymm1, %ymm0, %ymm07639; X64-NEXT: vextractf128 $1, %ymm0, %xmm17640; X64-NEXT: vaddps %xmm1, %xmm0, %xmm07641; X64-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7642; X64-NEXT: vaddps %xmm1, %xmm0, %xmm07643; X64-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]7644; X64-NEXT: vaddss %xmm1, %xmm0, %xmm07645; X64-NEXT: vzeroupper7646; X64-NEXT: retq7647entry:7648 %0 = bitcast i16 %__M to <16 x i1>7649 %1 = select <16 x i1> %0, <16 x float> %__W, <16 x float> zeroinitializer7650 %2 = bitcast <16 x float> %1 to <8 x double>7651 %extract.i = shufflevector <8 x double> %2, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7652 %3 = bitcast <4 x double> %extract.i to <8 x float>7653 %extract3.i = shufflevector <8 x double> %2, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7654 %4 = bitcast <4 x double> %extract3.i to <8 x float>7655 %add.i = fadd <8 x float> %3, %47656 %extract4.i = shufflevector <8 x float> %add.i, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7657 %extract5.i = shufflevector <8 x float> %add.i, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7658 %add6.i = fadd <4 x float> %extract4.i, %extract5.i7659 %shuffle.i = shufflevector <4 x float> %add6.i, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>7660 %add7.i = fadd <4 x float> %add6.i, %shuffle.i7661 %shuffle8.i = shufflevector <4 x float> %add7.i, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>7662 %add9.i = fadd <4 x float> %add7.i, %shuffle8.i7663 %vecext.i = extractelement <4 x float> %add9.i, i32 07664 ret float %vecext.i7665}7666 7667define float @test_mm512_mask_reduce_mul_ps(i16 zeroext %__M, <16 x float> %__W) {7668; X86-LABEL: test_mm512_mask_reduce_mul_ps:7669; X86: # %bb.0: # %entry7670; X86-NEXT: pushl %eax7671; X86-NEXT: .cfi_def_cfa_offset 87672; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax7673; X86-NEXT: kmovw %eax, %k17674; X86-NEXT: vbroadcastss {{.*#+}} zmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]7675; X86-NEXT: vmovaps %zmm0, %zmm1 {%k1}7676; X86-NEXT: vextractf64x4 $1, %zmm1, %ymm07677; X86-NEXT: vmulps %ymm0, %ymm1, %ymm07678; X86-NEXT: vextractf128 $1, %ymm0, %xmm17679; X86-NEXT: vmulps %xmm1, %xmm0, %xmm07680; X86-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7681; X86-NEXT: vmulps %xmm1, %xmm0, %xmm07682; X86-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]7683; X86-NEXT: vmulss %xmm1, %xmm0, %xmm07684; X86-NEXT: vmovss %xmm0, (%esp)7685; X86-NEXT: flds (%esp)7686; X86-NEXT: popl %eax7687; X86-NEXT: .cfi_def_cfa_offset 47688; X86-NEXT: vzeroupper7689; X86-NEXT: retl7690;7691; X64-LABEL: test_mm512_mask_reduce_mul_ps:7692; X64: # %bb.0: # %entry7693; X64-NEXT: kmovw %edi, %k17694; X64-NEXT: vbroadcastss {{.*#+}} zmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]7695; X64-NEXT: vmovaps %zmm0, %zmm1 {%k1}7696; X64-NEXT: vextractf64x4 $1, %zmm1, %ymm07697; X64-NEXT: vmulps %ymm0, %ymm1, %ymm07698; X64-NEXT: vextractf128 $1, %ymm0, %xmm17699; X64-NEXT: vmulps %xmm1, %xmm0, %xmm07700; X64-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7701; X64-NEXT: vmulps %xmm1, %xmm0, %xmm07702; X64-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]7703; X64-NEXT: vmulss %xmm1, %xmm0, %xmm07704; X64-NEXT: vzeroupper7705; X64-NEXT: retq7706entry:7707 %0 = bitcast i16 %__M to <16 x i1>7708 %1 = select <16 x i1> %0, <16 x float> %__W, <16 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>7709 %2 = bitcast <16 x float> %1 to <8 x double>7710 %extract.i = shufflevector <8 x double> %2, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7711 %3 = bitcast <4 x double> %extract.i to <8 x float>7712 %extract4.i = shufflevector <8 x double> %2, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7713 %4 = bitcast <4 x double> %extract4.i to <8 x float>7714 %mul.i = fmul <8 x float> %3, %47715 %extract5.i = shufflevector <8 x float> %mul.i, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7716 %extract6.i = shufflevector <8 x float> %mul.i, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7717 %mul7.i = fmul <4 x float> %extract5.i, %extract6.i7718 %shuffle.i = shufflevector <4 x float> %mul7.i, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>7719 %mul8.i = fmul <4 x float> %mul7.i, %shuffle.i7720 %shuffle9.i = shufflevector <4 x float> %mul8.i, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>7721 %mul10.i = fmul <4 x float> %mul8.i, %shuffle9.i7722 %vecext.i = extractelement <4 x float> %mul10.i, i32 07723 ret float %vecext.i7724}7725 7726define i64 @test_mm512_reduce_max_epi64(<8 x i64> %__W) {7727; X86-LABEL: test_mm512_reduce_max_epi64:7728; X86: # %bb.0: # %entry7729; X86-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]7730; X86-NEXT: vpmaxsq %zmm0, %zmm1, %zmm07731; X86-NEXT: vextracti128 $1, %ymm0, %xmm17732; X86-NEXT: vpmaxsq %zmm1, %zmm0, %zmm07733; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7734; X86-NEXT: vpmaxsq %zmm1, %zmm0, %zmm07735; X86-NEXT: vmovd %xmm0, %eax7736; X86-NEXT: vpextrd $1, %xmm0, %edx7737; X86-NEXT: vzeroupper7738; X86-NEXT: retl7739;7740; X64-LABEL: test_mm512_reduce_max_epi64:7741; X64: # %bb.0: # %entry7742; X64-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]7743; X64-NEXT: vpmaxsq %zmm0, %zmm1, %zmm07744; X64-NEXT: vextracti128 $1, %ymm0, %xmm17745; X64-NEXT: vpmaxsq %zmm1, %zmm0, %zmm07746; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7747; X64-NEXT: vpmaxsq %zmm1, %zmm0, %zmm07748; X64-NEXT: vmovq %xmm0, %rax7749; X64-NEXT: vzeroupper7750; X64-NEXT: retq7751entry:7752 %shuffle.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>7753 %0 = icmp slt <8 x i64> %shuffle.i, %__W7754 %1 = select <8 x i1> %0, <8 x i64> %__W, <8 x i64> %shuffle.i7755 %shuffle1.i = shufflevector <8 x i64> %1, <8 x i64> undef, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5>7756 %2 = icmp sgt <8 x i64> %1, %shuffle1.i7757 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %shuffle1.i7758 %shuffle3.i = shufflevector <8 x i64> %3, <8 x i64> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>7759 %4 = icmp sgt <8 x i64> %3, %shuffle3.i7760 %5 = select <8 x i1> %4, <8 x i64> %3, <8 x i64> %shuffle3.i7761 %vecext.i = extractelement <8 x i64> %5, i32 07762 ret i64 %vecext.i7763}7764 7765define i64 @test_mm512_reduce_max_epu64(<8 x i64> %__W) {7766; X86-LABEL: test_mm512_reduce_max_epu64:7767; X86: # %bb.0: # %entry7768; X86-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]7769; X86-NEXT: vpmaxuq %zmm0, %zmm1, %zmm07770; X86-NEXT: vextracti128 $1, %ymm0, %xmm17771; X86-NEXT: vpmaxuq %zmm1, %zmm0, %zmm07772; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7773; X86-NEXT: vpmaxuq %zmm1, %zmm0, %zmm07774; X86-NEXT: vmovd %xmm0, %eax7775; X86-NEXT: vpextrd $1, %xmm0, %edx7776; X86-NEXT: vzeroupper7777; X86-NEXT: retl7778;7779; X64-LABEL: test_mm512_reduce_max_epu64:7780; X64: # %bb.0: # %entry7781; X64-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]7782; X64-NEXT: vpmaxuq %zmm0, %zmm1, %zmm07783; X64-NEXT: vextracti128 $1, %ymm0, %xmm17784; X64-NEXT: vpmaxuq %zmm1, %zmm0, %zmm07785; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7786; X64-NEXT: vpmaxuq %zmm1, %zmm0, %zmm07787; X64-NEXT: vmovq %xmm0, %rax7788; X64-NEXT: vzeroupper7789; X64-NEXT: retq7790entry:7791 %shuffle.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>7792 %0 = icmp ult <8 x i64> %shuffle.i, %__W7793 %1 = select <8 x i1> %0, <8 x i64> %__W, <8 x i64> %shuffle.i7794 %shuffle1.i = shufflevector <8 x i64> %1, <8 x i64> undef, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5>7795 %2 = icmp ugt <8 x i64> %1, %shuffle1.i7796 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %shuffle1.i7797 %shuffle3.i = shufflevector <8 x i64> %3, <8 x i64> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>7798 %4 = icmp ugt <8 x i64> %3, %shuffle3.i7799 %5 = select <8 x i1> %4, <8 x i64> %3, <8 x i64> %shuffle3.i7800 %vecext.i = extractelement <8 x i64> %5, i32 07801 ret i64 %vecext.i7802}7803 7804define double @test_mm512_reduce_max_pd(<8 x double> %__W) {7805; X86-LABEL: test_mm512_reduce_max_pd:7806; X86: # %bb.0: # %entry7807; X86-NEXT: pushl %ebp7808; X86-NEXT: .cfi_def_cfa_offset 87809; X86-NEXT: .cfi_offset %ebp, -87810; X86-NEXT: movl %esp, %ebp7811; X86-NEXT: .cfi_def_cfa_register %ebp7812; X86-NEXT: andl $-8, %esp7813; X86-NEXT: subl $8, %esp7814; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm17815; X86-NEXT: vmaxpd %ymm1, %ymm0, %ymm07816; X86-NEXT: vextractf128 $1, %ymm0, %xmm17817; X86-NEXT: vmaxpd %xmm1, %xmm0, %xmm07818; X86-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7819; X86-NEXT: vmaxsd %xmm1, %xmm0, %xmm07820; X86-NEXT: vmovsd %xmm0, (%esp)7821; X86-NEXT: fldl (%esp)7822; X86-NEXT: movl %ebp, %esp7823; X86-NEXT: popl %ebp7824; X86-NEXT: .cfi_def_cfa %esp, 47825; X86-NEXT: vzeroupper7826; X86-NEXT: retl7827;7828; X64-LABEL: test_mm512_reduce_max_pd:7829; X64: # %bb.0: # %entry7830; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm17831; X64-NEXT: vmaxpd %ymm1, %ymm0, %ymm07832; X64-NEXT: vextractf128 $1, %ymm0, %xmm17833; X64-NEXT: vmaxpd %xmm1, %xmm0, %xmm07834; X64-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7835; X64-NEXT: vmaxsd %xmm1, %xmm0, %xmm07836; X64-NEXT: vzeroupper7837; X64-NEXT: retq7838entry:7839 %extract.i = shufflevector <8 x double> %__W, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7840 %extract2.i = shufflevector <8 x double> %__W, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7841 %0 = tail call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %extract.i, <4 x double> %extract2.i)7842 %extract4.i = shufflevector <4 x double> %0, <4 x double> undef, <2 x i32> <i32 0, i32 1>7843 %extract5.i = shufflevector <4 x double> %0, <4 x double> undef, <2 x i32> <i32 2, i32 3>7844 %1 = tail call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %extract4.i, <2 x double> %extract5.i)7845 %shuffle.i = shufflevector <2 x double> %1, <2 x double> undef, <2 x i32> <i32 1, i32 0>7846 %2 = tail call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %1, <2 x double> %shuffle.i)7847 %vecext.i = extractelement <2 x double> %2, i32 07848 ret double %vecext.i7849}7850 7851define i64 @test_mm512_reduce_min_epi64(<8 x i64> %__W) {7852; X86-LABEL: test_mm512_reduce_min_epi64:7853; X86: # %bb.0: # %entry7854; X86-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]7855; X86-NEXT: vpminsq %zmm0, %zmm1, %zmm07856; X86-NEXT: vextracti128 $1, %ymm0, %xmm17857; X86-NEXT: vpminsq %zmm1, %zmm0, %zmm07858; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7859; X86-NEXT: vpminsq %zmm1, %zmm0, %zmm07860; X86-NEXT: vmovd %xmm0, %eax7861; X86-NEXT: vpextrd $1, %xmm0, %edx7862; X86-NEXT: vzeroupper7863; X86-NEXT: retl7864;7865; X64-LABEL: test_mm512_reduce_min_epi64:7866; X64: # %bb.0: # %entry7867; X64-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]7868; X64-NEXT: vpminsq %zmm0, %zmm1, %zmm07869; X64-NEXT: vextracti128 $1, %ymm0, %xmm17870; X64-NEXT: vpminsq %zmm1, %zmm0, %zmm07871; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7872; X64-NEXT: vpminsq %zmm1, %zmm0, %zmm07873; X64-NEXT: vmovq %xmm0, %rax7874; X64-NEXT: vzeroupper7875; X64-NEXT: retq7876entry:7877 %shuffle.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>7878 %0 = icmp sgt <8 x i64> %shuffle.i, %__W7879 %1 = select <8 x i1> %0, <8 x i64> %__W, <8 x i64> %shuffle.i7880 %shuffle1.i = shufflevector <8 x i64> %1, <8 x i64> undef, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5>7881 %2 = icmp slt <8 x i64> %1, %shuffle1.i7882 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %shuffle1.i7883 %shuffle3.i = shufflevector <8 x i64> %3, <8 x i64> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>7884 %4 = icmp slt <8 x i64> %3, %shuffle3.i7885 %5 = select <8 x i1> %4, <8 x i64> %3, <8 x i64> %shuffle3.i7886 %vecext.i = extractelement <8 x i64> %5, i32 07887 ret i64 %vecext.i7888}7889 7890define i64 @test_mm512_reduce_min_epu64(<8 x i64> %__W) {7891; X86-LABEL: test_mm512_reduce_min_epu64:7892; X86: # %bb.0: # %entry7893; X86-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]7894; X86-NEXT: vpminuq %zmm0, %zmm1, %zmm07895; X86-NEXT: vextracti128 $1, %ymm0, %xmm17896; X86-NEXT: vpminuq %zmm1, %zmm0, %zmm07897; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7898; X86-NEXT: vpminuq %zmm1, %zmm0, %zmm07899; X86-NEXT: vmovd %xmm0, %eax7900; X86-NEXT: vpextrd $1, %xmm0, %edx7901; X86-NEXT: vzeroupper7902; X86-NEXT: retl7903;7904; X64-LABEL: test_mm512_reduce_min_epu64:7905; X64: # %bb.0: # %entry7906; X64-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]7907; X64-NEXT: vpminuq %zmm0, %zmm1, %zmm07908; X64-NEXT: vextracti128 $1, %ymm0, %xmm17909; X64-NEXT: vpminuq %zmm1, %zmm0, %zmm07910; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7911; X64-NEXT: vpminuq %zmm1, %zmm0, %zmm07912; X64-NEXT: vmovq %xmm0, %rax7913; X64-NEXT: vzeroupper7914; X64-NEXT: retq7915entry:7916 %shuffle.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>7917 %0 = icmp ugt <8 x i64> %shuffle.i, %__W7918 %1 = select <8 x i1> %0, <8 x i64> %__W, <8 x i64> %shuffle.i7919 %shuffle1.i = shufflevector <8 x i64> %1, <8 x i64> undef, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5>7920 %2 = icmp ult <8 x i64> %1, %shuffle1.i7921 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %shuffle1.i7922 %shuffle3.i = shufflevector <8 x i64> %3, <8 x i64> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>7923 %4 = icmp ult <8 x i64> %3, %shuffle3.i7924 %5 = select <8 x i1> %4, <8 x i64> %3, <8 x i64> %shuffle3.i7925 %vecext.i = extractelement <8 x i64> %5, i32 07926 ret i64 %vecext.i7927}7928 7929define double @test_mm512_reduce_min_pd(<8 x double> %__W) {7930; X86-LABEL: test_mm512_reduce_min_pd:7931; X86: # %bb.0: # %entry7932; X86-NEXT: pushl %ebp7933; X86-NEXT: .cfi_def_cfa_offset 87934; X86-NEXT: .cfi_offset %ebp, -87935; X86-NEXT: movl %esp, %ebp7936; X86-NEXT: .cfi_def_cfa_register %ebp7937; X86-NEXT: andl $-8, %esp7938; X86-NEXT: subl $8, %esp7939; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm17940; X86-NEXT: vminpd %ymm1, %ymm0, %ymm07941; X86-NEXT: vextractf128 $1, %ymm0, %xmm17942; X86-NEXT: vminpd %xmm1, %xmm0, %xmm07943; X86-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7944; X86-NEXT: vminsd %xmm1, %xmm0, %xmm07945; X86-NEXT: vmovsd %xmm0, (%esp)7946; X86-NEXT: fldl (%esp)7947; X86-NEXT: movl %ebp, %esp7948; X86-NEXT: popl %ebp7949; X86-NEXT: .cfi_def_cfa %esp, 47950; X86-NEXT: vzeroupper7951; X86-NEXT: retl7952;7953; X64-LABEL: test_mm512_reduce_min_pd:7954; X64: # %bb.0: # %entry7955; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm17956; X64-NEXT: vminpd %ymm1, %ymm0, %ymm07957; X64-NEXT: vextractf128 $1, %ymm0, %xmm17958; X64-NEXT: vminpd %xmm1, %xmm0, %xmm07959; X64-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]7960; X64-NEXT: vminsd %xmm1, %xmm0, %xmm07961; X64-NEXT: vzeroupper7962; X64-NEXT: retq7963entry:7964 %extract.i = shufflevector <8 x double> %__W, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>7965 %extract2.i = shufflevector <8 x double> %__W, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7966 %0 = tail call <4 x double> @llvm.x86.avx.min.pd.256(<4 x double> %extract.i, <4 x double> %extract2.i)7967 %extract4.i = shufflevector <4 x double> %0, <4 x double> undef, <2 x i32> <i32 0, i32 1>7968 %extract5.i = shufflevector <4 x double> %0, <4 x double> undef, <2 x i32> <i32 2, i32 3>7969 %1 = tail call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %extract4.i, <2 x double> %extract5.i)7970 %shuffle.i = shufflevector <2 x double> %1, <2 x double> undef, <2 x i32> <i32 1, i32 0>7971 %2 = tail call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %1, <2 x double> %shuffle.i)7972 %vecext.i = extractelement <2 x double> %2, i32 07973 ret double %vecext.i7974}7975 7976define i64 @test_mm512_mask_reduce_max_epi64(i8 zeroext %__M, <8 x i64> %__W) {7977; X86-LABEL: test_mm512_mask_reduce_max_epi64:7978; X86: # %bb.0: # %entry7979; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax7980; X86-NEXT: kmovw %eax, %k17981; X86-NEXT: vpbroadcastq {{.*#+}} zmm1 = [0,2147483648,0,2147483648,0,2147483648,0,2147483648,0,2147483648,0,2147483648,0,2147483648,0,2147483648]7982; X86-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}7983; X86-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm1[4,5,6,7,0,1,2,3]7984; X86-NEXT: vpmaxsq %zmm0, %zmm1, %zmm07985; X86-NEXT: vextracti128 $1, %ymm0, %xmm17986; X86-NEXT: vpmaxsq %zmm1, %zmm0, %zmm07987; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]7988; X86-NEXT: vpmaxsq %zmm1, %zmm0, %zmm07989; X86-NEXT: vmovd %xmm0, %eax7990; X86-NEXT: vpextrd $1, %xmm0, %edx7991; X86-NEXT: vzeroupper7992; X86-NEXT: retl7993;7994; X64-LABEL: test_mm512_mask_reduce_max_epi64:7995; X64: # %bb.0: # %entry7996; X64-NEXT: kmovw %edi, %k17997; X64-NEXT: vpbroadcastq {{.*#+}} zmm1 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]7998; X64-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}7999; X64-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm1[4,5,6,7,0,1,2,3]8000; X64-NEXT: vpmaxsq %zmm0, %zmm1, %zmm08001; X64-NEXT: vextracti128 $1, %ymm0, %xmm18002; X64-NEXT: vpmaxsq %zmm1, %zmm0, %zmm08003; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8004; X64-NEXT: vpmaxsq %zmm1, %zmm0, %zmm08005; X64-NEXT: vmovq %xmm0, %rax8006; X64-NEXT: vzeroupper8007; X64-NEXT: retq8008entry:8009 %0 = bitcast i8 %__M to <8 x i1>8010 %1 = select <8 x i1> %0, <8 x i64> %__W, <8 x i64> <i64 -9223372036854775808, i64 -9223372036854775808, i64 -9223372036854775808, i64 -9223372036854775808, i64 -9223372036854775808, i64 -9223372036854775808, i64 -9223372036854775808, i64 -9223372036854775808>8011 %shuffle.i = shufflevector <8 x i64> %1, <8 x i64> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>8012 %2 = icmp sgt <8 x i64> %1, %shuffle.i8013 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %shuffle.i8014 %shuffle3.i = shufflevector <8 x i64> %3, <8 x i64> undef, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5>8015 %4 = icmp sgt <8 x i64> %3, %shuffle3.i8016 %5 = select <8 x i1> %4, <8 x i64> %3, <8 x i64> %shuffle3.i8017 %shuffle5.i = shufflevector <8 x i64> %5, <8 x i64> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>8018 %6 = icmp sgt <8 x i64> %5, %shuffle5.i8019 %7 = select <8 x i1> %6, <8 x i64> %5, <8 x i64> %shuffle5.i8020 %vecext.i = extractelement <8 x i64> %7, i32 08021 ret i64 %vecext.i8022}8023 8024define i64 @test_mm512_mask_reduce_max_epu64(i8 zeroext %__M, <8 x i64> %__W) {8025; X86-LABEL: test_mm512_mask_reduce_max_epu64:8026; X86: # %bb.0: # %entry8027; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax8028; X86-NEXT: kmovw %eax, %k18029; X86-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z}8030; X86-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]8031; X86-NEXT: vpmaxuq %zmm1, %zmm0, %zmm08032; X86-NEXT: vextracti128 $1, %ymm0, %xmm18033; X86-NEXT: vpmaxuq %zmm1, %zmm0, %zmm08034; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8035; X86-NEXT: vpmaxuq %zmm1, %zmm0, %zmm08036; X86-NEXT: vmovd %xmm0, %eax8037; X86-NEXT: vpextrd $1, %xmm0, %edx8038; X86-NEXT: vzeroupper8039; X86-NEXT: retl8040;8041; X64-LABEL: test_mm512_mask_reduce_max_epu64:8042; X64: # %bb.0: # %entry8043; X64-NEXT: kmovw %edi, %k18044; X64-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z}8045; X64-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]8046; X64-NEXT: vpmaxuq %zmm1, %zmm0, %zmm08047; X64-NEXT: vextracti128 $1, %ymm0, %xmm18048; X64-NEXT: vpmaxuq %zmm1, %zmm0, %zmm08049; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8050; X64-NEXT: vpmaxuq %zmm1, %zmm0, %zmm08051; X64-NEXT: vmovq %xmm0, %rax8052; X64-NEXT: vzeroupper8053; X64-NEXT: retq8054entry:8055 %0 = bitcast i8 %__M to <8 x i1>8056 %1 = select <8 x i1> %0, <8 x i64> %__W, <8 x i64> zeroinitializer8057 %shuffle.i = shufflevector <8 x i64> %1, <8 x i64> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>8058 %2 = icmp ugt <8 x i64> %1, %shuffle.i8059 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %shuffle.i8060 %shuffle2.i = shufflevector <8 x i64> %3, <8 x i64> undef, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5>8061 %4 = icmp ugt <8 x i64> %3, %shuffle2.i8062 %5 = select <8 x i1> %4, <8 x i64> %3, <8 x i64> %shuffle2.i8063 %shuffle4.i = shufflevector <8 x i64> %5, <8 x i64> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>8064 %6 = icmp ugt <8 x i64> %5, %shuffle4.i8065 %7 = select <8 x i1> %6, <8 x i64> %5, <8 x i64> %shuffle4.i8066 %vecext.i = extractelement <8 x i64> %7, i32 08067 ret i64 %vecext.i8068}8069 8070define double @test_mm512_mask_reduce_max_pd(i8 zeroext %__M, <8 x double> %__W) {8071; X86-LABEL: test_mm512_mask_reduce_max_pd:8072; X86: # %bb.0: # %entry8073; X86-NEXT: pushl %ebp8074; X86-NEXT: .cfi_def_cfa_offset 88075; X86-NEXT: .cfi_offset %ebp, -88076; X86-NEXT: movl %esp, %ebp8077; X86-NEXT: .cfi_def_cfa_register %ebp8078; X86-NEXT: andl $-8, %esp8079; X86-NEXT: subl $8, %esp8080; X86-NEXT: movzbl 8(%ebp), %eax8081; X86-NEXT: kmovw %eax, %k18082; X86-NEXT: vbroadcastsd {{.*#+}} zmm1 = [-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf]8083; X86-NEXT: vmovapd %zmm0, %zmm1 {%k1}8084; X86-NEXT: vextractf64x4 $1, %zmm1, %ymm08085; X86-NEXT: vmaxpd %ymm0, %ymm1, %ymm08086; X86-NEXT: vextractf128 $1, %ymm0, %xmm18087; X86-NEXT: vmaxpd %xmm1, %xmm0, %xmm08088; X86-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]8089; X86-NEXT: vmaxsd %xmm1, %xmm0, %xmm08090; X86-NEXT: vmovsd %xmm0, (%esp)8091; X86-NEXT: fldl (%esp)8092; X86-NEXT: movl %ebp, %esp8093; X86-NEXT: popl %ebp8094; X86-NEXT: .cfi_def_cfa %esp, 48095; X86-NEXT: vzeroupper8096; X86-NEXT: retl8097;8098; X64-LABEL: test_mm512_mask_reduce_max_pd:8099; X64: # %bb.0: # %entry8100; X64-NEXT: kmovw %edi, %k18101; X64-NEXT: vbroadcastsd {{.*#+}} zmm1 = [-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf]8102; X64-NEXT: vmovapd %zmm0, %zmm1 {%k1}8103; X64-NEXT: vextractf64x4 $1, %zmm1, %ymm08104; X64-NEXT: vmaxpd %ymm0, %ymm1, %ymm08105; X64-NEXT: vextractf128 $1, %ymm0, %xmm18106; X64-NEXT: vmaxpd %xmm1, %xmm0, %xmm08107; X64-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]8108; X64-NEXT: vmaxsd %xmm1, %xmm0, %xmm08109; X64-NEXT: vzeroupper8110; X64-NEXT: retq8111entry:8112 %0 = bitcast i8 %__M to <8 x i1>8113 %1 = select <8 x i1> %0, <8 x double> %__W, <8 x double> <double 0xFFF0000000000000, double 0xFFF0000000000000, double 0xFFF0000000000000, double 0xFFF0000000000000, double 0xFFF0000000000000, double 0xFFF0000000000000, double 0xFFF0000000000000, double 0xFFF0000000000000>8114 %extract.i = shufflevector <8 x double> %1, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>8115 %extract4.i = shufflevector <8 x double> %1, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>8116 %2 = tail call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %extract.i, <4 x double> %extract4.i) #38117 %extract6.i = shufflevector <4 x double> %2, <4 x double> undef, <2 x i32> <i32 0, i32 1>8118 %extract7.i = shufflevector <4 x double> %2, <4 x double> undef, <2 x i32> <i32 2, i32 3>8119 %3 = tail call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %extract6.i, <2 x double> %extract7.i) #38120 %shuffle.i = shufflevector <2 x double> %3, <2 x double> undef, <2 x i32> <i32 1, i32 0>8121 %4 = tail call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %3, <2 x double> %shuffle.i) #38122 %vecext.i = extractelement <2 x double> %4, i32 08123 ret double %vecext.i8124}8125 8126define i64 @test_mm512_mask_reduce_min_epi64(i8 zeroext %__M, <8 x i64> %__W) {8127; X86-LABEL: test_mm512_mask_reduce_min_epi64:8128; X86: # %bb.0: # %entry8129; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax8130; X86-NEXT: kmovw %eax, %k18131; X86-NEXT: vpbroadcastq {{.*#+}} zmm1 = [4294967295,2147483647,4294967295,2147483647,4294967295,2147483647,4294967295,2147483647,4294967295,2147483647,4294967295,2147483647,4294967295,2147483647,4294967295,2147483647]8132; X86-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}8133; X86-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm1[4,5,6,7,0,1,2,3]8134; X86-NEXT: vpminsq %zmm0, %zmm1, %zmm08135; X86-NEXT: vextracti128 $1, %ymm0, %xmm18136; X86-NEXT: vpminsq %zmm1, %zmm0, %zmm08137; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8138; X86-NEXT: vpminsq %zmm1, %zmm0, %zmm08139; X86-NEXT: vmovd %xmm0, %eax8140; X86-NEXT: vpextrd $1, %xmm0, %edx8141; X86-NEXT: vzeroupper8142; X86-NEXT: retl8143;8144; X64-LABEL: test_mm512_mask_reduce_min_epi64:8145; X64: # %bb.0: # %entry8146; X64-NEXT: kmovw %edi, %k18147; X64-NEXT: vpbroadcastq {{.*#+}} zmm1 = [9223372036854775807,9223372036854775807,9223372036854775807,9223372036854775807,9223372036854775807,9223372036854775807,9223372036854775807,9223372036854775807]8148; X64-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}8149; X64-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm1[4,5,6,7,0,1,2,3]8150; X64-NEXT: vpminsq %zmm0, %zmm1, %zmm08151; X64-NEXT: vextracti128 $1, %ymm0, %xmm18152; X64-NEXT: vpminsq %zmm1, %zmm0, %zmm08153; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8154; X64-NEXT: vpminsq %zmm1, %zmm0, %zmm08155; X64-NEXT: vmovq %xmm0, %rax8156; X64-NEXT: vzeroupper8157; X64-NEXT: retq8158entry:8159 %0 = bitcast i8 %__M to <8 x i1>8160 %1 = select <8 x i1> %0, <8 x i64> %__W, <8 x i64> <i64 9223372036854775807, i64 9223372036854775807, i64 9223372036854775807, i64 9223372036854775807, i64 9223372036854775807, i64 9223372036854775807, i64 9223372036854775807, i64 9223372036854775807>8161 %shuffle.i = shufflevector <8 x i64> %1, <8 x i64> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>8162 %2 = icmp slt <8 x i64> %1, %shuffle.i8163 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %shuffle.i8164 %shuffle3.i = shufflevector <8 x i64> %3, <8 x i64> undef, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5>8165 %4 = icmp slt <8 x i64> %3, %shuffle3.i8166 %5 = select <8 x i1> %4, <8 x i64> %3, <8 x i64> %shuffle3.i8167 %shuffle5.i = shufflevector <8 x i64> %5, <8 x i64> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>8168 %6 = icmp slt <8 x i64> %5, %shuffle5.i8169 %7 = select <8 x i1> %6, <8 x i64> %5, <8 x i64> %shuffle5.i8170 %vecext.i = extractelement <8 x i64> %7, i32 08171 ret i64 %vecext.i8172}8173 8174define i64 @test_mm512_mask_reduce_min_epu64(i8 zeroext %__M, <8 x i64> %__W) {8175; X86-LABEL: test_mm512_mask_reduce_min_epu64:8176; X86: # %bb.0: # %entry8177; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax8178; X86-NEXT: kmovw %eax, %k18179; X86-NEXT: vpternlogd {{.*#+}} zmm1 = -18180; X86-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}8181; X86-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm1[4,5,6,7,0,1,2,3]8182; X86-NEXT: vpminuq %zmm0, %zmm1, %zmm08183; X86-NEXT: vextracti128 $1, %ymm0, %xmm18184; X86-NEXT: vpminuq %zmm1, %zmm0, %zmm08185; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8186; X86-NEXT: vpminuq %zmm1, %zmm0, %zmm08187; X86-NEXT: vmovd %xmm0, %eax8188; X86-NEXT: vpextrd $1, %xmm0, %edx8189; X86-NEXT: vzeroupper8190; X86-NEXT: retl8191;8192; X64-LABEL: test_mm512_mask_reduce_min_epu64:8193; X64: # %bb.0: # %entry8194; X64-NEXT: kmovw %edi, %k18195; X64-NEXT: vpternlogd {{.*#+}} zmm1 = -18196; X64-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}8197; X64-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm1[4,5,6,7,0,1,2,3]8198; X64-NEXT: vpminuq %zmm0, %zmm1, %zmm08199; X64-NEXT: vextracti128 $1, %ymm0, %xmm18200; X64-NEXT: vpminuq %zmm1, %zmm0, %zmm08201; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8202; X64-NEXT: vpminuq %zmm1, %zmm0, %zmm08203; X64-NEXT: vmovq %xmm0, %rax8204; X64-NEXT: vzeroupper8205; X64-NEXT: retq8206entry:8207 %0 = bitcast i8 %__M to <8 x i1>8208 %1 = select <8 x i1> %0, <8 x i64> %__W, <8 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>8209 %shuffle.i = shufflevector <8 x i64> %1, <8 x i64> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>8210 %2 = icmp ult <8 x i64> %1, %shuffle.i8211 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %shuffle.i8212 %shuffle3.i = shufflevector <8 x i64> %3, <8 x i64> undef, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5>8213 %4 = icmp ult <8 x i64> %3, %shuffle3.i8214 %5 = select <8 x i1> %4, <8 x i64> %3, <8 x i64> %shuffle3.i8215 %shuffle5.i = shufflevector <8 x i64> %5, <8 x i64> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>8216 %6 = icmp ult <8 x i64> %5, %shuffle5.i8217 %7 = select <8 x i1> %6, <8 x i64> %5, <8 x i64> %shuffle5.i8218 %vecext.i = extractelement <8 x i64> %7, i32 08219 ret i64 %vecext.i8220}8221 8222define double @test_mm512_mask_reduce_min_pd(i8 zeroext %__M, <8 x double> %__W) {8223; X86-LABEL: test_mm512_mask_reduce_min_pd:8224; X86: # %bb.0: # %entry8225; X86-NEXT: pushl %ebp8226; X86-NEXT: .cfi_def_cfa_offset 88227; X86-NEXT: .cfi_offset %ebp, -88228; X86-NEXT: movl %esp, %ebp8229; X86-NEXT: .cfi_def_cfa_register %ebp8230; X86-NEXT: andl $-8, %esp8231; X86-NEXT: subl $8, %esp8232; X86-NEXT: movzbl 8(%ebp), %eax8233; X86-NEXT: kmovw %eax, %k18234; X86-NEXT: vbroadcastsd {{.*#+}} zmm1 = [+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf]8235; X86-NEXT: vmovapd %zmm0, %zmm1 {%k1}8236; X86-NEXT: vextractf64x4 $1, %zmm1, %ymm08237; X86-NEXT: vminpd %ymm0, %ymm1, %ymm08238; X86-NEXT: vextractf128 $1, %ymm0, %xmm18239; X86-NEXT: vminpd %xmm1, %xmm0, %xmm08240; X86-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]8241; X86-NEXT: vminsd %xmm1, %xmm0, %xmm08242; X86-NEXT: vmovsd %xmm0, (%esp)8243; X86-NEXT: fldl (%esp)8244; X86-NEXT: movl %ebp, %esp8245; X86-NEXT: popl %ebp8246; X86-NEXT: .cfi_def_cfa %esp, 48247; X86-NEXT: vzeroupper8248; X86-NEXT: retl8249;8250; X64-LABEL: test_mm512_mask_reduce_min_pd:8251; X64: # %bb.0: # %entry8252; X64-NEXT: kmovw %edi, %k18253; X64-NEXT: vbroadcastsd {{.*#+}} zmm1 = [+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf]8254; X64-NEXT: vmovapd %zmm0, %zmm1 {%k1}8255; X64-NEXT: vextractf64x4 $1, %zmm1, %ymm08256; X64-NEXT: vminpd %ymm0, %ymm1, %ymm08257; X64-NEXT: vextractf128 $1, %ymm0, %xmm18258; X64-NEXT: vminpd %xmm1, %xmm0, %xmm08259; X64-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]8260; X64-NEXT: vminsd %xmm1, %xmm0, %xmm08261; X64-NEXT: vzeroupper8262; X64-NEXT: retq8263entry:8264 %0 = bitcast i8 %__M to <8 x i1>8265 %1 = select <8 x i1> %0, <8 x double> %__W, <8 x double> <double 0x7FF0000000000000, double 0x7FF0000000000000, double 0x7FF0000000000000, double 0x7FF0000000000000, double 0x7FF0000000000000, double 0x7FF0000000000000, double 0x7FF0000000000000, double 0x7FF0000000000000>8266 %extract.i = shufflevector <8 x double> %1, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>8267 %extract4.i = shufflevector <8 x double> %1, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>8268 %2 = tail call <4 x double> @llvm.x86.avx.min.pd.256(<4 x double> %extract.i, <4 x double> %extract4.i)8269 %extract6.i = shufflevector <4 x double> %2, <4 x double> undef, <2 x i32> <i32 0, i32 1>8270 %extract7.i = shufflevector <4 x double> %2, <4 x double> undef, <2 x i32> <i32 2, i32 3>8271 %3 = tail call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %extract6.i, <2 x double> %extract7.i)8272 %shuffle.i = shufflevector <2 x double> %3, <2 x double> undef, <2 x i32> <i32 1, i32 0>8273 %4 = tail call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %3, <2 x double> %shuffle.i)8274 %vecext.i = extractelement <2 x double> %4, i32 08275 ret double %vecext.i8276}8277 8278define i32 @test_mm512_reduce_max_epi32(<8 x i64> %__W) {8279; CHECK-LABEL: test_mm512_reduce_max_epi32:8280; CHECK: # %bb.0: # %entry8281; CHECK-NEXT: vextracti64x4 $1, %zmm0, %ymm18282; CHECK-NEXT: vpmaxsd %ymm1, %ymm0, %ymm08283; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm18284; CHECK-NEXT: vpmaxsd %xmm1, %xmm0, %xmm08285; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8286; CHECK-NEXT: vpmaxsd %xmm1, %xmm0, %xmm08287; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]8288; CHECK-NEXT: vpmaxsd %xmm1, %xmm0, %xmm08289; CHECK-NEXT: vmovd %xmm0, %eax8290; CHECK-NEXT: vzeroupper8291; CHECK-NEXT: ret{{[l|q]}}8292entry:8293 %extract.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>8294 %extract2.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>8295 %0 = bitcast <4 x i64> %extract.i to <8 x i32>8296 %1 = bitcast <4 x i64> %extract2.i to <8 x i32>8297 %2 = icmp sgt <8 x i32> %0, %18298 %3 = select <8 x i1> %2, <8 x i32> %0, <8 x i32> %18299 %4 = bitcast <8 x i32> %3 to <4 x i64>8300 %extract4.i = shufflevector <4 x i64> %4, <4 x i64> undef, <2 x i32> <i32 0, i32 1>8301 %extract5.i = shufflevector <4 x i64> %4, <4 x i64> undef, <2 x i32> <i32 2, i32 3>8302 %5 = bitcast <2 x i64> %extract4.i to <4 x i32>8303 %6 = bitcast <2 x i64> %extract5.i to <4 x i32>8304 %7 = icmp sgt <4 x i32> %5, %68305 %8 = select <4 x i1> %7, <4 x i32> %5, <4 x i32> %68306 %shuffle.i = shufflevector <4 x i32> %8, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>8307 %9 = icmp sgt <4 x i32> %8, %shuffle.i8308 %10 = select <4 x i1> %9, <4 x i32> %8, <4 x i32> %shuffle.i8309 %shuffle8.i = shufflevector <4 x i32> %10, <4 x i32> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>8310 %11 = icmp sgt <4 x i32> %10, %shuffle8.i8311 %12 = select <4 x i1> %11, <4 x i32> %10, <4 x i32> %shuffle8.i8312 %vecext.i = extractelement <4 x i32> %12, i32 08313 ret i32 %vecext.i8314}8315 8316define i32 @test_mm512_reduce_max_epu32(<8 x i64> %__W) {8317; CHECK-LABEL: test_mm512_reduce_max_epu32:8318; CHECK: # %bb.0: # %entry8319; CHECK-NEXT: vextracti64x4 $1, %zmm0, %ymm18320; CHECK-NEXT: vpmaxud %ymm1, %ymm0, %ymm08321; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm18322; CHECK-NEXT: vpmaxud %xmm1, %xmm0, %xmm08323; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8324; CHECK-NEXT: vpmaxud %xmm1, %xmm0, %xmm08325; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]8326; CHECK-NEXT: vpmaxud %xmm1, %xmm0, %xmm08327; CHECK-NEXT: vmovd %xmm0, %eax8328; CHECK-NEXT: vzeroupper8329; CHECK-NEXT: ret{{[l|q]}}8330entry:8331 %extract.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>8332 %extract2.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>8333 %0 = bitcast <4 x i64> %extract.i to <8 x i32>8334 %1 = bitcast <4 x i64> %extract2.i to <8 x i32>8335 %2 = icmp ugt <8 x i32> %0, %18336 %3 = select <8 x i1> %2, <8 x i32> %0, <8 x i32> %18337 %4 = bitcast <8 x i32> %3 to <4 x i64>8338 %extract4.i = shufflevector <4 x i64> %4, <4 x i64> undef, <2 x i32> <i32 0, i32 1>8339 %extract5.i = shufflevector <4 x i64> %4, <4 x i64> undef, <2 x i32> <i32 2, i32 3>8340 %5 = bitcast <2 x i64> %extract4.i to <4 x i32>8341 %6 = bitcast <2 x i64> %extract5.i to <4 x i32>8342 %7 = icmp ugt <4 x i32> %5, %68343 %8 = select <4 x i1> %7, <4 x i32> %5, <4 x i32> %68344 %shuffle.i = shufflevector <4 x i32> %8, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>8345 %9 = icmp ugt <4 x i32> %8, %shuffle.i8346 %10 = select <4 x i1> %9, <4 x i32> %8, <4 x i32> %shuffle.i8347 %shuffle8.i = shufflevector <4 x i32> %10, <4 x i32> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>8348 %11 = icmp ugt <4 x i32> %10, %shuffle8.i8349 %12 = select <4 x i1> %11, <4 x i32> %10, <4 x i32> %shuffle8.i8350 %vecext.i = extractelement <4 x i32> %12, i32 08351 ret i32 %vecext.i8352}8353 8354define float @test_mm512_reduce_max_ps(<16 x float> %__W) {8355; X86-LABEL: test_mm512_reduce_max_ps:8356; X86: # %bb.0: # %entry8357; X86-NEXT: pushl %eax8358; X86-NEXT: .cfi_def_cfa_offset 88359; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm18360; X86-NEXT: vmaxps %ymm1, %ymm0, %ymm08361; X86-NEXT: vextractf128 $1, %ymm0, %xmm18362; X86-NEXT: vmaxps %xmm1, %xmm0, %xmm08363; X86-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]8364; X86-NEXT: vmaxps %xmm1, %xmm0, %xmm08365; X86-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]8366; X86-NEXT: vmaxss %xmm1, %xmm0, %xmm08367; X86-NEXT: vmovss %xmm0, (%esp)8368; X86-NEXT: flds (%esp)8369; X86-NEXT: popl %eax8370; X86-NEXT: .cfi_def_cfa_offset 48371; X86-NEXT: vzeroupper8372; X86-NEXT: retl8373;8374; X64-LABEL: test_mm512_reduce_max_ps:8375; X64: # %bb.0: # %entry8376; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm18377; X64-NEXT: vmaxps %ymm1, %ymm0, %ymm08378; X64-NEXT: vextractf128 $1, %ymm0, %xmm18379; X64-NEXT: vmaxps %xmm1, %xmm0, %xmm08380; X64-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]8381; X64-NEXT: vmaxps %xmm1, %xmm0, %xmm08382; X64-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]8383; X64-NEXT: vmaxss %xmm1, %xmm0, %xmm08384; X64-NEXT: vzeroupper8385; X64-NEXT: retq8386entry:8387 %0 = bitcast <16 x float> %__W to <8 x double>8388 %extract.i = shufflevector <8 x double> %0, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>8389 %1 = bitcast <4 x double> %extract.i to <8 x float>8390 %extract2.i = shufflevector <8 x double> %0, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>8391 %2 = bitcast <4 x double> %extract2.i to <8 x float>8392 %3 = tail call <8 x float> @llvm.x86.avx.max.ps.256(<8 x float> %1, <8 x float> %2)8393 %extract4.i = shufflevector <8 x float> %3, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>8394 %extract5.i = shufflevector <8 x float> %3, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>8395 %4 = tail call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %extract4.i, <4 x float> %extract5.i)8396 %shuffle.i = shufflevector <4 x float> %4, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>8397 %5 = tail call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %4, <4 x float> %shuffle.i)8398 %shuffle8.i = shufflevector <4 x float> %5, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>8399 %6 = tail call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %5, <4 x float> %shuffle8.i)8400 %vecext.i = extractelement <4 x float> %6, i32 08401 ret float %vecext.i8402}8403 8404define i32 @test_mm512_reduce_min_epi32(<8 x i64> %__W) {8405; CHECK-LABEL: test_mm512_reduce_min_epi32:8406; CHECK: # %bb.0: # %entry8407; CHECK-NEXT: vextracti64x4 $1, %zmm0, %ymm18408; CHECK-NEXT: vpminsd %ymm1, %ymm0, %ymm08409; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm18410; CHECK-NEXT: vpminsd %xmm1, %xmm0, %xmm08411; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8412; CHECK-NEXT: vpminsd %xmm1, %xmm0, %xmm08413; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]8414; CHECK-NEXT: vpminsd %xmm1, %xmm0, %xmm08415; CHECK-NEXT: vmovd %xmm0, %eax8416; CHECK-NEXT: vzeroupper8417; CHECK-NEXT: ret{{[l|q]}}8418entry:8419 %extract.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>8420 %extract2.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>8421 %0 = bitcast <4 x i64> %extract.i to <8 x i32>8422 %1 = bitcast <4 x i64> %extract2.i to <8 x i32>8423 %2 = icmp slt <8 x i32> %0, %18424 %3 = select <8 x i1> %2, <8 x i32> %0, <8 x i32> %18425 %4 = bitcast <8 x i32> %3 to <4 x i64>8426 %extract4.i = shufflevector <4 x i64> %4, <4 x i64> undef, <2 x i32> <i32 0, i32 1>8427 %extract5.i = shufflevector <4 x i64> %4, <4 x i64> undef, <2 x i32> <i32 2, i32 3>8428 %5 = bitcast <2 x i64> %extract4.i to <4 x i32>8429 %6 = bitcast <2 x i64> %extract5.i to <4 x i32>8430 %7 = icmp slt <4 x i32> %5, %68431 %8 = select <4 x i1> %7, <4 x i32> %5, <4 x i32> %68432 %shuffle.i = shufflevector <4 x i32> %8, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>8433 %9 = icmp slt <4 x i32> %8, %shuffle.i8434 %10 = select <4 x i1> %9, <4 x i32> %8, <4 x i32> %shuffle.i8435 %shuffle8.i = shufflevector <4 x i32> %10, <4 x i32> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>8436 %11 = icmp slt <4 x i32> %10, %shuffle8.i8437 %12 = select <4 x i1> %11, <4 x i32> %10, <4 x i32> %shuffle8.i8438 %vecext.i = extractelement <4 x i32> %12, i32 08439 ret i32 %vecext.i8440}8441 8442define i32 @test_mm512_reduce_min_epu32(<8 x i64> %__W) {8443; CHECK-LABEL: test_mm512_reduce_min_epu32:8444; CHECK: # %bb.0: # %entry8445; CHECK-NEXT: vextracti64x4 $1, %zmm0, %ymm18446; CHECK-NEXT: vpminud %ymm1, %ymm0, %ymm08447; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm18448; CHECK-NEXT: vpminud %xmm1, %xmm0, %xmm08449; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8450; CHECK-NEXT: vpminud %xmm1, %xmm0, %xmm08451; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]8452; CHECK-NEXT: vpminud %xmm1, %xmm0, %xmm08453; CHECK-NEXT: vmovd %xmm0, %eax8454; CHECK-NEXT: vzeroupper8455; CHECK-NEXT: ret{{[l|q]}}8456entry:8457 %extract.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>8458 %extract2.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>8459 %0 = bitcast <4 x i64> %extract.i to <8 x i32>8460 %1 = bitcast <4 x i64> %extract2.i to <8 x i32>8461 %2 = icmp ult <8 x i32> %0, %18462 %3 = select <8 x i1> %2, <8 x i32> %0, <8 x i32> %18463 %4 = bitcast <8 x i32> %3 to <4 x i64>8464 %extract4.i = shufflevector <4 x i64> %4, <4 x i64> undef, <2 x i32> <i32 0, i32 1>8465 %extract5.i = shufflevector <4 x i64> %4, <4 x i64> undef, <2 x i32> <i32 2, i32 3>8466 %5 = bitcast <2 x i64> %extract4.i to <4 x i32>8467 %6 = bitcast <2 x i64> %extract5.i to <4 x i32>8468 %7 = icmp ult <4 x i32> %5, %68469 %8 = select <4 x i1> %7, <4 x i32> %5, <4 x i32> %68470 %shuffle.i = shufflevector <4 x i32> %8, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>8471 %9 = icmp ult <4 x i32> %8, %shuffle.i8472 %10 = select <4 x i1> %9, <4 x i32> %8, <4 x i32> %shuffle.i8473 %shuffle8.i = shufflevector <4 x i32> %10, <4 x i32> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>8474 %11 = icmp ult <4 x i32> %10, %shuffle8.i8475 %12 = select <4 x i1> %11, <4 x i32> %10, <4 x i32> %shuffle8.i8476 %vecext.i = extractelement <4 x i32> %12, i32 08477 ret i32 %vecext.i8478}8479 8480define float @test_mm512_reduce_min_ps(<16 x float> %__W) {8481; X86-LABEL: test_mm512_reduce_min_ps:8482; X86: # %bb.0: # %entry8483; X86-NEXT: pushl %eax8484; X86-NEXT: .cfi_def_cfa_offset 88485; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm18486; X86-NEXT: vminps %ymm1, %ymm0, %ymm08487; X86-NEXT: vextractf128 $1, %ymm0, %xmm18488; X86-NEXT: vminps %xmm1, %xmm0, %xmm08489; X86-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]8490; X86-NEXT: vminps %xmm1, %xmm0, %xmm08491; X86-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]8492; X86-NEXT: vminss %xmm1, %xmm0, %xmm08493; X86-NEXT: vmovss %xmm0, (%esp)8494; X86-NEXT: flds (%esp)8495; X86-NEXT: popl %eax8496; X86-NEXT: .cfi_def_cfa_offset 48497; X86-NEXT: vzeroupper8498; X86-NEXT: retl8499;8500; X64-LABEL: test_mm512_reduce_min_ps:8501; X64: # %bb.0: # %entry8502; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm18503; X64-NEXT: vminps %ymm1, %ymm0, %ymm08504; X64-NEXT: vextractf128 $1, %ymm0, %xmm18505; X64-NEXT: vminps %xmm1, %xmm0, %xmm08506; X64-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]8507; X64-NEXT: vminps %xmm1, %xmm0, %xmm08508; X64-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]8509; X64-NEXT: vminss %xmm1, %xmm0, %xmm08510; X64-NEXT: vzeroupper8511; X64-NEXT: retq8512entry:8513 %0 = bitcast <16 x float> %__W to <8 x double>8514 %extract.i = shufflevector <8 x double> %0, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>8515 %1 = bitcast <4 x double> %extract.i to <8 x float>8516 %extract2.i = shufflevector <8 x double> %0, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>8517 %2 = bitcast <4 x double> %extract2.i to <8 x float>8518 %3 = tail call <8 x float> @llvm.x86.avx.min.ps.256(<8 x float> %1, <8 x float> %2)8519 %extract4.i = shufflevector <8 x float> %3, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>8520 %extract5.i = shufflevector <8 x float> %3, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>8521 %4 = tail call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %extract4.i, <4 x float> %extract5.i)8522 %shuffle.i = shufflevector <4 x float> %4, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>8523 %5 = tail call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %4, <4 x float> %shuffle.i)8524 %shuffle8.i = shufflevector <4 x float> %5, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>8525 %6 = tail call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %5, <4 x float> %shuffle8.i)8526 %vecext.i = extractelement <4 x float> %6, i32 08527 ret float %vecext.i8528}8529 8530define i32 @test_mm512_mask_reduce_max_epi32(i16 zeroext %__M, <8 x i64> %__W) {8531; X86-LABEL: test_mm512_mask_reduce_max_epi32:8532; X86: # %bb.0: # %entry8533; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax8534; X86-NEXT: kmovw %eax, %k18535; X86-NEXT: vpbroadcastd {{.*#+}} zmm1 = [2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648]8536; X86-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1}8537; X86-NEXT: vextracti64x4 $1, %zmm1, %ymm08538; X86-NEXT: vpmaxsd %ymm0, %ymm1, %ymm08539; X86-NEXT: vextracti128 $1, %ymm0, %xmm18540; X86-NEXT: vpmaxsd %xmm1, %xmm0, %xmm08541; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8542; X86-NEXT: vpmaxsd %xmm1, %xmm0, %xmm08543; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]8544; X86-NEXT: vpmaxsd %xmm1, %xmm0, %xmm08545; X86-NEXT: vmovd %xmm0, %eax8546; X86-NEXT: vzeroupper8547; X86-NEXT: retl8548;8549; X64-LABEL: test_mm512_mask_reduce_max_epi32:8550; X64: # %bb.0: # %entry8551; X64-NEXT: kmovw %edi, %k18552; X64-NEXT: vpbroadcastd {{.*#+}} zmm1 = [2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648]8553; X64-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1}8554; X64-NEXT: vextracti64x4 $1, %zmm1, %ymm08555; X64-NEXT: vpmaxsd %ymm0, %ymm1, %ymm08556; X64-NEXT: vextracti128 $1, %ymm0, %xmm18557; X64-NEXT: vpmaxsd %xmm1, %xmm0, %xmm08558; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8559; X64-NEXT: vpmaxsd %xmm1, %xmm0, %xmm08560; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]8561; X64-NEXT: vpmaxsd %xmm1, %xmm0, %xmm08562; X64-NEXT: vmovd %xmm0, %eax8563; X64-NEXT: vzeroupper8564; X64-NEXT: retq8565entry:8566 %0 = bitcast <8 x i64> %__W to <16 x i32>8567 %1 = bitcast i16 %__M to <16 x i1>8568 %2 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>8569 %3 = bitcast <16 x i32> %2 to <8 x i64>8570 %extract.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>8571 %extract4.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>8572 %4 = bitcast <4 x i64> %extract.i to <8 x i32>8573 %5 = bitcast <4 x i64> %extract4.i to <8 x i32>8574 %6 = icmp sgt <8 x i32> %4, %58575 %7 = select <8 x i1> %6, <8 x i32> %4, <8 x i32> %58576 %8 = bitcast <8 x i32> %7 to <4 x i64>8577 %extract6.i = shufflevector <4 x i64> %8, <4 x i64> undef, <2 x i32> <i32 0, i32 1>8578 %extract7.i = shufflevector <4 x i64> %8, <4 x i64> undef, <2 x i32> <i32 2, i32 3>8579 %9 = bitcast <2 x i64> %extract6.i to <4 x i32>8580 %10 = bitcast <2 x i64> %extract7.i to <4 x i32>8581 %11 = icmp sgt <4 x i32> %9, %108582 %12 = select <4 x i1> %11, <4 x i32> %9, <4 x i32> %108583 %shuffle.i = shufflevector <4 x i32> %12, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>8584 %13 = icmp sgt <4 x i32> %12, %shuffle.i8585 %14 = select <4 x i1> %13, <4 x i32> %12, <4 x i32> %shuffle.i8586 %shuffle10.i = shufflevector <4 x i32> %14, <4 x i32> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>8587 %15 = icmp sgt <4 x i32> %14, %shuffle10.i8588 %16 = select <4 x i1> %15, <4 x i32> %14, <4 x i32> %shuffle10.i8589 %vecext.i = extractelement <4 x i32> %16, i32 08590 ret i32 %vecext.i8591}8592 8593define i32 @test_mm512_mask_reduce_max_epu32(i16 zeroext %__M, <8 x i64> %__W) {8594; X86-LABEL: test_mm512_mask_reduce_max_epu32:8595; X86: # %bb.0: # %entry8596; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax8597; X86-NEXT: kmovw %eax, %k18598; X86-NEXT: vmovdqa32 %zmm0, %zmm0 {%k1} {z}8599; X86-NEXT: vextracti64x4 $1, %zmm0, %ymm18600; X86-NEXT: vpmaxud %ymm1, %ymm0, %ymm08601; X86-NEXT: vextracti128 $1, %ymm0, %xmm18602; X86-NEXT: vpmaxud %xmm1, %xmm0, %xmm08603; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8604; X86-NEXT: vpmaxud %xmm1, %xmm0, %xmm08605; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]8606; X86-NEXT: vpmaxud %xmm1, %xmm0, %xmm08607; X86-NEXT: vmovd %xmm0, %eax8608; X86-NEXT: vzeroupper8609; X86-NEXT: retl8610;8611; X64-LABEL: test_mm512_mask_reduce_max_epu32:8612; X64: # %bb.0: # %entry8613; X64-NEXT: kmovw %edi, %k18614; X64-NEXT: vmovdqa32 %zmm0, %zmm0 {%k1} {z}8615; X64-NEXT: vextracti64x4 $1, %zmm0, %ymm18616; X64-NEXT: vpmaxud %ymm1, %ymm0, %ymm08617; X64-NEXT: vextracti128 $1, %ymm0, %xmm18618; X64-NEXT: vpmaxud %xmm1, %xmm0, %xmm08619; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8620; X64-NEXT: vpmaxud %xmm1, %xmm0, %xmm08621; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]8622; X64-NEXT: vpmaxud %xmm1, %xmm0, %xmm08623; X64-NEXT: vmovd %xmm0, %eax8624; X64-NEXT: vzeroupper8625; X64-NEXT: retq8626entry:8627 %0 = bitcast <8 x i64> %__W to <16 x i32>8628 %1 = bitcast i16 %__M to <16 x i1>8629 %2 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> zeroinitializer8630 %3 = bitcast <16 x i32> %2 to <8 x i64>8631 %extract.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>8632 %extract3.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>8633 %4 = bitcast <4 x i64> %extract.i to <8 x i32>8634 %5 = bitcast <4 x i64> %extract3.i to <8 x i32>8635 %6 = icmp ugt <8 x i32> %4, %58636 %7 = select <8 x i1> %6, <8 x i32> %4, <8 x i32> %58637 %8 = bitcast <8 x i32> %7 to <4 x i64>8638 %extract5.i = shufflevector <4 x i64> %8, <4 x i64> undef, <2 x i32> <i32 0, i32 1>8639 %extract6.i = shufflevector <4 x i64> %8, <4 x i64> undef, <2 x i32> <i32 2, i32 3>8640 %9 = bitcast <2 x i64> %extract5.i to <4 x i32>8641 %10 = bitcast <2 x i64> %extract6.i to <4 x i32>8642 %11 = icmp ugt <4 x i32> %9, %108643 %12 = select <4 x i1> %11, <4 x i32> %9, <4 x i32> %108644 %shuffle.i = shufflevector <4 x i32> %12, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>8645 %13 = icmp ugt <4 x i32> %12, %shuffle.i8646 %14 = select <4 x i1> %13, <4 x i32> %12, <4 x i32> %shuffle.i8647 %shuffle9.i = shufflevector <4 x i32> %14, <4 x i32> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>8648 %15 = icmp ugt <4 x i32> %14, %shuffle9.i8649 %16 = select <4 x i1> %15, <4 x i32> %14, <4 x i32> %shuffle9.i8650 %vecext.i = extractelement <4 x i32> %16, i32 08651 ret i32 %vecext.i8652}8653 8654define float @test_mm512_mask_reduce_max_ps(i16 zeroext %__M, <16 x float> %__W) {8655; X86-LABEL: test_mm512_mask_reduce_max_ps:8656; X86: # %bb.0: # %entry8657; X86-NEXT: pushl %eax8658; X86-NEXT: .cfi_def_cfa_offset 88659; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax8660; X86-NEXT: kmovw %eax, %k18661; X86-NEXT: vbroadcastss {{.*#+}} zmm1 = [-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf]8662; X86-NEXT: vmovaps %zmm0, %zmm1 {%k1}8663; X86-NEXT: vextractf64x4 $1, %zmm1, %ymm08664; X86-NEXT: vmaxps %ymm0, %ymm1, %ymm08665; X86-NEXT: vextractf128 $1, %ymm0, %xmm18666; X86-NEXT: vmaxps %xmm1, %xmm0, %xmm08667; X86-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]8668; X86-NEXT: vmaxps %xmm1, %xmm0, %xmm08669; X86-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]8670; X86-NEXT: vmaxss %xmm1, %xmm0, %xmm08671; X86-NEXT: vmovss %xmm0, (%esp)8672; X86-NEXT: flds (%esp)8673; X86-NEXT: popl %eax8674; X86-NEXT: .cfi_def_cfa_offset 48675; X86-NEXT: vzeroupper8676; X86-NEXT: retl8677;8678; X64-LABEL: test_mm512_mask_reduce_max_ps:8679; X64: # %bb.0: # %entry8680; X64-NEXT: kmovw %edi, %k18681; X64-NEXT: vbroadcastss {{.*#+}} zmm1 = [-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf,-Inf]8682; X64-NEXT: vmovaps %zmm0, %zmm1 {%k1}8683; X64-NEXT: vextractf64x4 $1, %zmm1, %ymm08684; X64-NEXT: vmaxps %ymm0, %ymm1, %ymm08685; X64-NEXT: vextractf128 $1, %ymm0, %xmm18686; X64-NEXT: vmaxps %xmm1, %xmm0, %xmm08687; X64-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]8688; X64-NEXT: vmaxps %xmm1, %xmm0, %xmm08689; X64-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]8690; X64-NEXT: vmaxss %xmm1, %xmm0, %xmm08691; X64-NEXT: vzeroupper8692; X64-NEXT: retq8693entry:8694 %0 = bitcast i16 %__M to <16 x i1>8695 %1 = select <16 x i1> %0, <16 x float> %__W, <16 x float> <float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000>8696 %2 = bitcast <16 x float> %1 to <8 x double>8697 %extract.i = shufflevector <8 x double> %2, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>8698 %3 = bitcast <4 x double> %extract.i to <8 x float>8699 %extract4.i = shufflevector <8 x double> %2, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>8700 %4 = bitcast <4 x double> %extract4.i to <8 x float>8701 %5 = tail call <8 x float> @llvm.x86.avx.max.ps.256(<8 x float> %3, <8 x float> %4)8702 %extract6.i = shufflevector <8 x float> %5, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>8703 %extract7.i = shufflevector <8 x float> %5, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>8704 %6 = tail call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %extract6.i, <4 x float> %extract7.i)8705 %shuffle.i = shufflevector <4 x float> %6, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>8706 %7 = tail call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %6, <4 x float> %shuffle.i)8707 %shuffle10.i = shufflevector <4 x float> %7, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>8708 %8 = tail call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %7, <4 x float> %shuffle10.i)8709 %vecext.i = extractelement <4 x float> %8, i32 08710 ret float %vecext.i8711}8712 8713define i32 @test_mm512_mask_reduce_min_epi32(i16 zeroext %__M, <8 x i64> %__W) {8714; X86-LABEL: test_mm512_mask_reduce_min_epi32:8715; X86: # %bb.0: # %entry8716; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax8717; X86-NEXT: kmovw %eax, %k18718; X86-NEXT: vpbroadcastd {{.*#+}} zmm1 = [2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647]8719; X86-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1}8720; X86-NEXT: vextracti64x4 $1, %zmm1, %ymm08721; X86-NEXT: vpminsd %ymm0, %ymm1, %ymm08722; X86-NEXT: vextracti128 $1, %ymm0, %xmm18723; X86-NEXT: vpminsd %xmm1, %xmm0, %xmm08724; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8725; X86-NEXT: vpminsd %xmm1, %xmm0, %xmm08726; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]8727; X86-NEXT: vpminsd %xmm1, %xmm0, %xmm08728; X86-NEXT: vmovd %xmm0, %eax8729; X86-NEXT: vzeroupper8730; X86-NEXT: retl8731;8732; X64-LABEL: test_mm512_mask_reduce_min_epi32:8733; X64: # %bb.0: # %entry8734; X64-NEXT: kmovw %edi, %k18735; X64-NEXT: vpbroadcastd {{.*#+}} zmm1 = [2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647,2147483647]8736; X64-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1}8737; X64-NEXT: vextracti64x4 $1, %zmm1, %ymm08738; X64-NEXT: vpminsd %ymm0, %ymm1, %ymm08739; X64-NEXT: vextracti128 $1, %ymm0, %xmm18740; X64-NEXT: vpminsd %xmm1, %xmm0, %xmm08741; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8742; X64-NEXT: vpminsd %xmm1, %xmm0, %xmm08743; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]8744; X64-NEXT: vpminsd %xmm1, %xmm0, %xmm08745; X64-NEXT: vmovd %xmm0, %eax8746; X64-NEXT: vzeroupper8747; X64-NEXT: retq8748entry:8749 %0 = bitcast <8 x i64> %__W to <16 x i32>8750 %1 = bitcast i16 %__M to <16 x i1>8751 %2 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>8752 %3 = bitcast <16 x i32> %2 to <8 x i64>8753 %extract.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>8754 %extract4.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>8755 %4 = bitcast <4 x i64> %extract.i to <8 x i32>8756 %5 = bitcast <4 x i64> %extract4.i to <8 x i32>8757 %6 = icmp slt <8 x i32> %4, %58758 %7 = select <8 x i1> %6, <8 x i32> %4, <8 x i32> %58759 %8 = bitcast <8 x i32> %7 to <4 x i64>8760 %extract6.i = shufflevector <4 x i64> %8, <4 x i64> undef, <2 x i32> <i32 0, i32 1>8761 %extract7.i = shufflevector <4 x i64> %8, <4 x i64> undef, <2 x i32> <i32 2, i32 3>8762 %9 = bitcast <2 x i64> %extract6.i to <4 x i32>8763 %10 = bitcast <2 x i64> %extract7.i to <4 x i32>8764 %11 = icmp slt <4 x i32> %9, %108765 %12 = select <4 x i1> %11, <4 x i32> %9, <4 x i32> %108766 %shuffle.i = shufflevector <4 x i32> %12, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>8767 %13 = icmp slt <4 x i32> %12, %shuffle.i8768 %14 = select <4 x i1> %13, <4 x i32> %12, <4 x i32> %shuffle.i8769 %shuffle10.i = shufflevector <4 x i32> %14, <4 x i32> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>8770 %15 = icmp slt <4 x i32> %14, %shuffle10.i8771 %16 = select <4 x i1> %15, <4 x i32> %14, <4 x i32> %shuffle10.i8772 %vecext.i = extractelement <4 x i32> %16, i32 08773 ret i32 %vecext.i8774}8775 8776define i32 @test_mm512_mask_reduce_min_epu32(i16 zeroext %__M, <8 x i64> %__W) {8777; X86-LABEL: test_mm512_mask_reduce_min_epu32:8778; X86: # %bb.0: # %entry8779; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax8780; X86-NEXT: kmovw %eax, %k18781; X86-NEXT: vpternlogd {{.*#+}} zmm1 = -18782; X86-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1}8783; X86-NEXT: vextracti64x4 $1, %zmm1, %ymm08784; X86-NEXT: vpminud %ymm0, %ymm1, %ymm08785; X86-NEXT: vextracti128 $1, %ymm0, %xmm18786; X86-NEXT: vpminud %xmm1, %xmm0, %xmm08787; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8788; X86-NEXT: vpminud %xmm1, %xmm0, %xmm08789; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]8790; X86-NEXT: vpminud %xmm1, %xmm0, %xmm08791; X86-NEXT: vmovd %xmm0, %eax8792; X86-NEXT: vzeroupper8793; X86-NEXT: retl8794;8795; X64-LABEL: test_mm512_mask_reduce_min_epu32:8796; X64: # %bb.0: # %entry8797; X64-NEXT: kmovw %edi, %k18798; X64-NEXT: vpternlogd {{.*#+}} zmm1 = -18799; X64-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1}8800; X64-NEXT: vextracti64x4 $1, %zmm1, %ymm08801; X64-NEXT: vpminud %ymm0, %ymm1, %ymm08802; X64-NEXT: vextracti128 $1, %ymm0, %xmm18803; X64-NEXT: vpminud %xmm1, %xmm0, %xmm08804; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]8805; X64-NEXT: vpminud %xmm1, %xmm0, %xmm08806; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]8807; X64-NEXT: vpminud %xmm1, %xmm0, %xmm08808; X64-NEXT: vmovd %xmm0, %eax8809; X64-NEXT: vzeroupper8810; X64-NEXT: retq8811entry:8812 %0 = bitcast <8 x i64> %__W to <16 x i32>8813 %1 = bitcast i16 %__M to <16 x i1>8814 %2 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>8815 %3 = bitcast <16 x i32> %2 to <8 x i64>8816 %extract.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>8817 %extract4.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>8818 %4 = bitcast <4 x i64> %extract.i to <8 x i32>8819 %5 = bitcast <4 x i64> %extract4.i to <8 x i32>8820 %6 = icmp ult <8 x i32> %4, %58821 %7 = select <8 x i1> %6, <8 x i32> %4, <8 x i32> %58822 %8 = bitcast <8 x i32> %7 to <4 x i64>8823 %extract6.i = shufflevector <4 x i64> %8, <4 x i64> undef, <2 x i32> <i32 0, i32 1>8824 %extract7.i = shufflevector <4 x i64> %8, <4 x i64> undef, <2 x i32> <i32 2, i32 3>8825 %9 = bitcast <2 x i64> %extract6.i to <4 x i32>8826 %10 = bitcast <2 x i64> %extract7.i to <4 x i32>8827 %11 = icmp ult <4 x i32> %9, %108828 %12 = select <4 x i1> %11, <4 x i32> %9, <4 x i32> %108829 %shuffle.i = shufflevector <4 x i32> %12, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>8830 %13 = icmp ult <4 x i32> %12, %shuffle.i8831 %14 = select <4 x i1> %13, <4 x i32> %12, <4 x i32> %shuffle.i8832 %shuffle10.i = shufflevector <4 x i32> %14, <4 x i32> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>8833 %15 = icmp ult <4 x i32> %14, %shuffle10.i8834 %16 = select <4 x i1> %15, <4 x i32> %14, <4 x i32> %shuffle10.i8835 %vecext.i = extractelement <4 x i32> %16, i32 08836 ret i32 %vecext.i8837}8838 8839define float @test_mm512_mask_reduce_min_ps(i16 zeroext %__M, <16 x float> %__W) {8840; X86-LABEL: test_mm512_mask_reduce_min_ps:8841; X86: # %bb.0: # %entry8842; X86-NEXT: pushl %eax8843; X86-NEXT: .cfi_def_cfa_offset 88844; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax8845; X86-NEXT: kmovw %eax, %k18846; X86-NEXT: vbroadcastss {{.*#+}} zmm1 = [+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf]8847; X86-NEXT: vmovaps %zmm0, %zmm1 {%k1}8848; X86-NEXT: vextractf64x4 $1, %zmm1, %ymm08849; X86-NEXT: vminps %ymm0, %ymm1, %ymm08850; X86-NEXT: vextractf128 $1, %ymm0, %xmm18851; X86-NEXT: vminps %xmm1, %xmm0, %xmm08852; X86-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]8853; X86-NEXT: vminps %xmm1, %xmm0, %xmm08854; X86-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]8855; X86-NEXT: vminss %xmm1, %xmm0, %xmm08856; X86-NEXT: vmovss %xmm0, (%esp)8857; X86-NEXT: flds (%esp)8858; X86-NEXT: popl %eax8859; X86-NEXT: .cfi_def_cfa_offset 48860; X86-NEXT: vzeroupper8861; X86-NEXT: retl8862;8863; X64-LABEL: test_mm512_mask_reduce_min_ps:8864; X64: # %bb.0: # %entry8865; X64-NEXT: kmovw %edi, %k18866; X64-NEXT: vbroadcastss {{.*#+}} zmm1 = [+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf,+Inf]8867; X64-NEXT: vmovaps %zmm0, %zmm1 {%k1}8868; X64-NEXT: vextractf64x4 $1, %zmm1, %ymm08869; X64-NEXT: vminps %ymm0, %ymm1, %ymm08870; X64-NEXT: vextractf128 $1, %ymm0, %xmm18871; X64-NEXT: vminps %xmm1, %xmm0, %xmm08872; X64-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]8873; X64-NEXT: vminps %xmm1, %xmm0, %xmm08874; X64-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]8875; X64-NEXT: vminss %xmm1, %xmm0, %xmm08876; X64-NEXT: vzeroupper8877; X64-NEXT: retq8878entry:8879 %0 = bitcast i16 %__M to <16 x i1>8880 %1 = select <16 x i1> %0, <16 x float> %__W, <16 x float> <float 0x7FF0000000000000, float 0x7FF0000000000000, float 0x7FF0000000000000, float 0x7FF0000000000000, float 0x7FF0000000000000, float 0x7FF0000000000000, float 0x7FF0000000000000, float 0x7FF0000000000000, float 0x7FF0000000000000, float 0x7FF0000000000000, float 0x7FF0000000000000, float 0x7FF0000000000000, float 0x7FF0000000000000, float 0x7FF0000000000000, float 0x7FF0000000000000, float 0x7FF0000000000000>8881 %2 = bitcast <16 x float> %1 to <8 x double>8882 %extract.i = shufflevector <8 x double> %2, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>8883 %3 = bitcast <4 x double> %extract.i to <8 x float>8884 %extract4.i = shufflevector <8 x double> %2, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>8885 %4 = bitcast <4 x double> %extract4.i to <8 x float>8886 %5 = tail call <8 x float> @llvm.x86.avx.min.ps.256(<8 x float> %3, <8 x float> %4)8887 %extract6.i = shufflevector <8 x float> %5, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>8888 %extract7.i = shufflevector <8 x float> %5, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>8889 %6 = tail call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %extract6.i, <4 x float> %extract7.i)8890 %shuffle.i = shufflevector <4 x float> %6, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>8891 %7 = tail call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %6, <4 x float> %shuffle.i)8892 %shuffle10.i = shufflevector <4 x float> %7, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>8893 %8 = tail call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %7, <4 x float> %shuffle10.i)8894 %vecext.i = extractelement <4 x float> %8, i32 08895 ret float %vecext.i8896}8897 8898define <8 x double> @test_mm512_mask_max_pd(<8 x double> %__W, i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B) {8899; X86-LABEL: test_mm512_mask_max_pd:8900; X86: # %bb.0: # %entry8901; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax8902; X86-NEXT: kmovw %eax, %k18903; X86-NEXT: vmaxpd %zmm2, %zmm1, %zmm0 {%k1}8904; X86-NEXT: retl8905;8906; X64-LABEL: test_mm512_mask_max_pd:8907; X64: # %bb.0: # %entry8908; X64-NEXT: kmovw %edi, %k18909; X64-NEXT: vmaxpd %zmm2, %zmm1, %zmm0 {%k1}8910; X64-NEXT: retq8911entry:8912 %0 = tail call <8 x double> @llvm.x86.avx512.max.pd.512(<8 x double> %__A, <8 x double> %__B, i32 4)8913 %1 = bitcast i8 %__U to <8 x i1>8914 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__W8915 ret <8 x double> %28916}8917 8918define <8 x double> @test_mm512_maskz_max_pd(i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B) {8919; X86-LABEL: test_mm512_maskz_max_pd:8920; X86: # %bb.0: # %entry8921; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax8922; X86-NEXT: kmovw %eax, %k18923; X86-NEXT: vmaxpd %zmm1, %zmm0, %zmm0 {%k1} {z}8924; X86-NEXT: retl8925;8926; X64-LABEL: test_mm512_maskz_max_pd:8927; X64: # %bb.0: # %entry8928; X64-NEXT: kmovw %edi, %k18929; X64-NEXT: vmaxpd %zmm1, %zmm0, %zmm0 {%k1} {z}8930; X64-NEXT: retq8931entry:8932 %0 = tail call <8 x double> @llvm.x86.avx512.max.pd.512(<8 x double> %__A, <8 x double> %__B, i32 4)8933 %1 = bitcast i8 %__U to <8 x i1>8934 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> zeroinitializer8935 ret <8 x double> %28936}8937 8938define <16 x float> @test_mm512_mask_max_ps(<16 x float> %__W, i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B) {8939; X86-LABEL: test_mm512_mask_max_ps:8940; X86: # %bb.0: # %entry8941; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax8942; X86-NEXT: kmovw %eax, %k18943; X86-NEXT: vmaxps %zmm2, %zmm1, %zmm0 {%k1}8944; X86-NEXT: retl8945;8946; X64-LABEL: test_mm512_mask_max_ps:8947; X64: # %bb.0: # %entry8948; X64-NEXT: kmovw %edi, %k18949; X64-NEXT: vmaxps %zmm2, %zmm1, %zmm0 {%k1}8950; X64-NEXT: retq8951entry:8952 %0 = tail call <16 x float> @llvm.x86.avx512.max.ps.512(<16 x float> %__A, <16 x float> %__B, i32 4)8953 %1 = bitcast i16 %__U to <16 x i1>8954 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__W8955 ret <16 x float> %28956}8957 8958define <8 x double> @test_mm512_mask_max_round_pd(<8 x double> %__W, i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B) {8959; X86-LABEL: test_mm512_mask_max_round_pd:8960; X86: # %bb.0: # %entry8961; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax8962; X86-NEXT: kmovw %eax, %k18963; X86-NEXT: vmaxpd %zmm2, %zmm1, %zmm0 {%k1}8964; X86-NEXT: retl8965;8966; X64-LABEL: test_mm512_mask_max_round_pd:8967; X64: # %bb.0: # %entry8968; X64-NEXT: kmovw %edi, %k18969; X64-NEXT: vmaxpd %zmm2, %zmm1, %zmm0 {%k1}8970; X64-NEXT: retq8971entry:8972 %0 = tail call <8 x double> @llvm.x86.avx512.max.pd.512(<8 x double> %__A, <8 x double> %__B, i32 4)8973 %1 = bitcast i8 %__U to <8 x i1>8974 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__W8975 ret <8 x double> %28976}8977 8978declare <8 x double> @llvm.x86.avx512.max.pd.512(<8 x double>, <8 x double>, i32)8979 8980define <8 x double> @test_mm512_maskz_max_round_pd(i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B) {8981; X86-LABEL: test_mm512_maskz_max_round_pd:8982; X86: # %bb.0: # %entry8983; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax8984; X86-NEXT: kmovw %eax, %k18985; X86-NEXT: vmaxpd %zmm1, %zmm0, %zmm0 {%k1} {z}8986; X86-NEXT: retl8987;8988; X64-LABEL: test_mm512_maskz_max_round_pd:8989; X64: # %bb.0: # %entry8990; X64-NEXT: kmovw %edi, %k18991; X64-NEXT: vmaxpd %zmm1, %zmm0, %zmm0 {%k1} {z}8992; X64-NEXT: retq8993entry:8994 %0 = tail call <8 x double> @llvm.x86.avx512.max.pd.512(<8 x double> %__A, <8 x double> %__B, i32 4)8995 %1 = bitcast i8 %__U to <8 x i1>8996 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> zeroinitializer8997 ret <8 x double> %28998}8999 9000define <8 x double> @test_mm512_max_round_pd(<8 x double> %__A, <8 x double> %__B) {9001; CHECK-LABEL: test_mm512_max_round_pd:9002; CHECK: # %bb.0: # %entry9003; CHECK-NEXT: vmaxpd %zmm1, %zmm0, %zmm09004; CHECK-NEXT: ret{{[l|q]}}9005entry:9006 %0 = tail call <8 x double> @llvm.x86.avx512.max.pd.512(<8 x double> %__A, <8 x double> %__B, i32 4)9007 ret <8 x double> %09008}9009 9010define <16 x float> @test_mm512_maskz_max_ps(i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B) {9011; X86-LABEL: test_mm512_maskz_max_ps:9012; X86: # %bb.0: # %entry9013; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9014; X86-NEXT: kmovw %eax, %k19015; X86-NEXT: vmaxps %zmm1, %zmm0, %zmm0 {%k1} {z}9016; X86-NEXT: retl9017;9018; X64-LABEL: test_mm512_maskz_max_ps:9019; X64: # %bb.0: # %entry9020; X64-NEXT: kmovw %edi, %k19021; X64-NEXT: vmaxps %zmm1, %zmm0, %zmm0 {%k1} {z}9022; X64-NEXT: retq9023entry:9024 %0 = tail call <16 x float> @llvm.x86.avx512.max.ps.512(<16 x float> %__A, <16 x float> %__B, i32 4)9025 %1 = bitcast i16 %__U to <16 x i1>9026 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> zeroinitializer9027 ret <16 x float> %29028}9029 9030define <16 x float> @test_mm512_mask_max_round_ps(<16 x float> %__W, i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B) {9031; X86-LABEL: test_mm512_mask_max_round_ps:9032; X86: # %bb.0: # %entry9033; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9034; X86-NEXT: kmovw %eax, %k19035; X86-NEXT: vmaxps %zmm2, %zmm1, %zmm0 {%k1}9036; X86-NEXT: retl9037;9038; X64-LABEL: test_mm512_mask_max_round_ps:9039; X64: # %bb.0: # %entry9040; X64-NEXT: kmovw %edi, %k19041; X64-NEXT: vmaxps %zmm2, %zmm1, %zmm0 {%k1}9042; X64-NEXT: retq9043entry:9044 %0 = tail call <16 x float> @llvm.x86.avx512.max.ps.512(<16 x float> %__A, <16 x float> %__B, i32 4)9045 %1 = bitcast i16 %__U to <16 x i1>9046 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__W9047 ret <16 x float> %29048}9049 9050declare <16 x float> @llvm.x86.avx512.max.ps.512(<16 x float>, <16 x float>, i32)9051 9052define <16 x float> @test_mm512_maskz_max_round_ps(i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B) {9053; X86-LABEL: test_mm512_maskz_max_round_ps:9054; X86: # %bb.0: # %entry9055; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9056; X86-NEXT: kmovw %eax, %k19057; X86-NEXT: vmaxps %zmm1, %zmm0, %zmm0 {%k1} {z}9058; X86-NEXT: retl9059;9060; X64-LABEL: test_mm512_maskz_max_round_ps:9061; X64: # %bb.0: # %entry9062; X64-NEXT: kmovw %edi, %k19063; X64-NEXT: vmaxps %zmm1, %zmm0, %zmm0 {%k1} {z}9064; X64-NEXT: retq9065entry:9066 %0 = tail call <16 x float> @llvm.x86.avx512.max.ps.512(<16 x float> %__A, <16 x float> %__B, i32 4)9067 %1 = bitcast i16 %__U to <16 x i1>9068 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> zeroinitializer9069 ret <16 x float> %29070}9071 9072define <16 x float> @test_mm512_max_round_ps(<16 x float> %__A, <16 x float> %__B) {9073; CHECK-LABEL: test_mm512_max_round_ps:9074; CHECK: # %bb.0: # %entry9075; CHECK-NEXT: vmaxps %zmm1, %zmm0, %zmm09076; CHECK-NEXT: ret{{[l|q]}}9077entry:9078 %0 = tail call <16 x float> @llvm.x86.avx512.max.ps.512(<16 x float> %__A, <16 x float> %__B, i32 4)9079 ret <16 x float> %09080}9081 9082define <8 x double> @test_mm512_mask_min_pd(<8 x double> %__W, i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B) {9083; X86-LABEL: test_mm512_mask_min_pd:9084; X86: # %bb.0: # %entry9085; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax9086; X86-NEXT: kmovw %eax, %k19087; X86-NEXT: vminpd %zmm2, %zmm1, %zmm0 {%k1}9088; X86-NEXT: retl9089;9090; X64-LABEL: test_mm512_mask_min_pd:9091; X64: # %bb.0: # %entry9092; X64-NEXT: kmovw %edi, %k19093; X64-NEXT: vminpd %zmm2, %zmm1, %zmm0 {%k1}9094; X64-NEXT: retq9095entry:9096 %0 = tail call <8 x double> @llvm.x86.avx512.min.pd.512(<8 x double> %__A, <8 x double> %__B, i32 4)9097 %1 = bitcast i8 %__U to <8 x i1>9098 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__W9099 ret <8 x double> %29100}9101 9102define <8 x double> @test_mm512_maskz_min_pd(i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B) {9103; X86-LABEL: test_mm512_maskz_min_pd:9104; X86: # %bb.0: # %entry9105; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax9106; X86-NEXT: kmovw %eax, %k19107; X86-NEXT: vminpd %zmm1, %zmm0, %zmm0 {%k1} {z}9108; X86-NEXT: retl9109;9110; X64-LABEL: test_mm512_maskz_min_pd:9111; X64: # %bb.0: # %entry9112; X64-NEXT: kmovw %edi, %k19113; X64-NEXT: vminpd %zmm1, %zmm0, %zmm0 {%k1} {z}9114; X64-NEXT: retq9115entry:9116 %0 = tail call <8 x double> @llvm.x86.avx512.min.pd.512(<8 x double> %__A, <8 x double> %__B, i32 4)9117 %1 = bitcast i8 %__U to <8 x i1>9118 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> zeroinitializer9119 ret <8 x double> %29120}9121 9122define <8 x double> @test_mm512_mask_min_round_pd(<8 x double> %__W, i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B) {9123; X86-LABEL: test_mm512_mask_min_round_pd:9124; X86: # %bb.0: # %entry9125; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax9126; X86-NEXT: kmovw %eax, %k19127; X86-NEXT: vminpd %zmm2, %zmm1, %zmm0 {%k1}9128; X86-NEXT: retl9129;9130; X64-LABEL: test_mm512_mask_min_round_pd:9131; X64: # %bb.0: # %entry9132; X64-NEXT: kmovw %edi, %k19133; X64-NEXT: vminpd %zmm2, %zmm1, %zmm0 {%k1}9134; X64-NEXT: retq9135entry:9136 %0 = tail call <8 x double> @llvm.x86.avx512.min.pd.512(<8 x double> %__A, <8 x double> %__B, i32 4)9137 %1 = bitcast i8 %__U to <8 x i1>9138 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__W9139 ret <8 x double> %29140}9141 9142declare <8 x double> @llvm.x86.avx512.min.pd.512(<8 x double>, <8 x double>, i32)9143 9144define <8 x double> @test_mm512_maskz_min_round_pd(i8 zeroext %__U, <8 x double> %__A, <8 x double> %__B) {9145; X86-LABEL: test_mm512_maskz_min_round_pd:9146; X86: # %bb.0: # %entry9147; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax9148; X86-NEXT: kmovw %eax, %k19149; X86-NEXT: vminpd %zmm1, %zmm0, %zmm0 {%k1} {z}9150; X86-NEXT: retl9151;9152; X64-LABEL: test_mm512_maskz_min_round_pd:9153; X64: # %bb.0: # %entry9154; X64-NEXT: kmovw %edi, %k19155; X64-NEXT: vminpd %zmm1, %zmm0, %zmm0 {%k1} {z}9156; X64-NEXT: retq9157entry:9158 %0 = tail call <8 x double> @llvm.x86.avx512.min.pd.512(<8 x double> %__A, <8 x double> %__B, i32 4)9159 %1 = bitcast i8 %__U to <8 x i1>9160 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> zeroinitializer9161 ret <8 x double> %29162}9163 9164define <8 x double> @test_mm512_min_round_pd(<8 x double> %__A, <8 x double> %__B) {9165; CHECK-LABEL: test_mm512_min_round_pd:9166; CHECK: # %bb.0: # %entry9167; CHECK-NEXT: vminpd %zmm1, %zmm0, %zmm09168; CHECK-NEXT: ret{{[l|q]}}9169entry:9170 %0 = tail call <8 x double> @llvm.x86.avx512.min.pd.512(<8 x double> %__A, <8 x double> %__B, i32 4)9171 ret <8 x double> %09172}9173 9174define <16 x float> @test_mm512_mask_min_ps(<16 x float> %__W, i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B) {9175; X86-LABEL: test_mm512_mask_min_ps:9176; X86: # %bb.0: # %entry9177; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9178; X86-NEXT: kmovw %eax, %k19179; X86-NEXT: vminps %zmm2, %zmm1, %zmm0 {%k1}9180; X86-NEXT: retl9181;9182; X64-LABEL: test_mm512_mask_min_ps:9183; X64: # %bb.0: # %entry9184; X64-NEXT: kmovw %edi, %k19185; X64-NEXT: vminps %zmm2, %zmm1, %zmm0 {%k1}9186; X64-NEXT: retq9187entry:9188 %0 = tail call <16 x float> @llvm.x86.avx512.min.ps.512(<16 x float> %__A, <16 x float> %__B, i32 4)9189 %1 = bitcast i16 %__U to <16 x i1>9190 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__W9191 ret <16 x float> %29192}9193 9194define <16 x float> @test_mm512_maskz_min_ps(i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B) {9195; X86-LABEL: test_mm512_maskz_min_ps:9196; X86: # %bb.0: # %entry9197; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9198; X86-NEXT: kmovw %eax, %k19199; X86-NEXT: vminps %zmm1, %zmm0, %zmm0 {%k1} {z}9200; X86-NEXT: retl9201;9202; X64-LABEL: test_mm512_maskz_min_ps:9203; X64: # %bb.0: # %entry9204; X64-NEXT: kmovw %edi, %k19205; X64-NEXT: vminps %zmm1, %zmm0, %zmm0 {%k1} {z}9206; X64-NEXT: retq9207entry:9208 %0 = tail call <16 x float> @llvm.x86.avx512.min.ps.512(<16 x float> %__A, <16 x float> %__B, i32 4)9209 %1 = bitcast i16 %__U to <16 x i1>9210 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> zeroinitializer9211 ret <16 x float> %29212}9213 9214define <16 x float> @test_mm512_mask_min_round_ps(<16 x float> %__W, i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B) {9215; X86-LABEL: test_mm512_mask_min_round_ps:9216; X86: # %bb.0: # %entry9217; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9218; X86-NEXT: kmovw %eax, %k19219; X86-NEXT: vminps %zmm2, %zmm1, %zmm0 {%k1}9220; X86-NEXT: retl9221;9222; X64-LABEL: test_mm512_mask_min_round_ps:9223; X64: # %bb.0: # %entry9224; X64-NEXT: kmovw %edi, %k19225; X64-NEXT: vminps %zmm2, %zmm1, %zmm0 {%k1}9226; X64-NEXT: retq9227entry:9228 %0 = tail call <16 x float> @llvm.x86.avx512.min.ps.512(<16 x float> %__A, <16 x float> %__B, i32 4)9229 %1 = bitcast i16 %__U to <16 x i1>9230 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__W9231 ret <16 x float> %29232}9233 9234declare <16 x float> @llvm.x86.avx512.min.ps.512(<16 x float>, <16 x float>, i32)9235 9236define <16 x float> @test_mm512_maskz_min_round_ps(i16 zeroext %__U, <16 x float> %__A, <16 x float> %__B) {9237; X86-LABEL: test_mm512_maskz_min_round_ps:9238; X86: # %bb.0: # %entry9239; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9240; X86-NEXT: kmovw %eax, %k19241; X86-NEXT: vminps %zmm1, %zmm0, %zmm0 {%k1} {z}9242; X86-NEXT: retl9243;9244; X64-LABEL: test_mm512_maskz_min_round_ps:9245; X64: # %bb.0: # %entry9246; X64-NEXT: kmovw %edi, %k19247; X64-NEXT: vminps %zmm1, %zmm0, %zmm0 {%k1} {z}9248; X64-NEXT: retq9249entry:9250 %0 = tail call <16 x float> @llvm.x86.avx512.min.ps.512(<16 x float> %__A, <16 x float> %__B, i32 4)9251 %1 = bitcast i16 %__U to <16 x i1>9252 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> zeroinitializer9253 ret <16 x float> %29254}9255 9256define <16 x float> @test_mm512_min_round_ps(<16 x float> %__A, <16 x float> %__B) {9257; CHECK-LABEL: test_mm512_min_round_ps:9258; CHECK: # %bb.0: # %entry9259; CHECK-NEXT: vminps %zmm1, %zmm0, %zmm09260; CHECK-NEXT: ret{{[l|q]}}9261entry:9262 %0 = tail call <16 x float> @llvm.x86.avx512.min.ps.512(<16 x float> %__A, <16 x float> %__B, i32 4)9263 ret <16 x float> %09264}9265 9266define <8 x double> @test_mm512_sqrt_pd(<8 x double> %a) {9267; CHECK-LABEL: test_mm512_sqrt_pd:9268; CHECK: # %bb.0: # %entry9269; CHECK-NEXT: vsqrtpd %zmm0, %zmm09270; CHECK-NEXT: ret{{[l|q]}}9271entry:9272 %0 = tail call <8 x double> @llvm.sqrt.v8f64(<8 x double> %a)9273 ret <8 x double> %09274}9275 9276define <8 x double> @test_mm512_mask_sqrt_pd(<8 x double> %__W, i8 zeroext %__U, <8 x double> %__A) {9277; X86-LABEL: test_mm512_mask_sqrt_pd:9278; X86: # %bb.0: # %entry9279; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax9280; X86-NEXT: kmovw %eax, %k19281; X86-NEXT: vsqrtpd %zmm1, %zmm0 {%k1}9282; X86-NEXT: retl9283;9284; X64-LABEL: test_mm512_mask_sqrt_pd:9285; X64: # %bb.0: # %entry9286; X64-NEXT: kmovw %edi, %k19287; X64-NEXT: vsqrtpd %zmm1, %zmm0 {%k1}9288; X64-NEXT: retq9289entry:9290 %0 = tail call <8 x double> @llvm.sqrt.v8f64(<8 x double> %__A)9291 %1 = bitcast i8 %__U to <8 x i1>9292 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__W9293 ret <8 x double> %29294}9295 9296define <8 x double> @test_mm512_maskz_sqrt_pd(i8 zeroext %__U, <8 x double> %__A) {9297; X86-LABEL: test_mm512_maskz_sqrt_pd:9298; X86: # %bb.0: # %entry9299; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax9300; X86-NEXT: kmovw %eax, %k19301; X86-NEXT: vsqrtpd %zmm0, %zmm0 {%k1} {z}9302; X86-NEXT: retl9303;9304; X64-LABEL: test_mm512_maskz_sqrt_pd:9305; X64: # %bb.0: # %entry9306; X64-NEXT: kmovw %edi, %k19307; X64-NEXT: vsqrtpd %zmm0, %zmm0 {%k1} {z}9308; X64-NEXT: retq9309entry:9310 %0 = tail call <8 x double> @llvm.sqrt.v8f64(<8 x double> %__A)9311 %1 = bitcast i8 %__U to <8 x i1>9312 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> zeroinitializer9313 ret <8 x double> %29314}9315 9316define <8 x double> @test_mm512_mask_sqrt_round_pd(<8 x double> %__W, i8 zeroext %__U, <8 x double> %__A) {9317; X86-LABEL: test_mm512_mask_sqrt_round_pd:9318; X86: # %bb.0: # %entry9319; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax9320; X86-NEXT: kmovw %eax, %k19321; X86-NEXT: vsqrtpd {rn-sae}, %zmm1, %zmm0 {%k1}9322; X86-NEXT: retl9323;9324; X64-LABEL: test_mm512_mask_sqrt_round_pd:9325; X64: # %bb.0: # %entry9326; X64-NEXT: kmovw %edi, %k19327; X64-NEXT: vsqrtpd {rn-sae}, %zmm1, %zmm0 {%k1}9328; X64-NEXT: retq9329entry:9330 %0 = tail call <8 x double> @llvm.x86.avx512.sqrt.pd.512(<8 x double> %__A, i32 8)9331 %1 = bitcast i8 %__U to <8 x i1>9332 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> %__W9333 ret <8 x double> %29334}9335 9336declare <8 x double> @llvm.x86.avx512.sqrt.pd.512(<8 x double>, i32)9337 9338define <8 x double> @test_mm512_maskz_sqrt_round_pd(i8 zeroext %__U, <8 x double> %__A) {9339; X86-LABEL: test_mm512_maskz_sqrt_round_pd:9340; X86: # %bb.0: # %entry9341; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax9342; X86-NEXT: kmovw %eax, %k19343; X86-NEXT: vsqrtpd {rn-sae}, %zmm0, %zmm0 {%k1} {z}9344; X86-NEXT: retl9345;9346; X64-LABEL: test_mm512_maskz_sqrt_round_pd:9347; X64: # %bb.0: # %entry9348; X64-NEXT: kmovw %edi, %k19349; X64-NEXT: vsqrtpd {rn-sae}, %zmm0, %zmm0 {%k1} {z}9350; X64-NEXT: retq9351entry:9352 %0 = tail call <8 x double> @llvm.x86.avx512.sqrt.pd.512(<8 x double> %__A, i32 8)9353 %1 = bitcast i8 %__U to <8 x i1>9354 %2 = select <8 x i1> %1, <8 x double> %0, <8 x double> zeroinitializer9355 ret <8 x double> %29356}9357 9358define <8 x double> @test_mm512_sqrt_round_pd(<8 x double> %__A) {9359; CHECK-LABEL: test_mm512_sqrt_round_pd:9360; CHECK: # %bb.0: # %entry9361; CHECK-NEXT: vsqrtpd {rn-sae}, %zmm0, %zmm09362; CHECK-NEXT: ret{{[l|q]}}9363entry:9364 %0 = tail call <8 x double> @llvm.x86.avx512.sqrt.pd.512(<8 x double> %__A, i32 8)9365 ret <8 x double> %09366}9367 9368define <16 x float> @test_mm512_sqrt_ps(<16 x float> %a) {9369; CHECK-LABEL: test_mm512_sqrt_ps:9370; CHECK: # %bb.0: # %entry9371; CHECK-NEXT: vsqrtps %zmm0, %zmm09372; CHECK-NEXT: ret{{[l|q]}}9373entry:9374 %0 = tail call <16 x float> @llvm.sqrt.v16f32(<16 x float> %a)9375 ret <16 x float> %09376}9377 9378define <16 x float> @test_mm512_mask_sqrt_ps(<16 x float> %__W, i16 zeroext %__U, <16 x float> %__A) {9379; X86-LABEL: test_mm512_mask_sqrt_ps:9380; X86: # %bb.0: # %entry9381; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9382; X86-NEXT: kmovw %eax, %k19383; X86-NEXT: vsqrtps %zmm1, %zmm0 {%k1}9384; X86-NEXT: retl9385;9386; X64-LABEL: test_mm512_mask_sqrt_ps:9387; X64: # %bb.0: # %entry9388; X64-NEXT: kmovw %edi, %k19389; X64-NEXT: vsqrtps %zmm1, %zmm0 {%k1}9390; X64-NEXT: retq9391entry:9392 %0 = tail call <16 x float> @llvm.sqrt.v16f32(<16 x float> %__A)9393 %1 = bitcast i16 %__U to <16 x i1>9394 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__W9395 ret <16 x float> %29396}9397 9398define <16 x float> @test_mm512_maskz_sqrt_ps(i16 zeroext %__U, <16 x float> %__A) {9399; X86-LABEL: test_mm512_maskz_sqrt_ps:9400; X86: # %bb.0: # %entry9401; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9402; X86-NEXT: kmovw %eax, %k19403; X86-NEXT: vsqrtps %zmm0, %zmm0 {%k1} {z}9404; X86-NEXT: retl9405;9406; X64-LABEL: test_mm512_maskz_sqrt_ps:9407; X64: # %bb.0: # %entry9408; X64-NEXT: kmovw %edi, %k19409; X64-NEXT: vsqrtps %zmm0, %zmm0 {%k1} {z}9410; X64-NEXT: retq9411entry:9412 %0 = tail call <16 x float> @llvm.sqrt.v16f32(<16 x float> %__A)9413 %1 = bitcast i16 %__U to <16 x i1>9414 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> zeroinitializer9415 ret <16 x float> %29416}9417 9418define <16 x float> @test_mm512_mask_sqrt_round_ps(<16 x float> %__W, i16 zeroext %__U, <16 x float> %__A) {9419; X86-LABEL: test_mm512_mask_sqrt_round_ps:9420; X86: # %bb.0: # %entry9421; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9422; X86-NEXT: kmovw %eax, %k19423; X86-NEXT: vsqrtps {rn-sae}, %zmm1, %zmm0 {%k1}9424; X86-NEXT: retl9425;9426; X64-LABEL: test_mm512_mask_sqrt_round_ps:9427; X64: # %bb.0: # %entry9428; X64-NEXT: kmovw %edi, %k19429; X64-NEXT: vsqrtps {rn-sae}, %zmm1, %zmm0 {%k1}9430; X64-NEXT: retq9431entry:9432 %0 = tail call <16 x float> @llvm.x86.avx512.sqrt.ps.512(<16 x float> %__A, i32 8)9433 %1 = bitcast i16 %__U to <16 x i1>9434 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %__W9435 ret <16 x float> %29436}9437 9438declare <16 x float> @llvm.x86.avx512.sqrt.ps.512(<16 x float>, i32)9439 9440define <16 x float> @test_mm512_maskz_sqrt_round_ps(i16 zeroext %__U, <16 x float> %__A) {9441; X86-LABEL: test_mm512_maskz_sqrt_round_ps:9442; X86: # %bb.0: # %entry9443; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9444; X86-NEXT: kmovw %eax, %k19445; X86-NEXT: vsqrtps {rn-sae}, %zmm0, %zmm0 {%k1} {z}9446; X86-NEXT: retl9447;9448; X64-LABEL: test_mm512_maskz_sqrt_round_ps:9449; X64: # %bb.0: # %entry9450; X64-NEXT: kmovw %edi, %k19451; X64-NEXT: vsqrtps {rn-sae}, %zmm0, %zmm0 {%k1} {z}9452; X64-NEXT: retq9453entry:9454 %0 = tail call <16 x float> @llvm.x86.avx512.sqrt.ps.512(<16 x float> %__A, i32 8)9455 %1 = bitcast i16 %__U to <16 x i1>9456 %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> zeroinitializer9457 ret <16 x float> %29458}9459 9460define <16 x float> @test_mm512_sqrt_round_ps(<16 x float> %__A) {9461; CHECK-LABEL: test_mm512_sqrt_round_ps:9462; CHECK: # %bb.0: # %entry9463; CHECK-NEXT: vsqrtps {rn-sae}, %zmm0, %zmm09464; CHECK-NEXT: ret{{[l|q]}}9465entry:9466 %0 = tail call <16 x float> @llvm.x86.avx512.sqrt.ps.512(<16 x float> %__A, i32 8)9467 ret <16 x float> %09468}9469 9470define <8 x i64> @test_mm512_rol_epi32(<8 x i64> %__A) local_unnamed_addr #0 {9471; CHECK-LABEL: test_mm512_rol_epi32:9472; CHECK: # %bb.0: # %entry9473; CHECK-NEXT: vprold $5, %zmm0, %zmm09474; CHECK-NEXT: ret{{[l|q]}}9475entry:9476 %0 = bitcast <8 x i64> %__A to <16 x i32>9477 %1 = tail call <16 x i32> @llvm.fshl.v16i32(<16 x i32> %0, <16 x i32> %0, <16 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>)9478 %2 = bitcast <16 x i32> %1 to <8 x i64>9479 ret <8 x i64> %29480}9481 9482define <8 x i64> @test_mm512_mask_rol_epi32(<8 x i64> %__W, i16 zeroext %__U, <8 x i64> %__A) {9483; X86-LABEL: test_mm512_mask_rol_epi32:9484; X86: # %bb.0: # %entry9485; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9486; X86-NEXT: kmovw %eax, %k19487; X86-NEXT: vprold $5, %zmm1, %zmm0 {%k1}9488; X86-NEXT: retl9489;9490; X64-LABEL: test_mm512_mask_rol_epi32:9491; X64: # %bb.0: # %entry9492; X64-NEXT: kmovw %edi, %k19493; X64-NEXT: vprold $5, %zmm1, %zmm0 {%k1}9494; X64-NEXT: retq9495entry:9496 %0 = bitcast <8 x i64> %__A to <16 x i32>9497 %1 = tail call <16 x i32> @llvm.fshl.v16i32(<16 x i32> %0, <16 x i32> %0, <16 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>)9498 %2 = bitcast <8 x i64> %__W to <16 x i32>9499 %3 = bitcast i16 %__U to <16 x i1>9500 %4 = select <16 x i1> %3, <16 x i32> %1, <16 x i32> %29501 %5 = bitcast <16 x i32> %4 to <8 x i64>9502 ret <8 x i64> %59503}9504 9505define <8 x i64> @test_mm512_maskz_rol_epi32(i16 zeroext %__U, <8 x i64> %__A) {9506; X86-LABEL: test_mm512_maskz_rol_epi32:9507; X86: # %bb.0: # %entry9508; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9509; X86-NEXT: kmovw %eax, %k19510; X86-NEXT: vprold $5, %zmm0, %zmm0 {%k1} {z}9511; X86-NEXT: retl9512;9513; X64-LABEL: test_mm512_maskz_rol_epi32:9514; X64: # %bb.0: # %entry9515; X64-NEXT: kmovw %edi, %k19516; X64-NEXT: vprold $5, %zmm0, %zmm0 {%k1} {z}9517; X64-NEXT: retq9518entry:9519 %0 = bitcast <8 x i64> %__A to <16 x i32>9520 %1 = tail call <16 x i32> @llvm.fshl.v16i32(<16 x i32> %0, <16 x i32> %0, <16 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>)9521 %2 = bitcast i16 %__U to <16 x i1>9522 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer9523 %4 = bitcast <16 x i32> %3 to <8 x i64>9524 ret <8 x i64> %49525}9526 9527define <8 x i64> @test_mm512_rol_epi64(<8 x i64> %__A) {9528; CHECK-LABEL: test_mm512_rol_epi64:9529; CHECK: # %bb.0: # %entry9530; CHECK-NEXT: vprolq $5, %zmm0, %zmm09531; CHECK-NEXT: ret{{[l|q]}}9532entry:9533 %0 = tail call <8 x i64> @llvm.fshl.v8i64(<8 x i64> %__A, <8 x i64> %__A, <8 x i64> <i64 5, i64 5, i64 5, i64 5, i64 5, i64 5, i64 5, i64 5>)9534 ret <8 x i64> %09535}9536 9537define <8 x i64> @test_mm512_mask_rol_epi64(<8 x i64> %__W, i8 zeroext %__U, <8 x i64> %__A) {9538; X86-LABEL: test_mm512_mask_rol_epi64:9539; X86: # %bb.0: # %entry9540; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax9541; X86-NEXT: kmovw %eax, %k19542; X86-NEXT: vprolq $5, %zmm1, %zmm0 {%k1}9543; X86-NEXT: retl9544;9545; X64-LABEL: test_mm512_mask_rol_epi64:9546; X64: # %bb.0: # %entry9547; X64-NEXT: kmovw %edi, %k19548; X64-NEXT: vprolq $5, %zmm1, %zmm0 {%k1}9549; X64-NEXT: retq9550entry:9551 %0 = tail call <8 x i64> @llvm.fshl.v8i64(<8 x i64> %__A, <8 x i64> %__A, <8 x i64> <i64 5, i64 5, i64 5, i64 5, i64 5, i64 5, i64 5, i64 5>)9552 %1 = bitcast i8 %__U to <8 x i1>9553 %2 = select <8 x i1> %1, <8 x i64> %0, <8 x i64> %__W9554 ret <8 x i64> %29555}9556 9557define <8 x i64> @test_mm512_maskz_rol_epi64(i8 zeroext %__U, <8 x i64> %__A) {9558; X86-LABEL: test_mm512_maskz_rol_epi64:9559; X86: # %bb.0: # %entry9560; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax9561; X86-NEXT: kmovw %eax, %k19562; X86-NEXT: vprolq $5, %zmm0, %zmm0 {%k1} {z}9563; X86-NEXT: retl9564;9565; X64-LABEL: test_mm512_maskz_rol_epi64:9566; X64: # %bb.0: # %entry9567; X64-NEXT: kmovw %edi, %k19568; X64-NEXT: vprolq $5, %zmm0, %zmm0 {%k1} {z}9569; X64-NEXT: retq9570entry:9571 %0 = tail call <8 x i64> @llvm.fshl.v8i64(<8 x i64> %__A, <8 x i64> %__A, <8 x i64> <i64 5, i64 5, i64 5, i64 5, i64 5, i64 5, i64 5, i64 5>)9572 %1 = bitcast i8 %__U to <8 x i1>9573 %2 = select <8 x i1> %1, <8 x i64> %0, <8 x i64> zeroinitializer9574 ret <8 x i64> %29575}9576 9577define <8 x i64> @test_mm512_rolv_epi32(<8 x i64> %__A, <8 x i64> %__B) {9578; CHECK-LABEL: test_mm512_rolv_epi32:9579; CHECK: # %bb.0: # %entry9580; CHECK-NEXT: vprolvd %zmm1, %zmm0, %zmm09581; CHECK-NEXT: ret{{[l|q]}}9582entry:9583 %0 = bitcast <8 x i64> %__A to <16 x i32>9584 %1 = bitcast <8 x i64> %__B to <16 x i32>9585 %2 = tail call <16 x i32> @llvm.fshl.v16i32(<16 x i32> %0, <16 x i32> %0, <16 x i32> %1)9586 %3 = bitcast <16 x i32> %2 to <8 x i64>9587 ret <8 x i64> %39588}9589 9590define <8 x i64> @test_mm512_mask_rolv_epi32(<8 x i64> %__W, i16 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) {9591; X86-LABEL: test_mm512_mask_rolv_epi32:9592; X86: # %bb.0: # %entry9593; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9594; X86-NEXT: kmovw %eax, %k19595; X86-NEXT: vprolvd %zmm2, %zmm1, %zmm0 {%k1}9596; X86-NEXT: retl9597;9598; X64-LABEL: test_mm512_mask_rolv_epi32:9599; X64: # %bb.0: # %entry9600; X64-NEXT: kmovw %edi, %k19601; X64-NEXT: vprolvd %zmm2, %zmm1, %zmm0 {%k1}9602; X64-NEXT: retq9603entry:9604 %0 = bitcast <8 x i64> %__A to <16 x i32>9605 %1 = bitcast <8 x i64> %__B to <16 x i32>9606 %2 = tail call <16 x i32> @llvm.fshl.v16i32(<16 x i32> %0, <16 x i32> %0, <16 x i32> %1)9607 %3 = bitcast <8 x i64> %__W to <16 x i32>9608 %4 = bitcast i16 %__U to <16 x i1>9609 %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %39610 %6 = bitcast <16 x i32> %5 to <8 x i64>9611 ret <8 x i64> %69612}9613 9614define <8 x i64> @test_mm512_maskz_rolv_epi32(i16 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) {9615; X86-LABEL: test_mm512_maskz_rolv_epi32:9616; X86: # %bb.0: # %entry9617; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9618; X86-NEXT: kmovw %eax, %k19619; X86-NEXT: vprolvd %zmm1, %zmm0, %zmm0 {%k1} {z}9620; X86-NEXT: retl9621;9622; X64-LABEL: test_mm512_maskz_rolv_epi32:9623; X64: # %bb.0: # %entry9624; X64-NEXT: kmovw %edi, %k19625; X64-NEXT: vprolvd %zmm1, %zmm0, %zmm0 {%k1} {z}9626; X64-NEXT: retq9627entry:9628 %0 = bitcast <8 x i64> %__A to <16 x i32>9629 %1 = bitcast <8 x i64> %__B to <16 x i32>9630 %2 = tail call <16 x i32> @llvm.fshl.v16i32(<16 x i32> %0, <16 x i32> %0, <16 x i32> %1)9631 %3 = bitcast i16 %__U to <16 x i1>9632 %4 = select <16 x i1> %3, <16 x i32> %2, <16 x i32> zeroinitializer9633 %5 = bitcast <16 x i32> %4 to <8 x i64>9634 ret <8 x i64> %59635}9636 9637define <8 x i64> @test_mm512_rolv_epi64(<8 x i64> %__A, <8 x i64> %__B) {9638; CHECK-LABEL: test_mm512_rolv_epi64:9639; CHECK: # %bb.0: # %entry9640; CHECK-NEXT: vprolvq %zmm1, %zmm0, %zmm09641; CHECK-NEXT: ret{{[l|q]}}9642entry:9643 %0 = tail call <8 x i64> @llvm.fshl.v8i64(<8 x i64> %__A, <8 x i64> %__A, <8 x i64> %__B)9644 ret <8 x i64> %09645}9646 9647define <8 x i64> @test_mm512_mask_rolv_epi64(<8 x i64> %__W, i8 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) {9648; X86-LABEL: test_mm512_mask_rolv_epi64:9649; X86: # %bb.0: # %entry9650; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax9651; X86-NEXT: kmovw %eax, %k19652; X86-NEXT: vprolvq %zmm2, %zmm1, %zmm0 {%k1}9653; X86-NEXT: retl9654;9655; X64-LABEL: test_mm512_mask_rolv_epi64:9656; X64: # %bb.0: # %entry9657; X64-NEXT: kmovw %edi, %k19658; X64-NEXT: vprolvq %zmm2, %zmm1, %zmm0 {%k1}9659; X64-NEXT: retq9660entry:9661 %0 = tail call <8 x i64> @llvm.fshl.v8i64(<8 x i64> %__A, <8 x i64> %__A, <8 x i64> %__B)9662 %1 = bitcast i8 %__U to <8 x i1>9663 %2 = select <8 x i1> %1, <8 x i64> %0, <8 x i64> %__W9664 ret <8 x i64> %29665}9666 9667define <8 x i64> @test_mm512_maskz_rolv_epi64(i8 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) {9668; X86-LABEL: test_mm512_maskz_rolv_epi64:9669; X86: # %bb.0: # %entry9670; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax9671; X86-NEXT: kmovw %eax, %k19672; X86-NEXT: vprolvq %zmm1, %zmm0, %zmm0 {%k1} {z}9673; X86-NEXT: retl9674;9675; X64-LABEL: test_mm512_maskz_rolv_epi64:9676; X64: # %bb.0: # %entry9677; X64-NEXT: kmovw %edi, %k19678; X64-NEXT: vprolvq %zmm1, %zmm0, %zmm0 {%k1} {z}9679; X64-NEXT: retq9680entry:9681 %0 = tail call <8 x i64> @llvm.fshl.v8i64(<8 x i64> %__A, <8 x i64> %__A, <8 x i64> %__B)9682 %1 = bitcast i8 %__U to <8 x i1>9683 %2 = select <8 x i1> %1, <8 x i64> %0, <8 x i64> zeroinitializer9684 ret <8 x i64> %29685}9686 9687define <8 x i64> @test_mm512_ror_epi32(<8 x i64> %__A) {9688; CHECK-LABEL: test_mm512_ror_epi32:9689; CHECK: # %bb.0: # %entry9690; CHECK-NEXT: vprord $5, %zmm0, %zmm09691; CHECK-NEXT: ret{{[l|q]}}9692entry:9693 %0 = bitcast <8 x i64> %__A to <16 x i32>9694 %1 = tail call <16 x i32> @llvm.fshr.v16i32(<16 x i32> %0, <16 x i32> %0, <16 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>)9695 %2 = bitcast <16 x i32> %1 to <8 x i64>9696 ret <8 x i64> %29697}9698 9699 9700define <8 x i64> @test_mm512_mask_ror_epi32(<8 x i64> %__W, i16 zeroext %__U, <8 x i64> %__A) {9701; X86-LABEL: test_mm512_mask_ror_epi32:9702; X86: # %bb.0: # %entry9703; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9704; X86-NEXT: kmovw %eax, %k19705; X86-NEXT: vprord $5, %zmm1, %zmm0 {%k1}9706; X86-NEXT: retl9707;9708; X64-LABEL: test_mm512_mask_ror_epi32:9709; X64: # %bb.0: # %entry9710; X64-NEXT: kmovw %edi, %k19711; X64-NEXT: vprord $5, %zmm1, %zmm0 {%k1}9712; X64-NEXT: retq9713entry:9714 %0 = bitcast <8 x i64> %__A to <16 x i32>9715 %1 = tail call <16 x i32> @llvm.fshr.v16i32(<16 x i32> %0, <16 x i32> %0, <16 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>)9716 %2 = bitcast <8 x i64> %__W to <16 x i32>9717 %3 = bitcast i16 %__U to <16 x i1>9718 %4 = select <16 x i1> %3, <16 x i32> %1, <16 x i32> %29719 %5 = bitcast <16 x i32> %4 to <8 x i64>9720 ret <8 x i64> %59721}9722 9723define <8 x i64> @test_mm512_maskz_ror_epi32(i16 zeroext %__U, <8 x i64> %__A) {9724; X86-LABEL: test_mm512_maskz_ror_epi32:9725; X86: # %bb.0: # %entry9726; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9727; X86-NEXT: kmovw %eax, %k19728; X86-NEXT: vprord $5, %zmm0, %zmm0 {%k1} {z}9729; X86-NEXT: retl9730;9731; X64-LABEL: test_mm512_maskz_ror_epi32:9732; X64: # %bb.0: # %entry9733; X64-NEXT: kmovw %edi, %k19734; X64-NEXT: vprord $5, %zmm0, %zmm0 {%k1} {z}9735; X64-NEXT: retq9736entry:9737 %0 = bitcast <8 x i64> %__A to <16 x i32>9738 %1 = tail call <16 x i32> @llvm.fshr.v16i32(<16 x i32> %0, <16 x i32> %0, <16 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>)9739 %2 = bitcast i16 %__U to <16 x i1>9740 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer9741 %4 = bitcast <16 x i32> %3 to <8 x i64>9742 ret <8 x i64> %49743}9744 9745define <8 x i64> @test_mm512_ror_epi64(<8 x i64> %__A) {9746; CHECK-LABEL: test_mm512_ror_epi64:9747; CHECK: # %bb.0: # %entry9748; CHECK-NEXT: vprorq $5, %zmm0, %zmm09749; CHECK-NEXT: ret{{[l|q]}}9750entry:9751 %0 = tail call <8 x i64> @llvm.fshr.v8i64(<8 x i64> %__A, <8 x i64> %__A, <8 x i64> <i64 5, i64 5, i64 5, i64 5, i64 5, i64 5, i64 5, i64 5>)9752 ret <8 x i64> %09753}9754 9755define <8 x i64> @test_mm512_mask_ror_epi64(<8 x i64> %__W, i8 zeroext %__U, <8 x i64> %__A) {9756; X86-LABEL: test_mm512_mask_ror_epi64:9757; X86: # %bb.0: # %entry9758; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax9759; X86-NEXT: kmovw %eax, %k19760; X86-NEXT: vprorq $5, %zmm1, %zmm0 {%k1}9761; X86-NEXT: retl9762;9763; X64-LABEL: test_mm512_mask_ror_epi64:9764; X64: # %bb.0: # %entry9765; X64-NEXT: kmovw %edi, %k19766; X64-NEXT: vprorq $5, %zmm1, %zmm0 {%k1}9767; X64-NEXT: retq9768entry:9769 %0 = tail call <8 x i64> @llvm.fshr.v8i64(<8 x i64> %__A, <8 x i64> %__A, <8 x i64> <i64 5, i64 5, i64 5, i64 5, i64 5, i64 5, i64 5, i64 5>)9770 %1 = bitcast i8 %__U to <8 x i1>9771 %2 = select <8 x i1> %1, <8 x i64> %0, <8 x i64> %__W9772 ret <8 x i64> %29773}9774 9775define <8 x i64> @test_mm512_maskz_ror_epi64(i8 zeroext %__U, <8 x i64> %__A) {9776; X86-LABEL: test_mm512_maskz_ror_epi64:9777; X86: # %bb.0: # %entry9778; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax9779; X86-NEXT: kmovw %eax, %k19780; X86-NEXT: vprorq $5, %zmm0, %zmm0 {%k1} {z}9781; X86-NEXT: retl9782;9783; X64-LABEL: test_mm512_maskz_ror_epi64:9784; X64: # %bb.0: # %entry9785; X64-NEXT: kmovw %edi, %k19786; X64-NEXT: vprorq $5, %zmm0, %zmm0 {%k1} {z}9787; X64-NEXT: retq9788entry:9789 %0 = tail call <8 x i64> @llvm.fshr.v8i64(<8 x i64> %__A, <8 x i64> %__A, <8 x i64> <i64 5, i64 5, i64 5, i64 5, i64 5, i64 5, i64 5, i64 5>)9790 %1 = bitcast i8 %__U to <8 x i1>9791 %2 = select <8 x i1> %1, <8 x i64> %0, <8 x i64> zeroinitializer9792 ret <8 x i64> %29793}9794 9795define <8 x i64> @test_mm512_rorv_epi32(<8 x i64> %__A, <8 x i64> %__B) {9796; CHECK-LABEL: test_mm512_rorv_epi32:9797; CHECK: # %bb.0: # %entry9798; CHECK-NEXT: vprorvd %zmm1, %zmm0, %zmm09799; CHECK-NEXT: ret{{[l|q]}}9800entry:9801 %0 = bitcast <8 x i64> %__A to <16 x i32>9802 %1 = bitcast <8 x i64> %__B to <16 x i32>9803 %2 = tail call <16 x i32> @llvm.fshr.v16i32(<16 x i32> %0, <16 x i32> %0, <16 x i32> %1)9804 %3 = bitcast <16 x i32> %2 to <8 x i64>9805 ret <8 x i64> %39806}9807 9808define <8 x i64> @test_mm512_mask_rorv_epi32(<8 x i64> %__W, i16 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) {9809; X86-LABEL: test_mm512_mask_rorv_epi32:9810; X86: # %bb.0: # %entry9811; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9812; X86-NEXT: kmovw %eax, %k19813; X86-NEXT: vprorvd %zmm2, %zmm1, %zmm0 {%k1}9814; X86-NEXT: retl9815;9816; X64-LABEL: test_mm512_mask_rorv_epi32:9817; X64: # %bb.0: # %entry9818; X64-NEXT: kmovw %edi, %k19819; X64-NEXT: vprorvd %zmm2, %zmm1, %zmm0 {%k1}9820; X64-NEXT: retq9821entry:9822 %0 = bitcast <8 x i64> %__A to <16 x i32>9823 %1 = bitcast <8 x i64> %__B to <16 x i32>9824 %2 = tail call <16 x i32> @llvm.fshr.v16i32(<16 x i32> %0, <16 x i32> %0, <16 x i32> %1)9825 %3 = bitcast <8 x i64> %__W to <16 x i32>9826 %4 = bitcast i16 %__U to <16 x i1>9827 %5 = select <16 x i1> %4, <16 x i32> %2, <16 x i32> %39828 %6 = bitcast <16 x i32> %5 to <8 x i64>9829 ret <8 x i64> %69830}9831 9832define <8 x i64> @test_mm512_maskz_rorv_epi32(i16 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) {9833; X86-LABEL: test_mm512_maskz_rorv_epi32:9834; X86: # %bb.0: # %entry9835; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax9836; X86-NEXT: kmovw %eax, %k19837; X86-NEXT: vprorvd %zmm1, %zmm0, %zmm0 {%k1} {z}9838; X86-NEXT: retl9839;9840; X64-LABEL: test_mm512_maskz_rorv_epi32:9841; X64: # %bb.0: # %entry9842; X64-NEXT: kmovw %edi, %k19843; X64-NEXT: vprorvd %zmm1, %zmm0, %zmm0 {%k1} {z}9844; X64-NEXT: retq9845entry:9846 %0 = bitcast <8 x i64> %__A to <16 x i32>9847 %1 = bitcast <8 x i64> %__B to <16 x i32>9848 %2 = tail call <16 x i32> @llvm.fshr.v16i32(<16 x i32> %0, <16 x i32> %0, <16 x i32> %1)9849 %3 = bitcast i16 %__U to <16 x i1>9850 %4 = select <16 x i1> %3, <16 x i32> %2, <16 x i32> zeroinitializer9851 %5 = bitcast <16 x i32> %4 to <8 x i64>9852 ret <8 x i64> %59853}9854 9855define <8 x i64> @test_mm512_rorv_epi64(<8 x i64> %__A, <8 x i64> %__B) {9856; CHECK-LABEL: test_mm512_rorv_epi64:9857; CHECK: # %bb.0: # %entry9858; CHECK-NEXT: vprorvq %zmm1, %zmm0, %zmm09859; CHECK-NEXT: ret{{[l|q]}}9860entry:9861 %0 = tail call <8 x i64> @llvm.fshr.v8i64(<8 x i64> %__A, <8 x i64> %__A, <8 x i64> %__B)9862 ret <8 x i64> %09863}9864 9865define <8 x i64> @test_mm512_mask_rorv_epi64(<8 x i64> %__W, i8 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) {9866; X86-LABEL: test_mm512_mask_rorv_epi64:9867; X86: # %bb.0: # %entry9868; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax9869; X86-NEXT: kmovw %eax, %k19870; X86-NEXT: vprorvq %zmm2, %zmm1, %zmm0 {%k1}9871; X86-NEXT: retl9872;9873; X64-LABEL: test_mm512_mask_rorv_epi64:9874; X64: # %bb.0: # %entry9875; X64-NEXT: kmovw %edi, %k19876; X64-NEXT: vprorvq %zmm2, %zmm1, %zmm0 {%k1}9877; X64-NEXT: retq9878entry:9879 %0 = tail call <8 x i64> @llvm.fshr.v8i64(<8 x i64> %__A, <8 x i64> %__A, <8 x i64> %__B)9880 %1 = bitcast i8 %__U to <8 x i1>9881 %2 = select <8 x i1> %1, <8 x i64> %0, <8 x i64> %__W9882 ret <8 x i64> %29883}9884 9885define <8 x i64> @test_mm512_maskz_rorv_epi64(i8 zeroext %__U, <8 x i64> %__A, <8 x i64> %__B) {9886; X86-LABEL: test_mm512_maskz_rorv_epi64:9887; X86: # %bb.0: # %entry9888; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax9889; X86-NEXT: kmovw %eax, %k19890; X86-NEXT: vprorvq %zmm1, %zmm0, %zmm0 {%k1} {z}9891; X86-NEXT: retl9892;9893; X64-LABEL: test_mm512_maskz_rorv_epi64:9894; X64: # %bb.0: # %entry9895; X64-NEXT: kmovw %edi, %k19896; X64-NEXT: vprorvq %zmm1, %zmm0, %zmm0 {%k1} {z}9897; X64-NEXT: retq9898entry:9899 %0 = tail call <8 x i64> @llvm.fshr.v8i64(<8 x i64> %__A, <8 x i64> %__A, <8 x i64> %__B)9900 %1 = bitcast i8 %__U to <8 x i1>9901 %2 = select <8 x i1> %1, <8 x i64> %0, <8 x i64> zeroinitializer9902 ret <8 x i64> %29903}9904 9905declare <8 x double> @llvm.fma.v8f64(<8 x double>, <8 x double>, <8 x double>) #99906declare <16 x float> @llvm.fma.v16f32(<16 x float>, <16 x float>, <16 x float>) #99907declare float @llvm.fma.f32(float, float, float) #99908declare double @llvm.fma.f64(double, double, double) #99909declare <8 x i64> @llvm.masked.expandload.v8i64(ptr, <8 x i1>, <8 x i64>)9910declare <8 x double> @llvm.masked.expandload.v8f64(ptr, <8 x i1>, <8 x double>)9911declare <16 x i32> @llvm.masked.expandload.v16i32(ptr, <16 x i1>, <16 x i32>) #109912declare <16 x float> @llvm.masked.expandload.v16f32(ptr, <16 x i1>, <16 x float>)9913declare void @llvm.masked.compressstore.v8f64(<8 x double>, ptr, <8 x i1>)9914declare void @llvm.masked.compressstore.v8i64(<8 x i64>, ptr, <8 x i1>)9915declare void @llvm.masked.compressstore.v16f32(<16 x float>, ptr, <16 x i1>)9916declare void @llvm.masked.compressstore.v16i32(<16 x i32>, ptr, <16 x i1>)9917declare <4 x double> @llvm.x86.avx.max.pd.256(<4 x double>, <4 x double>)9918declare <2 x double> @llvm.x86.sse2.max.pd(<2 x double>, <2 x double>)9919declare <4 x double> @llvm.x86.avx.min.pd.256(<4 x double>, <4 x double>)9920declare <2 x double> @llvm.x86.sse2.min.pd(<2 x double>, <2 x double>)9921declare <8 x float> @llvm.x86.avx.max.ps.256(<8 x float>, <8 x float>)9922declare <4 x float> @llvm.x86.sse.max.ps(<4 x float>, <4 x float>)9923declare <8 x float> @llvm.x86.avx.min.ps.256(<8 x float>, <8 x float>)9924declare <4 x float> @llvm.x86.sse.min.ps(<4 x float>, <4 x float>)9925declare <8 x double> @llvm.sqrt.v8f64(<8 x double>)9926declare <16 x float> @llvm.sqrt.v16f32(<16 x float>)9927 9928declare <16 x i32> @llvm.fshl.v16i32(<16 x i32>, <16 x i32>, <16 x i32>)9929declare <8 x i64> @llvm.fshl.v8i64(<8 x i64>, <8 x i64>, <8 x i64>)9930declare <16 x i32> @llvm.fshr.v16i32(<16 x i32>, <16 x i32>, <16 x i32>)9931declare <8 x i64> @llvm.fshr.v8i64(<8 x i64>, <8 x i64>, <8 x i64>)9932 9933!0 = !{i32 1}9934 9935