brintos / llvm-project-archived public Read only

1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X643; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X864 5 6define <8 x double> @test_mask_compress_pd_512(<8 x double> %data, <8 x double> %passthru, i8 %mask) {7; X64-LABEL: test_mask_compress_pd_512:8; X64:       # %bb.0:9; X64-NEXT:    kmovw %edi, %k110; X64-NEXT:    vcompresspd %zmm0, %zmm1 {%k1}11; X64-NEXT:    vmovdqa64 %zmm1, %zmm012; X64-NEXT:    retq13;14; X86-LABEL: test_mask_compress_pd_512:15; X86:       # %bb.0:16; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax17; X86-NEXT:    kmovw %eax, %k118; X86-NEXT:    vcompresspd %zmm0, %zmm1 {%k1}19; X86-NEXT:    vmovdqa64 %zmm1, %zmm020; X86-NEXT:    retl21  %1 = bitcast i8 %mask to <8 x i1>22  %2 = call <8 x double> @llvm.x86.avx512.mask.compress.v8f64(<8 x double> %data, <8 x double> %passthru, <8 x i1> %1)23  ret <8 x double> %224}25 26define <8 x double> @test_maskz_compress_pd_512(<8 x double> %data, i8 %mask) {27; X64-LABEL: test_maskz_compress_pd_512:28; X64:       # %bb.0:29; X64-NEXT:    kmovw %edi, %k130; X64-NEXT:    vcompresspd %zmm0, %zmm0 {%k1} {z}31; X64-NEXT:    retq32;33; X86-LABEL: test_maskz_compress_pd_512:34; X86:       # %bb.0:35; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax36; X86-NEXT:    kmovw %eax, %k137; X86-NEXT:    vcompresspd %zmm0, %zmm0 {%k1} {z}38; X86-NEXT:    retl39  %1 = bitcast i8 %mask to <8 x i1>40  %2 = call <8 x double> @llvm.x86.avx512.mask.compress.v8f64(<8 x double> %data, <8 x double> zeroinitializer, <8 x i1> %1)41  ret <8 x double> %242}43 44define <8 x double> @test_compress_pd_512(<8 x double> %data) {45; CHECK-LABEL: test_compress_pd_512:46; CHECK:       # %bb.0:47; CHECK-NEXT:    ret{{[l|q]}}48  %1 = call <8 x double> @llvm.x86.avx512.mask.compress.v8f64(<8 x double> %data, <8 x double> undef, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>)49  ret <8 x double> %150}51 52define <16 x float> @test_mask_compress_ps_512(<16 x float> %data, <16 x float> %passthru, i16 %mask) {53; X64-LABEL: test_mask_compress_ps_512:54; X64:       # %bb.0:55; X64-NEXT:    kmovw %edi, %k156; X64-NEXT:    vcompressps %zmm0, %zmm1 {%k1}57; X64-NEXT:    vmovdqa64 %zmm1, %zmm058; X64-NEXT:    retq59;60; X86-LABEL: test_mask_compress_ps_512:61; X86:       # %bb.0:62; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k163; X86-NEXT:    vcompressps %zmm0, %zmm1 {%k1}64; X86-NEXT:    vmovdqa64 %zmm1, %zmm065; X86-NEXT:    retl66  %1 = bitcast i16 %mask to <16 x i1>67  %2 = call <16 x float> @llvm.x86.avx512.mask.compress.v16f32(<16 x float> %data, <16 x float> %passthru, <16 x i1> %1)68  ret <16 x float> %269}70 71define <16 x float> @test_maskz_compress_ps_512(<16 x float> %data, i16 %mask) {72; X64-LABEL: test_maskz_compress_ps_512:73; X64:       # %bb.0:74; X64-NEXT:    kmovw %edi, %k175; X64-NEXT:    vcompressps %zmm0, %zmm0 {%k1} {z}76; X64-NEXT:    retq77;78; X86-LABEL: test_maskz_compress_ps_512:79; X86:       # %bb.0:80; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k181; X86-NEXT:    vcompressps %zmm0, %zmm0 {%k1} {z}82; X86-NEXT:    retl83  %1 = bitcast i16 %mask to <16 x i1>84  %2 = call <16 x float> @llvm.x86.avx512.mask.compress.v16f32(<16 x float> %data, <16 x float> zeroinitializer, <16 x i1> %1)85  ret <16 x float> %286}87 88define <16 x float> @test_compress_ps_512(<16 x float> %data) {89; CHECK-LABEL: test_compress_ps_512:90; CHECK:       # %bb.0:91; CHECK-NEXT:    ret{{[l|q]}}92  %1 = call <16 x float> @llvm.x86.avx512.mask.compress.v16f32(<16 x float> %data, <16 x float> undef, <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>)93  ret <16 x float> %194}95 96define <8 x i64> @test_mask_compress_q_512(<8 x i64> %data, <8 x i64> %passthru, i8 %mask) {97; X64-LABEL: test_mask_compress_q_512:98; X64:       # %bb.0:99; X64-NEXT:    kmovw %edi, %k1100; X64-NEXT:    vpcompressq %zmm0, %zmm1 {%k1}101; X64-NEXT:    vmovdqa64 %zmm1, %zmm0102; X64-NEXT:    retq103;104; X86-LABEL: test_mask_compress_q_512:105; X86:       # %bb.0:106; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax107; X86-NEXT:    kmovw %eax, %k1108; X86-NEXT:    vpcompressq %zmm0, %zmm1 {%k1}109; X86-NEXT:    vmovdqa64 %zmm1, %zmm0110; X86-NEXT:    retl111  %1 = bitcast i8 %mask to <8 x i1>112  %2 = call <8 x i64> @llvm.x86.avx512.mask.compress.v8i64(<8 x i64> %data, <8 x i64> %passthru, <8 x i1> %1)113  ret <8 x i64> %2114}115 116define <8 x i64> @test_maskz_compress_q_512(<8 x i64> %data, i8 %mask) {117; X64-LABEL: test_maskz_compress_q_512:118; X64:       # %bb.0:119; X64-NEXT:    kmovw %edi, %k1120; X64-NEXT:    vpcompressq %zmm0, %zmm0 {%k1} {z}121; X64-NEXT:    retq122;123; X86-LABEL: test_maskz_compress_q_512:124; X86:       # %bb.0:125; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax126; X86-NEXT:    kmovw %eax, %k1127; X86-NEXT:    vpcompressq %zmm0, %zmm0 {%k1} {z}128; X86-NEXT:    retl129  %1 = bitcast i8 %mask to <8 x i1>130  %2 = call <8 x i64> @llvm.x86.avx512.mask.compress.v8i64(<8 x i64> %data, <8 x i64> zeroinitializer, <8 x i1> %1)131  ret <8 x i64> %2132}133 134define <8 x i64> @test_compress_q_512(<8 x i64> %data) {135; CHECK-LABEL: test_compress_q_512:136; CHECK:       # %bb.0:137; CHECK-NEXT:    ret{{[l|q]}}138  %1 = call <8 x i64> @llvm.x86.avx512.mask.compress.v8i64(<8 x i64> %data, <8 x i64> undef, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>)139  ret <8 x i64> %1140}141 142define <16 x i32> @test_mask_compress_d_512(<16 x i32> %data, <16 x i32> %passthru, i16 %mask) {143; X64-LABEL: test_mask_compress_d_512:144; X64:       # %bb.0:145; X64-NEXT:    kmovw %edi, %k1146; X64-NEXT:    vpcompressd %zmm0, %zmm1 {%k1}147; X64-NEXT:    vmovdqa64 %zmm1, %zmm0148; X64-NEXT:    retq149;150; X86-LABEL: test_mask_compress_d_512:151; X86:       # %bb.0:152; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k1153; X86-NEXT:    vpcompressd %zmm0, %zmm1 {%k1}154; X86-NEXT:    vmovdqa64 %zmm1, %zmm0155; X86-NEXT:    retl156  %1 = bitcast i16 %mask to <16 x i1>157  %2 = call <16 x i32> @llvm.x86.avx512.mask.compress.v16i32(<16 x i32> %data, <16 x i32> %passthru, <16 x i1> %1)158  ret <16 x i32> %2159}160 161define <16 x i32> @test_maskz_compress_d_512(<16 x i32> %data, i16 %mask) {162; X64-LABEL: test_maskz_compress_d_512:163; X64:       # %bb.0:164; X64-NEXT:    kmovw %edi, %k1165; X64-NEXT:    vpcompressd %zmm0, %zmm0 {%k1} {z}166; X64-NEXT:    retq167;168; X86-LABEL: test_maskz_compress_d_512:169; X86:       # %bb.0:170; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k1171; X86-NEXT:    vpcompressd %zmm0, %zmm0 {%k1} {z}172; X86-NEXT:    retl173  %1 = bitcast i16 %mask to <16 x i1>174  %2 = call <16 x i32> @llvm.x86.avx512.mask.compress.v16i32(<16 x i32> %data, <16 x i32> zeroinitializer, <16 x i1> %1)175  ret <16 x i32> %2176}177 178define <16 x i32> @test_compress_d_512(<16 x i32> %data) {179; CHECK-LABEL: test_compress_d_512:180; CHECK:       # %bb.0:181; CHECK-NEXT:    ret{{[l|q]}}182  %1 = call <16 x i32> @llvm.x86.avx512.mask.compress.v16i32(<16 x i32> %data, <16 x i32> undef, <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>)183  ret <16 x i32> %1184}185 186define <8 x double> @test_expand_pd_512(<8 x double> %data) {187; CHECK-LABEL: test_expand_pd_512:188; CHECK:       # %bb.0:189; CHECK-NEXT:    ret{{[l|q]}}190  %1 = call <8 x double> @llvm.x86.avx512.mask.expand.v8f64(<8 x double> %data, <8 x double> undef, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>)191  ret <8 x double> %1192}193 194define <8 x double> @test_mask_expand_pd_512(<8 x double> %data, <8 x double> %passthru, i8 %mask) {195; X64-LABEL: test_mask_expand_pd_512:196; X64:       # %bb.0:197; X64-NEXT:    kmovw %edi, %k1198; X64-NEXT:    vexpandpd %zmm0, %zmm1 {%k1}199; X64-NEXT:    vmovdqa64 %zmm1, %zmm0200; X64-NEXT:    retq201;202; X86-LABEL: test_mask_expand_pd_512:203; X86:       # %bb.0:204; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax205; X86-NEXT:    kmovw %eax, %k1206; X86-NEXT:    vexpandpd %zmm0, %zmm1 {%k1}207; X86-NEXT:    vmovdqa64 %zmm1, %zmm0208; X86-NEXT:    retl209  %1 = bitcast i8 %mask to <8 x i1>210  %2 = call <8 x double> @llvm.x86.avx512.mask.expand.v8f64(<8 x double> %data, <8 x double> %passthru, <8 x i1> %1)211  ret <8 x double> %2212}213 214define <8 x double> @test_maskz_expand_pd_512(<8 x double> %data, i8 %mask) {215; X64-LABEL: test_maskz_expand_pd_512:216; X64:       # %bb.0:217; X64-NEXT:    kmovw %edi, %k1218; X64-NEXT:    vexpandpd %zmm0, %zmm0 {%k1} {z}219; X64-NEXT:    retq220;221; X86-LABEL: test_maskz_expand_pd_512:222; X86:       # %bb.0:223; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax224; X86-NEXT:    kmovw %eax, %k1225; X86-NEXT:    vexpandpd %zmm0, %zmm0 {%k1} {z}226; X86-NEXT:    retl227  %1 = bitcast i8 %mask to <8 x i1>228  %2 = call <8 x double> @llvm.x86.avx512.mask.expand.v8f64(<8 x double> %data, <8 x double> zeroinitializer, <8 x i1> %1)229  ret <8 x double> %2230}231 232define <16 x float> @test_expand_ps_512(<16 x float> %data) {233; CHECK-LABEL: test_expand_ps_512:234; CHECK:       # %bb.0:235; CHECK-NEXT:    ret{{[l|q]}}236  %1 = call <16 x float> @llvm.x86.avx512.mask.expand.v16f32(<16 x float> %data, <16 x float> undef, <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>)237  ret <16 x float> %1238}239 240define <16 x float> @test_mask_expand_ps_512(<16 x float> %data, <16 x float> %passthru, i16 %mask) {241; X64-LABEL: test_mask_expand_ps_512:242; X64:       # %bb.0:243; X64-NEXT:    kmovw %edi, %k1244; X64-NEXT:    vexpandps %zmm0, %zmm1 {%k1}245; X64-NEXT:    vmovdqa64 %zmm1, %zmm0246; X64-NEXT:    retq247;248; X86-LABEL: test_mask_expand_ps_512:249; X86:       # %bb.0:250; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k1251; X86-NEXT:    vexpandps %zmm0, %zmm1 {%k1}252; X86-NEXT:    vmovdqa64 %zmm1, %zmm0253; X86-NEXT:    retl254  %1 = bitcast i16 %mask to <16 x i1>255  %2 = call <16 x float> @llvm.x86.avx512.mask.expand.v16f32(<16 x float> %data, <16 x float> %passthru, <16 x i1> %1)256  ret <16 x float> %2257}258 259define <16 x float> @test_maskz_expand_ps_512(<16 x float> %data, i16 %mask) {260; X64-LABEL: test_maskz_expand_ps_512:261; X64:       # %bb.0:262; X64-NEXT:    kmovw %edi, %k1263; X64-NEXT:    vexpandps %zmm0, %zmm0 {%k1} {z}264; X64-NEXT:    retq265;266; X86-LABEL: test_maskz_expand_ps_512:267; X86:       # %bb.0:268; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k1269; X86-NEXT:    vexpandps %zmm0, %zmm0 {%k1} {z}270; X86-NEXT:    retl271  %1 = bitcast i16 %mask to <16 x i1>272  %2 = call <16 x float> @llvm.x86.avx512.mask.expand.v16f32(<16 x float> %data, <16 x float> zeroinitializer, <16 x i1> %1)273  ret <16 x float> %2274}275 276define <8 x i64> @test_expand_q_512(<8 x i64> %data) {277; CHECK-LABEL: test_expand_q_512:278; CHECK:       # %bb.0:279; CHECK-NEXT:    ret{{[l|q]}}280  %1 = call <8 x i64> @llvm.x86.avx512.mask.expand.v8i64(<8 x i64> %data, <8 x i64> undef, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>)281  ret <8 x i64> %1282}283 284define <8 x i64> @test_mask_expand_q_512(<8 x i64> %data, <8 x i64> %passthru, i8 %mask) {285; X64-LABEL: test_mask_expand_q_512:286; X64:       # %bb.0:287; X64-NEXT:    kmovw %edi, %k1288; X64-NEXT:    vpexpandq %zmm0, %zmm1 {%k1}289; X64-NEXT:    vmovdqa64 %zmm1, %zmm0290; X64-NEXT:    retq291;292; X86-LABEL: test_mask_expand_q_512:293; X86:       # %bb.0:294; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax295; X86-NEXT:    kmovw %eax, %k1296; X86-NEXT:    vpexpandq %zmm0, %zmm1 {%k1}297; X86-NEXT:    vmovdqa64 %zmm1, %zmm0298; X86-NEXT:    retl299  %1 = bitcast i8 %mask to <8 x i1>300  %2 = call <8 x i64> @llvm.x86.avx512.mask.expand.v8i64(<8 x i64> %data, <8 x i64> %passthru, <8 x i1> %1)301  ret <8 x i64> %2302}303 304define <8 x i64> @test_maskz_expand_q_512(<8 x i64> %data, i8 %mask) {305; X64-LABEL: test_maskz_expand_q_512:306; X64:       # %bb.0:307; X64-NEXT:    kmovw %edi, %k1308; X64-NEXT:    vpexpandq %zmm0, %zmm0 {%k1} {z}309; X64-NEXT:    retq310;311; X86-LABEL: test_maskz_expand_q_512:312; X86:       # %bb.0:313; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax314; X86-NEXT:    kmovw %eax, %k1315; X86-NEXT:    vpexpandq %zmm0, %zmm0 {%k1} {z}316; X86-NEXT:    retl317  %1 = bitcast i8 %mask to <8 x i1>318  %2 = call <8 x i64> @llvm.x86.avx512.mask.expand.v8i64(<8 x i64> %data, <8 x i64> zeroinitializer, <8 x i1> %1)319  ret <8 x i64> %2320}321 322define <16 x i32> @test_expand_d_512(<16 x i32> %data) {323; CHECK-LABEL: test_expand_d_512:324; CHECK:       # %bb.0:325; CHECK-NEXT:    ret{{[l|q]}}326  %1 = call <16 x i32> @llvm.x86.avx512.mask.expand.v16i32(<16 x i32> %data, <16 x i32> undef, <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>)327  ret <16 x i32> %1328}329 330define <16 x i32> @test_mask_expand_d_512(<16 x i32> %data, <16 x i32> %passthru, i16 %mask) {331; X64-LABEL: test_mask_expand_d_512:332; X64:       # %bb.0:333; X64-NEXT:    kmovw %edi, %k1334; X64-NEXT:    vpexpandd %zmm0, %zmm1 {%k1}335; X64-NEXT:    vmovdqa64 %zmm1, %zmm0336; X64-NEXT:    retq337;338; X86-LABEL: test_mask_expand_d_512:339; X86:       # %bb.0:340; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k1341; X86-NEXT:    vpexpandd %zmm0, %zmm1 {%k1}342; X86-NEXT:    vmovdqa64 %zmm1, %zmm0343; X86-NEXT:    retl344  %1 = bitcast i16 %mask to <16 x i1>345  %2 = call <16 x i32> @llvm.x86.avx512.mask.expand.v16i32(<16 x i32> %data, <16 x i32> %passthru, <16 x i1> %1)346  ret <16 x i32> %2347}348 349define <16 x i32> @test_maskz_expand_d_512(<16 x i32> %data, i16 %mask) {350; X64-LABEL: test_maskz_expand_d_512:351; X64:       # %bb.0:352; X64-NEXT:    kmovw %edi, %k1353; X64-NEXT:    vpexpandd %zmm0, %zmm0 {%k1} {z}354; X64-NEXT:    retq355;356; X86-LABEL: test_maskz_expand_d_512:357; X86:       # %bb.0:358; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k1359; X86-NEXT:    vpexpandd %zmm0, %zmm0 {%k1} {z}360; X86-NEXT:    retl361  %1 = bitcast i16 %mask to <16 x i1>362  %2 = call <16 x i32> @llvm.x86.avx512.mask.expand.v16i32(<16 x i32> %data, <16 x i32> zeroinitializer, <16 x i1> %1)363  ret <16 x i32> %2364}365 366define <16 x float> @test_rcp_ps_512(<16 x float> %a0) {367; CHECK-LABEL: test_rcp_ps_512:368; CHECK:       # %bb.0:369; CHECK-NEXT:    vrcp14ps %zmm0, %zmm0370; CHECK-NEXT:    ret{{[l|q]}}371  %res = call <16 x float> @llvm.x86.avx512.rcp14.ps.512(<16 x float> %a0, <16 x float> zeroinitializer, i16 -1) ; <<16 x float>> [#uses=1]372  ret <16 x float> %res373}374declare <16 x float> @llvm.x86.avx512.rcp14.ps.512(<16 x float>, <16 x float>, i16) nounwind readnone375 376define <8 x double> @test_rcp_pd_512(<8 x double> %a0) {377; CHECK-LABEL: test_rcp_pd_512:378; CHECK:       # %bb.0:379; CHECK-NEXT:    vrcp14pd %zmm0, %zmm0380; CHECK-NEXT:    ret{{[l|q]}}381  %res = call <8 x double> @llvm.x86.avx512.rcp14.pd.512(<8 x double> %a0, <8 x double> zeroinitializer, i8 -1) ; <<8 x double>> [#uses=1]382  ret <8 x double> %res383}384declare <8 x double> @llvm.x86.avx512.rcp14.pd.512(<8 x double>, <8 x double>, i8) nounwind readnone385 386declare <2 x double> @llvm.x86.avx512.mask.rndscale.sd(<2 x double>, <2 x double>, <2 x double>, i8, i32, i32)387 388define <2 x double> @test_rndscale_sd(<2 x double> %a, <2 x double> %b) {389; CHECK-LABEL: test_rndscale_sd:390; CHECK:       # %bb.0:391; CHECK-NEXT:    vroundsd $11, %xmm1, %xmm0, %xmm0392; CHECK-NEXT:    ret{{[l|q]}}393  %res = call <2 x double> @llvm.x86.avx512.mask.rndscale.sd(<2 x double> %a, <2 x double> %b, <2 x double> undef, i8 -1, i32 11, i32 4)394  ret <2 x double>%res395}396 397define <2 x double> @test_rndscale_sd_mask(<2 x double> %a, <2 x double> %b, <2 x double> %c, i8 %mask) {398; X64-LABEL: test_rndscale_sd_mask:399; X64:       # %bb.0:400; X64-NEXT:    kmovw %edi, %k1401; X64-NEXT:    vrndscalesd $11, %xmm1, %xmm0, %xmm2 {%k1}402; X64-NEXT:    vmovapd %xmm2, %xmm0403; X64-NEXT:    retq404;405; X86-LABEL: test_rndscale_sd_mask:406; X86:       # %bb.0:407; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax408; X86-NEXT:    kmovw %eax, %k1409; X86-NEXT:    vrndscalesd $11, %xmm1, %xmm0, %xmm2 {%k1}410; X86-NEXT:    vmovapd %xmm2, %xmm0411; X86-NEXT:    retl412  %res = call <2 x double> @llvm.x86.avx512.mask.rndscale.sd(<2 x double> %a, <2 x double> %b, <2 x double> %c, i8 %mask, i32 11, i32 4)413  ret <2 x double>%res414}415 416define <2 x double> @test_rndscale_sd_mask_load(<2 x double> %a, ptr %bptr, <2 x double> %c, i8 %mask) {417; X64-LABEL: test_rndscale_sd_mask_load:418; X64:       # %bb.0:419; X64-NEXT:    kmovw %esi, %k1420; X64-NEXT:    vrndscalesd $11, (%rdi), %xmm0, %xmm1 {%k1}421; X64-NEXT:    vmovapd %xmm1, %xmm0422; X64-NEXT:    retq423;424; X86-LABEL: test_rndscale_sd_mask_load:425; X86:       # %bb.0:426; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax427; X86-NEXT:    kmovw %eax, %k1428; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax429; X86-NEXT:    vrndscalesd $11, (%eax), %xmm0, %xmm1 {%k1}430; X86-NEXT:    vmovapd %xmm1, %xmm0431; X86-NEXT:    retl432  %b = load <2 x double>, ptr %bptr433  %res = call <2 x double> @llvm.x86.avx512.mask.rndscale.sd(<2 x double> %a, <2 x double> %b, <2 x double> %c, i8 %mask, i32 11, i32 4)434  ret <2 x double>%res435}436 437define <2 x double> @test_rndscale_sd_maskz(<2 x double> %a, <2 x double> %b, i8 %mask) {438; X64-LABEL: test_rndscale_sd_maskz:439; X64:       # %bb.0:440; X64-NEXT:    kmovw %edi, %k1441; X64-NEXT:    vrndscalesd $11, %xmm1, %xmm0, %xmm0 {%k1} {z}442; X64-NEXT:    retq443;444; X86-LABEL: test_rndscale_sd_maskz:445; X86:       # %bb.0:446; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax447; X86-NEXT:    kmovw %eax, %k1448; X86-NEXT:    vrndscalesd $11, %xmm1, %xmm0, %xmm0 {%k1} {z}449; X86-NEXT:    retl450  %res = call <2 x double> @llvm.x86.avx512.mask.rndscale.sd(<2 x double> %a, <2 x double> %b, <2 x double> zeroinitializer, i8 %mask, i32 11, i32 4)451  ret <2 x double>%res452}453 454declare <4 x float> @llvm.x86.avx512.mask.rndscale.ss(<4 x float>, <4 x float>, <4 x float>, i8, i32, i32)455 456define <4 x float> @test_rndscale_ss(<4 x float> %a, <4 x float> %b) {457; CHECK-LABEL: test_rndscale_ss:458; CHECK:       # %bb.0:459; CHECK-NEXT:    vroundss $11, %xmm1, %xmm0, %xmm0460; CHECK-NEXT:    ret{{[l|q]}}461  %res = call <4 x float> @llvm.x86.avx512.mask.rndscale.ss(<4 x float> %a, <4 x float> %b, <4 x float> undef, i8 -1, i32 11, i32 4)462  ret <4 x float>%res463}464 465define <4 x float> @test_rndscale_ss_load(<4 x float> %a, ptr %bptr) {466; X64-LABEL: test_rndscale_ss_load:467; X64:       # %bb.0:468; X64-NEXT:    vroundss $11, (%rdi), %xmm0, %xmm0469; X64-NEXT:    retq470;471; X86-LABEL: test_rndscale_ss_load:472; X86:       # %bb.0:473; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax474; X86-NEXT:    vroundss $11, (%eax), %xmm0, %xmm0475; X86-NEXT:    retl476  %b = load <4 x float>, ptr %bptr477  %res = call <4 x float> @llvm.x86.avx512.mask.rndscale.ss(<4 x float> %a, <4 x float> %b, <4 x float> undef, i8 -1, i32 11, i32 4)478  ret <4 x float>%res479}480 481define <4 x float> @test_rndscale_ss_mask(<4 x float> %a, <4 x float> %b, <4 x float> %c, i8 %mask) {482; X64-LABEL: test_rndscale_ss_mask:483; X64:       # %bb.0:484; X64-NEXT:    kmovw %edi, %k1485; X64-NEXT:    vrndscaless $11, %xmm1, %xmm0, %xmm2 {%k1}486; X64-NEXT:    vmovaps %xmm2, %xmm0487; X64-NEXT:    retq488;489; X86-LABEL: test_rndscale_ss_mask:490; X86:       # %bb.0:491; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax492; X86-NEXT:    kmovw %eax, %k1493; X86-NEXT:    vrndscaless $11, %xmm1, %xmm0, %xmm2 {%k1}494; X86-NEXT:    vmovaps %xmm2, %xmm0495; X86-NEXT:    retl496  %res = call <4 x float> @llvm.x86.avx512.mask.rndscale.ss(<4 x float> %a, <4 x float> %b, <4 x float> %c, i8 %mask, i32 11, i32 4)497  ret <4 x float>%res498}499 500define <4 x float> @test_rndscale_ss_maskz(<4 x float> %a, <4 x float> %b, i8 %mask) {501; X64-LABEL: test_rndscale_ss_maskz:502; X64:       # %bb.0:503; X64-NEXT:    kmovw %edi, %k1504; X64-NEXT:    vrndscaless $11, %xmm1, %xmm0, %xmm0 {%k1} {z}505; X64-NEXT:    retq506;507; X86-LABEL: test_rndscale_ss_maskz:508; X86:       # %bb.0:509; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax510; X86-NEXT:    kmovw %eax, %k1511; X86-NEXT:    vrndscaless $11, %xmm1, %xmm0, %xmm0 {%k1} {z}512; X86-NEXT:    retl513  %res = call <4 x float> @llvm.x86.avx512.mask.rndscale.ss(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 %mask, i32 11, i32 4)514  ret <4 x float>%res515}516 517declare <8 x double> @llvm.x86.avx512.mask.rndscale.pd.512(<8 x double>, i32, <8 x double>, i8, i32)518 519define <8 x double> @test7(<8 x double> %a) {520; CHECK-LABEL: test7:521; CHECK:       # %bb.0:522; CHECK-NEXT:    vrndscalepd $11, %zmm0, %zmm0523; CHECK-NEXT:    ret{{[l|q]}}524  %res = call <8 x double> @llvm.x86.avx512.mask.rndscale.pd.512(<8 x double> %a, i32 11, <8 x double> %a, i8 -1, i32 4)525  ret <8 x double>%res526}527 528declare <16 x float> @llvm.x86.avx512.mask.rndscale.ps.512(<16 x float>, i32, <16 x float>, i16, i32)529 530define <16 x float> @test8(<16 x float> %a) {531; CHECK-LABEL: test8:532; CHECK:       # %bb.0:533; CHECK-NEXT:    vrndscaleps $11, %zmm0, %zmm0534; CHECK-NEXT:    ret{{[l|q]}}535  %res = call <16 x float> @llvm.x86.avx512.mask.rndscale.ps.512(<16 x float> %a, i32 11, <16 x float> %a, i16 -1, i32 4)536  ret <16 x float>%res537}538 539define <16 x float> @test_rsqrt_ps_512(<16 x float> %a0) {540; CHECK-LABEL: test_rsqrt_ps_512:541; CHECK:       # %bb.0:542; CHECK-NEXT:    vrsqrt14ps %zmm0, %zmm0543; CHECK-NEXT:    ret{{[l|q]}}544  %res = call <16 x float> @llvm.x86.avx512.rsqrt14.ps.512(<16 x float> %a0, <16 x float> zeroinitializer, i16 -1) ; <<16 x float>> [#uses=1]545  ret <16 x float> %res546}547declare <16 x float> @llvm.x86.avx512.rsqrt14.ps.512(<16 x float>, <16 x float>, i16) nounwind readnone548 549define <8 x double> @test_sqrt_pd_512(<8 x double> %a0) {550; CHECK-LABEL: test_sqrt_pd_512:551; CHECK:       # %bb.0:552; CHECK-NEXT:    vsqrtpd %zmm0, %zmm0553; CHECK-NEXT:    ret{{[l|q]}}554  %1 = call <8 x double> @llvm.sqrt.v8f64(<8 x double> %a0)555  ret <8 x double> %1556}557 558define <8 x double> @test_mask_sqrt_pd_512(<8 x double> %a0, <8 x double> %passthru, i8 %mask) {559; X64-LABEL: test_mask_sqrt_pd_512:560; X64:       # %bb.0:561; X64-NEXT:    kmovw %edi, %k1562; X64-NEXT:    vsqrtpd %zmm0, %zmm1 {%k1}563; X64-NEXT:    vmovapd %zmm1, %zmm0564; X64-NEXT:    retq565;566; X86-LABEL: test_mask_sqrt_pd_512:567; X86:       # %bb.0:568; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax569; X86-NEXT:    kmovw %eax, %k1570; X86-NEXT:    vsqrtpd %zmm0, %zmm1 {%k1}571; X86-NEXT:    vmovapd %zmm1, %zmm0572; X86-NEXT:    retl573  %1 = call <8 x double> @llvm.sqrt.v8f64(<8 x double> %a0)574  %2 = bitcast i8 %mask to <8 x i1>575  %3 = select <8 x i1> %2, <8 x double> %1, <8 x double> %passthru576  ret <8 x double> %3577}578 579define <8 x double> @test_maskz_sqrt_pd_512(<8 x double> %a0, i8 %mask) {580; X64-LABEL: test_maskz_sqrt_pd_512:581; X64:       # %bb.0:582; X64-NEXT:    kmovw %edi, %k1583; X64-NEXT:    vsqrtpd %zmm0, %zmm0 {%k1} {z}584; X64-NEXT:    retq585;586; X86-LABEL: test_maskz_sqrt_pd_512:587; X86:       # %bb.0:588; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax589; X86-NEXT:    kmovw %eax, %k1590; X86-NEXT:    vsqrtpd %zmm0, %zmm0 {%k1} {z}591; X86-NEXT:    retl592  %1 = call <8 x double> @llvm.sqrt.v8f64(<8 x double> %a0)593  %2 = bitcast i8 %mask to <8 x i1>594  %3 = select <8 x i1> %2, <8 x double> %1, <8 x double> zeroinitializer595  ret <8 x double> %3596}597declare <8 x double> @llvm.sqrt.v8f64(<8 x double>)598 599define <8 x double> @test_sqrt_round_pd_512(<8 x double> %a0) {600; CHECK-LABEL: test_sqrt_round_pd_512:601; CHECK:       # %bb.0:602; CHECK-NEXT:    vsqrtpd {rz-sae}, %zmm0, %zmm0603; CHECK-NEXT:    ret{{[l|q]}}604  %1 = call <8 x double> @llvm.x86.avx512.sqrt.pd.512(<8 x double> %a0, i32 11)605  ret <8 x double> %1606}607 608define <8 x double> @test_mask_sqrt_round_pd_512(<8 x double> %a0, <8 x double> %passthru, i8 %mask) {609; X64-LABEL: test_mask_sqrt_round_pd_512:610; X64:       # %bb.0:611; X64-NEXT:    kmovw %edi, %k1612; X64-NEXT:    vsqrtpd {rz-sae}, %zmm0, %zmm1 {%k1}613; X64-NEXT:    vmovapd %zmm1, %zmm0614; X64-NEXT:    retq615;616; X86-LABEL: test_mask_sqrt_round_pd_512:617; X86:       # %bb.0:618; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax619; X86-NEXT:    kmovw %eax, %k1620; X86-NEXT:    vsqrtpd {rz-sae}, %zmm0, %zmm1 {%k1}621; X86-NEXT:    vmovapd %zmm1, %zmm0622; X86-NEXT:    retl623  %1 = call <8 x double> @llvm.x86.avx512.sqrt.pd.512(<8 x double> %a0, i32 11)624  %2 = bitcast i8 %mask to <8 x i1>625  %3 = select <8 x i1> %2, <8 x double> %1, <8 x double> %passthru626  ret <8 x double> %3627}628 629define <8 x double> @test_maskz_sqrt_round_pd_512(<8 x double> %a0, i8 %mask) {630; X64-LABEL: test_maskz_sqrt_round_pd_512:631; X64:       # %bb.0:632; X64-NEXT:    kmovw %edi, %k1633; X64-NEXT:    vsqrtpd {rz-sae}, %zmm0, %zmm0 {%k1} {z}634; X64-NEXT:    retq635;636; X86-LABEL: test_maskz_sqrt_round_pd_512:637; X86:       # %bb.0:638; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax639; X86-NEXT:    kmovw %eax, %k1640; X86-NEXT:    vsqrtpd {rz-sae}, %zmm0, %zmm0 {%k1} {z}641; X86-NEXT:    retl642  %1 = call <8 x double> @llvm.x86.avx512.sqrt.pd.512(<8 x double> %a0, i32 11)643  %2 = bitcast i8 %mask to <8 x i1>644  %3 = select <8 x i1> %2, <8 x double> %1, <8 x double> zeroinitializer645  ret <8 x double> %3646}647declare <8 x double> @llvm.x86.avx512.sqrt.pd.512(<8 x double>, i32) nounwind readnone648 649define <16 x float> @test_sqrt_ps_512(<16 x float> %a0) {650; CHECK-LABEL: test_sqrt_ps_512:651; CHECK:       # %bb.0:652; CHECK-NEXT:    vsqrtps %zmm0, %zmm0653; CHECK-NEXT:    ret{{[l|q]}}654  %1 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> %a0)655  ret <16 x float> %1656}657 658define <16 x float> @test_mask_sqrt_ps_512(<16 x float> %a0, <16 x float> %passthru, i16 %mask) {659; X64-LABEL: test_mask_sqrt_ps_512:660; X64:       # %bb.0:661; X64-NEXT:    kmovw %edi, %k1662; X64-NEXT:    vsqrtps %zmm0, %zmm1 {%k1}663; X64-NEXT:    vmovaps %zmm1, %zmm0664; X64-NEXT:    retq665;666; X86-LABEL: test_mask_sqrt_ps_512:667; X86:       # %bb.0:668; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k1669; X86-NEXT:    vsqrtps %zmm0, %zmm1 {%k1}670; X86-NEXT:    vmovaps %zmm1, %zmm0671; X86-NEXT:    retl672  %1 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> %a0)673  %2 = bitcast i16 %mask to <16 x i1>674  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %passthru675  ret <16 x float> %3676}677 678define <16 x float> @test_maskz_sqrt_ps_512(<16 x float> %a0, i16 %mask) {679; X64-LABEL: test_maskz_sqrt_ps_512:680; X64:       # %bb.0:681; X64-NEXT:    kmovw %edi, %k1682; X64-NEXT:    vsqrtps %zmm0, %zmm0 {%k1} {z}683; X64-NEXT:    retq684;685; X86-LABEL: test_maskz_sqrt_ps_512:686; X86:       # %bb.0:687; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k1688; X86-NEXT:    vsqrtps %zmm0, %zmm0 {%k1} {z}689; X86-NEXT:    retl690  %1 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> %a0)691  %2 = bitcast i16 %mask to <16 x i1>692  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer693  ret <16 x float> %3694}695declare <16 x float> @llvm.sqrt.v16f32(<16 x float>)696 697define <16 x float> @test_sqrt_round_ps_512(<16 x float> %a0) {698; CHECK-LABEL: test_sqrt_round_ps_512:699; CHECK:       # %bb.0:700; CHECK-NEXT:    vsqrtps {rz-sae}, %zmm0, %zmm0701; CHECK-NEXT:    ret{{[l|q]}}702  %1 = call <16 x float> @llvm.x86.avx512.sqrt.ps.512(<16 x float> %a0, i32 11)703  ret <16 x float> %1704}705 706define <16 x float> @test_mask_sqrt_round_ps_512(<16 x float> %a0, <16 x float> %passthru, i16 %mask) {707; X64-LABEL: test_mask_sqrt_round_ps_512:708; X64:       # %bb.0:709; X64-NEXT:    kmovw %edi, %k1710; X64-NEXT:    vsqrtps {rz-sae}, %zmm0, %zmm1 {%k1}711; X64-NEXT:    vmovaps %zmm1, %zmm0712; X64-NEXT:    retq713;714; X86-LABEL: test_mask_sqrt_round_ps_512:715; X86:       # %bb.0:716; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k1717; X86-NEXT:    vsqrtps {rz-sae}, %zmm0, %zmm1 {%k1}718; X86-NEXT:    vmovaps %zmm1, %zmm0719; X86-NEXT:    retl720  %1 = call <16 x float> @llvm.x86.avx512.sqrt.ps.512(<16 x float> %a0, i32 11)721  %2 = bitcast i16 %mask to <16 x i1>722  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %passthru723  ret <16 x float> %3724}725 726define <16 x float> @test_maskz_sqrt_round_ps_512(<16 x float> %a0, i16 %mask) {727; X64-LABEL: test_maskz_sqrt_round_ps_512:728; X64:       # %bb.0:729; X64-NEXT:    kmovw %edi, %k1730; X64-NEXT:    vsqrtps {rz-sae}, %zmm0, %zmm0 {%k1} {z}731; X64-NEXT:    retq732;733; X86-LABEL: test_maskz_sqrt_round_ps_512:734; X86:       # %bb.0:735; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k1736; X86-NEXT:    vsqrtps {rz-sae}, %zmm0, %zmm0 {%k1} {z}737; X86-NEXT:    retl738  %1 = call <16 x float> @llvm.x86.avx512.sqrt.ps.512(<16 x float> %a0, i32 11)739  %2 = bitcast i16 %mask to <16 x i1>740  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer741  ret <16 x float> %3742}743declare <16 x float> @llvm.x86.avx512.sqrt.ps.512(<16 x float>, i32) nounwind readnone744 745define <8 x double> @test_getexp_pd_512(<8 x double> %a0) {746; CHECK-LABEL: test_getexp_pd_512:747; CHECK:       # %bb.0:748; CHECK-NEXT:    vgetexppd %zmm0, %zmm0749; CHECK-NEXT:    ret{{[l|q]}}750  %res = call <8 x double> @llvm.x86.avx512.mask.getexp.pd.512(<8 x double> %a0,  <8 x double> zeroinitializer, i8 -1, i32 4)751  ret <8 x double> %res752}753define <8 x double> @test_getexp_round_pd_512(<8 x double> %a0) {754; CHECK-LABEL: test_getexp_round_pd_512:755; CHECK:       # %bb.0:756; CHECK-NEXT:    vgetexppd {sae}, %zmm0, %zmm0757; CHECK-NEXT:    ret{{[l|q]}}758  %res = call <8 x double> @llvm.x86.avx512.mask.getexp.pd.512(<8 x double> %a0,  <8 x double> zeroinitializer, i8 -1, i32 12)759  ret <8 x double> %res760}761declare <8 x double> @llvm.x86.avx512.mask.getexp.pd.512(<8 x double>, <8 x double>, i8, i32) nounwind readnone762 763define <16 x float> @test_getexp_ps_512(<16 x float> %a0) {764; CHECK-LABEL: test_getexp_ps_512:765; CHECK:       # %bb.0:766; CHECK-NEXT:    vgetexpps %zmm0, %zmm0767; CHECK-NEXT:    ret{{[l|q]}}768  %res = call <16 x float> @llvm.x86.avx512.mask.getexp.ps.512(<16 x float> %a0, <16 x float> zeroinitializer, i16 -1, i32 4)769  ret <16 x float> %res770}771 772define <16 x float> @test_getexp_round_ps_512(<16 x float> %a0) {773; CHECK-LABEL: test_getexp_round_ps_512:774; CHECK:       # %bb.0:775; CHECK-NEXT:    vgetexpps {sae}, %zmm0, %zmm0776; CHECK-NEXT:    ret{{[l|q]}}777  %res = call <16 x float> @llvm.x86.avx512.mask.getexp.ps.512(<16 x float> %a0, <16 x float> zeroinitializer, i16 -1, i32 8)778  ret <16 x float> %res779}780declare <16 x float> @llvm.x86.avx512.mask.getexp.ps.512(<16 x float>, <16 x float>, i16, i32) nounwind readnone781 782declare <4 x float> @llvm.x86.avx512.mask.sqrt.ss(<4 x float>, <4 x float>, <4 x float>, i8, i32) nounwind readnone783 784define <4 x float> @test_sqrt_ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 %mask) {785; X64-LABEL: test_sqrt_ss:786; X64:       # %bb.0:787; X64-NEXT:    kmovw %edi, %k1788; X64-NEXT:    vmovaps %xmm2, %xmm3789; X64-NEXT:    vsqrtss %xmm1, %xmm0, %xmm3 {%k1}790; X64-NEXT:    vsqrtss {rd-sae}, %xmm1, %xmm0, %xmm2 {%k1}791; X64-NEXT:    vaddps %xmm2, %xmm3, %xmm2792; X64-NEXT:    vsqrtss {ru-sae}, %xmm1, %xmm0, %xmm3 {%k1} {z}793; X64-NEXT:    vsqrtss {rz-sae}, %xmm1, %xmm0, %xmm0794; X64-NEXT:    vaddps %xmm0, %xmm3, %xmm0795; X64-NEXT:    vaddps %xmm0, %xmm2, %xmm0796; X64-NEXT:    retq797;798; X86-LABEL: test_sqrt_ss:799; X86:       # %bb.0:800; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax801; X86-NEXT:    kmovw %eax, %k1802; X86-NEXT:    vmovaps %xmm2, %xmm3803; X86-NEXT:    vsqrtss %xmm1, %xmm0, %xmm3 {%k1}804; X86-NEXT:    vsqrtss {rd-sae}, %xmm1, %xmm0, %xmm2 {%k1}805; X86-NEXT:    vaddps %xmm2, %xmm3, %xmm2806; X86-NEXT:    vsqrtss {ru-sae}, %xmm1, %xmm0, %xmm3 {%k1} {z}807; X86-NEXT:    vsqrtss {rz-sae}, %xmm1, %xmm0, %xmm0808; X86-NEXT:    vaddps %xmm0, %xmm3, %xmm0809; X86-NEXT:    vaddps %xmm0, %xmm2, %xmm0810; X86-NEXT:    retl811  %res0 = call <4 x float> @llvm.x86.avx512.mask.sqrt.ss(<4 x float>%a0, <4 x float> %a1, <4 x float> %a2, i8 %mask, i32 4)812  %res1 = call <4 x float> @llvm.x86.avx512.mask.sqrt.ss(<4 x float>%a0, <4 x float> %a1, <4 x float> %a2, i8 %mask, i32 9)813  %res2 = call <4 x float> @llvm.x86.avx512.mask.sqrt.ss(<4 x float>%a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 %mask, i32 10)814  %res3 = call <4 x float> @llvm.x86.avx512.mask.sqrt.ss(<4 x float>%a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 -1, i32 11)815 816  %res.1 = fadd <4 x float> %res0, %res1817  %res.2 = fadd <4 x float> %res2, %res3818  %res   = fadd <4 x float> %res.1, %res.2819  ret <4 x float> %res820}821 822declare <2 x double> @llvm.x86.avx512.mask.sqrt.sd(<2 x double>, <2 x double>, <2 x double>, i8, i32) nounwind readnone823 824define <2 x double> @test_sqrt_sd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 %mask) {825; X64-LABEL: test_sqrt_sd:826; X64:       # %bb.0:827; X64-NEXT:    kmovw %edi, %k1828; X64-NEXT:    vmovapd %xmm2, %xmm3829; X64-NEXT:    vsqrtsd %xmm1, %xmm0, %xmm3 {%k1}830; X64-NEXT:    vsqrtsd {rd-sae}, %xmm1, %xmm0, %xmm2 {%k1}831; X64-NEXT:    vaddpd %xmm2, %xmm3, %xmm2832; X64-NEXT:    vsqrtsd {ru-sae}, %xmm1, %xmm0, %xmm3 {%k1} {z}833; X64-NEXT:    vsqrtsd {rz-sae}, %xmm1, %xmm0, %xmm0834; X64-NEXT:    vaddpd %xmm0, %xmm3, %xmm0835; X64-NEXT:    vaddpd %xmm0, %xmm2, %xmm0836; X64-NEXT:    retq837;838; X86-LABEL: test_sqrt_sd:839; X86:       # %bb.0:840; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax841; X86-NEXT:    kmovw %eax, %k1842; X86-NEXT:    vmovapd %xmm2, %xmm3843; X86-NEXT:    vsqrtsd %xmm1, %xmm0, %xmm3 {%k1}844; X86-NEXT:    vsqrtsd {rd-sae}, %xmm1, %xmm0, %xmm2 {%k1}845; X86-NEXT:    vaddpd %xmm2, %xmm3, %xmm2846; X86-NEXT:    vsqrtsd {ru-sae}, %xmm1, %xmm0, %xmm3 {%k1} {z}847; X86-NEXT:    vsqrtsd {rz-sae}, %xmm1, %xmm0, %xmm0848; X86-NEXT:    vaddpd %xmm0, %xmm3, %xmm0849; X86-NEXT:    vaddpd %xmm0, %xmm2, %xmm0850; X86-NEXT:    retl851  %res0 = call <2 x double> @llvm.x86.avx512.mask.sqrt.sd(<2 x double>%a0, <2 x double> %a1, <2 x double> %a2, i8 %mask, i32 4)852  %res1 = call <2 x double> @llvm.x86.avx512.mask.sqrt.sd(<2 x double>%a0, <2 x double> %a1, <2 x double> %a2, i8 %mask, i32 9)853  %res2 = call <2 x double> @llvm.x86.avx512.mask.sqrt.sd(<2 x double>%a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 %mask, i32 10)854  %res3 = call <2 x double> @llvm.x86.avx512.mask.sqrt.sd(<2 x double>%a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 -1, i32 11)855 856  %res.1 = fadd <2 x double> %res0, %res1857  %res.2 = fadd <2 x double> %res2, %res3858  %res   = fadd <2 x double> %res.1, %res.2859  ret <2 x double> %res860}861 862define i32 @test_x86_avx512_cvttsd2usi(<2 x double> %a0) {863; CHECK-LABEL: test_x86_avx512_cvttsd2usi:864; CHECK:       # %bb.0:865; CHECK-NEXT:    vcvttsd2usi %xmm0, %ecx866; CHECK-NEXT:    vcvttsd2usi {sae}, %xmm0, %eax867; CHECK-NEXT:    addl %ecx, %eax868; CHECK-NEXT:    ret{{[l|q]}}869  %res0 = call i32 @llvm.x86.avx512.cvttsd2usi(<2 x double> %a0, i32 4) ;870  %res1 = call i32 @llvm.x86.avx512.cvttsd2usi(<2 x double> %a0, i32 8) ;871  %res2 = add i32 %res0, %res1872  ret i32 %res2873}874declare i32 @llvm.x86.avx512.cvttsd2usi(<2 x double>, i32) nounwind readnone875 876define i32 @test_x86_avx512_cvttsd2si(<2 x double> %a0) {877; CHECK-LABEL: test_x86_avx512_cvttsd2si:878; CHECK:       # %bb.0:879; CHECK-NEXT:    vcvttsd2si %xmm0, %ecx880; CHECK-NEXT:    vcvttsd2si {sae}, %xmm0, %eax881; CHECK-NEXT:    addl %ecx, %eax882; CHECK-NEXT:    ret{{[l|q]}}883  %res0 = call i32 @llvm.x86.avx512.cvttsd2si(<2 x double> %a0, i32 4) ;884  %res1 = call i32 @llvm.x86.avx512.cvttsd2si(<2 x double> %a0, i32 8) ;885  %res2 = add i32 %res0, %res1886  ret i32 %res2887}888declare i32 @llvm.x86.avx512.cvttsd2si(<2 x double>, i32) nounwind readnone889 890define i32 @test_x86_avx512_cvttss2si(<4 x float> %a0) {891; CHECK-LABEL: test_x86_avx512_cvttss2si:892; CHECK:       # %bb.0:893; CHECK-NEXT:    vcvttss2si {sae}, %xmm0, %ecx894; CHECK-NEXT:    vcvttss2si %xmm0, %eax895; CHECK-NEXT:    addl %ecx, %eax896; CHECK-NEXT:    ret{{[l|q]}}897  %res0 = call i32 @llvm.x86.avx512.cvttss2si(<4 x float> %a0, i32 8) ;898  %res1 = call i32 @llvm.x86.avx512.cvttss2si(<4 x float> %a0, i32 4) ;899  %res2 = add i32 %res0, %res1900  ret i32 %res2901}902declare i32 @llvm.x86.avx512.cvttss2si(<4 x float>, i32) nounwind readnone903 904define i32 @test_x86_avx512_cvttss2si_load(ptr %a0) {905; X64-LABEL: test_x86_avx512_cvttss2si_load:906; X64:       # %bb.0:907; X64-NEXT:    vcvttss2si (%rdi), %eax908; X64-NEXT:    retq909;910; X86-LABEL: test_x86_avx512_cvttss2si_load:911; X86:       # %bb.0:912; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax913; X86-NEXT:    vcvttss2si (%eax), %eax914; X86-NEXT:    retl915  %a1 = load <4 x float>, ptr %a0916  %res = call i32 @llvm.x86.avx512.cvttss2si(<4 x float> %a1, i32 4) ;917  ret i32 %res918}919 920define i32 @test_x86_avx512_cvttss2usi(<4 x float> %a0) {921; CHECK-LABEL: test_x86_avx512_cvttss2usi:922; CHECK:       # %bb.0:923; CHECK-NEXT:    vcvttss2usi {sae}, %xmm0, %ecx924; CHECK-NEXT:    vcvttss2usi %xmm0, %eax925; CHECK-NEXT:    addl %ecx, %eax926; CHECK-NEXT:    ret{{[l|q]}}927  %res0 = call i32 @llvm.x86.avx512.cvttss2usi(<4 x float> %a0, i32 8) ;928  %res1 = call i32 @llvm.x86.avx512.cvttss2usi(<4 x float> %a0, i32 4) ;929  %res2 = add i32 %res0, %res1930  ret i32 %res2931}932declare i32 @llvm.x86.avx512.cvttss2usi(<4 x float>, i32) nounwind readnone933 934define i32 @test_x86_avx512_cvtsd2usi32(<2 x double> %a0) {935; CHECK-LABEL: test_x86_avx512_cvtsd2usi32:936; CHECK:       # %bb.0:937; CHECK-NEXT:    vcvtsd2usi %xmm0, %eax938; CHECK-NEXT:    vcvtsd2usi {rz-sae}, %xmm0, %ecx939; CHECK-NEXT:    addl %eax, %ecx940; CHECK-NEXT:    vcvtsd2usi {rd-sae}, %xmm0, %eax941; CHECK-NEXT:    addl %ecx, %eax942; CHECK-NEXT:    ret{{[l|q]}}943 944  %res = call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> %a0, i32 4)945  %res1 = call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> %a0, i32 11)946  %res2 = call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> %a0, i32 9)947  %res3 = add i32 %res, %res1948  %res4 = add i32 %res3, %res2949  ret i32 %res4950}951declare i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double>, i32) nounwind readnone952 953define i32 @test_x86_avx512_cvtsd2si32(<2 x double> %a0) {954; CHECK-LABEL: test_x86_avx512_cvtsd2si32:955; CHECK:       # %bb.0:956; CHECK-NEXT:    vcvtsd2si %xmm0, %eax957; CHECK-NEXT:    vcvtsd2si {rz-sae}, %xmm0, %ecx958; CHECK-NEXT:    addl %eax, %ecx959; CHECK-NEXT:    vcvtsd2si {rd-sae}, %xmm0, %eax960; CHECK-NEXT:    addl %ecx, %eax961; CHECK-NEXT:    ret{{[l|q]}}962 963  %res = call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> %a0, i32 4)964  %res1 = call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> %a0, i32 11)965  %res2 = call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> %a0, i32 9)966  %res3 = add i32 %res, %res1967  %res4 = add i32 %res3, %res2968  ret i32 %res4969}970declare i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double>, i32) nounwind readnone971 972define i32 @test_x86_avx512_cvtss2usi32(<4 x float> %a0) {973; CHECK-LABEL: test_x86_avx512_cvtss2usi32:974; CHECK:       # %bb.0:975; CHECK-NEXT:    vcvtss2usi %xmm0, %eax976; CHECK-NEXT:    vcvtss2usi {rz-sae}, %xmm0, %ecx977; CHECK-NEXT:    addl %eax, %ecx978; CHECK-NEXT:    vcvtss2usi {rd-sae}, %xmm0, %eax979; CHECK-NEXT:    addl %ecx, %eax980; CHECK-NEXT:    ret{{[l|q]}}981 982  %res = call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> %a0, i32 4)983  %res1 = call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> %a0, i32 11)984  %res2 = call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> %a0, i32 9)985  %res3 = add i32 %res, %res1986  %res4 = add i32 %res3, %res2987  ret i32 %res4988}989declare i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float>, i32) nounwind readnone990 991define i32 @test_x86_avx512_cvtss2si32(<4 x float> %a0) {992; CHECK-LABEL: test_x86_avx512_cvtss2si32:993; CHECK:       # %bb.0:994; CHECK-NEXT:    vcvtss2si %xmm0, %eax995; CHECK-NEXT:    vcvtss2si {rz-sae}, %xmm0, %ecx996; CHECK-NEXT:    addl %eax, %ecx997; CHECK-NEXT:    vcvtss2si {rd-sae}, %xmm0, %eax998; CHECK-NEXT:    addl %ecx, %eax999; CHECK-NEXT:    ret{{[l|q]}}1000 1001  %res = call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> %a0, i32 4)1002  %res1 = call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> %a0, i32 11)1003  %res2 = call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> %a0, i32 9)1004  %res3 = add i32 %res, %res11005  %res4 = add i32 %res3, %res21006  ret i32 %res41007}1008declare i32 @llvm.x86.avx512.vcvtss2si32(<4 x float>, i32) nounwind readnone1009 1010define <16 x i16> @test_x86_vcvtps2ph_256(<16 x float> %a0, <16 x i16> %src, i16 %mask, ptr %dst) {1011; X64-LABEL: test_x86_vcvtps2ph_256:1012; X64:       # %bb.0:1013; X64-NEXT:    kmovw %edi, %k11014; X64-NEXT:    vcvtps2ph $3, {sae}, %zmm0, %ymm2 {%k1} {z}1015; X64-NEXT:    vcvtps2ph $4, {sae}, %zmm0, %ymm1 {%k1}1016; X64-NEXT:    vpaddw %ymm1, %ymm2, %ymm11017; X64-NEXT:    vcvtps2ph $2, %zmm0, (%rsi)1018; X64-NEXT:    vmovdqa %ymm1, %ymm01019; X64-NEXT:    retq1020;1021; X86-LABEL: test_x86_vcvtps2ph_256:1022; X86:       # %bb.0:1023; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax1024; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11025; X86-NEXT:    vcvtps2ph $3, {sae}, %zmm0, %ymm2 {%k1} {z}1026; X86-NEXT:    vcvtps2ph $4, {sae}, %zmm0, %ymm1 {%k1}1027; X86-NEXT:    vpaddw %ymm1, %ymm2, %ymm11028; X86-NEXT:    vcvtps2ph $2, %zmm0, (%eax)1029; X86-NEXT:    vmovdqa %ymm1, %ymm01030; X86-NEXT:    retl1031  %res1 = call <16 x i16> @llvm.x86.avx512.mask.vcvtps2ph.512(<16 x float> %a0, i32 2, <16 x i16> zeroinitializer, i16 -1)1032  %res2 = call <16 x i16> @llvm.x86.avx512.mask.vcvtps2ph.512(<16 x float> %a0, i32 11, <16 x i16> zeroinitializer, i16 %mask)1033  %res3 = call <16 x i16> @llvm.x86.avx512.mask.vcvtps2ph.512(<16 x float> %a0, i32 12, <16 x i16> %src, i16 %mask)1034  store <16 x i16> %res1, ptr %dst1035  %res  = add <16 x i16> %res2, %res31036  ret <16 x i16> %res1037}1038 1039declare <16 x i16> @llvm.x86.avx512.mask.vcvtps2ph.512(<16 x float>, i32, <16 x i16>, i16) nounwind readonly1040 1041define i16 @test_cmpps(<16 x float> %a, <16 x float> %b) {1042; CHECK-LABEL: test_cmpps:1043; CHECK:       # %bb.0:1044; CHECK-NEXT:    vcmpleps {sae}, %zmm1, %zmm0, %k01045; CHECK-NEXT:    kmovw %k0, %eax1046; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax1047; CHECK-NEXT:    vzeroupper1048; CHECK-NEXT:    ret{{[l|q]}}1049  %res = call <16 x i1> @llvm.x86.avx512.mask.cmp.ps.512(<16 x float> %a, <16 x float> %b, i32 2, <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, i32 8)1050  %1 = bitcast <16 x i1> %res to i161051  ret i16 %11052}1053declare <16 x i1> @llvm.x86.avx512.mask.cmp.ps.512(<16 x float>, <16 x float>, i32, <16 x i1>, i32)1054 1055define i8 @test_cmppd(<8 x double> %a, <8 x double> %b) {1056; CHECK-LABEL: test_cmppd:1057; CHECK:       # %bb.0:1058; CHECK-NEXT:    vcmpneqpd %zmm1, %zmm0, %k01059; CHECK-NEXT:    kmovw %k0, %eax1060; CHECK-NEXT:    # kill: def $al killed $al killed $eax1061; CHECK-NEXT:    vzeroupper1062; CHECK-NEXT:    ret{{[l|q]}}1063  %res = call <8 x i1> @llvm.x86.avx512.mask.cmp.pd.512(<8 x double> %a, <8 x double> %b, i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, i32 4)1064  %1 = bitcast <8 x i1> %res to i81065  ret i8 %11066}1067declare <8 x i1> @llvm.x86.avx512.mask.cmp.pd.512(<8 x double>, <8 x double>, i32, <8 x i1>, i32)1068 1069; Function Attrs: nounwind readnone1070 1071 ; fp min - max1072define <8 x double> @test_vmaxpd(<8 x double> %a0, <8 x double> %a1) {1073; CHECK-LABEL: test_vmaxpd:1074; CHECK:       # %bb.0:1075; CHECK-NEXT:    vmaxpd %zmm1, %zmm0, %zmm01076; CHECK-NEXT:    ret{{[l|q]}}1077  %1 = call <8 x double> @llvm.x86.avx512.max.pd.512(<8 x double> %a0, <8 x double> %a1, i32 4)1078  ret <8 x double> %11079}1080declare <8 x double> @llvm.x86.avx512.max.pd.512(<8 x double>, <8 x double>, i32)1081 1082define <8 x double> @test_vminpd(<8 x double> %a0, <8 x double> %a1) {1083; CHECK-LABEL: test_vminpd:1084; CHECK:       # %bb.0:1085; CHECK-NEXT:    vminpd %zmm1, %zmm0, %zmm01086; CHECK-NEXT:    ret{{[l|q]}}1087  %1 = call <8 x double> @llvm.x86.avx512.min.pd.512(<8 x double> %a0, <8 x double> %a1, i32 4)1088  ret <8 x double> %11089}1090declare <8 x double> @llvm.x86.avx512.min.pd.512(<8 x double>, <8 x double>, i32)1091 1092define void @test_mask_store_ss(ptr %ptr, <4 x float> %data, i8 %mask) {1093; X64-LABEL: test_mask_store_ss:1094; X64:       # %bb.0:1095; X64-NEXT:    kmovw %esi, %k11096; X64-NEXT:    vmovss %xmm0, (%rdi) {%k1}1097; X64-NEXT:    retq1098;1099; X86-LABEL: test_mask_store_ss:1100; X86:       # %bb.0:1101; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax1102; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %ecx1103; X86-NEXT:    kmovw %ecx, %k11104; X86-NEXT:    vmovss %xmm0, (%eax) {%k1}1105; X86-NEXT:    retl1106  %1 = and i8 %mask, 11107  %2 = bitcast i8 %1 to <8 x i1>1108  %extract = shufflevector <8 x i1> %2, <8 x i1> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>1109  call void @llvm.masked.store.v4f32.p0(<4 x float> %data, ptr %ptr, i32 1, <4 x i1> %extract)1110  ret void1111}1112declare void @llvm.masked.store.v4f32.p0(<4 x float>, ptr, i32, <4 x i1>) #11113 1114 1115declare <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float>, <16 x float>, i32)1116declare <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float>, <16 x float>, i32)1117declare <8 x double> @llvm.x86.avx512.mul.pd.512(<8 x double>, <8 x double>, i32)1118 1119define <16 x float> @test_vsubps_rn(<16 x float> %a0, <16 x float> %a1) {1120; CHECK-LABEL: test_vsubps_rn:1121; CHECK:       # %bb.0:1122; CHECK-NEXT:    vsubps {rn-sae}, %zmm1, %zmm0, %zmm01123; CHECK-NEXT:    ret{{[l|q]}}1124  %1 = call <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float> %a0, <16 x float> %a1, i32 8)1125  ret <16 x float> %11126}1127 1128define <16 x float> @test_vsubps_rd(<16 x float> %a0, <16 x float> %a1) {1129; CHECK-LABEL: test_vsubps_rd:1130; CHECK:       # %bb.0:1131; CHECK-NEXT:    vsubps {rd-sae}, %zmm1, %zmm0, %zmm01132; CHECK-NEXT:    ret{{[l|q]}}1133  %1 = call <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float> %a0, <16 x float> %a1, i32 9)1134  ret <16 x float> %11135}1136 1137define <16 x float> @test_vsubps_ru(<16 x float> %a0, <16 x float> %a1) {1138; CHECK-LABEL: test_vsubps_ru:1139; CHECK:       # %bb.0:1140; CHECK-NEXT:    vsubps {ru-sae}, %zmm1, %zmm0, %zmm01141; CHECK-NEXT:    ret{{[l|q]}}1142  %1 = call <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float> %a0, <16 x float> %a1, i32 10)1143  ret <16 x float> %11144}1145 1146define <16 x float> @test_vsubps_rz(<16 x float> %a0, <16 x float> %a1) {1147; CHECK-LABEL: test_vsubps_rz:1148; CHECK:       # %bb.0:1149; CHECK-NEXT:    vsubps {rz-sae}, %zmm1, %zmm0, %zmm01150; CHECK-NEXT:    ret{{[l|q]}}1151  %1 = call <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float> %a0, <16 x float> %a1, i32 11)1152  ret <16 x float> %11153}1154 1155define <16 x float> @test_vmulps_rn(<16 x float> %a0, <16 x float> %a1) {1156; CHECK-LABEL: test_vmulps_rn:1157; CHECK:       # %bb.0:1158; CHECK-NEXT:    vmulps {rn-sae}, %zmm1, %zmm0, %zmm01159; CHECK-NEXT:    ret{{[l|q]}}1160  %1 = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> %a0, <16 x float> %a1, i32 8)1161  ret <16 x float> %11162}1163 1164define <16 x float> @test_vmulps_rd(<16 x float> %a0, <16 x float> %a1) {1165; CHECK-LABEL: test_vmulps_rd:1166; CHECK:       # %bb.0:1167; CHECK-NEXT:    vmulps {rd-sae}, %zmm1, %zmm0, %zmm01168; CHECK-NEXT:    ret{{[l|q]}}1169  %1 = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> %a0, <16 x float> %a1, i32 9)1170  ret <16 x float> %11171}1172 1173define <16 x float> @test_vmulps_ru(<16 x float> %a0, <16 x float> %a1) {1174; CHECK-LABEL: test_vmulps_ru:1175; CHECK:       # %bb.0:1176; CHECK-NEXT:    vmulps {ru-sae}, %zmm1, %zmm0, %zmm01177; CHECK-NEXT:    ret{{[l|q]}}1178  %1 = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> %a0, <16 x float> %a1, i32 10)1179  ret <16 x float> %11180}1181 1182define <16 x float> @test_vmulps_rz(<16 x float> %a0, <16 x float> %a1) {1183; CHECK-LABEL: test_vmulps_rz:1184; CHECK:       # %bb.0:1185; CHECK-NEXT:    vmulps {rz-sae}, %zmm1, %zmm0, %zmm01186; CHECK-NEXT:    ret{{[l|q]}}1187  %1 = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> %a0, <16 x float> %a1, i32 11)1188  ret <16 x float> %11189}1190 1191;; mask float1192define <16 x float> @test_vmulps_mask_rn(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1193; X64-LABEL: test_vmulps_mask_rn:1194; X64:       # %bb.0:1195; X64-NEXT:    kmovw %edi, %k11196; X64-NEXT:    vmulps {rn-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1197; X64-NEXT:    retq1198;1199; X86-LABEL: test_vmulps_mask_rn:1200; X86:       # %bb.0:1201; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11202; X86-NEXT:    vmulps {rn-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1203; X86-NEXT:    retl1204  %1 = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> %a0, <16 x float> %a1, i32 8)1205  %2 = bitcast i16 %mask to <16 x i1>1206  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer1207  ret <16 x float> %31208}1209 1210define <16 x float> @test_vmulps_mask_rd(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1211; X64-LABEL: test_vmulps_mask_rd:1212; X64:       # %bb.0:1213; X64-NEXT:    kmovw %edi, %k11214; X64-NEXT:    vmulps {rd-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1215; X64-NEXT:    retq1216;1217; X86-LABEL: test_vmulps_mask_rd:1218; X86:       # %bb.0:1219; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11220; X86-NEXT:    vmulps {rd-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1221; X86-NEXT:    retl1222  %1 = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> %a0, <16 x float> %a1, i32 9)1223  %2 = bitcast i16 %mask to <16 x i1>1224  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer1225  ret <16 x float> %31226}1227 1228define <16 x float> @test_vmulps_mask_ru(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1229; X64-LABEL: test_vmulps_mask_ru:1230; X64:       # %bb.0:1231; X64-NEXT:    kmovw %edi, %k11232; X64-NEXT:    vmulps {ru-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1233; X64-NEXT:    retq1234;1235; X86-LABEL: test_vmulps_mask_ru:1236; X86:       # %bb.0:1237; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11238; X86-NEXT:    vmulps {ru-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1239; X86-NEXT:    retl1240  %1 = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> %a0, <16 x float> %a1, i32 10)1241  %2 = bitcast i16 %mask to <16 x i1>1242  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer1243  ret <16 x float> %31244}1245 1246define <16 x float> @test_vmulps_mask_rz(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1247; X64-LABEL: test_vmulps_mask_rz:1248; X64:       # %bb.0:1249; X64-NEXT:    kmovw %edi, %k11250; X64-NEXT:    vmulps {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1251; X64-NEXT:    retq1252;1253; X86-LABEL: test_vmulps_mask_rz:1254; X86:       # %bb.0:1255; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11256; X86-NEXT:    vmulps {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1257; X86-NEXT:    retl1258  %1 = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> %a0, <16 x float> %a1, i32 11)1259  %2 = bitcast i16 %mask to <16 x i1>1260  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer1261  ret <16 x float> %31262}1263 1264;; With Passthru value1265define <16 x float> @test_vmulps_mask_passthru_rn(<16 x float> %a0, <16 x float> %a1, <16 x float> %passthru, i16 %mask) {1266; X64-LABEL: test_vmulps_mask_passthru_rn:1267; X64:       # %bb.0:1268; X64-NEXT:    kmovw %edi, %k11269; X64-NEXT:    vmulps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}1270; X64-NEXT:    vmovaps %zmm2, %zmm01271; X64-NEXT:    retq1272;1273; X86-LABEL: test_vmulps_mask_passthru_rn:1274; X86:       # %bb.0:1275; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11276; X86-NEXT:    vmulps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}1277; X86-NEXT:    vmovaps %zmm2, %zmm01278; X86-NEXT:    retl1279  %1 = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> %a0, <16 x float> %a1, i32 8)1280  %2 = bitcast i16 %mask to <16 x i1>1281  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %passthru1282  ret <16 x float> %31283}1284 1285define <16 x float> @test_vmulps_mask_passthru_rd(<16 x float> %a0, <16 x float> %a1, <16 x float> %passthru, i16 %mask) {1286; X64-LABEL: test_vmulps_mask_passthru_rd:1287; X64:       # %bb.0:1288; X64-NEXT:    kmovw %edi, %k11289; X64-NEXT:    vmulps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1}1290; X64-NEXT:    vmovaps %zmm2, %zmm01291; X64-NEXT:    retq1292;1293; X86-LABEL: test_vmulps_mask_passthru_rd:1294; X86:       # %bb.0:1295; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11296; X86-NEXT:    vmulps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1}1297; X86-NEXT:    vmovaps %zmm2, %zmm01298; X86-NEXT:    retl1299  %1 = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> %a0, <16 x float> %a1, i32 9)1300  %2 = bitcast i16 %mask to <16 x i1>1301  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %passthru1302  ret <16 x float> %31303}1304 1305define <16 x float> @test_vmulps_mask_passthru_ru(<16 x float> %a0, <16 x float> %a1, <16 x float> %passthru, i16 %mask) {1306; X64-LABEL: test_vmulps_mask_passthru_ru:1307; X64:       # %bb.0:1308; X64-NEXT:    kmovw %edi, %k11309; X64-NEXT:    vmulps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1}1310; X64-NEXT:    vmovaps %zmm2, %zmm01311; X64-NEXT:    retq1312;1313; X86-LABEL: test_vmulps_mask_passthru_ru:1314; X86:       # %bb.0:1315; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11316; X86-NEXT:    vmulps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1}1317; X86-NEXT:    vmovaps %zmm2, %zmm01318; X86-NEXT:    retl1319  %1 = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> %a0, <16 x float> %a1, i32 10)1320  %2 = bitcast i16 %mask to <16 x i1>1321  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %passthru1322  ret <16 x float> %31323}1324 1325define <16 x float> @test_vmulps_mask_passthru_rz(<16 x float> %a0, <16 x float> %a1, <16 x float> %passthru, i16 %mask) {1326; X64-LABEL: test_vmulps_mask_passthru_rz:1327; X64:       # %bb.0:1328; X64-NEXT:    kmovw %edi, %k11329; X64-NEXT:    vmulps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1}1330; X64-NEXT:    vmovaps %zmm2, %zmm01331; X64-NEXT:    retq1332;1333; X86-LABEL: test_vmulps_mask_passthru_rz:1334; X86:       # %bb.0:1335; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11336; X86-NEXT:    vmulps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1}1337; X86-NEXT:    vmovaps %zmm2, %zmm01338; X86-NEXT:    retl1339  %1 = call <16 x float> @llvm.x86.avx512.mul.ps.512(<16 x float> %a0, <16 x float> %a1, i32 11)1340  %2 = bitcast i16 %mask to <16 x i1>1341  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %passthru1342  ret <16 x float> %31343}1344 1345;; mask double1346define <8 x double> @test_vmulpd_mask_rn(<8 x double> %a0, <8 x double> %a1, i8 %mask) {1347; X64-LABEL: test_vmulpd_mask_rn:1348; X64:       # %bb.0:1349; X64-NEXT:    kmovw %edi, %k11350; X64-NEXT:    vmulpd {rn-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1351; X64-NEXT:    retq1352;1353; X86-LABEL: test_vmulpd_mask_rn:1354; X86:       # %bb.0:1355; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax1356; X86-NEXT:    kmovw %eax, %k11357; X86-NEXT:    vmulpd {rn-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1358; X86-NEXT:    retl1359  %1 = call <8 x double> @llvm.x86.avx512.mul.pd.512(<8 x double> %a0, <8 x double> %a1, i32 8)1360  %2 = bitcast i8 %mask to <8 x i1>1361  %3 = select <8 x i1> %2, <8 x double> %1, <8 x double> zeroinitializer1362  ret <8 x double> %31363}1364 1365define <8 x double> @test_vmulpd_mask_rd(<8 x double> %a0, <8 x double> %a1, i8 %mask) {1366; X64-LABEL: test_vmulpd_mask_rd:1367; X64:       # %bb.0:1368; X64-NEXT:    kmovw %edi, %k11369; X64-NEXT:    vmulpd {rd-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1370; X64-NEXT:    retq1371;1372; X86-LABEL: test_vmulpd_mask_rd:1373; X86:       # %bb.0:1374; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax1375; X86-NEXT:    kmovw %eax, %k11376; X86-NEXT:    vmulpd {rd-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1377; X86-NEXT:    retl1378  %1 = call <8 x double> @llvm.x86.avx512.mul.pd.512(<8 x double> %a0, <8 x double> %a1, i32 9)1379  %2 = bitcast i8 %mask to <8 x i1>1380  %3 = select <8 x i1> %2, <8 x double> %1, <8 x double> zeroinitializer1381  ret <8 x double> %31382}1383 1384define <8 x double> @test_vmulpd_mask_ru(<8 x double> %a0, <8 x double> %a1, i8 %mask) {1385; X64-LABEL: test_vmulpd_mask_ru:1386; X64:       # %bb.0:1387; X64-NEXT:    kmovw %edi, %k11388; X64-NEXT:    vmulpd {ru-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1389; X64-NEXT:    retq1390;1391; X86-LABEL: test_vmulpd_mask_ru:1392; X86:       # %bb.0:1393; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax1394; X86-NEXT:    kmovw %eax, %k11395; X86-NEXT:    vmulpd {ru-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1396; X86-NEXT:    retl1397  %1 = call <8 x double> @llvm.x86.avx512.mul.pd.512(<8 x double> %a0, <8 x double> %a1, i32 10)1398  %2 = bitcast i8 %mask to <8 x i1>1399  %3 = select <8 x i1> %2, <8 x double> %1, <8 x double> zeroinitializer1400  ret <8 x double> %31401}1402 1403define <8 x double> @test_vmulpd_mask_rz(<8 x double> %a0, <8 x double> %a1, i8 %mask) {1404; X64-LABEL: test_vmulpd_mask_rz:1405; X64:       # %bb.0:1406; X64-NEXT:    kmovw %edi, %k11407; X64-NEXT:    vmulpd {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1408; X64-NEXT:    retq1409;1410; X86-LABEL: test_vmulpd_mask_rz:1411; X86:       # %bb.0:1412; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax1413; X86-NEXT:    kmovw %eax, %k11414; X86-NEXT:    vmulpd {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1415; X86-NEXT:    retl1416  %1 = call <8 x double> @llvm.x86.avx512.mul.pd.512(<8 x double> %a0, <8 x double> %a1, i32 11)1417  %2 = bitcast i8 %mask to <8 x i1>1418  %3 = select <8 x i1> %2, <8 x double> %1, <8 x double> zeroinitializer1419  ret <8 x double> %31420}1421 1422define <16 x float> @test_mm512_maskz_add_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1423; X64-LABEL: test_mm512_maskz_add_round_ps_rn_sae:1424; X64:       # %bb.0:1425; X64-NEXT:    kmovw %edi, %k11426; X64-NEXT:    vaddps {rn-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1427; X64-NEXT:    retq1428;1429; X86-LABEL: test_mm512_maskz_add_round_ps_rn_sae:1430; X86:       # %bb.0:1431; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11432; X86-NEXT:    vaddps {rn-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1433; X86-NEXT:    retl1434  %1 = call <16 x float> @llvm.x86.avx512.add.ps.512(<16 x float> %a0, <16 x float> %a1, i32 8)1435  %2 = bitcast i16 %mask to <16 x i1>1436  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer1437  ret <16 x float> %31438}1439 1440define <16 x float> @test_mm512_maskz_add_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1441; X64-LABEL: test_mm512_maskz_add_round_ps_rd_sae:1442; X64:       # %bb.0:1443; X64-NEXT:    kmovw %edi, %k11444; X64-NEXT:    vaddps {rd-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1445; X64-NEXT:    retq1446;1447; X86-LABEL: test_mm512_maskz_add_round_ps_rd_sae:1448; X86:       # %bb.0:1449; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11450; X86-NEXT:    vaddps {rd-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1451; X86-NEXT:    retl1452  %1 = call <16 x float> @llvm.x86.avx512.add.ps.512(<16 x float> %a0, <16 x float> %a1, i32 9)1453  %2 = bitcast i16 %mask to <16 x i1>1454  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer1455  ret <16 x float> %31456}1457 1458define <16 x float> @test_mm512_maskz_add_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1459; X64-LABEL: test_mm512_maskz_add_round_ps_ru_sae:1460; X64:       # %bb.0:1461; X64-NEXT:    kmovw %edi, %k11462; X64-NEXT:    vaddps {ru-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1463; X64-NEXT:    retq1464;1465; X86-LABEL: test_mm512_maskz_add_round_ps_ru_sae:1466; X86:       # %bb.0:1467; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11468; X86-NEXT:    vaddps {ru-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1469; X86-NEXT:    retl1470  %1 = call <16 x float> @llvm.x86.avx512.add.ps.512(<16 x float> %a0, <16 x float> %a1, i32 10)1471  %2 = bitcast i16 %mask to <16 x i1>1472  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer1473  ret <16 x float> %31474}1475 1476define <16 x float> @test_mm512_maskz_add_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1477; X64-LABEL: test_mm512_maskz_add_round_ps_rz_sae:1478; X64:       # %bb.0:1479; X64-NEXT:    kmovw %edi, %k11480; X64-NEXT:    vaddps {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1481; X64-NEXT:    retq1482;1483; X86-LABEL: test_mm512_maskz_add_round_ps_rz_sae:1484; X86:       # %bb.0:1485; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11486; X86-NEXT:    vaddps {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1487; X86-NEXT:    retl1488  %1 = call <16 x float> @llvm.x86.avx512.add.ps.512(<16 x float> %a0, <16 x float> %a1, i32 11)1489  %2 = bitcast i16 %mask to <16 x i1>1490  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer1491  ret <16 x float> %31492}1493 1494define <16 x float> @test_mm512_maskz_add_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1495; X64-LABEL: test_mm512_maskz_add_round_ps_current:1496; X64:       # %bb.0:1497; X64-NEXT:    kmovw %edi, %k11498; X64-NEXT:    vaddps %zmm1, %zmm0, %zmm0 {%k1} {z}1499; X64-NEXT:    retq1500;1501; X86-LABEL: test_mm512_maskz_add_round_ps_current:1502; X86:       # %bb.0:1503; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11504; X86-NEXT:    vaddps %zmm1, %zmm0, %zmm0 {%k1} {z}1505; X86-NEXT:    retl1506  %1 = call <16 x float> @llvm.x86.avx512.add.ps.512(<16 x float> %a0, <16 x float> %a1, i32 4)1507  %2 = bitcast i16 %mask to <16 x i1>1508  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer1509  ret <16 x float> %31510}1511 1512define <16 x float> @test_mm512_mask_add_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {1513; X64-LABEL: test_mm512_mask_add_round_ps_rn_sae:1514; X64:       # %bb.0:1515; X64-NEXT:    kmovw %edi, %k11516; X64-NEXT:    vaddps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}1517; X64-NEXT:    vmovaps %zmm2, %zmm01518; X64-NEXT:    retq1519;1520; X86-LABEL: test_mm512_mask_add_round_ps_rn_sae:1521; X86:       # %bb.0:1522; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11523; X86-NEXT:    vaddps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}1524; X86-NEXT:    vmovaps %zmm2, %zmm01525; X86-NEXT:    retl1526  %1 = call <16 x float> @llvm.x86.avx512.add.ps.512(<16 x float> %a0, <16 x float> %a1, i32 8)1527  %2 = bitcast i16 %mask to <16 x i1>1528  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src1529  ret <16 x float> %31530}1531 1532define <16 x float> @test_mm512_mask_add_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {1533; X64-LABEL: test_mm512_mask_add_round_ps_rd_sae:1534; X64:       # %bb.0:1535; X64-NEXT:    kmovw %edi, %k11536; X64-NEXT:    vaddps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1}1537; X64-NEXT:    vmovaps %zmm2, %zmm01538; X64-NEXT:    retq1539;1540; X86-LABEL: test_mm512_mask_add_round_ps_rd_sae:1541; X86:       # %bb.0:1542; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11543; X86-NEXT:    vaddps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1}1544; X86-NEXT:    vmovaps %zmm2, %zmm01545; X86-NEXT:    retl1546  %1 = call <16 x float> @llvm.x86.avx512.add.ps.512(<16 x float> %a0, <16 x float> %a1, i32 9)1547  %2 = bitcast i16 %mask to <16 x i1>1548  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src1549  ret <16 x float> %31550}1551 1552define <16 x float> @test_mm512_mask_add_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {1553; X64-LABEL: test_mm512_mask_add_round_ps_ru_sae:1554; X64:       # %bb.0:1555; X64-NEXT:    kmovw %edi, %k11556; X64-NEXT:    vaddps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1}1557; X64-NEXT:    vmovaps %zmm2, %zmm01558; X64-NEXT:    retq1559;1560; X86-LABEL: test_mm512_mask_add_round_ps_ru_sae:1561; X86:       # %bb.0:1562; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11563; X86-NEXT:    vaddps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1}1564; X86-NEXT:    vmovaps %zmm2, %zmm01565; X86-NEXT:    retl1566  %1 = call <16 x float> @llvm.x86.avx512.add.ps.512(<16 x float> %a0, <16 x float> %a1, i32 10)1567  %2 = bitcast i16 %mask to <16 x i1>1568  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src1569  ret <16 x float> %31570}1571 1572define <16 x float> @test_mm512_mask_add_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {1573; X64-LABEL: test_mm512_mask_add_round_ps_rz_sae:1574; X64:       # %bb.0:1575; X64-NEXT:    kmovw %edi, %k11576; X64-NEXT:    vaddps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1}1577; X64-NEXT:    vmovaps %zmm2, %zmm01578; X64-NEXT:    retq1579;1580; X86-LABEL: test_mm512_mask_add_round_ps_rz_sae:1581; X86:       # %bb.0:1582; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11583; X86-NEXT:    vaddps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1}1584; X86-NEXT:    vmovaps %zmm2, %zmm01585; X86-NEXT:    retl1586  %1 = call <16 x float> @llvm.x86.avx512.add.ps.512(<16 x float> %a0, <16 x float> %a1, i32 11)1587  %2 = bitcast i16 %mask to <16 x i1>1588  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src1589  ret <16 x float> %31590}1591 1592define <16 x float> @test_mm512_mask_add_round_ps_current(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {1593; X64-LABEL: test_mm512_mask_add_round_ps_current:1594; X64:       # %bb.0:1595; X64-NEXT:    kmovw %edi, %k11596; X64-NEXT:    vaddps %zmm1, %zmm0, %zmm2 {%k1}1597; X64-NEXT:    vmovaps %zmm2, %zmm01598; X64-NEXT:    retq1599;1600; X86-LABEL: test_mm512_mask_add_round_ps_current:1601; X86:       # %bb.0:1602; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11603; X86-NEXT:    vaddps %zmm1, %zmm0, %zmm2 {%k1}1604; X86-NEXT:    vmovaps %zmm2, %zmm01605; X86-NEXT:    retl1606  %1 = call <16 x float> @llvm.x86.avx512.add.ps.512(<16 x float> %a0, <16 x float> %a1, i32 4)1607  %2 = bitcast i16 %mask to <16 x i1>1608  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src1609  ret <16 x float> %31610}1611 1612define <16 x float> @test_mm512_add_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1613; CHECK-LABEL: test_mm512_add_round_ps_rn_sae:1614; CHECK:       # %bb.0:1615; CHECK-NEXT:    vaddps {rn-sae}, %zmm1, %zmm0, %zmm01616; CHECK-NEXT:    ret{{[l|q]}}1617  %1 = call <16 x float> @llvm.x86.avx512.add.ps.512(<16 x float> %a0, <16 x float> %a1, i32 8)1618  ret <16 x float> %11619}1620 1621define <16 x float> @test_mm512_add_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1622; CHECK-LABEL: test_mm512_add_round_ps_rd_sae:1623; CHECK:       # %bb.0:1624; CHECK-NEXT:    vaddps {rd-sae}, %zmm1, %zmm0, %zmm01625; CHECK-NEXT:    ret{{[l|q]}}1626  %1 = call <16 x float> @llvm.x86.avx512.add.ps.512(<16 x float> %a0, <16 x float> %a1, i32 9)1627  ret <16 x float> %11628}1629 1630define <16 x float> @test_mm512_add_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1631; CHECK-LABEL: test_mm512_add_round_ps_ru_sae:1632; CHECK:       # %bb.0:1633; CHECK-NEXT:    vaddps {ru-sae}, %zmm1, %zmm0, %zmm01634; CHECK-NEXT:    ret{{[l|q]}}1635  %1 = call <16 x float> @llvm.x86.avx512.add.ps.512(<16 x float> %a0, <16 x float> %a1, i32 10)1636  ret <16 x float> %11637}1638 1639define <16 x float> @test_mm512_add_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1640; CHECK-LABEL: test_mm512_add_round_ps_rz_sae:1641; CHECK:       # %bb.0:1642; CHECK-NEXT:    vaddps {rz-sae}, %zmm1, %zmm0, %zmm01643; CHECK-NEXT:    ret{{[l|q]}}1644  %1 = call <16 x float> @llvm.x86.avx512.add.ps.512(<16 x float> %a0, <16 x float> %a1, i32 11)1645  ret <16 x float> %11646}1647 1648define <16 x float> @test_mm512_add_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1649; CHECK-LABEL: test_mm512_add_round_ps_current:1650; CHECK:       # %bb.0:1651; CHECK-NEXT:    vaddps %zmm1, %zmm0, %zmm01652; CHECK-NEXT:    ret{{[l|q]}}1653  %1 = call <16 x float> @llvm.x86.avx512.add.ps.512(<16 x float> %a0, <16 x float> %a1, i32 4)1654  ret <16 x float> %11655}1656declare <16 x float> @llvm.x86.avx512.add.ps.512(<16 x float>, <16 x float>, i32)1657 1658define <16 x float> @test_mm512_mask_sub_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {1659; X64-LABEL: test_mm512_mask_sub_round_ps_rn_sae:1660; X64:       # %bb.0:1661; X64-NEXT:    kmovw %edi, %k11662; X64-NEXT:    vsubps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}1663; X64-NEXT:    vmovaps %zmm2, %zmm01664; X64-NEXT:    retq1665;1666; X86-LABEL: test_mm512_mask_sub_round_ps_rn_sae:1667; X86:       # %bb.0:1668; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11669; X86-NEXT:    vsubps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}1670; X86-NEXT:    vmovaps %zmm2, %zmm01671; X86-NEXT:    retl1672  %1 = call <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float> %a0, <16 x float> %a1, i32 8)1673  %2 = bitcast i16 %mask to <16 x i1>1674  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src1675  ret <16 x float> %31676}1677 1678define <16 x float> @test_mm512_mask_sub_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {1679; X64-LABEL: test_mm512_mask_sub_round_ps_rd_sae:1680; X64:       # %bb.0:1681; X64-NEXT:    kmovw %edi, %k11682; X64-NEXT:    vsubps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1}1683; X64-NEXT:    vmovaps %zmm2, %zmm01684; X64-NEXT:    retq1685;1686; X86-LABEL: test_mm512_mask_sub_round_ps_rd_sae:1687; X86:       # %bb.0:1688; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11689; X86-NEXT:    vsubps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1}1690; X86-NEXT:    vmovaps %zmm2, %zmm01691; X86-NEXT:    retl1692  %1 = call <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float> %a0, <16 x float> %a1, i32 9)1693  %2 = bitcast i16 %mask to <16 x i1>1694  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src1695  ret <16 x float> %31696}1697 1698define <16 x float> @test_mm512_mask_sub_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {1699; X64-LABEL: test_mm512_mask_sub_round_ps_ru_sae:1700; X64:       # %bb.0:1701; X64-NEXT:    kmovw %edi, %k11702; X64-NEXT:    vsubps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1}1703; X64-NEXT:    vmovaps %zmm2, %zmm01704; X64-NEXT:    retq1705;1706; X86-LABEL: test_mm512_mask_sub_round_ps_ru_sae:1707; X86:       # %bb.0:1708; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11709; X86-NEXT:    vsubps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1}1710; X86-NEXT:    vmovaps %zmm2, %zmm01711; X86-NEXT:    retl1712  %1 = call <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float> %a0, <16 x float> %a1, i32 10)1713  %2 = bitcast i16 %mask to <16 x i1>1714  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src1715  ret <16 x float> %31716}1717 1718define <16 x float> @test_mm512_mask_sub_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {1719; X64-LABEL: test_mm512_mask_sub_round_ps_rz_sae:1720; X64:       # %bb.0:1721; X64-NEXT:    kmovw %edi, %k11722; X64-NEXT:    vsubps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1}1723; X64-NEXT:    vmovaps %zmm2, %zmm01724; X64-NEXT:    retq1725;1726; X86-LABEL: test_mm512_mask_sub_round_ps_rz_sae:1727; X86:       # %bb.0:1728; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11729; X86-NEXT:    vsubps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1}1730; X86-NEXT:    vmovaps %zmm2, %zmm01731; X86-NEXT:    retl1732  %1 = call <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float> %a0, <16 x float> %a1, i32 11)1733  %2 = bitcast i16 %mask to <16 x i1>1734  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src1735  ret <16 x float> %31736}1737 1738define <16 x float> @test_mm512_mask_sub_round_ps_current(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {1739; X64-LABEL: test_mm512_mask_sub_round_ps_current:1740; X64:       # %bb.0:1741; X64-NEXT:    kmovw %edi, %k11742; X64-NEXT:    vsubps %zmm1, %zmm0, %zmm2 {%k1}1743; X64-NEXT:    vmovaps %zmm2, %zmm01744; X64-NEXT:    retq1745;1746; X86-LABEL: test_mm512_mask_sub_round_ps_current:1747; X86:       # %bb.0:1748; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11749; X86-NEXT:    vsubps %zmm1, %zmm0, %zmm2 {%k1}1750; X86-NEXT:    vmovaps %zmm2, %zmm01751; X86-NEXT:    retl1752  %1 = call <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float> %a0, <16 x float> %a1, i32 4)1753  %2 = bitcast i16 %mask to <16 x i1>1754  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src1755  ret <16 x float> %31756}1757 1758define <16 x float> @test_mm512_sub_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1759; CHECK-LABEL: test_mm512_sub_round_ps_rn_sae:1760; CHECK:       # %bb.0:1761; CHECK-NEXT:    vsubps {rn-sae}, %zmm1, %zmm0, %zmm01762; CHECK-NEXT:    ret{{[l|q]}}1763  %1 = call <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float> %a0, <16 x float> %a1, i32 8)1764  ret <16 x float> %11765}1766 1767define <16 x float> @test_mm512_sub_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1768; CHECK-LABEL: test_mm512_sub_round_ps_rd_sae:1769; CHECK:       # %bb.0:1770; CHECK-NEXT:    vsubps {rd-sae}, %zmm1, %zmm0, %zmm01771; CHECK-NEXT:    ret{{[l|q]}}1772  %1 = call <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float> %a0, <16 x float> %a1, i32 9)1773  ret <16 x float> %11774}1775 1776define <16 x float> @test_mm512_sub_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1777; CHECK-LABEL: test_mm512_sub_round_ps_ru_sae:1778; CHECK:       # %bb.0:1779; CHECK-NEXT:    vsubps {ru-sae}, %zmm1, %zmm0, %zmm01780; CHECK-NEXT:    ret{{[l|q]}}1781  %1 = call <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float> %a0, <16 x float> %a1, i32 10)1782  ret <16 x float> %11783}1784 1785define <16 x float> @test_mm512_sub_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1786; CHECK-LABEL: test_mm512_sub_round_ps_rz_sae:1787; CHECK:       # %bb.0:1788; CHECK-NEXT:    vsubps {rz-sae}, %zmm1, %zmm0, %zmm01789; CHECK-NEXT:    ret{{[l|q]}}1790  %1 = call <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float> %a0, <16 x float> %a1, i32 11)1791  ret <16 x float> %11792}1793 1794define <16 x float> @test_mm512_sub_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1795; CHECK-LABEL: test_mm512_sub_round_ps_current:1796; CHECK:       # %bb.0:1797; CHECK-NEXT:    vsubps %zmm1, %zmm0, %zmm01798; CHECK-NEXT:    ret{{[l|q]}}1799  %1 = call <16 x float> @llvm.x86.avx512.sub.ps.512(<16 x float> %a0, <16 x float> %a1, i32 4)1800  ret <16 x float> %11801}1802 1803define <16 x float> @test_mm512_maskz_div_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1804; X64-LABEL: test_mm512_maskz_div_round_ps_rn_sae:1805; X64:       # %bb.0:1806; X64-NEXT:    kmovw %edi, %k11807; X64-NEXT:    vdivps {rn-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1808; X64-NEXT:    retq1809;1810; X86-LABEL: test_mm512_maskz_div_round_ps_rn_sae:1811; X86:       # %bb.0:1812; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11813; X86-NEXT:    vdivps {rn-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1814; X86-NEXT:    retl1815  %1 = call <16 x float> @llvm.x86.avx512.div.ps.512(<16 x float> %a0, <16 x float> %a1, i32 8)1816  %2 = bitcast i16 %mask to <16 x i1>1817  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer1818  ret <16 x float> %31819}1820 1821define <16 x float> @test_mm512_maskz_div_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1822; X64-LABEL: test_mm512_maskz_div_round_ps_rd_sae:1823; X64:       # %bb.0:1824; X64-NEXT:    kmovw %edi, %k11825; X64-NEXT:    vdivps {rd-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1826; X64-NEXT:    retq1827;1828; X86-LABEL: test_mm512_maskz_div_round_ps_rd_sae:1829; X86:       # %bb.0:1830; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11831; X86-NEXT:    vdivps {rd-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1832; X86-NEXT:    retl1833  %1 = call <16 x float> @llvm.x86.avx512.div.ps.512(<16 x float> %a0, <16 x float> %a1, i32 9)1834  %2 = bitcast i16 %mask to <16 x i1>1835  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer1836  ret <16 x float> %31837}1838 1839define <16 x float> @test_mm512_maskz_div_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1840; X64-LABEL: test_mm512_maskz_div_round_ps_ru_sae:1841; X64:       # %bb.0:1842; X64-NEXT:    kmovw %edi, %k11843; X64-NEXT:    vdivps {ru-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1844; X64-NEXT:    retq1845;1846; X86-LABEL: test_mm512_maskz_div_round_ps_ru_sae:1847; X86:       # %bb.0:1848; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11849; X86-NEXT:    vdivps {ru-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1850; X86-NEXT:    retl1851  %1 = call <16 x float> @llvm.x86.avx512.div.ps.512(<16 x float> %a0, <16 x float> %a1, i32 10)1852  %2 = bitcast i16 %mask to <16 x i1>1853  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer1854  ret <16 x float> %31855}1856 1857define <16 x float> @test_mm512_maskz_div_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1858; X64-LABEL: test_mm512_maskz_div_round_ps_rz_sae:1859; X64:       # %bb.0:1860; X64-NEXT:    kmovw %edi, %k11861; X64-NEXT:    vdivps {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1862; X64-NEXT:    retq1863;1864; X86-LABEL: test_mm512_maskz_div_round_ps_rz_sae:1865; X86:       # %bb.0:1866; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11867; X86-NEXT:    vdivps {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}1868; X86-NEXT:    retl1869  %1 = call <16 x float> @llvm.x86.avx512.div.ps.512(<16 x float> %a0, <16 x float> %a1, i32 11)1870  %2 = bitcast i16 %mask to <16 x i1>1871  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer1872  ret <16 x float> %31873}1874 1875define <16 x float> @test_mm512_maskz_div_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1876; X64-LABEL: test_mm512_maskz_div_round_ps_current:1877; X64:       # %bb.0:1878; X64-NEXT:    kmovw %edi, %k11879; X64-NEXT:    vdivps %zmm1, %zmm0, %zmm0 {%k1} {z}1880; X64-NEXT:    retq1881;1882; X86-LABEL: test_mm512_maskz_div_round_ps_current:1883; X86:       # %bb.0:1884; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11885; X86-NEXT:    vdivps %zmm1, %zmm0, %zmm0 {%k1} {z}1886; X86-NEXT:    retl1887  %1 = call <16 x float> @llvm.x86.avx512.div.ps.512(<16 x float> %a0, <16 x float> %a1, i32 4)1888  %2 = bitcast i16 %mask to <16 x i1>1889  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer1890  ret <16 x float> %31891}1892 1893define <16 x float> @test_mm512_mask_div_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {1894; X64-LABEL: test_mm512_mask_div_round_ps_rn_sae:1895; X64:       # %bb.0:1896; X64-NEXT:    kmovw %edi, %k11897; X64-NEXT:    vdivps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}1898; X64-NEXT:    vmovaps %zmm2, %zmm01899; X64-NEXT:    retq1900;1901; X86-LABEL: test_mm512_mask_div_round_ps_rn_sae:1902; X86:       # %bb.0:1903; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11904; X86-NEXT:    vdivps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1}1905; X86-NEXT:    vmovaps %zmm2, %zmm01906; X86-NEXT:    retl1907  %1 = call <16 x float> @llvm.x86.avx512.div.ps.512(<16 x float> %a0, <16 x float> %a1, i32 8)1908  %2 = bitcast i16 %mask to <16 x i1>1909  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src1910  ret <16 x float> %31911}1912 1913define <16 x float> @test_mm512_mask_div_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {1914; X64-LABEL: test_mm512_mask_div_round_ps_rd_sae:1915; X64:       # %bb.0:1916; X64-NEXT:    kmovw %edi, %k11917; X64-NEXT:    vdivps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1}1918; X64-NEXT:    vmovaps %zmm2, %zmm01919; X64-NEXT:    retq1920;1921; X86-LABEL: test_mm512_mask_div_round_ps_rd_sae:1922; X86:       # %bb.0:1923; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11924; X86-NEXT:    vdivps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1}1925; X86-NEXT:    vmovaps %zmm2, %zmm01926; X86-NEXT:    retl1927  %1 = call <16 x float> @llvm.x86.avx512.div.ps.512(<16 x float> %a0, <16 x float> %a1, i32 9)1928  %2 = bitcast i16 %mask to <16 x i1>1929  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src1930  ret <16 x float> %31931}1932 1933define <16 x float> @test_mm512_mask_div_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {1934; X64-LABEL: test_mm512_mask_div_round_ps_ru_sae:1935; X64:       # %bb.0:1936; X64-NEXT:    kmovw %edi, %k11937; X64-NEXT:    vdivps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1}1938; X64-NEXT:    vmovaps %zmm2, %zmm01939; X64-NEXT:    retq1940;1941; X86-LABEL: test_mm512_mask_div_round_ps_ru_sae:1942; X86:       # %bb.0:1943; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11944; X86-NEXT:    vdivps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1}1945; X86-NEXT:    vmovaps %zmm2, %zmm01946; X86-NEXT:    retl1947  %1 = call <16 x float> @llvm.x86.avx512.div.ps.512(<16 x float> %a0, <16 x float> %a1, i32 10)1948  %2 = bitcast i16 %mask to <16 x i1>1949  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src1950  ret <16 x float> %31951}1952 1953define <16 x float> @test_mm512_mask_div_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {1954; X64-LABEL: test_mm512_mask_div_round_ps_rz_sae:1955; X64:       # %bb.0:1956; X64-NEXT:    kmovw %edi, %k11957; X64-NEXT:    vdivps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1}1958; X64-NEXT:    vmovaps %zmm2, %zmm01959; X64-NEXT:    retq1960;1961; X86-LABEL: test_mm512_mask_div_round_ps_rz_sae:1962; X86:       # %bb.0:1963; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11964; X86-NEXT:    vdivps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1}1965; X86-NEXT:    vmovaps %zmm2, %zmm01966; X86-NEXT:    retl1967  %1 = call <16 x float> @llvm.x86.avx512.div.ps.512(<16 x float> %a0, <16 x float> %a1, i32 11)1968  %2 = bitcast i16 %mask to <16 x i1>1969  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src1970  ret <16 x float> %31971}1972 1973define <16 x float> @test_mm512_mask_div_round_ps_current(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {1974; X64-LABEL: test_mm512_mask_div_round_ps_current:1975; X64:       # %bb.0:1976; X64-NEXT:    kmovw %edi, %k11977; X64-NEXT:    vdivps %zmm1, %zmm0, %zmm2 {%k1}1978; X64-NEXT:    vmovaps %zmm2, %zmm01979; X64-NEXT:    retq1980;1981; X86-LABEL: test_mm512_mask_div_round_ps_current:1982; X86:       # %bb.0:1983; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k11984; X86-NEXT:    vdivps %zmm1, %zmm0, %zmm2 {%k1}1985; X86-NEXT:    vmovaps %zmm2, %zmm01986; X86-NEXT:    retl1987  %1 = call <16 x float> @llvm.x86.avx512.div.ps.512(<16 x float> %a0, <16 x float> %a1, i32 4)1988  %2 = bitcast i16 %mask to <16 x i1>1989  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src1990  ret <16 x float> %31991}1992 1993define <16 x float> @test_mm512_div_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {1994; CHECK-LABEL: test_mm512_div_round_ps_rn_sae:1995; CHECK:       # %bb.0:1996; CHECK-NEXT:    vdivps {rn-sae}, %zmm1, %zmm0, %zmm01997; CHECK-NEXT:    ret{{[l|q]}}1998  %1 = call <16 x float> @llvm.x86.avx512.div.ps.512(<16 x float> %a0, <16 x float> %a1, i32 8)1999  ret <16 x float> %12000}2001 2002define <16 x float> @test_mm512_div_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {2003; CHECK-LABEL: test_mm512_div_round_ps_rd_sae:2004; CHECK:       # %bb.0:2005; CHECK-NEXT:    vdivps {rd-sae}, %zmm1, %zmm0, %zmm02006; CHECK-NEXT:    ret{{[l|q]}}2007  %1 = call <16 x float> @llvm.x86.avx512.div.ps.512(<16 x float> %a0, <16 x float> %a1, i32 9)2008  ret <16 x float> %12009}2010 2011define <16 x float> @test_mm512_div_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {2012; CHECK-LABEL: test_mm512_div_round_ps_ru_sae:2013; CHECK:       # %bb.0:2014; CHECK-NEXT:    vdivps {ru-sae}, %zmm1, %zmm0, %zmm02015; CHECK-NEXT:    ret{{[l|q]}}2016  %1 = call <16 x float> @llvm.x86.avx512.div.ps.512(<16 x float> %a0, <16 x float> %a1, i32 10)2017  ret <16 x float> %12018}2019 2020define <16 x float> @test_mm512_div_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {2021; CHECK-LABEL: test_mm512_div_round_ps_rz_sae:2022; CHECK:       # %bb.0:2023; CHECK-NEXT:    vdivps {rz-sae}, %zmm1, %zmm0, %zmm02024; CHECK-NEXT:    ret{{[l|q]}}2025  %1 = call <16 x float> @llvm.x86.avx512.div.ps.512(<16 x float> %a0, <16 x float> %a1, i32 11)2026  ret <16 x float> %12027}2028 2029define <16 x float> @test_mm512_div_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {2030; CHECK-LABEL: test_mm512_div_round_ps_current:2031; CHECK:       # %bb.0:2032; CHECK-NEXT:    vdivps %zmm1, %zmm0, %zmm02033; CHECK-NEXT:    ret{{[l|q]}}2034  %1 = call <16 x float> @llvm.x86.avx512.div.ps.512(<16 x float> %a0, <16 x float> %a1, i32 4)2035  ret <16 x float> %12036}2037declare <16 x float> @llvm.x86.avx512.div.ps.512(<16 x float>, <16 x float>, i32)2038 2039define <16 x float> @test_mm512_maskz_min_round_ps_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {2040; X64-LABEL: test_mm512_maskz_min_round_ps_sae:2041; X64:       # %bb.0:2042; X64-NEXT:    kmovw %edi, %k12043; X64-NEXT:    vminps {sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}2044; X64-NEXT:    retq2045;2046; X86-LABEL: test_mm512_maskz_min_round_ps_sae:2047; X86:       # %bb.0:2048; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k12049; X86-NEXT:    vminps {sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}2050; X86-NEXT:    retl2051  %1 = call <16 x float> @llvm.x86.avx512.min.ps.512(<16 x float> %a0, <16 x float> %a1, i32 8)2052  %2 = bitcast i16 %mask to <16 x i1>2053  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer2054  ret <16 x float> %32055}2056 2057define <16 x float> @test_mm512_maskz_min_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {2058; X64-LABEL: test_mm512_maskz_min_round_ps_current:2059; X64:       # %bb.0:2060; X64-NEXT:    kmovw %edi, %k12061; X64-NEXT:    vminps %zmm1, %zmm0, %zmm0 {%k1} {z}2062; X64-NEXT:    retq2063;2064; X86-LABEL: test_mm512_maskz_min_round_ps_current:2065; X86:       # %bb.0:2066; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k12067; X86-NEXT:    vminps %zmm1, %zmm0, %zmm0 {%k1} {z}2068; X86-NEXT:    retl2069  %1 = call <16 x float> @llvm.x86.avx512.min.ps.512(<16 x float> %a0, <16 x float> %a1, i32 4)2070  %2 = bitcast i16 %mask to <16 x i1>2071  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer2072  ret <16 x float> %32073}2074 2075define <16 x float> @test_mm512_mask_min_round_ps_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {2076; X64-LABEL: test_mm512_mask_min_round_ps_sae:2077; X64:       # %bb.0:2078; X64-NEXT:    kmovw %edi, %k12079; X64-NEXT:    vminps {sae}, %zmm1, %zmm0, %zmm2 {%k1}2080; X64-NEXT:    vmovaps %zmm2, %zmm02081; X64-NEXT:    retq2082;2083; X86-LABEL: test_mm512_mask_min_round_ps_sae:2084; X86:       # %bb.0:2085; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k12086; X86-NEXT:    vminps {sae}, %zmm1, %zmm0, %zmm2 {%k1}2087; X86-NEXT:    vmovaps %zmm2, %zmm02088; X86-NEXT:    retl2089  %1 = call <16 x float> @llvm.x86.avx512.min.ps.512(<16 x float> %a0, <16 x float> %a1, i32 8)2090  %2 = bitcast i16 %mask to <16 x i1>2091  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src2092  ret <16 x float> %32093}2094 2095define <16 x float> @test_mm512_mask_min_round_ps_current(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {2096; X64-LABEL: test_mm512_mask_min_round_ps_current:2097; X64:       # %bb.0:2098; X64-NEXT:    kmovw %edi, %k12099; X64-NEXT:    vminps %zmm1, %zmm0, %zmm2 {%k1}2100; X64-NEXT:    vmovaps %zmm2, %zmm02101; X64-NEXT:    retq2102;2103; X86-LABEL: test_mm512_mask_min_round_ps_current:2104; X86:       # %bb.0:2105; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k12106; X86-NEXT:    vminps %zmm1, %zmm0, %zmm2 {%k1}2107; X86-NEXT:    vmovaps %zmm2, %zmm02108; X86-NEXT:    retl2109  %1 = call <16 x float> @llvm.x86.avx512.min.ps.512(<16 x float> %a0, <16 x float> %a1, i32 4)2110  %2 = bitcast i16 %mask to <16 x i1>2111  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src2112  ret <16 x float> %32113}2114 2115define <16 x float> @test_mm512_min_round_ps_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {2116; CHECK-LABEL: test_mm512_min_round_ps_sae:2117; CHECK:       # %bb.0:2118; CHECK-NEXT:    vminps {sae}, %zmm1, %zmm0, %zmm02119; CHECK-NEXT:    ret{{[l|q]}}2120  %1 = call <16 x float> @llvm.x86.avx512.min.ps.512(<16 x float> %a0, <16 x float> %a1, i32 8)2121  ret <16 x float> %12122}2123 2124define <16 x float> @test_mm512_min_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {2125; CHECK-LABEL: test_mm512_min_round_ps_current:2126; CHECK:       # %bb.0:2127; CHECK-NEXT:    vminps %zmm1, %zmm0, %zmm02128; CHECK-NEXT:    ret{{[l|q]}}2129  %1 = call <16 x float> @llvm.x86.avx512.min.ps.512(<16 x float> %a0, <16 x float> %a1, i32 4)2130  ret <16 x float> %12131}2132declare <16 x float> @llvm.x86.avx512.min.ps.512(<16 x float>, <16 x float>, i32)2133 2134define <16 x float> @test_mm512_maskz_max_round_ps_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {2135; X64-LABEL: test_mm512_maskz_max_round_ps_sae:2136; X64:       # %bb.0:2137; X64-NEXT:    kmovw %edi, %k12138; X64-NEXT:    vmaxps {sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}2139; X64-NEXT:    retq2140;2141; X86-LABEL: test_mm512_maskz_max_round_ps_sae:2142; X86:       # %bb.0:2143; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k12144; X86-NEXT:    vmaxps {sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}2145; X86-NEXT:    retl2146  %1 = call <16 x float> @llvm.x86.avx512.max.ps.512(<16 x float> %a0, <16 x float> %a1, i32 8)2147  %2 = bitcast i16 %mask to <16 x i1>2148  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer2149  ret <16 x float> %32150}2151 2152define <16 x float> @test_mm512_maskz_max_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {2153; X64-LABEL: test_mm512_maskz_max_round_ps_current:2154; X64:       # %bb.0:2155; X64-NEXT:    kmovw %edi, %k12156; X64-NEXT:    vmaxps %zmm1, %zmm0, %zmm0 {%k1} {z}2157; X64-NEXT:    retq2158;2159; X86-LABEL: test_mm512_maskz_max_round_ps_current:2160; X86:       # %bb.0:2161; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k12162; X86-NEXT:    vmaxps %zmm1, %zmm0, %zmm0 {%k1} {z}2163; X86-NEXT:    retl2164  %1 = call <16 x float> @llvm.x86.avx512.max.ps.512(<16 x float> %a0, <16 x float> %a1, i32 4)2165  %2 = bitcast i16 %mask to <16 x i1>2166  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer2167  ret <16 x float> %32168}2169 2170define <16 x float> @test_mm512_mask_max_round_ps_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {2171; X64-LABEL: test_mm512_mask_max_round_ps_sae:2172; X64:       # %bb.0:2173; X64-NEXT:    kmovw %edi, %k12174; X64-NEXT:    vmaxps {sae}, %zmm1, %zmm0, %zmm2 {%k1}2175; X64-NEXT:    vmovaps %zmm2, %zmm02176; X64-NEXT:    retq2177;2178; X86-LABEL: test_mm512_mask_max_round_ps_sae:2179; X86:       # %bb.0:2180; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k12181; X86-NEXT:    vmaxps {sae}, %zmm1, %zmm0, %zmm2 {%k1}2182; X86-NEXT:    vmovaps %zmm2, %zmm02183; X86-NEXT:    retl2184  %1 = call <16 x float> @llvm.x86.avx512.max.ps.512(<16 x float> %a0, <16 x float> %a1, i32 8)2185  %2 = bitcast i16 %mask to <16 x i1>2186  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src2187  ret <16 x float> %32188}2189 2190define <16 x float> @test_mm512_mask_max_round_ps_current(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {2191; X64-LABEL: test_mm512_mask_max_round_ps_current:2192; X64:       # %bb.0:2193; X64-NEXT:    kmovw %edi, %k12194; X64-NEXT:    vmaxps %zmm1, %zmm0, %zmm2 {%k1}2195; X64-NEXT:    vmovaps %zmm2, %zmm02196; X64-NEXT:    retq2197;2198; X86-LABEL: test_mm512_mask_max_round_ps_current:2199; X86:       # %bb.0:2200; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k12201; X86-NEXT:    vmaxps %zmm1, %zmm0, %zmm2 {%k1}2202; X86-NEXT:    vmovaps %zmm2, %zmm02203; X86-NEXT:    retl2204  %1 = call <16 x float> @llvm.x86.avx512.max.ps.512(<16 x float> %a0, <16 x float> %a1, i32 4)2205  %2 = bitcast i16 %mask to <16 x i1>2206  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %src2207  ret <16 x float> %32208}2209 2210define <16 x float> @test_mm512_max_round_ps_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {2211; CHECK-LABEL: test_mm512_max_round_ps_sae:2212; CHECK:       # %bb.0:2213; CHECK-NEXT:    vmaxps {sae}, %zmm1, %zmm0, %zmm02214; CHECK-NEXT:    ret{{[l|q]}}2215  %1 = call <16 x float> @llvm.x86.avx512.max.ps.512(<16 x float> %a0, <16 x float> %a1, i32 8)2216  ret <16 x float> %12217}2218 2219define <16 x float> @test_mm512_max_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {2220; CHECK-LABEL: test_mm512_max_round_ps_current:2221; CHECK:       # %bb.0:2222; CHECK-NEXT:    vmaxps %zmm1, %zmm0, %zmm02223; CHECK-NEXT:    ret{{[l|q]}}2224  %1 = call <16 x float> @llvm.x86.avx512.max.ps.512(<16 x float> %a0, <16 x float> %a1, i32 4)2225  ret <16 x float> %12226}2227declare <16 x float> @llvm.x86.avx512.max.ps.512(<16 x float>, <16 x float>, i32)2228 2229declare <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>, <4 x float>, <4 x float>, i8, i32) nounwind readnone2230 2231define <4 x float> @test_mask_add_ss_rn(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 %mask) {2232; X64-LABEL: test_mask_add_ss_rn:2233; X64:       # %bb.0:2234; X64-NEXT:    kmovw %edi, %k12235; X64-NEXT:    vaddss {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}2236; X64-NEXT:    vmovaps %xmm2, %xmm02237; X64-NEXT:    retq2238;2239; X86-LABEL: test_mask_add_ss_rn:2240; X86:       # %bb.0:2241; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2242; X86-NEXT:    kmovw %eax, %k12243; X86-NEXT:    vaddss {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}2244; X86-NEXT:    vmovaps %xmm2, %xmm02245; X86-NEXT:    retl2246  %res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> %a2, i8 %mask, i32 8)2247  ret <4 x float> %res2248}2249 2250define <4 x float> @test_mask_add_ss_rd(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 %mask) {2251; X64-LABEL: test_mask_add_ss_rd:2252; X64:       # %bb.0:2253; X64-NEXT:    kmovw %edi, %k12254; X64-NEXT:    vaddss {rd-sae}, %xmm1, %xmm0, %xmm2 {%k1}2255; X64-NEXT:    vmovaps %xmm2, %xmm02256; X64-NEXT:    retq2257;2258; X86-LABEL: test_mask_add_ss_rd:2259; X86:       # %bb.0:2260; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2261; X86-NEXT:    kmovw %eax, %k12262; X86-NEXT:    vaddss {rd-sae}, %xmm1, %xmm0, %xmm2 {%k1}2263; X86-NEXT:    vmovaps %xmm2, %xmm02264; X86-NEXT:    retl2265  %res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> %a2, i8 %mask, i32 9)2266  ret <4 x float> %res2267}2268 2269define <4 x float> @test_mask_add_ss_ru(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 %mask) {2270; X64-LABEL: test_mask_add_ss_ru:2271; X64:       # %bb.0:2272; X64-NEXT:    kmovw %edi, %k12273; X64-NEXT:    vaddss {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}2274; X64-NEXT:    vmovaps %xmm2, %xmm02275; X64-NEXT:    retq2276;2277; X86-LABEL: test_mask_add_ss_ru:2278; X86:       # %bb.0:2279; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2280; X86-NEXT:    kmovw %eax, %k12281; X86-NEXT:    vaddss {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}2282; X86-NEXT:    vmovaps %xmm2, %xmm02283; X86-NEXT:    retl2284  %res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> %a2, i8 %mask, i32 10)2285  ret <4 x float> %res2286}2287 2288define <4 x float> @test_mask_add_ss_rz(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 %mask) {2289; X64-LABEL: test_mask_add_ss_rz:2290; X64:       # %bb.0:2291; X64-NEXT:    kmovw %edi, %k12292; X64-NEXT:    vaddss {rz-sae}, %xmm1, %xmm0, %xmm2 {%k1}2293; X64-NEXT:    vmovaps %xmm2, %xmm02294; X64-NEXT:    retq2295;2296; X86-LABEL: test_mask_add_ss_rz:2297; X86:       # %bb.0:2298; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2299; X86-NEXT:    kmovw %eax, %k12300; X86-NEXT:    vaddss {rz-sae}, %xmm1, %xmm0, %xmm2 {%k1}2301; X86-NEXT:    vmovaps %xmm2, %xmm02302; X86-NEXT:    retl2303  %res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> %a2, i8 %mask, i32 11)2304  ret <4 x float> %res2305}2306 2307define <4 x float> @test_mask_add_ss_current(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 %mask) {2308; X64-LABEL: test_mask_add_ss_current:2309; X64:       # %bb.0:2310; X64-NEXT:    kmovw %edi, %k12311; X64-NEXT:    vaddss %xmm1, %xmm0, %xmm2 {%k1}2312; X64-NEXT:    vmovaps %xmm2, %xmm02313; X64-NEXT:    retq2314;2315; X86-LABEL: test_mask_add_ss_current:2316; X86:       # %bb.0:2317; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2318; X86-NEXT:    kmovw %eax, %k12319; X86-NEXT:    vaddss %xmm1, %xmm0, %xmm2 {%k1}2320; X86-NEXT:    vmovaps %xmm2, %xmm02321; X86-NEXT:    retl2322  %res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> %a2, i8 %mask, i32 4)2323  ret <4 x float> %res2324}2325 2326define <4 x float> @test_maskz_add_ss_rn(<4 x float> %a0, <4 x float> %a1, i8 %mask) {2327; X64-LABEL: test_maskz_add_ss_rn:2328; X64:       # %bb.0:2329; X64-NEXT:    kmovw %edi, %k12330; X64-NEXT:    vaddss {rn-sae}, %xmm1, %xmm0, %xmm0 {%k1} {z}2331; X64-NEXT:    retq2332;2333; X86-LABEL: test_maskz_add_ss_rn:2334; X86:       # %bb.0:2335; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2336; X86-NEXT:    kmovw %eax, %k12337; X86-NEXT:    vaddss {rn-sae}, %xmm1, %xmm0, %xmm0 {%k1} {z}2338; X86-NEXT:    retl2339  %res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 %mask, i32 8)2340  ret <4 x float> %res2341}2342 2343define <4 x float> @test_add_ss_rn(<4 x float> %a0, <4 x float> %a1) {2344; CHECK-LABEL: test_add_ss_rn:2345; CHECK:       # %bb.0:2346; CHECK-NEXT:    vaddss {rn-sae}, %xmm1, %xmm0, %xmm02347; CHECK-NEXT:    ret{{[l|q]}}2348  %res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 -1, i32 8)2349  ret <4 x float> %res2350}2351 2352define <4 x float> @test_mask_add_ss_current_memfold(<4 x float> %a0, ptr %a1, <4 x float> %a2, i8 %mask) {2353; X64-LABEL: test_mask_add_ss_current_memfold:2354; X64:       # %bb.0:2355; X64-NEXT:    kmovw %esi, %k12356; X64-NEXT:    vaddss (%rdi), %xmm0, %xmm1 {%k1}2357; X64-NEXT:    vmovaps %xmm1, %xmm02358; X64-NEXT:    retq2359;2360; X86-LABEL: test_mask_add_ss_current_memfold:2361; X86:       # %bb.0:2362; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2363; X86-NEXT:    kmovw %eax, %k12364; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax2365; X86-NEXT:    vaddss (%eax), %xmm0, %xmm1 {%k1}2366; X86-NEXT:    vmovaps %xmm1, %xmm02367; X86-NEXT:    retl2368  %a1.val = load float, ptr %a12369  %a1v0 = insertelement <4 x float> undef, float %a1.val, i32 02370  %a1v1 = insertelement <4 x float> %a1v0, float 0.000000e+00, i32 12371  %a1v2 = insertelement <4 x float> %a1v1, float 0.000000e+00, i32 22372  %a1v  = insertelement <4 x float> %a1v2, float 0.000000e+00, i32 32373  %res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>%a0, <4 x float> %a1v, <4 x float> %a2, i8 %mask, i32 4)2374  ret <4 x float> %res2375}2376 2377define <4 x float> @test_maskz_add_ss_current_memfold(<4 x float> %a0, ptr %a1, i8 %mask) {2378; X64-LABEL: test_maskz_add_ss_current_memfold:2379; X64:       # %bb.0:2380; X64-NEXT:    kmovw %esi, %k12381; X64-NEXT:    vaddss (%rdi), %xmm0, %xmm0 {%k1} {z}2382; X64-NEXT:    retq2383;2384; X86-LABEL: test_maskz_add_ss_current_memfold:2385; X86:       # %bb.0:2386; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2387; X86-NEXT:    kmovw %eax, %k12388; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax2389; X86-NEXT:    vaddss (%eax), %xmm0, %xmm0 {%k1} {z}2390; X86-NEXT:    retl2391  %a1.val = load float, ptr %a12392  %a1v0 = insertelement <4 x float> undef, float %a1.val, i32 02393  %a1v1 = insertelement <4 x float> %a1v0, float 0.000000e+00, i32 12394  %a1v2 = insertelement <4 x float> %a1v1, float 0.000000e+00, i32 22395  %a1v  = insertelement <4 x float> %a1v2, float 0.000000e+00, i32 32396  %res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>%a0, <4 x float> %a1v, <4 x float> zeroinitializer, i8 %mask, i32 4)2397  ret <4 x float> %res2398}2399 2400declare <2 x double> @llvm.x86.avx512.mask.add.sd.round(<2 x double>, <2 x double>, <2 x double>, i8, i32) nounwind readnone2401 2402define <2 x double> @test_mask_add_sd_rn(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 %mask) {2403; X64-LABEL: test_mask_add_sd_rn:2404; X64:       # %bb.0:2405; X64-NEXT:    kmovw %edi, %k12406; X64-NEXT:    vaddsd {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}2407; X64-NEXT:    vmovapd %xmm2, %xmm02408; X64-NEXT:    retq2409;2410; X86-LABEL: test_mask_add_sd_rn:2411; X86:       # %bb.0:2412; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2413; X86-NEXT:    kmovw %eax, %k12414; X86-NEXT:    vaddsd {rn-sae}, %xmm1, %xmm0, %xmm2 {%k1}2415; X86-NEXT:    vmovapd %xmm2, %xmm02416; X86-NEXT:    retl2417  %res = call <2 x double> @llvm.x86.avx512.mask.add.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> %a2, i8 %mask, i32 8)2418  ret <2 x double> %res2419}2420 2421define <2 x double> @test_mask_add_sd_rd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 %mask) {2422; X64-LABEL: test_mask_add_sd_rd:2423; X64:       # %bb.0:2424; X64-NEXT:    kmovw %edi, %k12425; X64-NEXT:    vaddsd {rd-sae}, %xmm1, %xmm0, %xmm2 {%k1}2426; X64-NEXT:    vmovapd %xmm2, %xmm02427; X64-NEXT:    retq2428;2429; X86-LABEL: test_mask_add_sd_rd:2430; X86:       # %bb.0:2431; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2432; X86-NEXT:    kmovw %eax, %k12433; X86-NEXT:    vaddsd {rd-sae}, %xmm1, %xmm0, %xmm2 {%k1}2434; X86-NEXT:    vmovapd %xmm2, %xmm02435; X86-NEXT:    retl2436  %res = call <2 x double> @llvm.x86.avx512.mask.add.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> %a2, i8 %mask, i32 9)2437  ret <2 x double> %res2438}2439 2440define <2 x double> @test_mask_add_sd_ru(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 %mask) {2441; X64-LABEL: test_mask_add_sd_ru:2442; X64:       # %bb.0:2443; X64-NEXT:    kmovw %edi, %k12444; X64-NEXT:    vaddsd {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}2445; X64-NEXT:    vmovapd %xmm2, %xmm02446; X64-NEXT:    retq2447;2448; X86-LABEL: test_mask_add_sd_ru:2449; X86:       # %bb.0:2450; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2451; X86-NEXT:    kmovw %eax, %k12452; X86-NEXT:    vaddsd {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}2453; X86-NEXT:    vmovapd %xmm2, %xmm02454; X86-NEXT:    retl2455  %res = call <2 x double> @llvm.x86.avx512.mask.add.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> %a2, i8 %mask, i32 10)2456  ret <2 x double> %res2457}2458 2459define <2 x double> @test_mask_add_sd_rz(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 %mask) {2460; X64-LABEL: test_mask_add_sd_rz:2461; X64:       # %bb.0:2462; X64-NEXT:    kmovw %edi, %k12463; X64-NEXT:    vaddsd {rz-sae}, %xmm1, %xmm0, %xmm2 {%k1}2464; X64-NEXT:    vmovapd %xmm2, %xmm02465; X64-NEXT:    retq2466;2467; X86-LABEL: test_mask_add_sd_rz:2468; X86:       # %bb.0:2469; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2470; X86-NEXT:    kmovw %eax, %k12471; X86-NEXT:    vaddsd {rz-sae}, %xmm1, %xmm0, %xmm2 {%k1}2472; X86-NEXT:    vmovapd %xmm2, %xmm02473; X86-NEXT:    retl2474  %res = call <2 x double> @llvm.x86.avx512.mask.add.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> %a2, i8 %mask, i32 11)2475  ret <2 x double> %res2476}2477 2478define <2 x double> @test_mask_add_sd_current(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 %mask) {2479; X64-LABEL: test_mask_add_sd_current:2480; X64:       # %bb.0:2481; X64-NEXT:    kmovw %edi, %k12482; X64-NEXT:    vaddsd %xmm1, %xmm0, %xmm2 {%k1}2483; X64-NEXT:    vmovapd %xmm2, %xmm02484; X64-NEXT:    retq2485;2486; X86-LABEL: test_mask_add_sd_current:2487; X86:       # %bb.0:2488; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2489; X86-NEXT:    kmovw %eax, %k12490; X86-NEXT:    vaddsd %xmm1, %xmm0, %xmm2 {%k1}2491; X86-NEXT:    vmovapd %xmm2, %xmm02492; X86-NEXT:    retl2493  %res = call <2 x double> @llvm.x86.avx512.mask.add.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> %a2, i8 %mask, i32 4)2494  ret <2 x double> %res2495}2496 2497define <2 x double> @test_maskz_add_sd_rn(<2 x double> %a0, <2 x double> %a1, i8 %mask) {2498; X64-LABEL: test_maskz_add_sd_rn:2499; X64:       # %bb.0:2500; X64-NEXT:    kmovw %edi, %k12501; X64-NEXT:    vaddsd {rn-sae}, %xmm1, %xmm0, %xmm0 {%k1} {z}2502; X64-NEXT:    retq2503;2504; X86-LABEL: test_maskz_add_sd_rn:2505; X86:       # %bb.0:2506; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2507; X86-NEXT:    kmovw %eax, %k12508; X86-NEXT:    vaddsd {rn-sae}, %xmm1, %xmm0, %xmm0 {%k1} {z}2509; X86-NEXT:    retl2510  %res = call <2 x double> @llvm.x86.avx512.mask.add.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 %mask, i32 8)2511  ret <2 x double> %res2512}2513 2514define <2 x double> @test_add_sd_rn(<2 x double> %a0, <2 x double> %a1) {2515; CHECK-LABEL: test_add_sd_rn:2516; CHECK:       # %bb.0:2517; CHECK-NEXT:    vaddsd {rn-sae}, %xmm1, %xmm0, %xmm02518; CHECK-NEXT:    ret{{[l|q]}}2519  %res = call <2 x double> @llvm.x86.avx512.mask.add.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 -1, i32 8)2520  ret <2 x double> %res2521}2522 2523define <2 x double> @test_mask_add_sd_current_memfold(<2 x double> %a0, ptr %a1, <2 x double> %a2, i8 %mask) {2524; X64-LABEL: test_mask_add_sd_current_memfold:2525; X64:       # %bb.0:2526; X64-NEXT:    kmovw %esi, %k12527; X64-NEXT:    vaddsd (%rdi), %xmm0, %xmm1 {%k1}2528; X64-NEXT:    vmovapd %xmm1, %xmm02529; X64-NEXT:    retq2530;2531; X86-LABEL: test_mask_add_sd_current_memfold:2532; X86:       # %bb.0:2533; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2534; X86-NEXT:    kmovw %eax, %k12535; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax2536; X86-NEXT:    vaddsd (%eax), %xmm0, %xmm1 {%k1}2537; X86-NEXT:    vmovapd %xmm1, %xmm02538; X86-NEXT:    retl2539  %a1.val = load double, ptr %a12540  %a1v0 = insertelement <2 x double> undef, double %a1.val, i32 02541  %a1v = insertelement <2 x double> %a1v0, double 0.000000e+00, i32 12542  %res = call <2 x double> @llvm.x86.avx512.mask.add.sd.round(<2 x double>%a0, <2 x double> %a1v, <2 x double> %a2, i8 %mask, i32 4)2543  ret <2 x double> %res2544}2545 2546define <2 x double> @test_maskz_add_sd_current_memfold(<2 x double> %a0, ptr %a1, i8 %mask) {2547; X64-LABEL: test_maskz_add_sd_current_memfold:2548; X64:       # %bb.0:2549; X64-NEXT:    kmovw %esi, %k12550; X64-NEXT:    vaddsd (%rdi), %xmm0, %xmm0 {%k1} {z}2551; X64-NEXT:    retq2552;2553; X86-LABEL: test_maskz_add_sd_current_memfold:2554; X86:       # %bb.0:2555; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2556; X86-NEXT:    kmovw %eax, %k12557; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax2558; X86-NEXT:    vaddsd (%eax), %xmm0, %xmm0 {%k1} {z}2559; X86-NEXT:    retl2560  %a1.val = load double, ptr %a12561  %a1v0 = insertelement <2 x double> undef, double %a1.val, i32 02562  %a1v = insertelement <2 x double> %a1v0, double 0.000000e+00, i32 12563  %res = call <2 x double> @llvm.x86.avx512.mask.add.sd.round(<2 x double>%a0, <2 x double> %a1v, <2 x double> zeroinitializer, i8 %mask, i32 4)2564  ret <2 x double> %res2565}2566 2567declare <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>, <4 x float>, <4 x float>, i8, i32) nounwind readnone2568 2569define <4 x float> @test_mask_max_ss_sae(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 %mask) {2570; X64-LABEL: test_mask_max_ss_sae:2571; X64:       # %bb.0:2572; X64-NEXT:    kmovw %edi, %k12573; X64-NEXT:    vmaxss {sae}, %xmm1, %xmm0, %xmm2 {%k1}2574; X64-NEXT:    vmovaps %xmm2, %xmm02575; X64-NEXT:    retq2576;2577; X86-LABEL: test_mask_max_ss_sae:2578; X86:       # %bb.0:2579; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2580; X86-NEXT:    kmovw %eax, %k12581; X86-NEXT:    vmaxss {sae}, %xmm1, %xmm0, %xmm2 {%k1}2582; X86-NEXT:    vmovaps %xmm2, %xmm02583; X86-NEXT:    retl2584  %res = call <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> %a2, i8 %mask, i32 8)2585  ret <4 x float> %res2586}2587 2588define <4 x float> @test_maskz_max_ss_sae(<4 x float> %a0, <4 x float> %a1, i8 %mask) {2589; X64-LABEL: test_maskz_max_ss_sae:2590; X64:       # %bb.0:2591; X64-NEXT:    kmovw %edi, %k12592; X64-NEXT:    vmaxss {sae}, %xmm1, %xmm0, %xmm0 {%k1} {z}2593; X64-NEXT:    retq2594;2595; X86-LABEL: test_maskz_max_ss_sae:2596; X86:       # %bb.0:2597; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2598; X86-NEXT:    kmovw %eax, %k12599; X86-NEXT:    vmaxss {sae}, %xmm1, %xmm0, %xmm0 {%k1} {z}2600; X86-NEXT:    retl2601  %res = call <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 %mask, i32 8)2602  ret <4 x float> %res2603}2604 2605define <4 x float> @test_max_ss_sae(<4 x float> %a0, <4 x float> %a1) {2606; CHECK-LABEL: test_max_ss_sae:2607; CHECK:       # %bb.0:2608; CHECK-NEXT:    vmaxss {sae}, %xmm1, %xmm0, %xmm02609; CHECK-NEXT:    ret{{[l|q]}}2610  %res = call <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 -1, i32 8)2611  ret <4 x float> %res2612}2613 2614define <4 x float> @test_mask_max_ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 %mask) {2615; X64-LABEL: test_mask_max_ss:2616; X64:       # %bb.0:2617; X64-NEXT:    kmovw %edi, %k12618; X64-NEXT:    vmaxss %xmm1, %xmm0, %xmm2 {%k1}2619; X64-NEXT:    vmovaps %xmm2, %xmm02620; X64-NEXT:    retq2621;2622; X86-LABEL: test_mask_max_ss:2623; X86:       # %bb.0:2624; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2625; X86-NEXT:    kmovw %eax, %k12626; X86-NEXT:    vmaxss %xmm1, %xmm0, %xmm2 {%k1}2627; X86-NEXT:    vmovaps %xmm2, %xmm02628; X86-NEXT:    retl2629  %res = call <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> %a2, i8 %mask, i32 4)2630  ret <4 x float> %res2631}2632 2633define <4 x float> @test_maskz_max_ss(<4 x float> %a0, <4 x float> %a1, i8 %mask) {2634; X64-LABEL: test_maskz_max_ss:2635; X64:       # %bb.0:2636; X64-NEXT:    kmovw %edi, %k12637; X64-NEXT:    vmaxss %xmm1, %xmm0, %xmm0 {%k1} {z}2638; X64-NEXT:    retq2639;2640; X86-LABEL: test_maskz_max_ss:2641; X86:       # %bb.0:2642; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2643; X86-NEXT:    kmovw %eax, %k12644; X86-NEXT:    vmaxss %xmm1, %xmm0, %xmm0 {%k1} {z}2645; X86-NEXT:    retl2646  %res = call <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 %mask, i32 4)2647  ret <4 x float> %res2648}2649 2650define <4 x float> @test_max_ss(<4 x float> %a0, <4 x float> %a1) {2651; CHECK-LABEL: test_max_ss:2652; CHECK:       # %bb.0:2653; CHECK-NEXT:    vmaxss %xmm1, %xmm0, %xmm02654; CHECK-NEXT:    ret{{[l|q]}}2655  %res = call <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>%a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 -1, i32 4)2656  ret <4 x float> %res2657}2658 2659define <4 x float> @test_mask_max_ss_memfold(<4 x float> %a0, ptr %a1, <4 x float> %a2, i8 %mask) {2660; X64-LABEL: test_mask_max_ss_memfold:2661; X64:       # %bb.0:2662; X64-NEXT:    kmovw %esi, %k12663; X64-NEXT:    vmaxss (%rdi), %xmm0, %xmm1 {%k1}2664; X64-NEXT:    vmovaps %xmm1, %xmm02665; X64-NEXT:    retq2666;2667; X86-LABEL: test_mask_max_ss_memfold:2668; X86:       # %bb.0:2669; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2670; X86-NEXT:    kmovw %eax, %k12671; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax2672; X86-NEXT:    vmaxss (%eax), %xmm0, %xmm1 {%k1}2673; X86-NEXT:    vmovaps %xmm1, %xmm02674; X86-NEXT:    retl2675  %a1.val = load float, ptr %a12676  %a1v0 = insertelement <4 x float> undef, float %a1.val, i32 02677  %a1v1 = insertelement <4 x float> %a1v0, float 0.000000e+00, i32 12678  %a1v2 = insertelement <4 x float> %a1v1, float 0.000000e+00, i32 22679  %a1v  = insertelement <4 x float> %a1v2, float 0.000000e+00, i32 32680  %res = call <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>%a0, <4 x float> %a1v, <4 x float> %a2, i8 %mask, i32 4)2681  ret <4 x float> %res2682}2683 2684define <4 x float> @test_maskz_max_ss_memfold(<4 x float> %a0, ptr %a1, i8 %mask) {2685; X64-LABEL: test_maskz_max_ss_memfold:2686; X64:       # %bb.0:2687; X64-NEXT:    kmovw %esi, %k12688; X64-NEXT:    vmaxss (%rdi), %xmm0, %xmm0 {%k1} {z}2689; X64-NEXT:    retq2690;2691; X86-LABEL: test_maskz_max_ss_memfold:2692; X86:       # %bb.0:2693; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2694; X86-NEXT:    kmovw %eax, %k12695; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax2696; X86-NEXT:    vmaxss (%eax), %xmm0, %xmm0 {%k1} {z}2697; X86-NEXT:    retl2698  %a1.val = load float, ptr %a12699  %a1v0 = insertelement <4 x float> undef, float %a1.val, i32 02700  %a1v1 = insertelement <4 x float> %a1v0, float 0.000000e+00, i32 12701  %a1v2 = insertelement <4 x float> %a1v1, float 0.000000e+00, i32 22702  %a1v  = insertelement <4 x float> %a1v2, float 0.000000e+00, i32 32703  %res = call <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>%a0, <4 x float> %a1v, <4 x float> zeroinitializer, i8 %mask, i32 4)2704  ret <4 x float> %res2705}2706declare <2 x double> @llvm.x86.avx512.mask.max.sd.round(<2 x double>, <2 x double>, <2 x double>, i8, i32) nounwind readnone2707 2708define <2 x double> @test_mask_max_sd_sae(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 %mask) {2709; X64-LABEL: test_mask_max_sd_sae:2710; X64:       # %bb.0:2711; X64-NEXT:    kmovw %edi, %k12712; X64-NEXT:    vmaxsd {sae}, %xmm1, %xmm0, %xmm2 {%k1}2713; X64-NEXT:    vmovapd %xmm2, %xmm02714; X64-NEXT:    retq2715;2716; X86-LABEL: test_mask_max_sd_sae:2717; X86:       # %bb.0:2718; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2719; X86-NEXT:    kmovw %eax, %k12720; X86-NEXT:    vmaxsd {sae}, %xmm1, %xmm0, %xmm2 {%k1}2721; X86-NEXT:    vmovapd %xmm2, %xmm02722; X86-NEXT:    retl2723  %res = call <2 x double> @llvm.x86.avx512.mask.max.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> %a2, i8 %mask, i32 8)2724  ret <2 x double> %res2725}2726 2727define <2 x double> @test_maskz_max_sd_sae(<2 x double> %a0, <2 x double> %a1, i8 %mask) {2728; X64-LABEL: test_maskz_max_sd_sae:2729; X64:       # %bb.0:2730; X64-NEXT:    kmovw %edi, %k12731; X64-NEXT:    vmaxsd {sae}, %xmm1, %xmm0, %xmm0 {%k1} {z}2732; X64-NEXT:    retq2733;2734; X86-LABEL: test_maskz_max_sd_sae:2735; X86:       # %bb.0:2736; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2737; X86-NEXT:    kmovw %eax, %k12738; X86-NEXT:    vmaxsd {sae}, %xmm1, %xmm0, %xmm0 {%k1} {z}2739; X86-NEXT:    retl2740  %res = call <2 x double> @llvm.x86.avx512.mask.max.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 %mask, i32 8)2741  ret <2 x double> %res2742}2743 2744define <2 x double> @test_max_sd_sae(<2 x double> %a0, <2 x double> %a1) {2745; CHECK-LABEL: test_max_sd_sae:2746; CHECK:       # %bb.0:2747; CHECK-NEXT:    vmaxsd {sae}, %xmm1, %xmm0, %xmm02748; CHECK-NEXT:    ret{{[l|q]}}2749  %res = call <2 x double> @llvm.x86.avx512.mask.max.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 -1, i32 8)2750  ret <2 x double> %res2751}2752 2753define <2 x double> @test_mask_max_sd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 %mask) {2754; X64-LABEL: test_mask_max_sd:2755; X64:       # %bb.0:2756; X64-NEXT:    kmovw %edi, %k12757; X64-NEXT:    vmaxsd %xmm1, %xmm0, %xmm2 {%k1}2758; X64-NEXT:    vmovapd %xmm2, %xmm02759; X64-NEXT:    retq2760;2761; X86-LABEL: test_mask_max_sd:2762; X86:       # %bb.0:2763; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2764; X86-NEXT:    kmovw %eax, %k12765; X86-NEXT:    vmaxsd %xmm1, %xmm0, %xmm2 {%k1}2766; X86-NEXT:    vmovapd %xmm2, %xmm02767; X86-NEXT:    retl2768  %res = call <2 x double> @llvm.x86.avx512.mask.max.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> %a2, i8 %mask, i32 4)2769  ret <2 x double> %res2770}2771 2772define <2 x double> @test_maskz_max_sd(<2 x double> %a0, <2 x double> %a1, i8 %mask) {2773; X64-LABEL: test_maskz_max_sd:2774; X64:       # %bb.0:2775; X64-NEXT:    kmovw %edi, %k12776; X64-NEXT:    vmaxsd %xmm1, %xmm0, %xmm0 {%k1} {z}2777; X64-NEXT:    retq2778;2779; X86-LABEL: test_maskz_max_sd:2780; X86:       # %bb.0:2781; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2782; X86-NEXT:    kmovw %eax, %k12783; X86-NEXT:    vmaxsd %xmm1, %xmm0, %xmm0 {%k1} {z}2784; X86-NEXT:    retl2785  %res = call <2 x double> @llvm.x86.avx512.mask.max.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 %mask, i32 4)2786  ret <2 x double> %res2787}2788 2789define <2 x double> @test_max_sd(<2 x double> %a0, <2 x double> %a1) {2790; CHECK-LABEL: test_max_sd:2791; CHECK:       # %bb.0:2792; CHECK-NEXT:    vmaxsd %xmm1, %xmm0, %xmm02793; CHECK-NEXT:    ret{{[l|q]}}2794  %res = call <2 x double> @llvm.x86.avx512.mask.max.sd.round(<2 x double>%a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 -1, i32 4)2795  ret <2 x double> %res2796}2797 2798define <2 x double> @test_mask_max_sd_memfold(<2 x double> %a0, ptr %a1, <2 x double> %a2, i8 %mask) {2799; X64-LABEL: test_mask_max_sd_memfold:2800; X64:       # %bb.0:2801; X64-NEXT:    kmovw %esi, %k12802; X64-NEXT:    vmaxsd (%rdi), %xmm0, %xmm1 {%k1}2803; X64-NEXT:    vmovapd %xmm1, %xmm02804; X64-NEXT:    retq2805;2806; X86-LABEL: test_mask_max_sd_memfold:2807; X86:       # %bb.0:2808; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2809; X86-NEXT:    kmovw %eax, %k12810; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax2811; X86-NEXT:    vmaxsd (%eax), %xmm0, %xmm1 {%k1}2812; X86-NEXT:    vmovapd %xmm1, %xmm02813; X86-NEXT:    retl2814  %a1.val = load double, ptr %a12815  %a1v0 = insertelement <2 x double> undef, double %a1.val, i32 02816  %a1v = insertelement <2 x double> %a1v0, double 0.000000e+00, i32 12817  %res = call <2 x double> @llvm.x86.avx512.mask.max.sd.round(<2 x double>%a0, <2 x double> %a1v, <2 x double> %a2, i8 %mask, i32 4)2818  ret <2 x double> %res2819}2820 2821define <2 x double> @test_maskz_max_sd_memfold(<2 x double> %a0, ptr %a1, i8 %mask) {2822; X64-LABEL: test_maskz_max_sd_memfold:2823; X64:       # %bb.0:2824; X64-NEXT:    kmovw %esi, %k12825; X64-NEXT:    vmaxsd (%rdi), %xmm0, %xmm0 {%k1} {z}2826; X64-NEXT:    retq2827;2828; X86-LABEL: test_maskz_max_sd_memfold:2829; X86:       # %bb.0:2830; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2831; X86-NEXT:    kmovw %eax, %k12832; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax2833; X86-NEXT:    vmaxsd (%eax), %xmm0, %xmm0 {%k1} {z}2834; X86-NEXT:    retl2835  %a1.val = load double, ptr %a12836  %a1v0 = insertelement <2 x double> undef, double %a1.val, i32 02837  %a1v = insertelement <2 x double> %a1v0, double 0.000000e+00, i32 12838  %res = call <2 x double> @llvm.x86.avx512.mask.max.sd.round(<2 x double>%a0, <2 x double> %a1v, <2 x double> zeroinitializer, i8 %mask, i32 4)2839  ret <2 x double> %res2840}2841 2842define <4 x float> @test_x86_avx512_cvtsi2ss32(<4 x float> %a, i32 %b) {2843; X64-LABEL: test_x86_avx512_cvtsi2ss32:2844; X64:       # %bb.0:2845; X64-NEXT:    vcvtsi2ss %edi, {rz-sae}, %xmm0, %xmm02846; X64-NEXT:    retq2847;2848; X86-LABEL: test_x86_avx512_cvtsi2ss32:2849; X86:       # %bb.0:2850; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax2851; X86-NEXT:    vcvtsi2ss %eax, {rz-sae}, %xmm0, %xmm02852; X86-NEXT:    retl2853  %res = call <4 x float> @llvm.x86.avx512.cvtsi2ss32(<4 x float> %a, i32 %b, i32 11) ; <<<4 x float>> [#uses=1]2854  ret <4 x float> %res2855}2856declare <4 x float> @llvm.x86.avx512.cvtsi2ss32(<4 x float>, i32, i32) nounwind readnone2857 2858define <4 x float> @test_x86_avx512__mm_cvt_roundu32_ss (<4 x float> %a, i32 %b) {2859; X64-LABEL: test_x86_avx512__mm_cvt_roundu32_ss:2860; X64:       # %bb.0:2861; X64-NEXT:    vcvtusi2ss %edi, {rd-sae}, %xmm0, %xmm02862; X64-NEXT:    retq2863;2864; X86-LABEL: test_x86_avx512__mm_cvt_roundu32_ss:2865; X86:       # %bb.0:2866; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax2867; X86-NEXT:    vcvtusi2ss %eax, {rd-sae}, %xmm0, %xmm02868; X86-NEXT:    retl2869  %res = call <4 x float> @llvm.x86.avx512.cvtusi2ss(<4 x float> %a, i32 %b, i32 9) ; <<<4 x float>> [#uses=1]2870  ret <4 x float> %res2871}2872 2873define <4 x float> @test_x86_avx512__mm_cvt_roundu32_ss_mem(<4 x float> %a, ptr %ptr) {2874; X64-LABEL: test_x86_avx512__mm_cvt_roundu32_ss_mem:2875; X64:       # %bb.0:2876; X64-NEXT:    movl (%rdi), %eax2877; X64-NEXT:    vcvtusi2ss %eax, {rd-sae}, %xmm0, %xmm02878; X64-NEXT:    retq2879;2880; X86-LABEL: test_x86_avx512__mm_cvt_roundu32_ss_mem:2881; X86:       # %bb.0:2882; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax2883; X86-NEXT:    movl (%eax), %eax2884; X86-NEXT:    vcvtusi2ss %eax, {rd-sae}, %xmm0, %xmm02885; X86-NEXT:    retl2886  %b = load i32, ptr %ptr2887  %res = call <4 x float> @llvm.x86.avx512.cvtusi2ss(<4 x float> %a, i32 %b, i32 9) ; <<<4 x float>> [#uses=1]2888  ret <4 x float> %res2889}2890 2891define <4 x float> @test_x86_avx512__mm_cvtu32_ss(<4 x float> %a, i32 %b) {2892; X64-LABEL: test_x86_avx512__mm_cvtu32_ss:2893; X64:       # %bb.0:2894; X64-NEXT:    vcvtusi2ss %edi, %xmm0, %xmm02895; X64-NEXT:    retq2896;2897; X86-LABEL: test_x86_avx512__mm_cvtu32_ss:2898; X86:       # %bb.0:2899; X86-NEXT:    vcvtusi2ssl {{[0-9]+}}(%esp), %xmm0, %xmm02900; X86-NEXT:    retl2901  %res = call <4 x float> @llvm.x86.avx512.cvtusi2ss(<4 x float> %a, i32 %b, i32 4) ; <<<4 x float>> [#uses=1]2902  ret <4 x float> %res2903}2904 2905define <4 x float> @test_x86_avx512__mm_cvtu32_ss_mem(<4 x float> %a, ptr %ptr) {2906; X64-LABEL: test_x86_avx512__mm_cvtu32_ss_mem:2907; X64:       # %bb.0:2908; X64-NEXT:    vcvtusi2ssl (%rdi), %xmm0, %xmm02909; X64-NEXT:    retq2910;2911; X86-LABEL: test_x86_avx512__mm_cvtu32_ss_mem:2912; X86:       # %bb.0:2913; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax2914; X86-NEXT:    vcvtusi2ssl (%eax), %xmm0, %xmm02915; X86-NEXT:    retl2916  %b = load i32, ptr %ptr2917  %res = call <4 x float> @llvm.x86.avx512.cvtusi2ss(<4 x float> %a, i32 %b, i32 4) ; <<<4 x float>> [#uses=1]2918  ret <4 x float> %res2919}2920declare <4 x float> @llvm.x86.avx512.cvtusi2ss(<4 x float>, i32, i32) nounwind readnone2921 2922declare <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32>, <16 x i32>, <16 x i32>)2923 2924define <16 x i32>@test_int_x86_avx512_vpermi2var_d_512(<16 x i32> %x0, <16 x i32> %x1, ptr %x2p) {2925; X64-LABEL: test_int_x86_avx512_vpermi2var_d_512:2926; X64:       # %bb.0:2927; X64-NEXT:    vpermt2d (%rdi), %zmm1, %zmm02928; X64-NEXT:    retq2929;2930; X86-LABEL: test_int_x86_avx512_vpermi2var_d_512:2931; X86:       # %bb.0:2932; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax2933; X86-NEXT:    vpermt2d (%eax), %zmm1, %zmm02934; X86-NEXT:    retl2935  %x2 = load <16 x i32>, ptr %x2p2936  %1 = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2)2937  ret <16 x i32> %12938}2939 2940define <16 x i32>@test_int_x86_avx512_mask_vpermi2var_d_512(<16 x i32> %x0, <16 x i32> %x1, ptr %x2p, i16 %x3) {2941; X64-LABEL: test_int_x86_avx512_mask_vpermi2var_d_512:2942; X64:       # %bb.0:2943; X64-NEXT:    kmovw %esi, %k12944; X64-NEXT:    vpermi2d (%rdi), %zmm0, %zmm1 {%k1}2945; X64-NEXT:    vmovdqa64 %zmm1, %zmm02946; X64-NEXT:    retq2947;2948; X86-LABEL: test_int_x86_avx512_mask_vpermi2var_d_512:2949; X86:       # %bb.0:2950; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax2951; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k12952; X86-NEXT:    vpermi2d (%eax), %zmm0, %zmm1 {%k1}2953; X86-NEXT:    vmovdqa64 %zmm1, %zmm02954; X86-NEXT:    retl2955  %x2 = load <16 x i32>, ptr %x2p2956  %1 = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2)2957  %2 = bitcast i16 %x3 to <16 x i1>2958  %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x12959  ret <16 x i32> %32960}2961 2962declare <8 x double> @llvm.x86.avx512.vpermi2var.pd.512(<8 x double>, <8 x i64>, <8 x double>)2963 2964define <8 x double>@test_int_x86_avx512_vpermi2var_pd_512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2) {2965; CHECK-LABEL: test_int_x86_avx512_vpermi2var_pd_512:2966; CHECK:       # %bb.0:2967; CHECK-NEXT:    vpermt2pd %zmm2, %zmm1, %zmm02968; CHECK-NEXT:    ret{{[l|q]}}2969  %1 = call <8 x double> @llvm.x86.avx512.vpermi2var.pd.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2)2970  ret <8 x double> %12971}2972 2973define <8 x double>@test_int_x86_avx512_mask_vpermi2var_pd_512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %x3) {2974; X64-LABEL: test_int_x86_avx512_mask_vpermi2var_pd_512:2975; X64:       # %bb.0:2976; X64-NEXT:    kmovw %edi, %k12977; X64-NEXT:    vpermi2pd %zmm2, %zmm0, %zmm1 {%k1}2978; X64-NEXT:    vmovapd %zmm1, %zmm02979; X64-NEXT:    retq2980;2981; X86-LABEL: test_int_x86_avx512_mask_vpermi2var_pd_512:2982; X86:       # %bb.0:2983; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax2984; X86-NEXT:    kmovw %eax, %k12985; X86-NEXT:    vpermi2pd %zmm2, %zmm0, %zmm1 {%k1}2986; X86-NEXT:    vmovapd %zmm1, %zmm02987; X86-NEXT:    retl2988  %1 = call <8 x double> @llvm.x86.avx512.vpermi2var.pd.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2)2989  %2 = bitcast <8 x i64> %x1 to <8 x double>2990  %3 = bitcast i8 %x3 to <8 x i1>2991  %4 = select <8 x i1> %3, <8 x double> %1, <8 x double> %22992  ret <8 x double> %42993}2994 2995declare <16 x float> @llvm.x86.avx512.vpermi2var.ps.512(<16 x float>, <16 x i32>, <16 x float>)2996 2997define <16 x float>@test_int_x86_avx512_vpermi2var_ps_512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2) {2998; CHECK-LABEL: test_int_x86_avx512_vpermi2var_ps_512:2999; CHECK:       # %bb.0:3000; CHECK-NEXT:    vpermt2ps %zmm2, %zmm1, %zmm03001; CHECK-NEXT:    ret{{[l|q]}}3002  %1 = call <16 x float> @llvm.x86.avx512.vpermi2var.ps.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2)3003  ret <16 x float> %13004}3005 3006define <16 x float>@test_int_x86_avx512_mask_vpermi2var_ps_512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %x3) {3007; X64-LABEL: test_int_x86_avx512_mask_vpermi2var_ps_512:3008; X64:       # %bb.0:3009; X64-NEXT:    kmovw %edi, %k13010; X64-NEXT:    vpermi2ps %zmm2, %zmm0, %zmm1 {%k1}3011; X64-NEXT:    vmovaps %zmm1, %zmm03012; X64-NEXT:    retq3013;3014; X86-LABEL: test_int_x86_avx512_mask_vpermi2var_ps_512:3015; X86:       # %bb.0:3016; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k13017; X86-NEXT:    vpermi2ps %zmm2, %zmm0, %zmm1 {%k1}3018; X86-NEXT:    vmovaps %zmm1, %zmm03019; X86-NEXT:    retl3020  %1 = call <16 x float> @llvm.x86.avx512.vpermi2var.ps.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2)3021  %2 = bitcast <16 x i32> %x1 to <16 x float>3022  %3 = bitcast i16 %x3 to <16 x i1>3023  %4 = select <16 x i1> %3, <16 x float> %1, <16 x float> %23024  ret <16 x float> %43025}3026 3027declare <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64>, <8 x i64>, <8 x i64>)3028 3029define <8 x i64>@test_int_x86_avx512_vpermi2var_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) {3030; CHECK-LABEL: test_int_x86_avx512_vpermi2var_q_512:3031; CHECK:       # %bb.0:3032; CHECK-NEXT:    vpermt2q %zmm2, %zmm1, %zmm03033; CHECK-NEXT:    ret{{[l|q]}}3034  %1 = call <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2)3035  ret <8 x i64> %13036}3037 3038define <8 x i64>@test_int_x86_avx512_mask_vpermi2var_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {3039; X64-LABEL: test_int_x86_avx512_mask_vpermi2var_q_512:3040; X64:       # %bb.0:3041; X64-NEXT:    kmovw %edi, %k13042; X64-NEXT:    vpermi2q %zmm2, %zmm0, %zmm1 {%k1}3043; X64-NEXT:    vmovdqa64 %zmm1, %zmm03044; X64-NEXT:    retq3045;3046; X86-LABEL: test_int_x86_avx512_mask_vpermi2var_q_512:3047; X86:       # %bb.0:3048; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3049; X86-NEXT:    kmovw %eax, %k13050; X86-NEXT:    vpermi2q %zmm2, %zmm0, %zmm1 {%k1}3051; X86-NEXT:    vmovdqa64 %zmm1, %zmm03052; X86-NEXT:    retl3053  %1 = call <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2)3054  %2 = bitcast i8 %x3 to <8 x i1>3055  %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %x13056  ret <8 x i64> %33057}3058 3059define <16 x i32>@test_int_x86_avx512_maskz_vpermt2var_d_512(<16 x i32> %x0, <16 x i32> %x1, ptr %x2p, i16 %x3) {3060; X64-LABEL: test_int_x86_avx512_maskz_vpermt2var_d_512:3061; X64:       # %bb.0:3062; X64-NEXT:    kmovw %esi, %k13063; X64-NEXT:    vpermi2d (%rdi), %zmm1, %zmm0 {%k1} {z}3064; X64-NEXT:    retq3065;3066; X86-LABEL: test_int_x86_avx512_maskz_vpermt2var_d_512:3067; X86:       # %bb.0:3068; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax3069; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k13070; X86-NEXT:    vpermi2d (%eax), %zmm1, %zmm0 {%k1} {z}3071; X86-NEXT:    retl3072  %x2 = load <16 x i32>, ptr %x2p3073  %1 = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2)3074  %2 = bitcast i16 %x3 to <16 x i1>3075  %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer3076  ret <16 x i32> %33077}3078 3079define <8 x double>@test_int_x86_avx512_maskz_vpermt2var_pd_512(<8 x i64> %x0, <8 x double> %x1, ptr %x2ptr, i8 %x3) {3080; X64-LABEL: test_int_x86_avx512_maskz_vpermt2var_pd_512:3081; X64:       # %bb.0:3082; X64-NEXT:    kmovw %esi, %k13083; X64-NEXT:    vpermi2pd (%rdi){1to8}, %zmm1, %zmm0 {%k1} {z}3084; X64-NEXT:    retq3085;3086; X86-LABEL: test_int_x86_avx512_maskz_vpermt2var_pd_512:3087; X86:       # %bb.0:3088; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax3089; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %ecx3090; X86-NEXT:    kmovw %ecx, %k13091; X86-NEXT:    vpermi2pd (%eax){1to8}, %zmm1, %zmm0 {%k1} {z}3092; X86-NEXT:    retl3093  %x2s = load double, ptr %x2ptr3094  %x2ins = insertelement <8 x double> undef, double %x2s, i32 03095  %x2 = shufflevector <8 x double> %x2ins, <8 x double> undef, <8 x i32> zeroinitializer3096  %1 = call <8 x double> @llvm.x86.avx512.vpermi2var.pd.512(<8 x double> %x1, <8 x i64> %x0, <8 x double> %x2)3097  %2 = bitcast i8 %x3 to <8 x i1>3098  %3 = select <8 x i1> %2, <8 x double> %1, <8 x double> zeroinitializer3099  ret <8 x double> %33100}3101 3102define <16 x float>@test_int_x86_avx512_maskz_vpermt2var_ps_512(<16 x i32> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3) {3103; X64-LABEL: test_int_x86_avx512_maskz_vpermt2var_ps_512:3104; X64:       # %bb.0:3105; X64-NEXT:    kmovw %edi, %k13106; X64-NEXT:    vpermi2ps %zmm2, %zmm1, %zmm0 {%k1} {z}3107; X64-NEXT:    retq3108;3109; X86-LABEL: test_int_x86_avx512_maskz_vpermt2var_ps_512:3110; X86:       # %bb.0:3111; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k13112; X86-NEXT:    vpermi2ps %zmm2, %zmm1, %zmm0 {%k1} {z}3113; X86-NEXT:    retl3114  %1 = call <16 x float> @llvm.x86.avx512.vpermi2var.ps.512(<16 x float> %x1, <16 x i32> %x0, <16 x float> %x2)3115  %2 = bitcast i16 %x3 to <16 x i1>3116  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer3117  ret <16 x float> %33118}3119 3120define <8 x i64>@test_int_x86_avx512_maskz_vpermt2var_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {3121; X64-LABEL: test_int_x86_avx512_maskz_vpermt2var_q_512:3122; X64:       # %bb.0:3123; X64-NEXT:    kmovw %edi, %k13124; X64-NEXT:    vpermi2q %zmm2, %zmm1, %zmm0 {%k1} {z}3125; X64-NEXT:    retq3126;3127; X86-LABEL: test_int_x86_avx512_maskz_vpermt2var_q_512:3128; X86:       # %bb.0:3129; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3130; X86-NEXT:    kmovw %eax, %k13131; X86-NEXT:    vpermi2q %zmm2, %zmm1, %zmm0 {%k1} {z}3132; X86-NEXT:    retl3133  %1 = call <8 x i64> @llvm.x86.avx512.vpermi2var.q.512(<8 x i64> %x1, <8 x i64> %x0, <8 x i64> %x2)3134  %2 = bitcast i8 %x3 to <8 x i1>3135  %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> zeroinitializer3136  ret <8 x i64> %33137}3138 3139define <16 x i32>@test_int_x86_avx512_vpermt2var_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {3140; CHECK-LABEL: test_int_x86_avx512_vpermt2var_d_512:3141; CHECK:       # %bb.0:3142; CHECK-NEXT:    vpermi2d %zmm2, %zmm1, %zmm03143; CHECK-NEXT:    ret{{[l|q]}}3144  %1 = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2)3145  ret <16 x i32> %13146}3147 3148define <16 x i32>@test_int_x86_avx512_mask_vpermt2var_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {3149; X64-LABEL: test_int_x86_avx512_mask_vpermt2var_d_512:3150; X64:       # %bb.0:3151; X64-NEXT:    kmovw %edi, %k13152; X64-NEXT:    vpermt2d %zmm2, %zmm0, %zmm1 {%k1}3153; X64-NEXT:    vmovdqa64 %zmm1, %zmm03154; X64-NEXT:    retq3155;3156; X86-LABEL: test_int_x86_avx512_mask_vpermt2var_d_512:3157; X86:       # %bb.0:3158; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k13159; X86-NEXT:    vpermt2d %zmm2, %zmm0, %zmm1 {%k1}3160; X86-NEXT:    vmovdqa64 %zmm1, %zmm03161; X86-NEXT:    retl3162  %1 = call <16 x i32> @llvm.x86.avx512.vpermi2var.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2)3163  %2 = bitcast i16 %x3 to <16 x i1>3164  %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x13165  ret <16 x i32> %33166}3167 3168declare <8 x double> @llvm.x86.avx512.mask.scalef.pd.512(<8 x double>, <8 x double>, <8 x double>, i8, i32)3169define <8 x double>@test_int_x86_avx512_mask_scalef_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3) {3170; X64-LABEL: test_int_x86_avx512_mask_scalef_pd_512:3171; X64:       # %bb.0:3172; X64-NEXT:    kmovw %edi, %k13173; X64-NEXT:    vscalefpd {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1}3174; X64-NEXT:    vscalefpd {rn-sae}, %zmm1, %zmm0, %zmm03175; X64-NEXT:    vaddpd %zmm0, %zmm2, %zmm03176; X64-NEXT:    retq3177;3178; X86-LABEL: test_int_x86_avx512_mask_scalef_pd_512:3179; X86:       # %bb.0:3180; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3181; X86-NEXT:    kmovw %eax, %k13182; X86-NEXT:    vscalefpd {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1}3183; X86-NEXT:    vscalefpd {rn-sae}, %zmm1, %zmm0, %zmm03184; X86-NEXT:    vaddpd %zmm0, %zmm2, %zmm03185; X86-NEXT:    retl3186  %res = call <8 x double> @llvm.x86.avx512.mask.scalef.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3, i32 11)3187  %res1 = call <8 x double> @llvm.x86.avx512.mask.scalef.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 -1, i32 8)3188  %res2 = fadd <8 x double> %res, %res13189  ret <8 x double> %res23190}3191 3192declare <16 x float> @llvm.x86.avx512.mask.scalef.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)3193define <16 x float>@test_int_x86_avx512_mask_scalef_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3) {3194; X64-LABEL: test_int_x86_avx512_mask_scalef_ps_512:3195; X64:       # %bb.0:3196; X64-NEXT:    kmovw %edi, %k13197; X64-NEXT:    vscalefps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1}3198; X64-NEXT:    vscalefps {rn-sae}, %zmm1, %zmm0, %zmm03199; X64-NEXT:    vaddps %zmm0, %zmm2, %zmm03200; X64-NEXT:    retq3201;3202; X86-LABEL: test_int_x86_avx512_mask_scalef_ps_512:3203; X86:       # %bb.0:3204; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k13205; X86-NEXT:    vscalefps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1}3206; X86-NEXT:    vscalefps {rn-sae}, %zmm1, %zmm0, %zmm03207; X86-NEXT:    vaddps %zmm0, %zmm2, %zmm03208; X86-NEXT:    retl3209  %res = call <16 x float> @llvm.x86.avx512.mask.scalef.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 10)3210  %res1 = call <16 x float> @llvm.x86.avx512.mask.scalef.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 -1, i32 8)3211  %res2 = fadd <16 x float> %res, %res13212  ret <16 x float> %res23213}3214 3215declare <16 x i8> @llvm.x86.avx512.mask.pmov.qb.512(<8 x i64>, <16 x i8>, i8)3216 3217define <16 x i8>@test_int_x86_avx512_mask_pmov_qb_512(<8 x i64> %x0, <16 x i8> %x1, i8 %x2) {3218; X64-LABEL: test_int_x86_avx512_mask_pmov_qb_512:3219; X64:       # %bb.0:3220; X64-NEXT:    kmovw %edi, %k13221; X64-NEXT:    vpmovqb %zmm0, %xmm23222; X64-NEXT:    vpmovqb %zmm0, %xmm1 {%k1}3223; X64-NEXT:    vpaddb %xmm1, %xmm2, %xmm13224; X64-NEXT:    vpmovqb %zmm0, %xmm0 {%k1} {z}3225; X64-NEXT:    vpaddb %xmm0, %xmm1, %xmm03226; X64-NEXT:    vzeroupper3227; X64-NEXT:    retq3228;3229; X86-LABEL: test_int_x86_avx512_mask_pmov_qb_512:3230; X86:       # %bb.0:3231; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3232; X86-NEXT:    kmovw %eax, %k13233; X86-NEXT:    vpmovqb %zmm0, %xmm23234; X86-NEXT:    vpmovqb %zmm0, %xmm1 {%k1}3235; X86-NEXT:    vpaddb %xmm1, %xmm2, %xmm13236; X86-NEXT:    vpmovqb %zmm0, %xmm0 {%k1} {z}3237; X86-NEXT:    vpaddb %xmm0, %xmm1, %xmm03238; X86-NEXT:    vzeroupper3239; X86-NEXT:    retl3240    %res0 = call <16 x i8> @llvm.x86.avx512.mask.pmov.qb.512(<8 x i64> %x0, <16 x i8> %x1, i8 -1)3241    %res1 = call <16 x i8> @llvm.x86.avx512.mask.pmov.qb.512(<8 x i64> %x0, <16 x i8> %x1, i8 %x2)3242    %res2 = call <16 x i8> @llvm.x86.avx512.mask.pmov.qb.512(<8 x i64> %x0, <16 x i8> zeroinitializer, i8 %x2)3243    %res3 = add <16 x i8> %res0, %res13244    %res4 = add <16 x i8> %res3, %res23245    ret <16 x i8> %res43246}3247 3248declare void @llvm.x86.avx512.mask.pmov.qb.mem.512(ptr %ptr, <8 x i64>, i8)3249 3250define void @test_int_x86_avx512_mask_pmov_qb_mem_512(ptr %ptr, <8 x i64> %x1, i8 %x2) {3251; X64-LABEL: test_int_x86_avx512_mask_pmov_qb_mem_512:3252; X64:       # %bb.0:3253; X64-NEXT:    kmovw %esi, %k13254; X64-NEXT:    vpmovqb %zmm0, (%rdi)3255; X64-NEXT:    vpmovqb %zmm0, (%rdi) {%k1}3256; X64-NEXT:    vzeroupper3257; X64-NEXT:    retq3258;3259; X86-LABEL: test_int_x86_avx512_mask_pmov_qb_mem_512:3260; X86:       # %bb.0:3261; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3262; X86-NEXT:    kmovw %eax, %k13263; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax3264; X86-NEXT:    vpmovqb %zmm0, (%eax)3265; X86-NEXT:    vpmovqb %zmm0, (%eax) {%k1}3266; X86-NEXT:    vzeroupper3267; X86-NEXT:    retl3268    call void @llvm.x86.avx512.mask.pmov.qb.mem.512(ptr %ptr, <8 x i64> %x1, i8 -1)3269    call void @llvm.x86.avx512.mask.pmov.qb.mem.512(ptr %ptr, <8 x i64> %x1, i8 %x2)3270    ret void3271}3272 3273declare <16 x i8> @llvm.x86.avx512.mask.pmovs.qb.512(<8 x i64>, <16 x i8>, i8)3274 3275define <16 x i8>@test_int_x86_avx512_mask_pmovs_qb_512(<8 x i64> %x0, <16 x i8> %x1, i8 %x2) {3276; X64-LABEL: test_int_x86_avx512_mask_pmovs_qb_512:3277; X64:       # %bb.0:3278; X64-NEXT:    kmovw %edi, %k13279; X64-NEXT:    vpmovsqb %zmm0, %xmm23280; X64-NEXT:    vpmovsqb %zmm0, %xmm1 {%k1}3281; X64-NEXT:    vpaddb %xmm1, %xmm2, %xmm13282; X64-NEXT:    vpmovsqb %zmm0, %xmm0 {%k1} {z}3283; X64-NEXT:    vpaddb %xmm0, %xmm1, %xmm03284; X64-NEXT:    vzeroupper3285; X64-NEXT:    retq3286;3287; X86-LABEL: test_int_x86_avx512_mask_pmovs_qb_512:3288; X86:       # %bb.0:3289; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3290; X86-NEXT:    kmovw %eax, %k13291; X86-NEXT:    vpmovsqb %zmm0, %xmm23292; X86-NEXT:    vpmovsqb %zmm0, %xmm1 {%k1}3293; X86-NEXT:    vpaddb %xmm1, %xmm2, %xmm13294; X86-NEXT:    vpmovsqb %zmm0, %xmm0 {%k1} {z}3295; X86-NEXT:    vpaddb %xmm0, %xmm1, %xmm03296; X86-NEXT:    vzeroupper3297; X86-NEXT:    retl3298    %res0 = call <16 x i8> @llvm.x86.avx512.mask.pmovs.qb.512(<8 x i64> %x0, <16 x i8> %x1, i8 -1)3299    %res1 = call <16 x i8> @llvm.x86.avx512.mask.pmovs.qb.512(<8 x i64> %x0, <16 x i8> %x1, i8 %x2)3300    %res2 = call <16 x i8> @llvm.x86.avx512.mask.pmovs.qb.512(<8 x i64> %x0, <16 x i8> zeroinitializer, i8 %x2)3301    %res3 = add <16 x i8> %res0, %res13302    %res4 = add <16 x i8> %res3, %res23303    ret <16 x i8> %res43304}3305 3306declare void @llvm.x86.avx512.mask.pmovs.qb.mem.512(ptr %ptr, <8 x i64>, i8)3307 3308define void @test_int_x86_avx512_mask_pmovs_qb_mem_512(ptr %ptr, <8 x i64> %x1, i8 %x2) {3309; X64-LABEL: test_int_x86_avx512_mask_pmovs_qb_mem_512:3310; X64:       # %bb.0:3311; X64-NEXT:    kmovw %esi, %k13312; X64-NEXT:    vpmovsqb %zmm0, (%rdi)3313; X64-NEXT:    vpmovsqb %zmm0, (%rdi) {%k1}3314; X64-NEXT:    vzeroupper3315; X64-NEXT:    retq3316;3317; X86-LABEL: test_int_x86_avx512_mask_pmovs_qb_mem_512:3318; X86:       # %bb.0:3319; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3320; X86-NEXT:    kmovw %eax, %k13321; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax3322; X86-NEXT:    vpmovsqb %zmm0, (%eax)3323; X86-NEXT:    vpmovsqb %zmm0, (%eax) {%k1}3324; X86-NEXT:    vzeroupper3325; X86-NEXT:    retl3326    call void @llvm.x86.avx512.mask.pmovs.qb.mem.512(ptr %ptr, <8 x i64> %x1, i8 -1)3327    call void @llvm.x86.avx512.mask.pmovs.qb.mem.512(ptr %ptr, <8 x i64> %x1, i8 %x2)3328    ret void3329}3330 3331declare <16 x i8> @llvm.x86.avx512.mask.pmovus.qb.512(<8 x i64>, <16 x i8>, i8)3332 3333define <16 x i8>@test_int_x86_avx512_mask_pmovus_qb_512(<8 x i64> %x0, <16 x i8> %x1, i8 %x2) {3334; X64-LABEL: test_int_x86_avx512_mask_pmovus_qb_512:3335; X64:       # %bb.0:3336; X64-NEXT:    kmovw %edi, %k13337; X64-NEXT:    vpmovusqb %zmm0, %xmm23338; X64-NEXT:    vpmovusqb %zmm0, %xmm1 {%k1}3339; X64-NEXT:    vpaddb %xmm1, %xmm2, %xmm13340; X64-NEXT:    vpmovusqb %zmm0, %xmm0 {%k1} {z}3341; X64-NEXT:    vpaddb %xmm0, %xmm1, %xmm03342; X64-NEXT:    vzeroupper3343; X64-NEXT:    retq3344;3345; X86-LABEL: test_int_x86_avx512_mask_pmovus_qb_512:3346; X86:       # %bb.0:3347; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3348; X86-NEXT:    kmovw %eax, %k13349; X86-NEXT:    vpmovusqb %zmm0, %xmm23350; X86-NEXT:    vpmovusqb %zmm0, %xmm1 {%k1}3351; X86-NEXT:    vpaddb %xmm1, %xmm2, %xmm13352; X86-NEXT:    vpmovusqb %zmm0, %xmm0 {%k1} {z}3353; X86-NEXT:    vpaddb %xmm0, %xmm1, %xmm03354; X86-NEXT:    vzeroupper3355; X86-NEXT:    retl3356    %res0 = call <16 x i8> @llvm.x86.avx512.mask.pmovus.qb.512(<8 x i64> %x0, <16 x i8> %x1, i8 -1)3357    %res1 = call <16 x i8> @llvm.x86.avx512.mask.pmovus.qb.512(<8 x i64> %x0, <16 x i8> %x1, i8 %x2)3358    %res2 = call <16 x i8> @llvm.x86.avx512.mask.pmovus.qb.512(<8 x i64> %x0, <16 x i8> zeroinitializer, i8 %x2)3359    %res3 = add <16 x i8> %res0, %res13360    %res4 = add <16 x i8> %res3, %res23361    ret <16 x i8> %res43362}3363 3364declare void @llvm.x86.avx512.mask.pmovus.qb.mem.512(ptr %ptr, <8 x i64>, i8)3365 3366define void @test_int_x86_avx512_mask_pmovus_qb_mem_512(ptr %ptr, <8 x i64> %x1, i8 %x2) {3367; X64-LABEL: test_int_x86_avx512_mask_pmovus_qb_mem_512:3368; X64:       # %bb.0:3369; X64-NEXT:    kmovw %esi, %k13370; X64-NEXT:    vpmovusqb %zmm0, (%rdi)3371; X64-NEXT:    vpmovusqb %zmm0, (%rdi) {%k1}3372; X64-NEXT:    vzeroupper3373; X64-NEXT:    retq3374;3375; X86-LABEL: test_int_x86_avx512_mask_pmovus_qb_mem_512:3376; X86:       # %bb.0:3377; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3378; X86-NEXT:    kmovw %eax, %k13379; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax3380; X86-NEXT:    vpmovusqb %zmm0, (%eax)3381; X86-NEXT:    vpmovusqb %zmm0, (%eax) {%k1}3382; X86-NEXT:    vzeroupper3383; X86-NEXT:    retl3384    call void @llvm.x86.avx512.mask.pmovus.qb.mem.512(ptr %ptr, <8 x i64> %x1, i8 -1)3385    call void @llvm.x86.avx512.mask.pmovus.qb.mem.512(ptr %ptr, <8 x i64> %x1, i8 %x2)3386    ret void3387}3388 3389declare <8 x i16> @llvm.x86.avx512.mask.pmov.qw.512(<8 x i64>, <8 x i16>, i8)3390 3391define <8 x i16>@test_int_x86_avx512_mask_pmov_qw_512(<8 x i64> %x0, <8 x i16> %x1, i8 %x2) {3392; X64-LABEL: test_int_x86_avx512_mask_pmov_qw_512:3393; X64:       # %bb.0:3394; X64-NEXT:    kmovw %edi, %k13395; X64-NEXT:    vpmovqw %zmm0, %xmm23396; X64-NEXT:    vpmovqw %zmm0, %xmm1 {%k1}3397; X64-NEXT:    vpaddw %xmm1, %xmm2, %xmm13398; X64-NEXT:    vpmovqw %zmm0, %xmm0 {%k1} {z}3399; X64-NEXT:    vpaddw %xmm0, %xmm1, %xmm03400; X64-NEXT:    vzeroupper3401; X64-NEXT:    retq3402;3403; X86-LABEL: test_int_x86_avx512_mask_pmov_qw_512:3404; X86:       # %bb.0:3405; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3406; X86-NEXT:    kmovw %eax, %k13407; X86-NEXT:    vpmovqw %zmm0, %xmm23408; X86-NEXT:    vpmovqw %zmm0, %xmm1 {%k1}3409; X86-NEXT:    vpaddw %xmm1, %xmm2, %xmm13410; X86-NEXT:    vpmovqw %zmm0, %xmm0 {%k1} {z}3411; X86-NEXT:    vpaddw %xmm0, %xmm1, %xmm03412; X86-NEXT:    vzeroupper3413; X86-NEXT:    retl3414    %res0 = call <8 x i16> @llvm.x86.avx512.mask.pmov.qw.512(<8 x i64> %x0, <8 x i16> %x1, i8 -1)3415    %res1 = call <8 x i16> @llvm.x86.avx512.mask.pmov.qw.512(<8 x i64> %x0, <8 x i16> %x1, i8 %x2)3416    %res2 = call <8 x i16> @llvm.x86.avx512.mask.pmov.qw.512(<8 x i64> %x0, <8 x i16> zeroinitializer, i8 %x2)3417    %res3 = add <8 x i16> %res0, %res13418    %res4 = add <8 x i16> %res3, %res23419    ret <8 x i16> %res43420}3421 3422declare void @llvm.x86.avx512.mask.pmov.qw.mem.512(ptr %ptr, <8 x i64>, i8)3423 3424define void @test_int_x86_avx512_mask_pmov_qw_mem_512(ptr %ptr, <8 x i64> %x1, i8 %x2) {3425; X64-LABEL: test_int_x86_avx512_mask_pmov_qw_mem_512:3426; X64:       # %bb.0:3427; X64-NEXT:    kmovw %esi, %k13428; X64-NEXT:    vpmovqw %zmm0, (%rdi)3429; X64-NEXT:    vpmovqw %zmm0, (%rdi) {%k1}3430; X64-NEXT:    vzeroupper3431; X64-NEXT:    retq3432;3433; X86-LABEL: test_int_x86_avx512_mask_pmov_qw_mem_512:3434; X86:       # %bb.0:3435; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3436; X86-NEXT:    kmovw %eax, %k13437; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax3438; X86-NEXT:    vpmovqw %zmm0, (%eax)3439; X86-NEXT:    vpmovqw %zmm0, (%eax) {%k1}3440; X86-NEXT:    vzeroupper3441; X86-NEXT:    retl3442    call void @llvm.x86.avx512.mask.pmov.qw.mem.512(ptr %ptr, <8 x i64> %x1, i8 -1)3443    call void @llvm.x86.avx512.mask.pmov.qw.mem.512(ptr %ptr, <8 x i64> %x1, i8 %x2)3444    ret void3445}3446 3447declare <8 x i16> @llvm.x86.avx512.mask.pmovs.qw.512(<8 x i64>, <8 x i16>, i8)3448 3449define <8 x i16>@test_int_x86_avx512_mask_pmovs_qw_512(<8 x i64> %x0, <8 x i16> %x1, i8 %x2) {3450; X64-LABEL: test_int_x86_avx512_mask_pmovs_qw_512:3451; X64:       # %bb.0:3452; X64-NEXT:    kmovw %edi, %k13453; X64-NEXT:    vpmovsqw %zmm0, %xmm23454; X64-NEXT:    vpmovsqw %zmm0, %xmm1 {%k1}3455; X64-NEXT:    vpaddw %xmm1, %xmm2, %xmm13456; X64-NEXT:    vpmovsqw %zmm0, %xmm0 {%k1} {z}3457; X64-NEXT:    vpaddw %xmm0, %xmm1, %xmm03458; X64-NEXT:    vzeroupper3459; X64-NEXT:    retq3460;3461; X86-LABEL: test_int_x86_avx512_mask_pmovs_qw_512:3462; X86:       # %bb.0:3463; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3464; X86-NEXT:    kmovw %eax, %k13465; X86-NEXT:    vpmovsqw %zmm0, %xmm23466; X86-NEXT:    vpmovsqw %zmm0, %xmm1 {%k1}3467; X86-NEXT:    vpaddw %xmm1, %xmm2, %xmm13468; X86-NEXT:    vpmovsqw %zmm0, %xmm0 {%k1} {z}3469; X86-NEXT:    vpaddw %xmm0, %xmm1, %xmm03470; X86-NEXT:    vzeroupper3471; X86-NEXT:    retl3472    %res0 = call <8 x i16> @llvm.x86.avx512.mask.pmovs.qw.512(<8 x i64> %x0, <8 x i16> %x1, i8 -1)3473    %res1 = call <8 x i16> @llvm.x86.avx512.mask.pmovs.qw.512(<8 x i64> %x0, <8 x i16> %x1, i8 %x2)3474    %res2 = call <8 x i16> @llvm.x86.avx512.mask.pmovs.qw.512(<8 x i64> %x0, <8 x i16> zeroinitializer, i8 %x2)3475    %res3 = add <8 x i16> %res0, %res13476    %res4 = add <8 x i16> %res3, %res23477    ret <8 x i16> %res43478}3479 3480declare void @llvm.x86.avx512.mask.pmovs.qw.mem.512(ptr %ptr, <8 x i64>, i8)3481 3482define void @test_int_x86_avx512_mask_pmovs_qw_mem_512(ptr %ptr, <8 x i64> %x1, i8 %x2) {3483; X64-LABEL: test_int_x86_avx512_mask_pmovs_qw_mem_512:3484; X64:       # %bb.0:3485; X64-NEXT:    kmovw %esi, %k13486; X64-NEXT:    vpmovsqw %zmm0, (%rdi)3487; X64-NEXT:    vpmovsqw %zmm0, (%rdi) {%k1}3488; X64-NEXT:    vzeroupper3489; X64-NEXT:    retq3490;3491; X86-LABEL: test_int_x86_avx512_mask_pmovs_qw_mem_512:3492; X86:       # %bb.0:3493; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3494; X86-NEXT:    kmovw %eax, %k13495; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax3496; X86-NEXT:    vpmovsqw %zmm0, (%eax)3497; X86-NEXT:    vpmovsqw %zmm0, (%eax) {%k1}3498; X86-NEXT:    vzeroupper3499; X86-NEXT:    retl3500    call void @llvm.x86.avx512.mask.pmovs.qw.mem.512(ptr %ptr, <8 x i64> %x1, i8 -1)3501    call void @llvm.x86.avx512.mask.pmovs.qw.mem.512(ptr %ptr, <8 x i64> %x1, i8 %x2)3502    ret void3503}3504 3505declare <8 x i16> @llvm.x86.avx512.mask.pmovus.qw.512(<8 x i64>, <8 x i16>, i8)3506 3507define <8 x i16>@test_int_x86_avx512_mask_pmovus_qw_512(<8 x i64> %x0, <8 x i16> %x1, i8 %x2) {3508; X64-LABEL: test_int_x86_avx512_mask_pmovus_qw_512:3509; X64:       # %bb.0:3510; X64-NEXT:    kmovw %edi, %k13511; X64-NEXT:    vpmovusqw %zmm0, %xmm23512; X64-NEXT:    vpmovusqw %zmm0, %xmm1 {%k1}3513; X64-NEXT:    vpaddw %xmm1, %xmm2, %xmm13514; X64-NEXT:    vpmovusqw %zmm0, %xmm0 {%k1} {z}3515; X64-NEXT:    vpaddw %xmm0, %xmm1, %xmm03516; X64-NEXT:    vzeroupper3517; X64-NEXT:    retq3518;3519; X86-LABEL: test_int_x86_avx512_mask_pmovus_qw_512:3520; X86:       # %bb.0:3521; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3522; X86-NEXT:    kmovw %eax, %k13523; X86-NEXT:    vpmovusqw %zmm0, %xmm23524; X86-NEXT:    vpmovusqw %zmm0, %xmm1 {%k1}3525; X86-NEXT:    vpaddw %xmm1, %xmm2, %xmm13526; X86-NEXT:    vpmovusqw %zmm0, %xmm0 {%k1} {z}3527; X86-NEXT:    vpaddw %xmm0, %xmm1, %xmm03528; X86-NEXT:    vzeroupper3529; X86-NEXT:    retl3530    %res0 = call <8 x i16> @llvm.x86.avx512.mask.pmovus.qw.512(<8 x i64> %x0, <8 x i16> %x1, i8 -1)3531    %res1 = call <8 x i16> @llvm.x86.avx512.mask.pmovus.qw.512(<8 x i64> %x0, <8 x i16> %x1, i8 %x2)3532    %res2 = call <8 x i16> @llvm.x86.avx512.mask.pmovus.qw.512(<8 x i64> %x0, <8 x i16> zeroinitializer, i8 %x2)3533    %res3 = add <8 x i16> %res0, %res13534    %res4 = add <8 x i16> %res3, %res23535    ret <8 x i16> %res43536}3537 3538declare void @llvm.x86.avx512.mask.pmovus.qw.mem.512(ptr %ptr, <8 x i64>, i8)3539 3540define void @test_int_x86_avx512_mask_pmovus_qw_mem_512(ptr %ptr, <8 x i64> %x1, i8 %x2) {3541; X64-LABEL: test_int_x86_avx512_mask_pmovus_qw_mem_512:3542; X64:       # %bb.0:3543; X64-NEXT:    kmovw %esi, %k13544; X64-NEXT:    vpmovusqw %zmm0, (%rdi)3545; X64-NEXT:    vpmovusqw %zmm0, (%rdi) {%k1}3546; X64-NEXT:    vzeroupper3547; X64-NEXT:    retq3548;3549; X86-LABEL: test_int_x86_avx512_mask_pmovus_qw_mem_512:3550; X86:       # %bb.0:3551; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3552; X86-NEXT:    kmovw %eax, %k13553; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax3554; X86-NEXT:    vpmovusqw %zmm0, (%eax)3555; X86-NEXT:    vpmovusqw %zmm0, (%eax) {%k1}3556; X86-NEXT:    vzeroupper3557; X86-NEXT:    retl3558    call void @llvm.x86.avx512.mask.pmovus.qw.mem.512(ptr %ptr, <8 x i64> %x1, i8 -1)3559    call void @llvm.x86.avx512.mask.pmovus.qw.mem.512(ptr %ptr, <8 x i64> %x1, i8 %x2)3560    ret void3561}3562 3563define <8 x i32>@test_int_x86_avx512_pmov_qd_512(<8 x i64> %x0, <8 x i32> %x1) {3564; CHECK-LABEL: test_int_x86_avx512_pmov_qd_512:3565; CHECK:       # %bb.0:3566; CHECK-NEXT:    vpmovqd %zmm0, %ymm03567; CHECK-NEXT:    ret{{[l|q]}}3568  %1 = trunc <8 x i64> %x0 to <8 x i32>3569  ret <8 x i32> %13570}3571 3572define <8 x i32>@test_int_x86_avx512_mask_pmov_qd_512(<8 x i64> %x0, <8 x i32> %x1, i8 %x2) {3573; X64-LABEL: test_int_x86_avx512_mask_pmov_qd_512:3574; X64:       # %bb.0:3575; X64-NEXT:    kmovw %edi, %k13576; X64-NEXT:    vpmovqd %zmm0, %ymm1 {%k1}3577; X64-NEXT:    vmovdqa %ymm1, %ymm03578; X64-NEXT:    retq3579;3580; X86-LABEL: test_int_x86_avx512_mask_pmov_qd_512:3581; X86:       # %bb.0:3582; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3583; X86-NEXT:    kmovw %eax, %k13584; X86-NEXT:    vpmovqd %zmm0, %ymm1 {%k1}3585; X86-NEXT:    vmovdqa %ymm1, %ymm03586; X86-NEXT:    retl3587  %1 = trunc <8 x i64> %x0 to <8 x i32>3588  %2 = bitcast i8 %x2 to <8 x i1>3589  %3 = select <8 x i1> %2, <8 x i32> %1, <8 x i32> %x13590  ret <8 x i32> %33591}3592 3593define <8 x i32>@test_int_x86_avx512_maskz_pmov_qd_512(<8 x i64> %x0,  i8 %x2) {3594; X64-LABEL: test_int_x86_avx512_maskz_pmov_qd_512:3595; X64:       # %bb.0:3596; X64-NEXT:    kmovw %edi, %k13597; X64-NEXT:    vpmovqd %zmm0, %ymm0 {%k1} {z}3598; X64-NEXT:    retq3599;3600; X86-LABEL: test_int_x86_avx512_maskz_pmov_qd_512:3601; X86:       # %bb.0:3602; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3603; X86-NEXT:    kmovw %eax, %k13604; X86-NEXT:    vpmovqd %zmm0, %ymm0 {%k1} {z}3605; X86-NEXT:    retl3606  %1 = trunc <8 x i64> %x0 to <8 x i32>3607  %2 = bitcast i8 %x2 to <8 x i1>3608  %3 = select <8 x i1> %2, <8 x i32> %1, <8 x i32> zeroinitializer3609  ret <8 x i32> %33610}3611 3612declare void @llvm.x86.avx512.mask.pmov.qd.mem.512(ptr %ptr, <8 x i64>, i8)3613 3614define void @test_int_x86_avx512_mask_pmov_qd_mem_512(ptr %ptr, <8 x i64> %x1, i8 %x2) {3615; X64-LABEL: test_int_x86_avx512_mask_pmov_qd_mem_512:3616; X64:       # %bb.0:3617; X64-NEXT:    kmovw %esi, %k13618; X64-NEXT:    vpmovqd %zmm0, (%rdi)3619; X64-NEXT:    vpmovqd %zmm0, (%rdi) {%k1}3620; X64-NEXT:    vzeroupper3621; X64-NEXT:    retq3622;3623; X86-LABEL: test_int_x86_avx512_mask_pmov_qd_mem_512:3624; X86:       # %bb.0:3625; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3626; X86-NEXT:    kmovw %eax, %k13627; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax3628; X86-NEXT:    vpmovqd %zmm0, (%eax)3629; X86-NEXT:    vpmovqd %zmm0, (%eax) {%k1}3630; X86-NEXT:    vzeroupper3631; X86-NEXT:    retl3632    call void @llvm.x86.avx512.mask.pmov.qd.mem.512(ptr %ptr, <8 x i64> %x1, i8 -1)3633    call void @llvm.x86.avx512.mask.pmov.qd.mem.512(ptr %ptr, <8 x i64> %x1, i8 %x2)3634    ret void3635}3636 3637declare <8 x i32> @llvm.x86.avx512.mask.pmovs.qd.512(<8 x i64>, <8 x i32>, i8)3638 3639define <8 x i32>@test_int_x86_avx512_pmovs_qd_512(<8 x i64> %x0, <8 x i32> %x1) {3640; CHECK-LABEL: test_int_x86_avx512_pmovs_qd_512:3641; CHECK:       # %bb.0:3642; CHECK-NEXT:    vpmovsqd %zmm0, %ymm03643; CHECK-NEXT:    ret{{[l|q]}}3644  %res = call <8 x i32> @llvm.x86.avx512.mask.pmovs.qd.512(<8 x i64> %x0, <8 x i32> %x1, i8 -1)3645  ret <8 x i32> %res3646}3647 3648define <8 x i32>@test_int_x86_avx512_mask_pmovs_qd_512(<8 x i64> %x0, <8 x i32> %x1, i8 %x2) {3649; X64-LABEL: test_int_x86_avx512_mask_pmovs_qd_512:3650; X64:       # %bb.0:3651; X64-NEXT:    kmovw %edi, %k13652; X64-NEXT:    vpmovsqd %zmm0, %ymm1 {%k1}3653; X64-NEXT:    vmovdqa %ymm1, %ymm03654; X64-NEXT:    retq3655;3656; X86-LABEL: test_int_x86_avx512_mask_pmovs_qd_512:3657; X86:       # %bb.0:3658; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3659; X86-NEXT:    kmovw %eax, %k13660; X86-NEXT:    vpmovsqd %zmm0, %ymm1 {%k1}3661; X86-NEXT:    vmovdqa %ymm1, %ymm03662; X86-NEXT:    retl3663  %res = call <8 x i32> @llvm.x86.avx512.mask.pmovs.qd.512(<8 x i64> %x0, <8 x i32> %x1, i8 %x2)3664  ret <8 x i32> %res3665}3666 3667define <8 x i32>@test_int_x86_avx512_maskz_pmovs_qd_512(<8 x i64> %x0, i8 %x2) {3668; X64-LABEL: test_int_x86_avx512_maskz_pmovs_qd_512:3669; X64:       # %bb.0:3670; X64-NEXT:    kmovw %edi, %k13671; X64-NEXT:    vpmovsqd %zmm0, %ymm0 {%k1} {z}3672; X64-NEXT:    retq3673;3674; X86-LABEL: test_int_x86_avx512_maskz_pmovs_qd_512:3675; X86:       # %bb.0:3676; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3677; X86-NEXT:    kmovw %eax, %k13678; X86-NEXT:    vpmovsqd %zmm0, %ymm0 {%k1} {z}3679; X86-NEXT:    retl3680  %res = call <8 x i32> @llvm.x86.avx512.mask.pmovs.qd.512(<8 x i64> %x0, <8 x i32> zeroinitializer, i8 %x2)3681  ret <8 x i32> %res3682}3683 3684declare void @llvm.x86.avx512.mask.pmovs.qd.mem.512(ptr %ptr, <8 x i64>, i8)3685 3686define void @test_int_x86_avx512_mask_pmovs_qd_mem_512(ptr %ptr, <8 x i64> %x1, i8 %x2) {3687; X64-LABEL: test_int_x86_avx512_mask_pmovs_qd_mem_512:3688; X64:       # %bb.0:3689; X64-NEXT:    kmovw %esi, %k13690; X64-NEXT:    vpmovsqd %zmm0, (%rdi)3691; X64-NEXT:    vpmovsqd %zmm0, (%rdi) {%k1}3692; X64-NEXT:    vzeroupper3693; X64-NEXT:    retq3694;3695; X86-LABEL: test_int_x86_avx512_mask_pmovs_qd_mem_512:3696; X86:       # %bb.0:3697; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3698; X86-NEXT:    kmovw %eax, %k13699; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax3700; X86-NEXT:    vpmovsqd %zmm0, (%eax)3701; X86-NEXT:    vpmovsqd %zmm0, (%eax) {%k1}3702; X86-NEXT:    vzeroupper3703; X86-NEXT:    retl3704    call void @llvm.x86.avx512.mask.pmovs.qd.mem.512(ptr %ptr, <8 x i64> %x1, i8 -1)3705    call void @llvm.x86.avx512.mask.pmovs.qd.mem.512(ptr %ptr, <8 x i64> %x1, i8 %x2)3706    ret void3707}3708 3709declare <8 x i32> @llvm.x86.avx512.mask.pmovus.qd.512(<8 x i64>, <8 x i32>, i8)3710 3711define <8 x i32>@test_int_x86_avx512_pmovus_qd_512(<8 x i64> %x0, <8 x i32> %x1) {3712; CHECK-LABEL: test_int_x86_avx512_pmovus_qd_512:3713; CHECK:       # %bb.0:3714; CHECK-NEXT:    vpmovusqd %zmm0, %ymm03715; CHECK-NEXT:    ret{{[l|q]}}3716  %res = call <8 x i32> @llvm.x86.avx512.mask.pmovus.qd.512(<8 x i64> %x0, <8 x i32> %x1, i8 -1)3717  ret <8 x i32> %res3718}3719 3720define <8 x i32>@test_int_x86_avx512_mask_pmovus_qd_512(<8 x i64> %x0, <8 x i32> %x1, i8 %x2) {3721; X64-LABEL: test_int_x86_avx512_mask_pmovus_qd_512:3722; X64:       # %bb.0:3723; X64-NEXT:    kmovw %edi, %k13724; X64-NEXT:    vpmovusqd %zmm0, %ymm1 {%k1}3725; X64-NEXT:    vmovdqa %ymm1, %ymm03726; X64-NEXT:    retq3727;3728; X86-LABEL: test_int_x86_avx512_mask_pmovus_qd_512:3729; X86:       # %bb.0:3730; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3731; X86-NEXT:    kmovw %eax, %k13732; X86-NEXT:    vpmovusqd %zmm0, %ymm1 {%k1}3733; X86-NEXT:    vmovdqa %ymm1, %ymm03734; X86-NEXT:    retl3735  %res = call <8 x i32> @llvm.x86.avx512.mask.pmovus.qd.512(<8 x i64> %x0, <8 x i32> %x1, i8 %x2)3736  ret <8 x i32> %res3737}3738 3739define <8 x i32>@test_int_x86_avx512_maskz_pmovus_qd_512(<8 x i64> %x0, i8 %x2) {3740; X64-LABEL: test_int_x86_avx512_maskz_pmovus_qd_512:3741; X64:       # %bb.0:3742; X64-NEXT:    kmovw %edi, %k13743; X64-NEXT:    vpmovusqd %zmm0, %ymm0 {%k1} {z}3744; X64-NEXT:    retq3745;3746; X86-LABEL: test_int_x86_avx512_maskz_pmovus_qd_512:3747; X86:       # %bb.0:3748; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3749; X86-NEXT:    kmovw %eax, %k13750; X86-NEXT:    vpmovusqd %zmm0, %ymm0 {%k1} {z}3751; X86-NEXT:    retl3752  %res = call <8 x i32> @llvm.x86.avx512.mask.pmovus.qd.512(<8 x i64> %x0, <8 x i32> zeroinitializer, i8 %x2)3753  ret <8 x i32> %res3754}3755 3756declare void @llvm.x86.avx512.mask.pmovus.qd.mem.512(ptr %ptr, <8 x i64>, i8)3757 3758define void @test_int_x86_avx512_mask_pmovus_qd_mem_512(ptr %ptr, <8 x i64> %x1, i8 %x2) {3759; X64-LABEL: test_int_x86_avx512_mask_pmovus_qd_mem_512:3760; X64:       # %bb.0:3761; X64-NEXT:    kmovw %esi, %k13762; X64-NEXT:    vpmovusqd %zmm0, (%rdi)3763; X64-NEXT:    vpmovusqd %zmm0, (%rdi) {%k1}3764; X64-NEXT:    vzeroupper3765; X64-NEXT:    retq3766;3767; X86-LABEL: test_int_x86_avx512_mask_pmovus_qd_mem_512:3768; X86:       # %bb.0:3769; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax3770; X86-NEXT:    kmovw %eax, %k13771; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax3772; X86-NEXT:    vpmovusqd %zmm0, (%eax)3773; X86-NEXT:    vpmovusqd %zmm0, (%eax) {%k1}3774; X86-NEXT:    vzeroupper3775; X86-NEXT:    retl3776    call void @llvm.x86.avx512.mask.pmovus.qd.mem.512(ptr %ptr, <8 x i64> %x1, i8 -1)3777    call void @llvm.x86.avx512.mask.pmovus.qd.mem.512(ptr %ptr, <8 x i64> %x1, i8 %x2)3778    ret void3779}3780 3781declare <16 x i8> @llvm.x86.avx512.mask.pmov.db.512(<16 x i32>, <16 x i8>, i16)3782 3783define <16 x i8>@test_int_x86_avx512_mask_pmov_db_512(<16 x i32> %x0, <16 x i8> %x1, i16 %x2) {3784; X64-LABEL: test_int_x86_avx512_mask_pmov_db_512:3785; X64:       # %bb.0:3786; X64-NEXT:    kmovw %edi, %k13787; X64-NEXT:    vpmovdb %zmm0, %xmm23788; X64-NEXT:    vpmovdb %zmm0, %xmm1 {%k1}3789; X64-NEXT:    vpaddb %xmm1, %xmm2, %xmm13790; X64-NEXT:    vpmovdb %zmm0, %xmm0 {%k1} {z}3791; X64-NEXT:    vpaddb %xmm0, %xmm1, %xmm03792; X64-NEXT:    vzeroupper3793; X64-NEXT:    retq3794;3795; X86-LABEL: test_int_x86_avx512_mask_pmov_db_512:3796; X86:       # %bb.0:3797; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k13798; X86-NEXT:    vpmovdb %zmm0, %xmm23799; X86-NEXT:    vpmovdb %zmm0, %xmm1 {%k1}3800; X86-NEXT:    vpaddb %xmm1, %xmm2, %xmm13801; X86-NEXT:    vpmovdb %zmm0, %xmm0 {%k1} {z}3802; X86-NEXT:    vpaddb %xmm0, %xmm1, %xmm03803; X86-NEXT:    vzeroupper3804; X86-NEXT:    retl3805    %res0 = call <16 x i8> @llvm.x86.avx512.mask.pmov.db.512(<16 x i32> %x0, <16 x i8> %x1, i16 -1)3806    %res1 = call <16 x i8> @llvm.x86.avx512.mask.pmov.db.512(<16 x i32> %x0, <16 x i8> %x1, i16 %x2)3807    %res2 = call <16 x i8> @llvm.x86.avx512.mask.pmov.db.512(<16 x i32> %x0, <16 x i8> zeroinitializer, i16 %x2)3808    %res3 = add <16 x i8> %res0, %res13809    %res4 = add <16 x i8> %res3, %res23810    ret <16 x i8> %res43811}3812 3813declare void @llvm.x86.avx512.mask.pmov.db.mem.512(ptr %ptr, <16 x i32>, i16)3814 3815define void @test_int_x86_avx512_mask_pmov_db_mem_512(ptr %ptr, <16 x i32> %x1, i16 %x2) {3816; X64-LABEL: test_int_x86_avx512_mask_pmov_db_mem_512:3817; X64:       # %bb.0:3818; X64-NEXT:    kmovw %esi, %k13819; X64-NEXT:    vpmovdb %zmm0, (%rdi)3820; X64-NEXT:    vpmovdb %zmm0, (%rdi) {%k1}3821; X64-NEXT:    vzeroupper3822; X64-NEXT:    retq3823;3824; X86-LABEL: test_int_x86_avx512_mask_pmov_db_mem_512:3825; X86:       # %bb.0:3826; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k13827; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax3828; X86-NEXT:    vpmovdb %zmm0, (%eax)3829; X86-NEXT:    vpmovdb %zmm0, (%eax) {%k1}3830; X86-NEXT:    vzeroupper3831; X86-NEXT:    retl3832    call void @llvm.x86.avx512.mask.pmov.db.mem.512(ptr %ptr, <16 x i32> %x1, i16 -1)3833    call void @llvm.x86.avx512.mask.pmov.db.mem.512(ptr %ptr, <16 x i32> %x1, i16 %x2)3834    ret void3835}3836 3837declare <16 x i8> @llvm.x86.avx512.mask.pmovs.db.512(<16 x i32>, <16 x i8>, i16)3838 3839define <16 x i8>@test_int_x86_avx512_mask_pmovs_db_512(<16 x i32> %x0, <16 x i8> %x1, i16 %x2) {3840; X64-LABEL: test_int_x86_avx512_mask_pmovs_db_512:3841; X64:       # %bb.0:3842; X64-NEXT:    kmovw %edi, %k13843; X64-NEXT:    vpmovsdb %zmm0, %xmm23844; X64-NEXT:    vpmovsdb %zmm0, %xmm1 {%k1}3845; X64-NEXT:    vpaddb %xmm1, %xmm2, %xmm13846; X64-NEXT:    vpmovsdb %zmm0, %xmm0 {%k1} {z}3847; X64-NEXT:    vpaddb %xmm0, %xmm1, %xmm03848; X64-NEXT:    vzeroupper3849; X64-NEXT:    retq3850;3851; X86-LABEL: test_int_x86_avx512_mask_pmovs_db_512:3852; X86:       # %bb.0:3853; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k13854; X86-NEXT:    vpmovsdb %zmm0, %xmm23855; X86-NEXT:    vpmovsdb %zmm0, %xmm1 {%k1}3856; X86-NEXT:    vpaddb %xmm1, %xmm2, %xmm13857; X86-NEXT:    vpmovsdb %zmm0, %xmm0 {%k1} {z}3858; X86-NEXT:    vpaddb %xmm0, %xmm1, %xmm03859; X86-NEXT:    vzeroupper3860; X86-NEXT:    retl3861    %res0 = call <16 x i8> @llvm.x86.avx512.mask.pmovs.db.512(<16 x i32> %x0, <16 x i8> %x1, i16 -1)3862    %res1 = call <16 x i8> @llvm.x86.avx512.mask.pmovs.db.512(<16 x i32> %x0, <16 x i8> %x1, i16 %x2)3863    %res2 = call <16 x i8> @llvm.x86.avx512.mask.pmovs.db.512(<16 x i32> %x0, <16 x i8> zeroinitializer, i16 %x2)3864    %res3 = add <16 x i8> %res0, %res13865    %res4 = add <16 x i8> %res3, %res23866    ret <16 x i8> %res43867}3868 3869declare void @llvm.x86.avx512.mask.pmovs.db.mem.512(ptr %ptr, <16 x i32>, i16)3870 3871define void @test_int_x86_avx512_mask_pmovs_db_mem_512(ptr %ptr, <16 x i32> %x1, i16 %x2) {3872; X64-LABEL: test_int_x86_avx512_mask_pmovs_db_mem_512:3873; X64:       # %bb.0:3874; X64-NEXT:    kmovw %esi, %k13875; X64-NEXT:    vpmovsdb %zmm0, (%rdi)3876; X64-NEXT:    vpmovsdb %zmm0, (%rdi) {%k1}3877; X64-NEXT:    vzeroupper3878; X64-NEXT:    retq3879;3880; X86-LABEL: test_int_x86_avx512_mask_pmovs_db_mem_512:3881; X86:       # %bb.0:3882; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k13883; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax3884; X86-NEXT:    vpmovsdb %zmm0, (%eax)3885; X86-NEXT:    vpmovsdb %zmm0, (%eax) {%k1}3886; X86-NEXT:    vzeroupper3887; X86-NEXT:    retl3888    call void @llvm.x86.avx512.mask.pmovs.db.mem.512(ptr %ptr, <16 x i32> %x1, i16 -1)3889    call void @llvm.x86.avx512.mask.pmovs.db.mem.512(ptr %ptr, <16 x i32> %x1, i16 %x2)3890    ret void3891}3892 3893declare <16 x i8> @llvm.x86.avx512.mask.pmovus.db.512(<16 x i32>, <16 x i8>, i16)3894 3895define <16 x i8>@test_int_x86_avx512_mask_pmovus_db_512(<16 x i32> %x0, <16 x i8> %x1, i16 %x2) {3896; X64-LABEL: test_int_x86_avx512_mask_pmovus_db_512:3897; X64:       # %bb.0:3898; X64-NEXT:    kmovw %edi, %k13899; X64-NEXT:    vpmovusdb %zmm0, %xmm23900; X64-NEXT:    vpmovusdb %zmm0, %xmm1 {%k1}3901; X64-NEXT:    vpaddb %xmm1, %xmm2, %xmm13902; X64-NEXT:    vpmovusdb %zmm0, %xmm0 {%k1} {z}3903; X64-NEXT:    vpaddb %xmm0, %xmm1, %xmm03904; X64-NEXT:    vzeroupper3905; X64-NEXT:    retq3906;3907; X86-LABEL: test_int_x86_avx512_mask_pmovus_db_512:3908; X86:       # %bb.0:3909; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k13910; X86-NEXT:    vpmovusdb %zmm0, %xmm23911; X86-NEXT:    vpmovusdb %zmm0, %xmm1 {%k1}3912; X86-NEXT:    vpaddb %xmm1, %xmm2, %xmm13913; X86-NEXT:    vpmovusdb %zmm0, %xmm0 {%k1} {z}3914; X86-NEXT:    vpaddb %xmm0, %xmm1, %xmm03915; X86-NEXT:    vzeroupper3916; X86-NEXT:    retl3917    %res0 = call <16 x i8> @llvm.x86.avx512.mask.pmovus.db.512(<16 x i32> %x0, <16 x i8> %x1, i16 -1)3918    %res1 = call <16 x i8> @llvm.x86.avx512.mask.pmovus.db.512(<16 x i32> %x0, <16 x i8> %x1, i16 %x2)3919    %res2 = call <16 x i8> @llvm.x86.avx512.mask.pmovus.db.512(<16 x i32> %x0, <16 x i8> zeroinitializer, i16 %x2)3920    %res3 = add <16 x i8> %res0, %res13921    %res4 = add <16 x i8> %res3, %res23922    ret <16 x i8> %res43923}3924 3925declare void @llvm.x86.avx512.mask.pmovus.db.mem.512(ptr %ptr, <16 x i32>, i16)3926 3927define void @test_int_x86_avx512_mask_pmovus_db_mem_512(ptr %ptr, <16 x i32> %x1, i16 %x2) {3928; X64-LABEL: test_int_x86_avx512_mask_pmovus_db_mem_512:3929; X64:       # %bb.0:3930; X64-NEXT:    kmovw %esi, %k13931; X64-NEXT:    vpmovusdb %zmm0, (%rdi)3932; X64-NEXT:    vpmovusdb %zmm0, (%rdi) {%k1}3933; X64-NEXT:    vzeroupper3934; X64-NEXT:    retq3935;3936; X86-LABEL: test_int_x86_avx512_mask_pmovus_db_mem_512:3937; X86:       # %bb.0:3938; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k13939; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax3940; X86-NEXT:    vpmovusdb %zmm0, (%eax)3941; X86-NEXT:    vpmovusdb %zmm0, (%eax) {%k1}3942; X86-NEXT:    vzeroupper3943; X86-NEXT:    retl3944    call void @llvm.x86.avx512.mask.pmovus.db.mem.512(ptr %ptr, <16 x i32> %x1, i16 -1)3945    call void @llvm.x86.avx512.mask.pmovus.db.mem.512(ptr %ptr, <16 x i32> %x1, i16 %x2)3946    ret void3947}3948 3949declare <16 x i16> @llvm.x86.avx512.mask.pmov.dw.512(<16 x i32>, <16 x i16>, i16)3950 3951define <16 x i16>@test_int_x86_avx512_mask_pmov_dw_512(<16 x i32> %x0, <16 x i16> %x1, i16 %x2) {3952; X64-LABEL: test_int_x86_avx512_mask_pmov_dw_512:3953; X64:       # %bb.0:3954; X64-NEXT:    kmovw %edi, %k13955; X64-NEXT:    vpmovdw %zmm0, %ymm23956; X64-NEXT:    vpmovdw %zmm0, %ymm1 {%k1}3957; X64-NEXT:    vpaddw %ymm1, %ymm2, %ymm13958; X64-NEXT:    vpmovdw %zmm0, %ymm0 {%k1} {z}3959; X64-NEXT:    vpaddw %ymm0, %ymm1, %ymm03960; X64-NEXT:    retq3961;3962; X86-LABEL: test_int_x86_avx512_mask_pmov_dw_512:3963; X86:       # %bb.0:3964; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k13965; X86-NEXT:    vpmovdw %zmm0, %ymm23966; X86-NEXT:    vpmovdw %zmm0, %ymm1 {%k1}3967; X86-NEXT:    vpaddw %ymm1, %ymm2, %ymm13968; X86-NEXT:    vpmovdw %zmm0, %ymm0 {%k1} {z}3969; X86-NEXT:    vpaddw %ymm0, %ymm1, %ymm03970; X86-NEXT:    retl3971    %res0 = call <16 x i16> @llvm.x86.avx512.mask.pmov.dw.512(<16 x i32> %x0, <16 x i16> %x1, i16 -1)3972    %res1 = call <16 x i16> @llvm.x86.avx512.mask.pmov.dw.512(<16 x i32> %x0, <16 x i16> %x1, i16 %x2)3973    %res2 = call <16 x i16> @llvm.x86.avx512.mask.pmov.dw.512(<16 x i32> %x0, <16 x i16> zeroinitializer, i16 %x2)3974    %res3 = add <16 x i16> %res0, %res13975    %res4 = add <16 x i16> %res3, %res23976    ret <16 x i16> %res43977}3978 3979declare void @llvm.x86.avx512.mask.pmov.dw.mem.512(ptr %ptr, <16 x i32>, i16)3980 3981define void @test_int_x86_avx512_mask_pmov_dw_mem_512(ptr %ptr, <16 x i32> %x1, i16 %x2) {3982; X64-LABEL: test_int_x86_avx512_mask_pmov_dw_mem_512:3983; X64:       # %bb.0:3984; X64-NEXT:    kmovw %esi, %k13985; X64-NEXT:    vpmovdw %zmm0, (%rdi)3986; X64-NEXT:    vpmovdw %zmm0, (%rdi) {%k1}3987; X64-NEXT:    vzeroupper3988; X64-NEXT:    retq3989;3990; X86-LABEL: test_int_x86_avx512_mask_pmov_dw_mem_512:3991; X86:       # %bb.0:3992; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k13993; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax3994; X86-NEXT:    vpmovdw %zmm0, (%eax)3995; X86-NEXT:    vpmovdw %zmm0, (%eax) {%k1}3996; X86-NEXT:    vzeroupper3997; X86-NEXT:    retl3998    call void @llvm.x86.avx512.mask.pmov.dw.mem.512(ptr %ptr, <16 x i32> %x1, i16 -1)3999    call void @llvm.x86.avx512.mask.pmov.dw.mem.512(ptr %ptr, <16 x i32> %x1, i16 %x2)4000    ret void4001}4002 4003declare <16 x i16> @llvm.x86.avx512.mask.pmovs.dw.512(<16 x i32>, <16 x i16>, i16)4004 4005define <16 x i16>@test_int_x86_avx512_mask_pmovs_dw_512(<16 x i32> %x0, <16 x i16> %x1, i16 %x2) {4006; X64-LABEL: test_int_x86_avx512_mask_pmovs_dw_512:4007; X64:       # %bb.0:4008; X64-NEXT:    kmovw %edi, %k14009; X64-NEXT:    vpmovsdw %zmm0, %ymm24010; X64-NEXT:    vpmovsdw %zmm0, %ymm1 {%k1}4011; X64-NEXT:    vpaddw %ymm1, %ymm2, %ymm14012; X64-NEXT:    vpmovsdw %zmm0, %ymm0 {%k1} {z}4013; X64-NEXT:    vpaddw %ymm0, %ymm1, %ymm04014; X64-NEXT:    retq4015;4016; X86-LABEL: test_int_x86_avx512_mask_pmovs_dw_512:4017; X86:       # %bb.0:4018; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k14019; X86-NEXT:    vpmovsdw %zmm0, %ymm24020; X86-NEXT:    vpmovsdw %zmm0, %ymm1 {%k1}4021; X86-NEXT:    vpaddw %ymm1, %ymm2, %ymm14022; X86-NEXT:    vpmovsdw %zmm0, %ymm0 {%k1} {z}4023; X86-NEXT:    vpaddw %ymm0, %ymm1, %ymm04024; X86-NEXT:    retl4025    %res0 = call <16 x i16> @llvm.x86.avx512.mask.pmovs.dw.512(<16 x i32> %x0, <16 x i16> %x1, i16 -1)4026    %res1 = call <16 x i16> @llvm.x86.avx512.mask.pmovs.dw.512(<16 x i32> %x0, <16 x i16> %x1, i16 %x2)4027    %res2 = call <16 x i16> @llvm.x86.avx512.mask.pmovs.dw.512(<16 x i32> %x0, <16 x i16> zeroinitializer, i16 %x2)4028    %res3 = add <16 x i16> %res0, %res14029    %res4 = add <16 x i16> %res3, %res24030    ret <16 x i16> %res44031}4032 4033declare void @llvm.x86.avx512.mask.pmovs.dw.mem.512(ptr %ptr, <16 x i32>, i16)4034 4035define void @test_int_x86_avx512_mask_pmovs_dw_mem_512(ptr %ptr, <16 x i32> %x1, i16 %x2) {4036; X64-LABEL: test_int_x86_avx512_mask_pmovs_dw_mem_512:4037; X64:       # %bb.0:4038; X64-NEXT:    kmovw %esi, %k14039; X64-NEXT:    vpmovsdw %zmm0, (%rdi)4040; X64-NEXT:    vpmovsdw %zmm0, (%rdi) {%k1}4041; X64-NEXT:    vzeroupper4042; X64-NEXT:    retq4043;4044; X86-LABEL: test_int_x86_avx512_mask_pmovs_dw_mem_512:4045; X86:       # %bb.0:4046; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k14047; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax4048; X86-NEXT:    vpmovsdw %zmm0, (%eax)4049; X86-NEXT:    vpmovsdw %zmm0, (%eax) {%k1}4050; X86-NEXT:    vzeroupper4051; X86-NEXT:    retl4052    call void @llvm.x86.avx512.mask.pmovs.dw.mem.512(ptr %ptr, <16 x i32> %x1, i16 -1)4053    call void @llvm.x86.avx512.mask.pmovs.dw.mem.512(ptr %ptr, <16 x i32> %x1, i16 %x2)4054    ret void4055}4056 4057declare <16 x i16> @llvm.x86.avx512.mask.pmovus.dw.512(<16 x i32>, <16 x i16>, i16)4058 4059define <16 x i16>@test_int_x86_avx512_mask_pmovus_dw_512(<16 x i32> %x0, <16 x i16> %x1, i16 %x2) {4060; X64-LABEL: test_int_x86_avx512_mask_pmovus_dw_512:4061; X64:       # %bb.0:4062; X64-NEXT:    kmovw %edi, %k14063; X64-NEXT:    vpmovusdw %zmm0, %ymm24064; X64-NEXT:    vpmovusdw %zmm0, %ymm1 {%k1}4065; X64-NEXT:    vpaddw %ymm1, %ymm2, %ymm14066; X64-NEXT:    vpmovusdw %zmm0, %ymm0 {%k1} {z}4067; X64-NEXT:    vpaddw %ymm0, %ymm1, %ymm04068; X64-NEXT:    retq4069;4070; X86-LABEL: test_int_x86_avx512_mask_pmovus_dw_512:4071; X86:       # %bb.0:4072; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k14073; X86-NEXT:    vpmovusdw %zmm0, %ymm24074; X86-NEXT:    vpmovusdw %zmm0, %ymm1 {%k1}4075; X86-NEXT:    vpaddw %ymm1, %ymm2, %ymm14076; X86-NEXT:    vpmovusdw %zmm0, %ymm0 {%k1} {z}4077; X86-NEXT:    vpaddw %ymm0, %ymm1, %ymm04078; X86-NEXT:    retl4079    %res0 = call <16 x i16> @llvm.x86.avx512.mask.pmovus.dw.512(<16 x i32> %x0, <16 x i16> %x1, i16 -1)4080    %res1 = call <16 x i16> @llvm.x86.avx512.mask.pmovus.dw.512(<16 x i32> %x0, <16 x i16> %x1, i16 %x2)4081    %res2 = call <16 x i16> @llvm.x86.avx512.mask.pmovus.dw.512(<16 x i32> %x0, <16 x i16> zeroinitializer, i16 %x2)4082    %res3 = add <16 x i16> %res0, %res14083    %res4 = add <16 x i16> %res3, %res24084    ret <16 x i16> %res44085}4086 4087declare void @llvm.x86.avx512.mask.pmovus.dw.mem.512(ptr %ptr, <16 x i32>, i16)4088 4089define void @test_int_x86_avx512_mask_pmovus_dw_mem_512(ptr %ptr, <16 x i32> %x1, i16 %x2) {4090; X64-LABEL: test_int_x86_avx512_mask_pmovus_dw_mem_512:4091; X64:       # %bb.0:4092; X64-NEXT:    kmovw %esi, %k14093; X64-NEXT:    vpmovusdw %zmm0, (%rdi)4094; X64-NEXT:    vpmovusdw %zmm0, (%rdi) {%k1}4095; X64-NEXT:    vzeroupper4096; X64-NEXT:    retq4097;4098; X86-LABEL: test_int_x86_avx512_mask_pmovus_dw_mem_512:4099; X86:       # %bb.0:4100; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k14101; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax4102; X86-NEXT:    vpmovusdw %zmm0, (%eax)4103; X86-NEXT:    vpmovusdw %zmm0, (%eax) {%k1}4104; X86-NEXT:    vzeroupper4105; X86-NEXT:    retl4106    call void @llvm.x86.avx512.mask.pmovus.dw.mem.512(ptr %ptr, <16 x i32> %x1, i16 -1)4107    call void @llvm.x86.avx512.mask.pmovus.dw.mem.512(ptr %ptr, <16 x i32> %x1, i16 %x2)4108    ret void4109}4110 4111declare <16 x float> @llvm.x86.avx512.sitofp.round.v16f32.v16i32(<16 x i32>, i32)4112 4113define <16 x float>@test_int_x86_avx512_mask_cvt_dq2ps_512(<16 x i32> %x0, <16 x float> %x1, i16 %x2) {4114; X64-LABEL: test_int_x86_avx512_mask_cvt_dq2ps_512:4115; X64:       # %bb.0:4116; X64-NEXT:    kmovw %edi, %k14117; X64-NEXT:    vcvtdq2ps %zmm0, %zmm1 {%k1}4118; X64-NEXT:    vcvtdq2ps {rn-sae}, %zmm0, %zmm04119; X64-NEXT:    vaddps %zmm0, %zmm1, %zmm04120; X64-NEXT:    retq4121;4122; X86-LABEL: test_int_x86_avx512_mask_cvt_dq2ps_512:4123; X86:       # %bb.0:4124; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k14125; X86-NEXT:    vcvtdq2ps %zmm0, %zmm1 {%k1}4126; X86-NEXT:    vcvtdq2ps {rn-sae}, %zmm0, %zmm04127; X86-NEXT:    vaddps %zmm0, %zmm1, %zmm04128; X86-NEXT:    retl4129  %cvt = sitofp <16 x i32> %x0 to <16 x float>4130  %1 = bitcast i16 %x2 to <16 x i1>4131  %2 = select <16 x i1> %1, <16 x float> %cvt, <16 x float> %x14132  %3 = call <16 x float> @llvm.x86.avx512.sitofp.round.v16f32.v16i32(<16 x i32> %x0, i32 8)4133  %res2 = fadd <16 x float> %2, %34134  ret <16 x float> %res24135}4136 4137declare <8 x i32> @llvm.x86.avx512.mask.cvtpd2dq.512(<8 x double>, <8 x i32>, i8, i32)4138 4139define <8 x i32>@test_int_x86_avx512_mask_cvt_pd2dq_512(<8 x double> %x0, <8 x i32> %x1, i8 %x2) {4140; X64-LABEL: test_int_x86_avx512_mask_cvt_pd2dq_512:4141; X64:       # %bb.0:4142; X64-NEXT:    kmovw %edi, %k14143; X64-NEXT:    vcvtpd2dq %zmm0, %ymm1 {%k1}4144; X64-NEXT:    vcvtpd2dq {rn-sae}, %zmm0, %ymm04145; X64-NEXT:    vpaddd %ymm0, %ymm1, %ymm04146; X64-NEXT:    retq4147;4148; X86-LABEL: test_int_x86_avx512_mask_cvt_pd2dq_512:4149; X86:       # %bb.0:4150; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4151; X86-NEXT:    kmovw %eax, %k14152; X86-NEXT:    vcvtpd2dq %zmm0, %ymm1 {%k1}4153; X86-NEXT:    vcvtpd2dq {rn-sae}, %zmm0, %ymm04154; X86-NEXT:    vpaddd %ymm0, %ymm1, %ymm04155; X86-NEXT:    retl4156  %res = call <8 x i32> @llvm.x86.avx512.mask.cvtpd2dq.512(<8 x double> %x0, <8 x i32> %x1, i8 %x2, i32 4)4157  %res1 = call <8 x i32> @llvm.x86.avx512.mask.cvtpd2dq.512(<8 x double> %x0, <8 x i32> %x1, i8 -1, i32 8)4158  %res2 = add <8 x i32> %res, %res14159  ret <8 x i32> %res24160}4161 4162declare <8 x float> @llvm.x86.avx512.mask.cvtpd2ps.512(<8 x double>, <8 x float>, i8, i32)4163 4164define <8 x float>@test_int_x86_avx512_mask_cvt_pd2ps_512(<8 x double> %x0, <8 x float> %x1, i8 %x2) {4165; X64-LABEL: test_int_x86_avx512_mask_cvt_pd2ps_512:4166; X64:       # %bb.0:4167; X64-NEXT:    kmovw %edi, %k14168; X64-NEXT:    vcvtpd2ps %zmm0, %ymm1 {%k1}4169; X64-NEXT:    vcvtpd2ps {ru-sae}, %zmm0, %ymm04170; X64-NEXT:    vaddps %ymm0, %ymm1, %ymm04171; X64-NEXT:    retq4172;4173; X86-LABEL: test_int_x86_avx512_mask_cvt_pd2ps_512:4174; X86:       # %bb.0:4175; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4176; X86-NEXT:    kmovw %eax, %k14177; X86-NEXT:    vcvtpd2ps %zmm0, %ymm1 {%k1}4178; X86-NEXT:    vcvtpd2ps {ru-sae}, %zmm0, %ymm04179; X86-NEXT:    vaddps %ymm0, %ymm1, %ymm04180; X86-NEXT:    retl4181  %res = call <8 x float> @llvm.x86.avx512.mask.cvtpd2ps.512(<8 x double> %x0, <8 x float> %x1, i8 %x2, i32 4)4182  %res1 = call <8 x float> @llvm.x86.avx512.mask.cvtpd2ps.512(<8 x double> %x0, <8 x float> %x1, i8 -1, i32 10)4183  %res2 = fadd <8 x float> %res, %res14184  ret <8 x float> %res24185}4186 4187declare <8 x i32> @llvm.x86.avx512.mask.cvtpd2udq.512(<8 x double>, <8 x i32>, i8, i32)4188 4189define <8 x i32>@test_int_x86_avx512_mask_cvt_pd2udq_512(<8 x double> %x0, <8 x i32> %x1, i8 %x2) {4190; X64-LABEL: test_int_x86_avx512_mask_cvt_pd2udq_512:4191; X64:       # %bb.0:4192; X64-NEXT:    kmovw %edi, %k14193; X64-NEXT:    vcvtpd2udq {ru-sae}, %zmm0, %ymm1 {%k1}4194; X64-NEXT:    vcvtpd2udq {rn-sae}, %zmm0, %ymm04195; X64-NEXT:    vpaddd %ymm0, %ymm1, %ymm04196; X64-NEXT:    retq4197;4198; X86-LABEL: test_int_x86_avx512_mask_cvt_pd2udq_512:4199; X86:       # %bb.0:4200; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4201; X86-NEXT:    kmovw %eax, %k14202; X86-NEXT:    vcvtpd2udq {ru-sae}, %zmm0, %ymm1 {%k1}4203; X86-NEXT:    vcvtpd2udq {rn-sae}, %zmm0, %ymm04204; X86-NEXT:    vpaddd %ymm0, %ymm1, %ymm04205; X86-NEXT:    retl4206  %res = call <8 x i32> @llvm.x86.avx512.mask.cvtpd2udq.512(<8 x double> %x0, <8 x i32> %x1, i8 %x2, i32 10)4207  %res1 = call <8 x i32> @llvm.x86.avx512.mask.cvtpd2udq.512(<8 x double> %x0, <8 x i32> %x1, i8 -1, i32 8)4208  %res2 = add <8 x i32> %res, %res14209  ret <8 x i32> %res24210}4211 4212declare <16 x i32> @llvm.x86.avx512.mask.cvtps2dq.512(<16 x float>, <16 x i32>, i16, i32)4213 4214define <16 x i32>@test_int_x86_avx512_mask_cvt_ps2dq_512(<16 x float> %x0, <16 x i32> %x1, i16 %x2) {4215; X64-LABEL: test_int_x86_avx512_mask_cvt_ps2dq_512:4216; X64:       # %bb.0:4217; X64-NEXT:    kmovw %edi, %k14218; X64-NEXT:    vcvtps2dq {ru-sae}, %zmm0, %zmm1 {%k1}4219; X64-NEXT:    vcvtps2dq {rn-sae}, %zmm0, %zmm04220; X64-NEXT:    vpaddd %zmm0, %zmm1, %zmm04221; X64-NEXT:    retq4222;4223; X86-LABEL: test_int_x86_avx512_mask_cvt_ps2dq_512:4224; X86:       # %bb.0:4225; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k14226; X86-NEXT:    vcvtps2dq {ru-sae}, %zmm0, %zmm1 {%k1}4227; X86-NEXT:    vcvtps2dq {rn-sae}, %zmm0, %zmm04228; X86-NEXT:    vpaddd %zmm0, %zmm1, %zmm04229; X86-NEXT:    retl4230  %res = call <16 x i32> @llvm.x86.avx512.mask.cvtps2dq.512(<16 x float> %x0, <16 x i32> %x1, i16 %x2, i32 10)4231  %res1 = call <16 x i32> @llvm.x86.avx512.mask.cvtps2dq.512(<16 x float> %x0, <16 x i32> %x1, i16 -1, i32 8)4232  %res2 = add <16 x i32> %res, %res14233  ret <16 x i32> %res24234}4235 4236declare <8 x double> @llvm.x86.avx512.mask.cvtps2pd.512(<8 x float>, <8 x double>, i8, i32)4237 4238define <8 x double>@test_int_x86_avx512_mask_cvt_ps2pd_512(<8 x float> %x0, <8 x double> %x1, i8 %x2) {4239; X64-LABEL: test_int_x86_avx512_mask_cvt_ps2pd_512:4240; X64:       # %bb.0:4241; X64-NEXT:    kmovw %edi, %k14242; X64-NEXT:    vcvtps2pd %ymm0, %zmm1 {%k1}4243; X64-NEXT:    vcvtps2pd {sae}, %ymm0, %zmm04244; X64-NEXT:    vaddpd %zmm0, %zmm1, %zmm04245; X64-NEXT:    retq4246;4247; X86-LABEL: test_int_x86_avx512_mask_cvt_ps2pd_512:4248; X86:       # %bb.0:4249; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4250; X86-NEXT:    kmovw %eax, %k14251; X86-NEXT:    vcvtps2pd %ymm0, %zmm1 {%k1}4252; X86-NEXT:    vcvtps2pd {sae}, %ymm0, %zmm04253; X86-NEXT:    vaddpd %zmm0, %zmm1, %zmm04254; X86-NEXT:    retl4255  %res = call <8 x double> @llvm.x86.avx512.mask.cvtps2pd.512(<8 x float> %x0, <8 x double> %x1, i8 %x2, i32 4)4256  %res1 = call <8 x double> @llvm.x86.avx512.mask.cvtps2pd.512(<8 x float> %x0, <8 x double> %x1, i8 -1, i32 8)4257  %res2 = fadd <8 x double> %res, %res14258  ret <8 x double> %res24259}4260 4261declare <16 x i32> @llvm.x86.avx512.mask.cvtps2udq.512(<16 x float>, <16 x i32>, i16, i32)4262 4263define <16 x i32>@test_int_x86_avx512_mask_cvt_ps2udq_512(<16 x float> %x0, <16 x i32> %x1, i16 %x2) {4264; X64-LABEL: test_int_x86_avx512_mask_cvt_ps2udq_512:4265; X64:       # %bb.0:4266; X64-NEXT:    kmovw %edi, %k14267; X64-NEXT:    vcvtps2udq {ru-sae}, %zmm0, %zmm1 {%k1}4268; X64-NEXT:    vcvtps2udq {rn-sae}, %zmm0, %zmm04269; X64-NEXT:    vpaddd %zmm0, %zmm1, %zmm04270; X64-NEXT:    retq4271;4272; X86-LABEL: test_int_x86_avx512_mask_cvt_ps2udq_512:4273; X86:       # %bb.0:4274; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k14275; X86-NEXT:    vcvtps2udq {ru-sae}, %zmm0, %zmm1 {%k1}4276; X86-NEXT:    vcvtps2udq {rn-sae}, %zmm0, %zmm04277; X86-NEXT:    vpaddd %zmm0, %zmm1, %zmm04278; X86-NEXT:    retl4279  %res = call <16 x i32> @llvm.x86.avx512.mask.cvtps2udq.512(<16 x float> %x0, <16 x i32> %x1, i16 %x2, i32 10)4280  %res1 = call <16 x i32> @llvm.x86.avx512.mask.cvtps2udq.512(<16 x float> %x0, <16 x i32> %x1, i16 -1, i32 8)4281  %res2 = add <16 x i32> %res, %res14282  ret <16 x i32> %res24283}4284 4285declare <8 x i32> @llvm.x86.avx512.mask.cvttpd2dq.512(<8 x double>, <8 x i32>, i8, i32)4286 4287define <8 x i32>@test_int_x86_avx512_mask_cvtt_pd2dq_512(<8 x double> %x0, <8 x i32> %x1, i8 %x2) {4288; X64-LABEL: test_int_x86_avx512_mask_cvtt_pd2dq_512:4289; X64:       # %bb.0:4290; X64-NEXT:    kmovw %edi, %k14291; X64-NEXT:    vcvttpd2dq %zmm0, %ymm1 {%k1}4292; X64-NEXT:    vcvttpd2dq {sae}, %zmm0, %ymm04293; X64-NEXT:    vpaddd %ymm0, %ymm1, %ymm04294; X64-NEXT:    retq4295;4296; X86-LABEL: test_int_x86_avx512_mask_cvtt_pd2dq_512:4297; X86:       # %bb.0:4298; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4299; X86-NEXT:    kmovw %eax, %k14300; X86-NEXT:    vcvttpd2dq %zmm0, %ymm1 {%k1}4301; X86-NEXT:    vcvttpd2dq {sae}, %zmm0, %ymm04302; X86-NEXT:    vpaddd %ymm0, %ymm1, %ymm04303; X86-NEXT:    retl4304  %res = call <8 x i32> @llvm.x86.avx512.mask.cvttpd2dq.512(<8 x double> %x0, <8 x i32> %x1, i8 %x2, i32 4)4305  %res1 = call <8 x i32> @llvm.x86.avx512.mask.cvttpd2dq.512(<8 x double> %x0, <8 x i32> %x1, i8 -1, i32 8)4306  %res2 = add <8 x i32> %res, %res14307  ret <8 x i32> %res24308}4309 4310declare <16 x float> @llvm.x86.avx512.uitofp.round.v16f32.v16i32(<16 x i32>, i32)4311 4312define <16 x float>@test_int_x86_avx512_mask_cvt_udq2ps_512(<16 x i32> %x0, <16 x float> %x1, i16 %x2) {4313; X64-LABEL: test_int_x86_avx512_mask_cvt_udq2ps_512:4314; X64:       # %bb.0:4315; X64-NEXT:    kmovw %edi, %k14316; X64-NEXT:    vcvtudq2ps %zmm0, %zmm1 {%k1}4317; X64-NEXT:    vcvtudq2ps {rn-sae}, %zmm0, %zmm04318; X64-NEXT:    vaddps %zmm0, %zmm1, %zmm04319; X64-NEXT:    retq4320;4321; X86-LABEL: test_int_x86_avx512_mask_cvt_udq2ps_512:4322; X86:       # %bb.0:4323; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k14324; X86-NEXT:    vcvtudq2ps %zmm0, %zmm1 {%k1}4325; X86-NEXT:    vcvtudq2ps {rn-sae}, %zmm0, %zmm04326; X86-NEXT:    vaddps %zmm0, %zmm1, %zmm04327; X86-NEXT:    retl4328  %cvt = uitofp <16 x i32> %x0 to <16 x float>4329  %1 = bitcast i16 %x2 to <16 x i1>4330  %2 = select <16 x i1> %1, <16 x float> %cvt, <16 x float> %x14331  %3 = call <16 x float> @llvm.x86.avx512.uitofp.round.v16f32.v16i32(<16 x i32> %x0, i32 8)4332  %res2 = fadd <16 x float> %2, %34333  ret <16 x float> %res24334}4335 4336declare <8 x i32> @llvm.x86.avx512.mask.cvttpd2udq.512(<8 x double>, <8 x i32>, i8, i32)4337 4338define <8 x i32>@test_int_x86_avx512_mask_cvtt_pd2udq_512(<8 x double> %x0, <8 x i32> %x1, i8 %x2) {4339; X64-LABEL: test_int_x86_avx512_mask_cvtt_pd2udq_512:4340; X64:       # %bb.0:4341; X64-NEXT:    kmovw %edi, %k14342; X64-NEXT:    vcvttpd2udq %zmm0, %ymm1 {%k1}4343; X64-NEXT:    vcvttpd2udq {sae}, %zmm0, %ymm04344; X64-NEXT:    vpaddd %ymm0, %ymm1, %ymm04345; X64-NEXT:    retq4346;4347; X86-LABEL: test_int_x86_avx512_mask_cvtt_pd2udq_512:4348; X86:       # %bb.0:4349; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4350; X86-NEXT:    kmovw %eax, %k14351; X86-NEXT:    vcvttpd2udq %zmm0, %ymm1 {%k1}4352; X86-NEXT:    vcvttpd2udq {sae}, %zmm0, %ymm04353; X86-NEXT:    vpaddd %ymm0, %ymm1, %ymm04354; X86-NEXT:    retl4355  %res = call <8 x i32> @llvm.x86.avx512.mask.cvttpd2udq.512(<8 x double> %x0, <8 x i32> %x1, i8 %x2, i32 4)4356  %res1 = call <8 x i32> @llvm.x86.avx512.mask.cvttpd2udq.512(<8 x double> %x0, <8 x i32> %x1, i8 -1, i32 8)4357  %res2 = add <8 x i32> %res, %res14358  ret <8 x i32> %res24359}4360 4361declare <16 x i32> @llvm.x86.avx512.mask.cvttps2dq.512(<16 x float>, <16 x i32>, i16, i32)4362 4363define <16 x i32>@test_int_x86_avx512_mask_cvtt_ps2dq_512(<16 x float> %x0, <16 x i32> %x1, i16 %x2) {4364; X64-LABEL: test_int_x86_avx512_mask_cvtt_ps2dq_512:4365; X64:       # %bb.0:4366; X64-NEXT:    kmovw %edi, %k14367; X64-NEXT:    vcvttps2dq %zmm0, %zmm1 {%k1}4368; X64-NEXT:    vcvttps2dq {sae}, %zmm0, %zmm04369; X64-NEXT:    vpaddd %zmm0, %zmm1, %zmm04370; X64-NEXT:    retq4371;4372; X86-LABEL: test_int_x86_avx512_mask_cvtt_ps2dq_512:4373; X86:       # %bb.0:4374; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k14375; X86-NEXT:    vcvttps2dq %zmm0, %zmm1 {%k1}4376; X86-NEXT:    vcvttps2dq {sae}, %zmm0, %zmm04377; X86-NEXT:    vpaddd %zmm0, %zmm1, %zmm04378; X86-NEXT:    retl4379  %res = call <16 x i32> @llvm.x86.avx512.mask.cvttps2dq.512(<16 x float> %x0, <16 x i32> %x1, i16 %x2, i32 4)4380  %res1 = call <16 x i32> @llvm.x86.avx512.mask.cvttps2dq.512(<16 x float> %x0, <16 x i32> %x1, i16 -1, i32 8)4381  %res2 = add <16 x i32> %res, %res14382  ret <16 x i32> %res24383}4384 4385declare <16 x i32> @llvm.x86.avx512.mask.cvttps2udq.512(<16 x float>, <16 x i32>, i16, i32)4386 4387define <16 x i32>@test_int_x86_avx512_mask_cvtt_ps2udq_512(<16 x float> %x0, <16 x i32> %x1, i16 %x2) {4388; X64-LABEL: test_int_x86_avx512_mask_cvtt_ps2udq_512:4389; X64:       # %bb.0:4390; X64-NEXT:    kmovw %edi, %k14391; X64-NEXT:    vcvttps2udq %zmm0, %zmm1 {%k1}4392; X64-NEXT:    vcvttps2udq {sae}, %zmm0, %zmm04393; X64-NEXT:    vpaddd %zmm0, %zmm1, %zmm04394; X64-NEXT:    retq4395;4396; X86-LABEL: test_int_x86_avx512_mask_cvtt_ps2udq_512:4397; X86:       # %bb.0:4398; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k14399; X86-NEXT:    vcvttps2udq %zmm0, %zmm1 {%k1}4400; X86-NEXT:    vcvttps2udq {sae}, %zmm0, %zmm04401; X86-NEXT:    vpaddd %zmm0, %zmm1, %zmm04402; X86-NEXT:    retl4403  %res = call <16 x i32> @llvm.x86.avx512.mask.cvttps2udq.512(<16 x float> %x0, <16 x i32> %x1, i16 %x2, i32 4)4404  %res1 = call <16 x i32> @llvm.x86.avx512.mask.cvttps2udq.512(<16 x float> %x0, <16 x i32> %x1, i16 -1, i32 8)4405  %res2 = add <16 x i32> %res, %res14406  ret <16 x i32> %res24407}4408 4409declare <4 x float> @llvm.x86.avx512.mask.getexp.ss(<4 x float>, <4 x float>, <4 x float>, i8, i32) nounwind readnone4410 4411define <4 x float> @test_getexp_ss(<4 x float> %a0, <4 x float> %a1) {4412; CHECK-LABEL: test_getexp_ss:4413; CHECK:       # %bb.0:4414; CHECK-NEXT:    vgetexpss {sae}, %xmm1, %xmm0, %xmm04415; CHECK-NEXT:    ret{{[l|q]}}4416  %res = call <4 x float> @llvm.x86.avx512.mask.getexp.ss(<4 x float>%a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 -1, i32 8)4417  ret <4 x float> %res4418}4419 4420define <4 x float> @test_mask_getexp_ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 %mask) {4421; X64-LABEL: test_mask_getexp_ss:4422; X64:       # %bb.0:4423; X64-NEXT:    kmovw %edi, %k14424; X64-NEXT:    vmovaps %xmm2, %xmm34425; X64-NEXT:    vgetexpss %xmm1, %xmm0, %xmm3 {%k1}4426; X64-NEXT:    vgetexpss {sae}, %xmm1, %xmm0, %xmm2 {%k1}4427; X64-NEXT:    vaddps %xmm2, %xmm3, %xmm04428; X64-NEXT:    retq4429;4430; X86-LABEL: test_mask_getexp_ss:4431; X86:       # %bb.0:4432; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4433; X86-NEXT:    kmovw %eax, %k14434; X86-NEXT:    vmovaps %xmm2, %xmm34435; X86-NEXT:    vgetexpss %xmm1, %xmm0, %xmm3 {%k1}4436; X86-NEXT:    vgetexpss {sae}, %xmm1, %xmm0, %xmm2 {%k1}4437; X86-NEXT:    vaddps %xmm2, %xmm3, %xmm04438; X86-NEXT:    retl4439  %res0 = call <4 x float> @llvm.x86.avx512.mask.getexp.ss(<4 x float>%a0, <4 x float> %a1, <4 x float> %a2, i8 %mask, i32 4)4440  %res1 = call <4 x float> @llvm.x86.avx512.mask.getexp.ss(<4 x float>%a0, <4 x float> %a1, <4 x float> %a2, i8 %mask, i32 8)4441  %res.1 = fadd <4 x float> %res0, %res14442  ret <4 x float> %res.14443}4444 4445define <4 x float> @test_maskz_getexp_ss(<4 x float> %a0, <4 x float> %a1, i8 %mask) {4446; X64-LABEL: test_maskz_getexp_ss:4447; X64:       # %bb.0:4448; X64-NEXT:    kmovw %edi, %k14449; X64-NEXT:    vgetexpss {sae}, %xmm1, %xmm0, %xmm0 {%k1} {z}4450; X64-NEXT:    retq4451;4452; X86-LABEL: test_maskz_getexp_ss:4453; X86:       # %bb.0:4454; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4455; X86-NEXT:    kmovw %eax, %k14456; X86-NEXT:    vgetexpss {sae}, %xmm1, %xmm0, %xmm0 {%k1} {z}4457; X86-NEXT:    retl4458  %res = call <4 x float> @llvm.x86.avx512.mask.getexp.ss(<4 x float>%a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 %mask, i32 8)4459  ret <4 x float> %res4460}4461 4462declare <2 x double> @llvm.x86.avx512.mask.getexp.sd(<2 x double>, <2 x double>, <2 x double>, i8, i32) nounwind readnone4463 4464define <2 x double> @test_getexp_sd(<2 x double> %a0, <2 x double> %a1) {4465; CHECK-LABEL: test_getexp_sd:4466; CHECK:       # %bb.0:4467; CHECK-NEXT:    vgetexpsd %xmm1, %xmm0, %xmm04468; CHECK-NEXT:    ret{{[l|q]}}4469  %res = call <2 x double> @llvm.x86.avx512.mask.getexp.sd(<2 x double>%a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 -1, i32 4)4470  ret <2 x double> %res4471}4472 4473define <2 x double> @test_mask_getexp_sd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 %mask) {4474; X64-LABEL: test_mask_getexp_sd:4475; X64:       # %bb.0:4476; X64-NEXT:    kmovw %edi, %k14477; X64-NEXT:    vmovapd %xmm2, %xmm34478; X64-NEXT:    vgetexpsd %xmm1, %xmm0, %xmm3 {%k1}4479; X64-NEXT:    vgetexpsd {sae}, %xmm1, %xmm0, %xmm2 {%k1}4480; X64-NEXT:    vaddpd %xmm2, %xmm3, %xmm04481; X64-NEXT:    retq4482;4483; X86-LABEL: test_mask_getexp_sd:4484; X86:       # %bb.0:4485; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4486; X86-NEXT:    kmovw %eax, %k14487; X86-NEXT:    vmovapd %xmm2, %xmm34488; X86-NEXT:    vgetexpsd %xmm1, %xmm0, %xmm3 {%k1}4489; X86-NEXT:    vgetexpsd {sae}, %xmm1, %xmm0, %xmm2 {%k1}4490; X86-NEXT:    vaddpd %xmm2, %xmm3, %xmm04491; X86-NEXT:    retl4492  %res0 = call <2 x double> @llvm.x86.avx512.mask.getexp.sd(<2 x double>%a0, <2 x double> %a1, <2 x double> %a2, i8 %mask, i32 4)4493  %res1 = call <2 x double> @llvm.x86.avx512.mask.getexp.sd(<2 x double>%a0, <2 x double> %a1, <2 x double> %a2, i8 %mask, i32 8)4494  %res.1 = fadd <2 x double> %res0, %res14495  ret <2 x double> %res.14496}4497 4498define <2 x double> @test_maskz_getexp_sd(<2 x double> %a0, <2 x double> %a1, i8 %mask) {4499; X64-LABEL: test_maskz_getexp_sd:4500; X64:       # %bb.0:4501; X64-NEXT:    kmovw %edi, %k14502; X64-NEXT:    vgetexpsd {sae}, %xmm1, %xmm0, %xmm0 {%k1} {z}4503; X64-NEXT:    retq4504;4505; X86-LABEL: test_maskz_getexp_sd:4506; X86:       # %bb.0:4507; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4508; X86-NEXT:    kmovw %eax, %k14509; X86-NEXT:    vgetexpsd {sae}, %xmm1, %xmm0, %xmm0 {%k1} {z}4510; X86-NEXT:    retl4511  %res = call <2 x double> @llvm.x86.avx512.mask.getexp.sd(<2 x double>%a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 %mask, i32 8)4512  ret <2 x double> %res4513}4514 4515declare i8 @llvm.x86.avx512.mask.cmp.sd(<2 x double>, <2 x double>, i32, i8, i32)4516 4517define i8@test_int_x86_avx512_mask_cmp_sd(<2 x double> %x0, <2 x double> %x1, i8 %x3, i32 %x4) {4518; X64-LABEL: test_int_x86_avx512_mask_cmp_sd:4519; X64:       # %bb.0:4520; X64-NEXT:    kmovw %edi, %k14521; X64-NEXT:    vcmpnltsd {sae}, %xmm1, %xmm0, %k0 {%k1}4522; X64-NEXT:    kmovw %k0, %eax4523; X64-NEXT:    # kill: def $al killed $al killed $eax4524; X64-NEXT:    retq4525;4526; X86-LABEL: test_int_x86_avx512_mask_cmp_sd:4527; X86:       # %bb.0:4528; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4529; X86-NEXT:    kmovw %eax, %k14530; X86-NEXT:    vcmpnltsd {sae}, %xmm1, %xmm0, %k0 {%k1}4531; X86-NEXT:    kmovw %k0, %eax4532; X86-NEXT:    # kill: def $al killed $al killed $eax4533; X86-NEXT:    retl4534 4535  %res4 = call i8 @llvm.x86.avx512.mask.cmp.sd(<2 x double> %x0, <2 x double> %x1, i32 5, i8 %x3, i32 8)4536  ret i8 %res44537}4538 4539define i8@test_int_x86_avx512_mask_cmp_sd_all(<2 x double> %x0, <2 x double> %x1, i8 %x3, i32 %x4) {4540; X64-LABEL: test_int_x86_avx512_mask_cmp_sd_all:4541; X64:       # %bb.0:4542; X64-NEXT:    kmovw %edi, %k14543; X64-NEXT:    vcmplesd %xmm1, %xmm0, %k04544; X64-NEXT:    kmovw %k0, %ecx4545; X64-NEXT:    vcmpunordsd {sae}, %xmm1, %xmm0, %k04546; X64-NEXT:    kmovw %k0, %edx4547; X64-NEXT:    vcmpneqsd %xmm1, %xmm0, %k0 {%k1}4548; X64-NEXT:    kmovw %k0, %esi4549; X64-NEXT:    vcmpnltsd {sae}, %xmm1, %xmm0, %k0 {%k1}4550; X64-NEXT:    kmovw %k0, %eax4551; X64-NEXT:    orl %ecx, %edx4552; X64-NEXT:    orl %esi, %eax4553; X64-NEXT:    orl %edx, %eax4554; X64-NEXT:    # kill: def $al killed $al killed $eax4555; X64-NEXT:    retq4556;4557; X86-LABEL: test_int_x86_avx512_mask_cmp_sd_all:4558; X86:       # %bb.0:4559; X86-NEXT:    pushl %esi4560; X86-NEXT:    .cfi_def_cfa_offset 84561; X86-NEXT:    .cfi_offset %esi, -84562; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4563; X86-NEXT:    kmovw %eax, %k14564; X86-NEXT:    vcmplesd %xmm1, %xmm0, %k04565; X86-NEXT:    kmovw %k0, %ecx4566; X86-NEXT:    vcmpunordsd {sae}, %xmm1, %xmm0, %k04567; X86-NEXT:    kmovw %k0, %edx4568; X86-NEXT:    vcmpneqsd %xmm1, %xmm0, %k0 {%k1}4569; X86-NEXT:    kmovw %k0, %esi4570; X86-NEXT:    vcmpnltsd {sae}, %xmm1, %xmm0, %k0 {%k1}4571; X86-NEXT:    kmovw %k0, %eax4572; X86-NEXT:    orl %ecx, %edx4573; X86-NEXT:    orl %esi, %eax4574; X86-NEXT:    orl %edx, %eax4575; X86-NEXT:    # kill: def $al killed $al killed $eax4576; X86-NEXT:    popl %esi4577; X86-NEXT:    .cfi_def_cfa_offset 44578; X86-NEXT:    retl4579 4580  %res1 = call i8 @llvm.x86.avx512.mask.cmp.sd(<2 x double> %x0, <2 x double> %x1, i32 2, i8 -1, i32 4)4581  %res2 = call i8 @llvm.x86.avx512.mask.cmp.sd(<2 x double> %x0, <2 x double> %x1, i32 3, i8 -1, i32 8)4582  %res3 = call i8 @llvm.x86.avx512.mask.cmp.sd(<2 x double> %x0, <2 x double> %x1, i32 4, i8 %x3, i32 4)4583  %res4 = call i8 @llvm.x86.avx512.mask.cmp.sd(<2 x double> %x0, <2 x double> %x1, i32 5, i8 %x3, i32 8)4584 4585  %res11 = or i8 %res1, %res24586  %res12 = or i8 %res3, %res44587  %res13 = or i8 %res11, %res124588  ret i8 %res134589}4590 4591declare i8 @llvm.x86.avx512.mask.cmp.ss(<4 x float>, <4 x float>, i32, i8, i32)4592 4593define i8@test_int_x86_avx512_mask_cmp_ss(<4 x float> %x0, <4 x float> %x1, i8 %x3, i32 %x4) {4594; X64-LABEL: test_int_x86_avx512_mask_cmp_ss:4595; X64:       # %bb.0:4596; X64-NEXT:    kmovw %edi, %k14597; X64-NEXT:    vcmpunordss %xmm1, %xmm0, %k0 {%k1}4598; X64-NEXT:    kmovw %k0, %eax4599; X64-NEXT:    # kill: def $al killed $al killed $eax4600; X64-NEXT:    retq4601;4602; X86-LABEL: test_int_x86_avx512_mask_cmp_ss:4603; X86:       # %bb.0:4604; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4605; X86-NEXT:    kmovw %eax, %k14606; X86-NEXT:    vcmpunordss %xmm1, %xmm0, %k0 {%k1}4607; X86-NEXT:    kmovw %k0, %eax4608; X86-NEXT:    # kill: def $al killed $al killed $eax4609; X86-NEXT:    retl4610 4611  %res2 = call i8 @llvm.x86.avx512.mask.cmp.ss(<4 x float> %x0, <4 x float> %x1, i32 3, i8 %x3, i32 4)4612  ret i8 %res24613}4614 4615 4616define i8@test_int_x86_avx512_mask_cmp_ss_all(<4 x float> %x0, <4 x float> %x1, i8 %x3, i32 %x4) {4617; X64-LABEL: test_int_x86_avx512_mask_cmp_ss_all:4618; X64:       # %bb.0:4619; X64-NEXT:    kmovw %edi, %k14620; X64-NEXT:    vcmpless %xmm1, %xmm0, %k04621; X64-NEXT:    kmovw %k0, %ecx4622; X64-NEXT:    vcmpunordss {sae}, %xmm1, %xmm0, %k04623; X64-NEXT:    kmovw %k0, %edx4624; X64-NEXT:    vcmpneqss %xmm1, %xmm0, %k0 {%k1}4625; X64-NEXT:    kmovw %k0, %esi4626; X64-NEXT:    vcmpnltss {sae}, %xmm1, %xmm0, %k0 {%k1}4627; X64-NEXT:    kmovw %k0, %eax4628; X64-NEXT:    andl %ecx, %edx4629; X64-NEXT:    andl %esi, %eax4630; X64-NEXT:    andl %edx, %eax4631; X64-NEXT:    # kill: def $al killed $al killed $eax4632; X64-NEXT:    retq4633;4634; X86-LABEL: test_int_x86_avx512_mask_cmp_ss_all:4635; X86:       # %bb.0:4636; X86-NEXT:    pushl %esi4637; X86-NEXT:    .cfi_def_cfa_offset 84638; X86-NEXT:    .cfi_offset %esi, -84639; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4640; X86-NEXT:    kmovw %eax, %k14641; X86-NEXT:    vcmpless %xmm1, %xmm0, %k04642; X86-NEXT:    kmovw %k0, %ecx4643; X86-NEXT:    vcmpunordss {sae}, %xmm1, %xmm0, %k04644; X86-NEXT:    kmovw %k0, %edx4645; X86-NEXT:    vcmpneqss %xmm1, %xmm0, %k0 {%k1}4646; X86-NEXT:    kmovw %k0, %esi4647; X86-NEXT:    vcmpnltss {sae}, %xmm1, %xmm0, %k0 {%k1}4648; X86-NEXT:    kmovw %k0, %eax4649; X86-NEXT:    andl %ecx, %edx4650; X86-NEXT:    andl %esi, %eax4651; X86-NEXT:    andl %edx, %eax4652; X86-NEXT:    # kill: def $al killed $al killed $eax4653; X86-NEXT:    popl %esi4654; X86-NEXT:    .cfi_def_cfa_offset 44655; X86-NEXT:    retl4656  %res1 = call i8 @llvm.x86.avx512.mask.cmp.ss(<4 x float> %x0, <4 x float> %x1, i32 2, i8 -1, i32 4)4657  %res2 = call i8 @llvm.x86.avx512.mask.cmp.ss(<4 x float> %x0, <4 x float> %x1, i32 3, i8 -1, i32 8)4658  %res3 = call i8 @llvm.x86.avx512.mask.cmp.ss(<4 x float> %x0, <4 x float> %x1, i32 4, i8 %x3, i32 4)4659  %res4 = call i8 @llvm.x86.avx512.mask.cmp.ss(<4 x float> %x0, <4 x float> %x1, i32 5, i8 %x3, i32 8)4660 4661  %res11 = and i8 %res1, %res24662  %res12 = and i8 %res3, %res44663  %res13 = and i8 %res11, %res124664  ret i8 %res134665}4666 4667declare <8 x double> @llvm.x86.avx512.mask.getmant.pd.512(<8 x double>, i32, <8 x double>, i8, i32)4668 4669define <8 x double>@test_int_x86_avx512_mask_getmant_pd_512(<8 x double> %x0, <8 x double> %x2, i8 %x3) {4670; X64-LABEL: test_int_x86_avx512_mask_getmant_pd_512:4671; X64:       # %bb.0:4672; X64-NEXT:    kmovw %edi, %k14673; X64-NEXT:    vgetmantpd $11, %zmm0, %zmm1 {%k1}4674; X64-NEXT:    vgetmantpd $11, {sae}, %zmm0, %zmm04675; X64-NEXT:    vaddpd %zmm0, %zmm1, %zmm04676; X64-NEXT:    retq4677;4678; X86-LABEL: test_int_x86_avx512_mask_getmant_pd_512:4679; X86:       # %bb.0:4680; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4681; X86-NEXT:    kmovw %eax, %k14682; X86-NEXT:    vgetmantpd $11, %zmm0, %zmm1 {%k1}4683; X86-NEXT:    vgetmantpd $11, {sae}, %zmm0, %zmm04684; X86-NEXT:    vaddpd %zmm0, %zmm1, %zmm04685; X86-NEXT:    retl4686  %res = call <8 x double> @llvm.x86.avx512.mask.getmant.pd.512(<8 x double> %x0, i32 11, <8 x double> %x2, i8 %x3, i32 4)4687  %res1 = call <8 x double> @llvm.x86.avx512.mask.getmant.pd.512(<8 x double> %x0, i32 11, <8 x double> %x2, i8 -1, i32 8)4688  %res2 = fadd <8 x double> %res, %res14689  ret <8 x double> %res24690}4691 4692declare <16 x float> @llvm.x86.avx512.mask.getmant.ps.512(<16 x float>, i32, <16 x float>, i16, i32)4693 4694define <16 x float>@test_int_x86_avx512_mask_getmant_ps_512(<16 x float> %x0, <16 x float> %x2, i16 %x3) {4695; X64-LABEL: test_int_x86_avx512_mask_getmant_ps_512:4696; X64:       # %bb.0:4697; X64-NEXT:    kmovw %edi, %k14698; X64-NEXT:    vgetmantps $11, %zmm0, %zmm1 {%k1}4699; X64-NEXT:    vgetmantps $11, {sae}, %zmm0, %zmm04700; X64-NEXT:    vaddps %zmm0, %zmm1, %zmm04701; X64-NEXT:    retq4702;4703; X86-LABEL: test_int_x86_avx512_mask_getmant_ps_512:4704; X86:       # %bb.0:4705; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k14706; X86-NEXT:    vgetmantps $11, %zmm0, %zmm1 {%k1}4707; X86-NEXT:    vgetmantps $11, {sae}, %zmm0, %zmm04708; X86-NEXT:    vaddps %zmm0, %zmm1, %zmm04709; X86-NEXT:    retl4710  %res = call <16 x float> @llvm.x86.avx512.mask.getmant.ps.512(<16 x float> %x0, i32 11, <16 x float> %x2, i16 %x3, i32 4)4711  %res1 = call <16 x float> @llvm.x86.avx512.mask.getmant.ps.512(<16 x float> %x0, i32 11, <16 x float> %x2, i16 -1, i32 8)4712  %res2 = fadd <16 x float> %res, %res14713  ret <16 x float> %res24714}4715 4716declare <2 x double> @llvm.x86.avx512.mask.getmant.sd(<2 x double>, <2 x double>, i32, <2 x double>, i8, i32)4717 4718define <2 x double>@test_int_x86_avx512_mask_getmant_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3) {4719; X64-LABEL: test_int_x86_avx512_mask_getmant_sd:4720; X64:       # %bb.0:4721; X64-NEXT:    kmovw %edi, %k14722; X64-NEXT:    vmovapd %xmm2, %xmm34723; X64-NEXT:    vgetmantsd $11, %xmm1, %xmm0, %xmm3 {%k1}4724; X64-NEXT:    vgetmantsd $12, %xmm1, %xmm0, %xmm4 {%k1} {z}4725; X64-NEXT:    vaddpd %xmm4, %xmm3, %xmm34726; X64-NEXT:    vgetmantsd $13, {sae}, %xmm1, %xmm0, %xmm2 {%k1}4727; X64-NEXT:    vgetmantsd $14, %xmm1, %xmm0, %xmm04728; X64-NEXT:    vaddpd %xmm0, %xmm2, %xmm04729; X64-NEXT:    vaddpd %xmm0, %xmm3, %xmm04730; X64-NEXT:    retq4731;4732; X86-LABEL: test_int_x86_avx512_mask_getmant_sd:4733; X86:       # %bb.0:4734; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4735; X86-NEXT:    kmovw %eax, %k14736; X86-NEXT:    vmovapd %xmm2, %xmm34737; X86-NEXT:    vgetmantsd $11, %xmm1, %xmm0, %xmm3 {%k1}4738; X86-NEXT:    vgetmantsd $12, %xmm1, %xmm0, %xmm4 {%k1} {z}4739; X86-NEXT:    vaddpd %xmm4, %xmm3, %xmm34740; X86-NEXT:    vgetmantsd $13, {sae}, %xmm1, %xmm0, %xmm2 {%k1}4741; X86-NEXT:    vgetmantsd $14, %xmm1, %xmm0, %xmm04742; X86-NEXT:    vaddpd %xmm0, %xmm2, %xmm04743; X86-NEXT:    vaddpd %xmm0, %xmm3, %xmm04744; X86-NEXT:    retl4745  %res  = call <2 x double> @llvm.x86.avx512.mask.getmant.sd(<2 x double> %x0, <2 x double> %x1, i32 11, <2 x double> %x2, i8 %x3, i32 4)4746  %res1 = call <2 x double> @llvm.x86.avx512.mask.getmant.sd(<2 x double> %x0, <2 x double> %x1, i32 12, <2 x double> zeroinitializer, i8 %x3, i32 4)4747  %res2 = call <2 x double> @llvm.x86.avx512.mask.getmant.sd(<2 x double> %x0, <2 x double> %x1, i32 13, <2 x double> %x2, i8 %x3, i32 8)4748  %res3 = call <2 x double> @llvm.x86.avx512.mask.getmant.sd(<2 x double> %x0, <2 x double> %x1, i32 14, <2 x double> %x2, i8 -1, i32 4)4749  %res11 = fadd <2 x double> %res, %res14750  %res12 = fadd <2 x double> %res2, %res34751  %res13 = fadd <2 x double> %res11, %res124752  ret <2 x double> %res134753}4754 4755declare <4 x float> @llvm.x86.avx512.mask.getmant.ss(<4 x float>, <4 x float>, i32, <4 x float>, i8, i32)4756 4757define <4 x float>@test_int_x86_avx512_mask_getmant_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3) {4758; X64-LABEL: test_int_x86_avx512_mask_getmant_ss:4759; X64:       # %bb.0:4760; X64-NEXT:    kmovw %edi, %k14761; X64-NEXT:    vgetmantss $11, %xmm1, %xmm0, %xmm2 {%k1}4762; X64-NEXT:    vgetmantss $12, %xmm1, %xmm0, %xmm3 {%k1} {z}4763; X64-NEXT:    vaddps %xmm3, %xmm2, %xmm24764; X64-NEXT:    vgetmantss $13, {sae}, %xmm1, %xmm0, %xmm34765; X64-NEXT:    vgetmantss $14, %xmm1, %xmm0, %xmm04766; X64-NEXT:    vaddps %xmm0, %xmm3, %xmm04767; X64-NEXT:    vaddps %xmm0, %xmm2, %xmm04768; X64-NEXT:    retq4769;4770; X86-LABEL: test_int_x86_avx512_mask_getmant_ss:4771; X86:       # %bb.0:4772; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4773; X86-NEXT:    kmovw %eax, %k14774; X86-NEXT:    vgetmantss $11, %xmm1, %xmm0, %xmm2 {%k1}4775; X86-NEXT:    vgetmantss $12, %xmm1, %xmm0, %xmm3 {%k1} {z}4776; X86-NEXT:    vaddps %xmm3, %xmm2, %xmm24777; X86-NEXT:    vgetmantss $13, {sae}, %xmm1, %xmm0, %xmm34778; X86-NEXT:    vgetmantss $14, %xmm1, %xmm0, %xmm04779; X86-NEXT:    vaddps %xmm0, %xmm3, %xmm04780; X86-NEXT:    vaddps %xmm0, %xmm2, %xmm04781; X86-NEXT:    retl4782  %res  = call <4 x float> @llvm.x86.avx512.mask.getmant.ss(<4 x float> %x0, <4 x float> %x1, i32 11, <4 x float> %x2, i8 %x3, i32 4)4783  %res1 = call <4 x float> @llvm.x86.avx512.mask.getmant.ss(<4 x float> %x0, <4 x float> %x1, i32 12, <4 x float> zeroinitializer, i8 %x3, i32 4)4784  %res2 = call <4 x float> @llvm.x86.avx512.mask.getmant.ss(<4 x float> %x0, <4 x float> %x1, i32 13, <4 x float> %x2, i8 -1, i32 8)4785  %res3 = call <4 x float> @llvm.x86.avx512.mask.getmant.ss(<4 x float> %x0, <4 x float> %x1, i32 14, <4 x float> %x2, i8 -1, i32 4)4786  %res11 = fadd <4 x float> %res, %res14787  %res12 = fadd <4 x float> %res2, %res34788  %res13 = fadd <4 x float> %res11, %res124789  ret <4 x float> %res134790}4791 4792define <4 x float> @test_int_x86_avx512_mask_getmant_ss_load(<4 x float> %x0, ptr %x1p) {4793; X64-LABEL: test_int_x86_avx512_mask_getmant_ss_load:4794; X64:       # %bb.0:4795; X64-NEXT:    vgetmantss $11, (%rdi), %xmm0, %xmm04796; X64-NEXT:    retq4797;4798; X86-LABEL: test_int_x86_avx512_mask_getmant_ss_load:4799; X86:       # %bb.0:4800; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax4801; X86-NEXT:    vgetmantss $11, (%eax), %xmm0, %xmm04802; X86-NEXT:    retl4803  %x1 = load <4 x float>, ptr %x1p4804  %res = call <4 x float> @llvm.x86.avx512.mask.getmant.ss(<4 x float> %x0, <4 x float> %x1, i32 11, <4 x float> undef, i8 -1, i32 4)4805  ret <4 x float> %res4806}4807 4808declare <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double>, <8 x i64>)4809 4810define <8 x double>@test_int_x86_avx512_vpermilvar_pd_512(<8 x double> %x0, <8 x i64> %x1) {4811; CHECK-LABEL: test_int_x86_avx512_vpermilvar_pd_512:4812; CHECK:       # %bb.0:4813; CHECK-NEXT:    vpermilpd %zmm1, %zmm0, %zmm04814; CHECK-NEXT:    ret{{[l|q]}}4815  %res = call <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double> %x0, <8 x i64> %x1)4816  ret <8 x double> %res4817}4818 4819define <8 x double>@test_int_x86_avx512_vpermilvar_pd_512_mask(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %mask) {4820; X64-LABEL: test_int_x86_avx512_vpermilvar_pd_512_mask:4821; X64:       # %bb.0:4822; X64-NEXT:    kmovw %edi, %k14823; X64-NEXT:    vpermilpd %zmm1, %zmm0, %zmm2 {%k1}4824; X64-NEXT:    vmovapd %zmm2, %zmm04825; X64-NEXT:    retq4826;4827; X86-LABEL: test_int_x86_avx512_vpermilvar_pd_512_mask:4828; X86:       # %bb.0:4829; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4830; X86-NEXT:    kmovw %eax, %k14831; X86-NEXT:    vpermilpd %zmm1, %zmm0, %zmm2 {%k1}4832; X86-NEXT:    vmovapd %zmm2, %zmm04833; X86-NEXT:    retl4834  %res = call <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double> %x0, <8 x i64> %x1)4835  %mask.cast = bitcast i8 %mask to <8 x i1>4836  %res2 = select <8 x i1> %mask.cast, <8 x double> %res, <8 x double> %x24837  ret <8 x double> %res24838}4839 4840define <8 x double>@test_int_x86_avx512_vpermilvar_pd_512_maskz(<8 x double> %x0, <8 x i64> %x1, i8 %mask) {4841; X64-LABEL: test_int_x86_avx512_vpermilvar_pd_512_maskz:4842; X64:       # %bb.0:4843; X64-NEXT:    kmovw %edi, %k14844; X64-NEXT:    vpermilpd %zmm1, %zmm0, %zmm0 {%k1} {z}4845; X64-NEXT:    retq4846;4847; X86-LABEL: test_int_x86_avx512_vpermilvar_pd_512_maskz:4848; X86:       # %bb.0:4849; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4850; X86-NEXT:    kmovw %eax, %k14851; X86-NEXT:    vpermilpd %zmm1, %zmm0, %zmm0 {%k1} {z}4852; X86-NEXT:    retl4853  %res = call <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double> %x0, <8 x i64> %x1)4854  %mask.cast = bitcast i8 %mask to <8 x i1>4855  %res2 = select <8 x i1> %mask.cast, <8 x double> %res, <8 x double> zeroinitializer4856  ret <8 x double> %res24857}4858 4859declare <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float>, <16 x i32>)4860 4861define <16 x float>@test_int_x86_avx512_vpermilvar_ps_512(<16 x float> %x0, <16 x i32> %x1) {4862; CHECK-LABEL: test_int_x86_avx512_vpermilvar_ps_512:4863; CHECK:       # %bb.0:4864; CHECK-NEXT:    vpermilps %zmm1, %zmm0, %zmm04865; CHECK-NEXT:    ret{{[l|q]}}4866  %res = call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> %x1)4867  ret <16 x float> %res4868}4869 4870define <16 x float>@test_int_x86_avx512_vpermilvar_ps_512_mask(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %mask) {4871; X64-LABEL: test_int_x86_avx512_vpermilvar_ps_512_mask:4872; X64:       # %bb.0:4873; X64-NEXT:    kmovw %edi, %k14874; X64-NEXT:    vpermilps %zmm1, %zmm0, %zmm2 {%k1}4875; X64-NEXT:    vmovaps %zmm2, %zmm04876; X64-NEXT:    retq4877;4878; X86-LABEL: test_int_x86_avx512_vpermilvar_ps_512_mask:4879; X86:       # %bb.0:4880; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k14881; X86-NEXT:    vpermilps %zmm1, %zmm0, %zmm2 {%k1}4882; X86-NEXT:    vmovaps %zmm2, %zmm04883; X86-NEXT:    retl4884  %res = call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> %x1)4885  %mask.cast = bitcast i16 %mask to <16 x i1>4886  %res2 = select <16 x i1> %mask.cast, <16 x float> %res, <16 x float> %x24887  ret <16 x float> %res24888}4889 4890define <16 x float>@test_int_x86_avx512_vpermilvar_ps_512_maskz(<16 x float> %x0, <16 x i32> %x1, i16 %mask) {4891; X64-LABEL: test_int_x86_avx512_vpermilvar_ps_512_maskz:4892; X64:       # %bb.0:4893; X64-NEXT:    kmovw %edi, %k14894; X64-NEXT:    vpermilps %zmm1, %zmm0, %zmm0 {%k1} {z}4895; X64-NEXT:    retq4896;4897; X86-LABEL: test_int_x86_avx512_vpermilvar_ps_512_maskz:4898; X86:       # %bb.0:4899; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k14900; X86-NEXT:    vpermilps %zmm1, %zmm0, %zmm0 {%k1} {z}4901; X86-NEXT:    retl4902  %res = call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> %x1)4903  %mask.cast = bitcast i16 %mask to <16 x i1>4904  %res2 = select <16 x i1> %mask.cast, <16 x float> %res, <16 x float> zeroinitializer4905  ret <16 x float> %res24906}4907 4908; Test case to make sure we can print shuffle decode comments for constant pool loads.4909define <16 x float>@test_int_x86_avx512_vpermilvar_ps_512_constant_pool(<16 x float> %x0, <16 x i32> %x1) {4910; CHECK-LABEL: test_int_x86_avx512_vpermilvar_ps_512_constant_pool:4911; CHECK:       # %bb.0:4912; CHECK-NEXT:    vpermilps {{.*#+}} zmm0 = zmm0[1,0,3,2,4,5,6,7,10,11,8,9,14,15,13,12]4913; CHECK-NEXT:    ret{{[l|q]}}4914  %res = call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 1, i32 0>)4915  ret <16 x float> %res4916}4917 4918define <16 x float>@test_int_x86_avx512_vpermilvar_ps_512_constant_pool_mask(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %mask) {4919; X64-LABEL: test_int_x86_avx512_vpermilvar_ps_512_constant_pool_mask:4920; X64:       # %bb.0:4921; X64-NEXT:    kmovw %edi, %k14922; X64-NEXT:    vpermilps {{.*#+}} zmm2 {%k1} = zmm0[1,0,3,2,4,5,6,7,10,11,8,9,14,15,13,12]4923; X64-NEXT:    vmovaps %zmm2, %zmm04924; X64-NEXT:    retq4925;4926; X86-LABEL: test_int_x86_avx512_vpermilvar_ps_512_constant_pool_mask:4927; X86:       # %bb.0:4928; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k14929; X86-NEXT:    vpermilps {{.*#+}} zmm2 {%k1} = zmm0[1,0,3,2,4,5,6,7,10,11,8,9,14,15,13,12]4930; X86-NEXT:    vmovaps %zmm2, %zmm04931; X86-NEXT:    retl4932  %res = call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 1, i32 0>)4933  %mask.cast = bitcast i16 %mask to <16 x i1>4934  %res2 = select <16 x i1> %mask.cast, <16 x float> %res, <16 x float> %x24935  ret <16 x float> %res24936}4937 4938define <16 x float>@test_int_x86_avx512_vpermilvar_ps_512_constant_pool_maskz(<16 x float> %x0, <16 x i32> %x1, i16 %mask) {4939; X64-LABEL: test_int_x86_avx512_vpermilvar_ps_512_constant_pool_maskz:4940; X64:       # %bb.0:4941; X64-NEXT:    kmovw %edi, %k14942; X64-NEXT:    vpermilps {{.*#+}} zmm0 {%k1} {z} = zmm0[1,0,3,2,4,5,6,7,10,11,8,9,14,15,13,12]4943; X64-NEXT:    retq4944;4945; X86-LABEL: test_int_x86_avx512_vpermilvar_ps_512_constant_pool_maskz:4946; X86:       # %bb.0:4947; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k14948; X86-NEXT:    vpermilps {{.*#+}} zmm0 {%k1} {z} = zmm0[1,0,3,2,4,5,6,7,10,11,8,9,14,15,13,12]4949; X86-NEXT:    retl4950  %res = call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 1, i32 0>)4951  %mask.cast = bitcast i16 %mask to <16 x i1>4952  %res2 = select <16 x i1> %mask.cast, <16 x float> %res, <16 x float> zeroinitializer4953  ret <16 x float> %res24954}4955 4956declare <2 x double> @llvm.x86.avx512.mask.cvtss2sd.round(<2 x double>, <4 x float>, <2 x double>, i8, i32)4957 4958define <2 x double>@test_int_x86_avx512_mask_cvt_ss2sd_round(<2 x double> %x0,<4 x float> %x1, <2 x double> %x2, i8 %x3) {4959; X64-LABEL: test_int_x86_avx512_mask_cvt_ss2sd_round:4960; X64:       # %bb.0:4961; X64-NEXT:    kmovw %edi, %k14962; X64-NEXT:    vcvtss2sd %xmm1, %xmm0, %xmm2 {%k1}4963; X64-NEXT:    vcvtss2sd {sae}, %xmm1, %xmm0, %xmm04964; X64-NEXT:    vaddpd %xmm0, %xmm2, %xmm04965; X64-NEXT:    retq4966;4967; X86-LABEL: test_int_x86_avx512_mask_cvt_ss2sd_round:4968; X86:       # %bb.0:4969; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4970; X86-NEXT:    kmovw %eax, %k14971; X86-NEXT:    vcvtss2sd %xmm1, %xmm0, %xmm2 {%k1}4972; X86-NEXT:    vcvtss2sd {sae}, %xmm1, %xmm0, %xmm04973; X86-NEXT:    vaddpd %xmm0, %xmm2, %xmm04974; X86-NEXT:    retl4975  %res = call <2 x double> @llvm.x86.avx512.mask.cvtss2sd.round(<2 x double> %x0, <4 x float> %x1, <2 x double> %x2, i8 %x3, i32 4)4976  %res1 = call <2 x double> @llvm.x86.avx512.mask.cvtss2sd.round(<2 x double> %x0, <4 x float> %x1, <2 x double> %x2, i8 -1, i32 8)4977  %res2 = fadd <2 x double> %res, %res14978  ret <2 x double> %res24979}4980 4981declare <4 x float> @llvm.x86.avx512.mask.cvtsd2ss.round(<4 x float>, <2 x double>, <4 x float>, i8, i32)4982 4983define <4 x float>@test_int_x86_avx512_mask_cvt_sd2ss_round(<4 x float> %x0,<2 x double> %x1, <4 x float> %x2, i8 %x3) {4984; X64-LABEL: test_int_x86_avx512_mask_cvt_sd2ss_round:4985; X64:       # %bb.0:4986; X64-NEXT:    kmovw %edi, %k14987; X64-NEXT:    vcvtsd2ss {rz-sae}, %xmm1, %xmm0, %xmm2 {%k1}4988; X64-NEXT:    vcvtsd2ss {rn-sae}, %xmm1, %xmm0, %xmm04989; X64-NEXT:    vaddps %xmm0, %xmm2, %xmm04990; X64-NEXT:    retq4991;4992; X86-LABEL: test_int_x86_avx512_mask_cvt_sd2ss_round:4993; X86:       # %bb.0:4994; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax4995; X86-NEXT:    kmovw %eax, %k14996; X86-NEXT:    vcvtsd2ss {rz-sae}, %xmm1, %xmm0, %xmm2 {%k1}4997; X86-NEXT:    vcvtsd2ss {rn-sae}, %xmm1, %xmm0, %xmm04998; X86-NEXT:    vaddps %xmm0, %xmm2, %xmm04999; X86-NEXT:    retl5000  %res = call <4 x float> @llvm.x86.avx512.mask.cvtsd2ss.round(<4 x float> %x0, <2 x double> %x1, <4 x float> %x2, i8 %x3, i32 11)5001  %res1 = call <4 x float> @llvm.x86.avx512.mask.cvtsd2ss.round(<4 x float> %x0, <2 x double> %x1, <4 x float> %x2, i8 -1, i32 8)5002  %res2 = fadd <4 x float> %res, %res15003  ret <4 x float> %res25004}5005 5006declare <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i32)5007 5008define <16 x i32>@test_int_x86_avx512_pternlog_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {5009; CHECK-LABEL: test_int_x86_avx512_pternlog_d_512:5010; CHECK:       # %bb.0:5011; CHECK-NEXT:    vpternlogd {{.*#+}} zmm0 = ~(zmm1 | (zmm0 ^ zmm2))5012; CHECK-NEXT:    ret{{[l|q]}}5013  %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 33)5014  ret <16 x i32> %15015}5016 5017define <16 x i32>@test_int_x86_avx512_mask_pternlog_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x4) {5018; X64-LABEL: test_int_x86_avx512_mask_pternlog_d_512:5019; X64:       # %bb.0:5020; X64-NEXT:    kmovw %edi, %k15021; X64-NEXT:    vpternlogd {{.*#+}} zmm0 {%k1} = ~(zmm1 | (zmm0 ^ zmm2))5022; X64-NEXT:    retq5023;5024; X86-LABEL: test_int_x86_avx512_mask_pternlog_d_512:5025; X86:       # %bb.0:5026; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k15027; X86-NEXT:    vpternlogd {{.*#+}} zmm0 {%k1} = ~(zmm1 | (zmm0 ^ zmm2))5028; X86-NEXT:    retl5029  %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 33)5030  %2 = bitcast i16 %x4 to <16 x i1>5031  %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x05032  ret <16 x i32> %35033}5034 5035define <16 x i32>@test_int_x86_avx512_maskz_pternlog_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x4) {5036; X64-LABEL: test_int_x86_avx512_maskz_pternlog_d_512:5037; X64:       # %bb.0:5038; X64-NEXT:    kmovw %edi, %k15039; X64-NEXT:    vpternlogd {{.*#+}} zmm0 {%k1} {z} = ~(zmm1 | (zmm0 ^ zmm2))5040; X64-NEXT:    retq5041;5042; X86-LABEL: test_int_x86_avx512_maskz_pternlog_d_512:5043; X86:       # %bb.0:5044; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k15045; X86-NEXT:    vpternlogd {{.*#+}} zmm0 {%k1} {z} = ~(zmm1 | (zmm0 ^ zmm2))5046; X86-NEXT:    retl5047  %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 33)5048  %2 = bitcast i16 %x4 to <16 x i1>5049  %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer5050  ret <16 x i32> %35051}5052 5053declare <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i32)5054 5055define <8 x i64>@test_int_x86_avx512_pternlog_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) {5056; CHECK-LABEL: test_int_x86_avx512_pternlog_q_512:5057; CHECK:       # %bb.0:5058; CHECK-NEXT:    vpternlogq {{.*#+}} zmm0 = ~(zmm1 | (zmm0 ^ zmm2))5059; CHECK-NEXT:    ret{{[l|q]}}5060  %1 = call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i32 33)5061  ret <8 x i64> %15062}5063 5064define <8 x i64>@test_int_x86_avx512_mask_pternlog_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x4) {5065; X64-LABEL: test_int_x86_avx512_mask_pternlog_q_512:5066; X64:       # %bb.0:5067; X64-NEXT:    kmovw %edi, %k15068; X64-NEXT:    vpternlogq {{.*#+}} zmm0 {%k1} = ~(zmm1 | (zmm0 ^ zmm2))5069; X64-NEXT:    retq5070;5071; X86-LABEL: test_int_x86_avx512_mask_pternlog_q_512:5072; X86:       # %bb.0:5073; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax5074; X86-NEXT:    kmovw %eax, %k15075; X86-NEXT:    vpternlogq {{.*#+}} zmm0 {%k1} = ~(zmm1 | (zmm0 ^ zmm2))5076; X86-NEXT:    retl5077  %1 = call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i32 33)5078  %2 = bitcast i8 %x4 to <8 x i1>5079  %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %x05080  ret <8 x i64> %35081}5082 5083define <8 x i64>@test_int_x86_avx512_maskz_pternlog_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x4) {5084; X64-LABEL: test_int_x86_avx512_maskz_pternlog_q_512:5085; X64:       # %bb.0:5086; X64-NEXT:    kmovw %edi, %k15087; X64-NEXT:    vpternlogq {{.*#+}} zmm0 {%k1} {z} = ~(zmm1 | (zmm0 ^ zmm2))5088; X64-NEXT:    retq5089;5090; X86-LABEL: test_int_x86_avx512_maskz_pternlog_q_512:5091; X86:       # %bb.0:5092; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax5093; X86-NEXT:    kmovw %eax, %k15094; X86-NEXT:    vpternlogq {{.*#+}} zmm0 {%k1} {z} = ~(zmm1 | (zmm0 ^ zmm2))5095; X86-NEXT:    retl5096  %1 = call <8 x i64> @llvm.x86.avx512.pternlog.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i32 33)5097  %2 = bitcast i8 %x4 to <8 x i1>5098  %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> zeroinitializer5099  ret <8 x i64> %35100}5101 5102define i32 @test_x86_avx512_comi_sd_eq_sae(<2 x double> %a0, <2 x double> %a1) {5103; CHECK-LABEL: test_x86_avx512_comi_sd_eq_sae:5104; CHECK:       # %bb.0:5105; CHECK-NEXT:    vcmpeqsd {sae}, %xmm1, %xmm0, %k05106; CHECK-NEXT:    kmovw %k0, %eax5107; CHECK-NEXT:    ret{{[l|q]}}5108  %res = call i32 @llvm.x86.avx512.vcomi.sd(<2 x double> %a0, <2 x double> %a1, i32 0, i32 8)5109  ret i32 %res5110}5111 5112define i32 @test_x86_avx512_ucomi_sd_eq_sae(<2 x double> %a0, <2 x double> %a1) {5113; CHECK-LABEL: test_x86_avx512_ucomi_sd_eq_sae:5114; CHECK:       # %bb.0:5115; CHECK-NEXT:    vcmpeq_uqsd {sae}, %xmm1, %xmm0, %k05116; CHECK-NEXT:    kmovw %k0, %eax5117; CHECK-NEXT:    ret{{[l|q]}}5118  %res = call i32 @llvm.x86.avx512.vcomi.sd(<2 x double> %a0, <2 x double> %a1, i32 8, i32 8)5119  ret i32 %res5120}5121 5122define i32 @test_x86_avx512_comi_sd_eq(<2 x double> %a0, <2 x double> %a1) {5123; CHECK-LABEL: test_x86_avx512_comi_sd_eq:5124; CHECK:       # %bb.0:5125; CHECK-NEXT:    vcmpeqsd %xmm1, %xmm0, %k05126; CHECK-NEXT:    kmovw %k0, %eax5127; CHECK-NEXT:    ret{{[l|q]}}5128  %res = call i32 @llvm.x86.avx512.vcomi.sd(<2 x double> %a0, <2 x double> %a1, i32 0, i32 4)5129  ret i32 %res5130}5131 5132define i32 @test_x86_avx512_ucomi_sd_eq(<2 x double> %a0, <2 x double> %a1) {5133; CHECK-LABEL: test_x86_avx512_ucomi_sd_eq:5134; CHECK:       # %bb.0:5135; CHECK-NEXT:    vcmpeq_uqsd %xmm1, %xmm0, %k05136; CHECK-NEXT:    kmovw %k0, %eax5137; CHECK-NEXT:    ret{{[l|q]}}5138  %res = call i32 @llvm.x86.avx512.vcomi.sd(<2 x double> %a0, <2 x double> %a1, i32 8, i32 4)5139  ret i32 %res5140}5141 5142define i32 @test_x86_avx512_comi_sd_lt_sae(<2 x double> %a0, <2 x double> %a1) {5143; CHECK-LABEL: test_x86_avx512_comi_sd_lt_sae:5144; CHECK:       # %bb.0:5145; CHECK-NEXT:    vcmpltsd {sae}, %xmm1, %xmm0, %k05146; CHECK-NEXT:    kmovw %k0, %eax5147; CHECK-NEXT:    ret{{[l|q]}}5148  %res = call i32 @llvm.x86.avx512.vcomi.sd(<2 x double> %a0, <2 x double> %a1, i32 1, i32 8)5149  ret i32 %res5150}5151 5152define i32 @test_x86_avx512_ucomi_sd_lt_sae(<2 x double> %a0, <2 x double> %a1) {5153; CHECK-LABEL: test_x86_avx512_ucomi_sd_lt_sae:5154; CHECK:       # %bb.0:5155; CHECK-NEXT:    vcmpngesd {sae}, %xmm1, %xmm0, %k05156; CHECK-NEXT:    kmovw %k0, %eax5157; CHECK-NEXT:    ret{{[l|q]}}5158  %res = call i32 @llvm.x86.avx512.vcomi.sd(<2 x double> %a0, <2 x double> %a1, i32 9, i32 8)5159  ret i32 %res5160}5161 5162define i32 @test_x86_avx512_comi_sd_lt(<2 x double> %a0, <2 x double> %a1) {5163; CHECK-LABEL: test_x86_avx512_comi_sd_lt:5164; CHECK:       # %bb.0:5165; CHECK-NEXT:    vcmpltsd %xmm1, %xmm0, %k05166; CHECK-NEXT:    kmovw %k0, %eax5167; CHECK-NEXT:    ret{{[l|q]}}5168  %res = call i32 @llvm.x86.avx512.vcomi.sd(<2 x double> %a0, <2 x double> %a1, i32 1, i32 4)5169  ret i32 %res5170}5171 5172define i32 @test_x86_avx512_ucomi_sd_lt(<2 x double> %a0, <2 x double> %a1) {5173; CHECK-LABEL: test_x86_avx512_ucomi_sd_lt:5174; CHECK:       # %bb.0:5175; CHECK-NEXT:    vcmpngesd %xmm1, %xmm0, %k05176; CHECK-NEXT:    kmovw %k0, %eax5177; CHECK-NEXT:    ret{{[l|q]}}5178  %res = call i32 @llvm.x86.avx512.vcomi.sd(<2 x double> %a0, <2 x double> %a1, i32 9, i32 4)5179  ret i32 %res5180}5181 5182declare i32 @llvm.x86.avx512.vcomi.sd(<2 x double>, <2 x double>, i32, i32)5183 5184define i32 @test_x86_avx512_ucomi_ss_lt(<4 x float> %a0, <4 x float> %a1) {5185; CHECK-LABEL: test_x86_avx512_ucomi_ss_lt:5186; CHECK:       # %bb.0:5187; CHECK-NEXT:    vcmpngess %xmm1, %xmm0, %k05188; CHECK-NEXT:    kmovw %k0, %eax5189; CHECK-NEXT:    ret{{[l|q]}}5190  %res = call i32 @llvm.x86.avx512.vcomi.ss(<4 x float> %a0, <4 x float> %a1, i32 9, i32 4)5191  ret i32 %res5192}5193 5194declare i32 @llvm.x86.avx512.vcomi.ss(<4 x float>, <4 x float>, i32, i32)5195 5196declare <8 x double> @llvm.x86.avx512.permvar.df.512(<8 x double>, <8 x i64>)5197 5198define <8 x double>@test_int_x86_avx512_permvar_df_512(<8 x double> %x0, <8 x i64> %x1) {5199; CHECK-LABEL: test_int_x86_avx512_permvar_df_512:5200; CHECK:       # %bb.0:5201; CHECK-NEXT:    vpermpd %zmm0, %zmm1, %zmm05202; CHECK-NEXT:    ret{{[l|q]}}5203  %1 = call <8 x double> @llvm.x86.avx512.permvar.df.512(<8 x double> %x0, <8 x i64> %x1)5204  ret <8 x double> %15205}5206 5207define <8 x double>@test_int_x86_avx512_mask_permvar_df_512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %x3) {5208; X64-LABEL: test_int_x86_avx512_mask_permvar_df_512:5209; X64:       # %bb.0:5210; X64-NEXT:    kmovw %edi, %k15211; X64-NEXT:    vpermpd %zmm0, %zmm1, %zmm2 {%k1}5212; X64-NEXT:    vmovapd %zmm2, %zmm05213; X64-NEXT:    retq5214;5215; X86-LABEL: test_int_x86_avx512_mask_permvar_df_512:5216; X86:       # %bb.0:5217; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax5218; X86-NEXT:    kmovw %eax, %k15219; X86-NEXT:    vpermpd %zmm0, %zmm1, %zmm2 {%k1}5220; X86-NEXT:    vmovapd %zmm2, %zmm05221; X86-NEXT:    retl5222  %1 = call <8 x double> @llvm.x86.avx512.permvar.df.512(<8 x double> %x0, <8 x i64> %x1)5223  %2 = bitcast i8 %x3 to <8 x i1>5224  %3 = select <8 x i1> %2, <8 x double> %1, <8 x double> %x25225  ret <8 x double> %35226}5227 5228define <8 x double>@test_int_x86_avx512_maskz_permvar_df_512(<8 x double> %x0, <8 x i64> %x1, i8 %x3) {5229; X64-LABEL: test_int_x86_avx512_maskz_permvar_df_512:5230; X64:       # %bb.0:5231; X64-NEXT:    kmovw %edi, %k15232; X64-NEXT:    vpermpd %zmm0, %zmm1, %zmm0 {%k1} {z}5233; X64-NEXT:    retq5234;5235; X86-LABEL: test_int_x86_avx512_maskz_permvar_df_512:5236; X86:       # %bb.0:5237; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax5238; X86-NEXT:    kmovw %eax, %k15239; X86-NEXT:    vpermpd %zmm0, %zmm1, %zmm0 {%k1} {z}5240; X86-NEXT:    retl5241  %1 = call <8 x double> @llvm.x86.avx512.permvar.df.512(<8 x double> %x0, <8 x i64> %x1)5242  %2 = bitcast i8 %x3 to <8 x i1>5243  %3 = select <8 x i1> %2, <8 x double> %1, <8 x double> zeroinitializer5244  ret <8 x double> %35245}5246 5247declare <8 x i64> @llvm.x86.avx512.permvar.di.512(<8 x i64>, <8 x i64>)5248 5249define <8 x i64>@test_int_x86_avx512_permvar_di_512(<8 x i64> %x0, <8 x i64> %x1) {5250; CHECK-LABEL: test_int_x86_avx512_permvar_di_512:5251; CHECK:       # %bb.0:5252; CHECK-NEXT:    vpermpd %zmm0, %zmm1, %zmm05253; CHECK-NEXT:    ret{{[l|q]}}5254  %1 = call <8 x i64> @llvm.x86.avx512.permvar.di.512(<8 x i64> %x0, <8 x i64> %x1)5255  ret <8 x i64> %15256}5257 5258define <8 x i64>@test_int_x86_avx512_mask_permvar_di_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {5259; X64-LABEL: test_int_x86_avx512_mask_permvar_di_512:5260; X64:       # %bb.0:5261; X64-NEXT:    kmovw %edi, %k15262; X64-NEXT:    vpermq %zmm0, %zmm1, %zmm2 {%k1}5263; X64-NEXT:    vmovdqa64 %zmm2, %zmm05264; X64-NEXT:    retq5265;5266; X86-LABEL: test_int_x86_avx512_mask_permvar_di_512:5267; X86:       # %bb.0:5268; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax5269; X86-NEXT:    kmovw %eax, %k15270; X86-NEXT:    vpermq %zmm0, %zmm1, %zmm2 {%k1}5271; X86-NEXT:    vmovdqa64 %zmm2, %zmm05272; X86-NEXT:    retl5273  %1 = call <8 x i64> @llvm.x86.avx512.permvar.di.512(<8 x i64> %x0, <8 x i64> %x1)5274  %2 = bitcast i8 %x3 to <8 x i1>5275  %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %x25276  ret <8 x i64> %35277}5278 5279define <8 x i64>@test_int_x86_avx512_maskz_permvar_di_512(<8 x i64> %x0, <8 x i64> %x1, i8 %x3) {5280; X64-LABEL: test_int_x86_avx512_maskz_permvar_di_512:5281; X64:       # %bb.0:5282; X64-NEXT:    kmovw %edi, %k15283; X64-NEXT:    vpermq %zmm0, %zmm1, %zmm0 {%k1} {z}5284; X64-NEXT:    retq5285;5286; X86-LABEL: test_int_x86_avx512_maskz_permvar_di_512:5287; X86:       # %bb.0:5288; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax5289; X86-NEXT:    kmovw %eax, %k15290; X86-NEXT:    vpermq %zmm0, %zmm1, %zmm0 {%k1} {z}5291; X86-NEXT:    retl5292  %1 = call <8 x i64> @llvm.x86.avx512.permvar.di.512(<8 x i64> %x0, <8 x i64> %x1)5293  %2 = bitcast i8 %x3 to <8 x i1>5294  %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> zeroinitializer5295  ret <8 x i64> %35296}5297 5298declare <16 x float> @llvm.x86.avx512.permvar.sf.512(<16 x float>, <16 x i32>)5299 5300define <16 x float>@test_int_x86_avx512_permvar_sf_512(<16 x float> %x0, <16 x i32> %x1) {5301; CHECK-LABEL: test_int_x86_avx512_permvar_sf_512:5302; CHECK:       # %bb.0:5303; CHECK-NEXT:    vpermps %zmm0, %zmm1, %zmm05304; CHECK-NEXT:    ret{{[l|q]}}5305  %1 = call <16 x float> @llvm.x86.avx512.permvar.sf.512(<16 x float> %x0, <16 x i32> %x1)5306  ret <16 x float> %15307}5308 5309define <16 x float>@test_int_x86_avx512_mask_permvar_sf_512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %x3) {5310; X64-LABEL: test_int_x86_avx512_mask_permvar_sf_512:5311; X64:       # %bb.0:5312; X64-NEXT:    kmovw %edi, %k15313; X64-NEXT:    vpermps %zmm0, %zmm1, %zmm2 {%k1}5314; X64-NEXT:    vmovaps %zmm2, %zmm05315; X64-NEXT:    retq5316;5317; X86-LABEL: test_int_x86_avx512_mask_permvar_sf_512:5318; X86:       # %bb.0:5319; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k15320; X86-NEXT:    vpermps %zmm0, %zmm1, %zmm2 {%k1}5321; X86-NEXT:    vmovaps %zmm2, %zmm05322; X86-NEXT:    retl5323  %1 = call <16 x float> @llvm.x86.avx512.permvar.sf.512(<16 x float> %x0, <16 x i32> %x1)5324  %2 = bitcast i16 %x3 to <16 x i1>5325  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %x25326  ret <16 x float> %35327}5328 5329define <16 x float>@test_int_x86_avx512_maskz_permvar_sf_512(<16 x float> %x0, <16 x i32> %x1, i16 %x3) {5330; X64-LABEL: test_int_x86_avx512_maskz_permvar_sf_512:5331; X64:       # %bb.0:5332; X64-NEXT:    kmovw %edi, %k15333; X64-NEXT:    vpermps %zmm0, %zmm1, %zmm0 {%k1} {z}5334; X64-NEXT:    retq5335;5336; X86-LABEL: test_int_x86_avx512_maskz_permvar_sf_512:5337; X86:       # %bb.0:5338; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k15339; X86-NEXT:    vpermps %zmm0, %zmm1, %zmm0 {%k1} {z}5340; X86-NEXT:    retl5341  %1 = call <16 x float> @llvm.x86.avx512.permvar.sf.512(<16 x float> %x0, <16 x i32> %x1)5342  %2 = bitcast i16 %x3 to <16 x i1>5343  %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> zeroinitializer5344  ret <16 x float> %35345}5346 5347declare <16 x i32> @llvm.x86.avx512.permvar.si.512(<16 x i32>, <16 x i32>)5348 5349define <16 x i32>@test_int_x86_avx512_permvar_si_512(<16 x i32> %x0, <16 x i32> %x1) {5350; CHECK-LABEL: test_int_x86_avx512_permvar_si_512:5351; CHECK:       # %bb.0:5352; CHECK-NEXT:    vpermps %zmm0, %zmm1, %zmm05353; CHECK-NEXT:    ret{{[l|q]}}5354  %1 = call <16 x i32> @llvm.x86.avx512.permvar.si.512(<16 x i32> %x0, <16 x i32> %x1)5355  ret <16 x i32> %15356}5357 5358define <16 x i32>@test_int_x86_avx512_mask_permvar_si_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {5359; X64-LABEL: test_int_x86_avx512_mask_permvar_si_512:5360; X64:       # %bb.0:5361; X64-NEXT:    kmovw %edi, %k15362; X64-NEXT:    vpermd %zmm0, %zmm1, %zmm2 {%k1}5363; X64-NEXT:    vmovdqa64 %zmm2, %zmm05364; X64-NEXT:    retq5365;5366; X86-LABEL: test_int_x86_avx512_mask_permvar_si_512:5367; X86:       # %bb.0:5368; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k15369; X86-NEXT:    vpermd %zmm0, %zmm1, %zmm2 {%k1}5370; X86-NEXT:    vmovdqa64 %zmm2, %zmm05371; X86-NEXT:    retl5372  %1 = call <16 x i32> @llvm.x86.avx512.permvar.si.512(<16 x i32> %x0, <16 x i32> %x1)5373  %2 = bitcast i16 %x3 to <16 x i1>5374  %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x25375  ret <16 x i32> %35376}5377 5378define <16 x i32>@test_int_x86_avx512_maskz_permvar_si_512(<16 x i32> %x0, <16 x i32> %x1, i16 %x3) {5379; X64-LABEL: test_int_x86_avx512_maskz_permvar_si_512:5380; X64:       # %bb.0:5381; X64-NEXT:    kmovw %edi, %k15382; X64-NEXT:    vpermd %zmm0, %zmm1, %zmm0 {%k1} {z}5383; X64-NEXT:    retq5384;5385; X86-LABEL: test_int_x86_avx512_maskz_permvar_si_512:5386; X86:       # %bb.0:5387; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k15388; X86-NEXT:    vpermd %zmm0, %zmm1, %zmm0 {%k1} {z}5389; X86-NEXT:    retl5390  %1 = call <16 x i32> @llvm.x86.avx512.permvar.si.512(<16 x i32> %x0, <16 x i32> %x1)5391  %2 = bitcast i16 %x3 to <16 x i1>5392  %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer5393  ret <16 x i32> %35394}5395 5396declare <8 x double> @llvm.x86.avx512.mask.fixupimm.pd.512(<8 x double>, <8 x double>, <8 x i64>, i32, i8, i32)5397 5398define <8 x double>@test_int_x86_avx512_mask_fixupimm_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x i64> %x2, i8 %x4) {5399; X64-LABEL: test_int_x86_avx512_mask_fixupimm_pd_512:5400; X64:       # %bb.0:5401; X64-NEXT:    kmovw %edi, %k15402; X64-NEXT:    vmovapd %zmm0, %zmm35403; X64-NEXT:    vfixupimmpd $4, %zmm2, %zmm1, %zmm3 {%k1}5404; X64-NEXT:    vxorpd %xmm4, %xmm4, %xmm45405; X64-NEXT:    vfixupimmpd $5, %zmm2, %zmm1, %zmm4 {%k1} {z}5406; X64-NEXT:    vaddpd %zmm4, %zmm3, %zmm35407; X64-NEXT:    vfixupimmpd $3, {sae}, %zmm2, %zmm1, %zmm05408; X64-NEXT:    vaddpd %zmm0, %zmm3, %zmm05409; X64-NEXT:    retq5410;5411; X86-LABEL: test_int_x86_avx512_mask_fixupimm_pd_512:5412; X86:       # %bb.0:5413; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax5414; X86-NEXT:    kmovw %eax, %k15415; X86-NEXT:    vmovapd %zmm0, %zmm35416; X86-NEXT:    vfixupimmpd $4, %zmm2, %zmm1, %zmm3 {%k1}5417; X86-NEXT:    vxorpd %xmm4, %xmm4, %xmm45418; X86-NEXT:    vfixupimmpd $5, %zmm2, %zmm1, %zmm4 {%k1} {z}5419; X86-NEXT:    vaddpd %zmm4, %zmm3, %zmm35420; X86-NEXT:    vfixupimmpd $3, {sae}, %zmm2, %zmm1, %zmm05421; X86-NEXT:    vaddpd %zmm0, %zmm3, %zmm05422; X86-NEXT:    retl5423  %res = call <8 x double> @llvm.x86.avx512.mask.fixupimm.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x i64> %x2, i32 4, i8 %x4, i32 4)5424  %res1 = call <8 x double> @llvm.x86.avx512.mask.fixupimm.pd.512(<8 x double> zeroinitializer, <8 x double> %x1, <8 x i64> %x2, i32 5, i8 %x4, i32 4)5425  %res2 = call <8 x double> @llvm.x86.avx512.mask.fixupimm.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x i64> %x2, i32 3, i8 -1, i32 8)5426  %res3 = fadd <8 x double> %res, %res15427  %res4 = fadd <8 x double> %res3, %res25428  ret <8 x double> %res45429}5430 5431define <8 x double>@test_int_x86_avx512_mask_fixupimm_pd_512_load(<8 x double> %x0, <8 x double> %x1, ptr %x2ptr) {5432; X64-LABEL: test_int_x86_avx512_mask_fixupimm_pd_512_load:5433; X64:       # %bb.0:5434; X64-NEXT:    vfixupimmpd $3, (%rdi), %zmm1, %zmm05435; X64-NEXT:    retq5436;5437; X86-LABEL: test_int_x86_avx512_mask_fixupimm_pd_512_load:5438; X86:       # %bb.0:5439; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax5440; X86-NEXT:    vfixupimmpd $3, (%eax), %zmm1, %zmm05441; X86-NEXT:    retl5442  %x2 = load <8 x i64>, ptr %x2ptr5443  %res = call <8 x double> @llvm.x86.avx512.mask.fixupimm.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x i64> %x2, i32 3, i8 -1, i32 4)5444  ret <8 x double> %res5445}5446 5447declare <8 x double> @llvm.x86.avx512.maskz.fixupimm.pd.512(<8 x double>, <8 x double>, <8 x i64>, i32, i8, i32)5448 5449define <8 x double>@test_int_x86_avx512_maskz_fixupimm_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x i64> %x2, i8 %x4) {5450; X64-LABEL: test_int_x86_avx512_maskz_fixupimm_pd_512:5451; X64:       # %bb.0:5452; X64-NEXT:    kmovw %edi, %k15453; X64-NEXT:    vmovapd %zmm0, %zmm35454; X64-NEXT:    vfixupimmpd $3, %zmm2, %zmm1, %zmm3 {%k1} {z}5455; X64-NEXT:    vxorpd %xmm4, %xmm4, %xmm45456; X64-NEXT:    vmovapd %zmm0, %zmm55457; X64-NEXT:    vfixupimmpd $5, %zmm4, %zmm1, %zmm5 {%k1} {z}5458; X64-NEXT:    vaddpd %zmm5, %zmm3, %zmm35459; X64-NEXT:    vfixupimmpd $2, {sae}, %zmm2, %zmm1, %zmm05460; X64-NEXT:    vaddpd %zmm0, %zmm3, %zmm05461; X64-NEXT:    retq5462;5463; X86-LABEL: test_int_x86_avx512_maskz_fixupimm_pd_512:5464; X86:       # %bb.0:5465; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax5466; X86-NEXT:    kmovw %eax, %k15467; X86-NEXT:    vmovapd %zmm0, %zmm35468; X86-NEXT:    vfixupimmpd $3, %zmm2, %zmm1, %zmm3 {%k1} {z}5469; X86-NEXT:    vxorpd %xmm4, %xmm4, %xmm45470; X86-NEXT:    vmovapd %zmm0, %zmm55471; X86-NEXT:    vfixupimmpd $5, %zmm4, %zmm1, %zmm5 {%k1} {z}5472; X86-NEXT:    vaddpd %zmm5, %zmm3, %zmm35473; X86-NEXT:    vfixupimmpd $2, {sae}, %zmm2, %zmm1, %zmm05474; X86-NEXT:    vaddpd %zmm0, %zmm3, %zmm05475; X86-NEXT:    retl5476  %res = call <8 x double> @llvm.x86.avx512.maskz.fixupimm.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x i64> %x2, i32 3, i8 %x4, i32 4)5477  %res1 = call <8 x double> @llvm.x86.avx512.maskz.fixupimm.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x i64> zeroinitializer, i32 5, i8 %x4, i32 4)5478  %res2 = call <8 x double> @llvm.x86.avx512.maskz.fixupimm.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x i64> %x2, i32 2, i8 -1, i32 8)5479  %res3 = fadd <8 x double> %res, %res15480  %res4 = fadd <8 x double> %res3, %res25481  ret <8 x double> %res45482}5483 5484declare <4 x float> @llvm.x86.avx512.mask.fixupimm.ss(<4 x float>, <4 x float>, <4 x i32>, i32, i8, i32)5485 5486define <4 x float>@test_int_x86_avx512_mask_fixupimm_ss(<4 x float> %x0, <4 x float> %x1, <4 x i32> %x2, i8 %x4) {5487; X64-LABEL: test_int_x86_avx512_mask_fixupimm_ss:5488; X64:       # %bb.0:5489; X64-NEXT:    kmovw %edi, %k15490; X64-NEXT:    vmovaps %xmm0, %xmm35491; X64-NEXT:    vfixupimmss $5, %xmm2, %xmm1, %xmm3 {%k1}5492; X64-NEXT:    vxorps %xmm4, %xmm4, %xmm45493; X64-NEXT:    vmovaps %xmm0, %xmm55494; X64-NEXT:    vfixupimmss $5, %xmm4, %xmm1, %xmm5 {%k1}5495; X64-NEXT:    vaddps %xmm5, %xmm3, %xmm35496; X64-NEXT:    vfixupimmss $5, {sae}, %xmm2, %xmm1, %xmm05497; X64-NEXT:    vaddps %xmm0, %xmm3, %xmm05498; X64-NEXT:    retq5499;5500; X86-LABEL: test_int_x86_avx512_mask_fixupimm_ss:5501; X86:       # %bb.0:5502; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax5503; X86-NEXT:    kmovw %eax, %k15504; X86-NEXT:    vmovaps %xmm0, %xmm35505; X86-NEXT:    vfixupimmss $5, %xmm2, %xmm1, %xmm3 {%k1}5506; X86-NEXT:    vxorps %xmm4, %xmm4, %xmm45507; X86-NEXT:    vmovaps %xmm0, %xmm55508; X86-NEXT:    vfixupimmss $5, %xmm4, %xmm1, %xmm5 {%k1}5509; X86-NEXT:    vaddps %xmm5, %xmm3, %xmm35510; X86-NEXT:    vfixupimmss $5, {sae}, %xmm2, %xmm1, %xmm05511; X86-NEXT:    vaddps %xmm0, %xmm3, %xmm05512; X86-NEXT:    retl5513  %res = call <4 x float> @llvm.x86.avx512.mask.fixupimm.ss(<4 x float> %x0, <4 x float> %x1, <4 x i32> %x2, i32 5, i8 %x4, i32 4)5514  %res1 = call <4 x float> @llvm.x86.avx512.mask.fixupimm.ss(<4 x float> %x0, <4 x float> %x1, <4 x i32> zeroinitializer, i32 5, i8 %x4, i32 4)5515  %res2 = call <4 x float> @llvm.x86.avx512.mask.fixupimm.ss(<4 x float> %x0, <4 x float> %x1, <4 x i32> %x2, i32 5, i8 -1, i32 8)5516  %res3 = fadd <4 x float> %res, %res15517  %res4 = fadd <4 x float> %res3, %res25518  ret <4 x float> %res45519}5520 5521declare <4 x float> @llvm.x86.avx512.maskz.fixupimm.ss(<4 x float>, <4 x float>, <4 x i32>, i32, i8, i32)5522 5523define <4 x float>@test_int_x86_avx512_maskz_fixupimm_ss(<4 x float> %x0, <4 x float> %x1, <4 x i32> %x2, i8 %x4) {5524; X64-LABEL: test_int_x86_avx512_maskz_fixupimm_ss:5525; X64:       # %bb.0:5526; X64-NEXT:    kmovw %edi, %k15527; X64-NEXT:    vmovaps %xmm0, %xmm35528; X64-NEXT:    vfixupimmss $5, %xmm2, %xmm1, %xmm3 {%k1} {z}5529; X64-NEXT:    vxorps %xmm4, %xmm4, %xmm45530; X64-NEXT:    vmovaps %xmm0, %xmm55531; X64-NEXT:    vfixupimmss $5, {sae}, %xmm4, %xmm1, %xmm5 {%k1} {z}5532; X64-NEXT:    vaddps %xmm5, %xmm3, %xmm35533; X64-NEXT:    vfixupimmss $6, %xmm2, %xmm1, %xmm05534; X64-NEXT:    vaddps %xmm0, %xmm3, %xmm05535; X64-NEXT:    retq5536;5537; X86-LABEL: test_int_x86_avx512_maskz_fixupimm_ss:5538; X86:       # %bb.0:5539; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax5540; X86-NEXT:    kmovw %eax, %k15541; X86-NEXT:    vmovaps %xmm0, %xmm35542; X86-NEXT:    vfixupimmss $5, %xmm2, %xmm1, %xmm3 {%k1} {z}5543; X86-NEXT:    vxorps %xmm4, %xmm4, %xmm45544; X86-NEXT:    vmovaps %xmm0, %xmm55545; X86-NEXT:    vfixupimmss $5, {sae}, %xmm4, %xmm1, %xmm5 {%k1} {z}5546; X86-NEXT:    vaddps %xmm5, %xmm3, %xmm35547; X86-NEXT:    vfixupimmss $6, %xmm2, %xmm1, %xmm05548; X86-NEXT:    vaddps %xmm0, %xmm3, %xmm05549; X86-NEXT:    retl5550  %res = call <4 x float> @llvm.x86.avx512.maskz.fixupimm.ss(<4 x float> %x0, <4 x float> %x1, <4 x i32> %x2, i32 5, i8 %x4, i32 4)5551  %res1 = call <4 x float> @llvm.x86.avx512.maskz.fixupimm.ss(<4 x float> %x0, <4 x float> %x1, <4 x i32> zeroinitializer, i32 5, i8 %x4, i32 8)5552  %res2 = call <4 x float> @llvm.x86.avx512.maskz.fixupimm.ss(<4 x float> %x0, <4 x float> %x1, <4 x i32> %x2, i32 6, i8 -1, i32 4)5553  %res3 = fadd <4 x float> %res, %res15554  %res4 = fadd <4 x float> %res3, %res25555  ret <4 x float> %res45556}5557 5558declare <16 x float> @llvm.x86.avx512.mask.fixupimm.ps.512(<16 x float>, <16 x float>, <16 x i32>, i32, i16, i32)5559 5560define <16 x float>@test_int_x86_avx512_mask_fixupimm_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x i32> %x2, i16 %x4) {5561; X64-LABEL: test_int_x86_avx512_mask_fixupimm_ps_512:5562; X64:       # %bb.0:5563; X64-NEXT:    kmovw %edi, %k15564; X64-NEXT:    vmovaps %zmm0, %zmm35565; X64-NEXT:    vfixupimmps $5, %zmm2, %zmm1, %zmm3 {%k1}5566; X64-NEXT:    vxorps %xmm4, %xmm4, %xmm45567; X64-NEXT:    vmovaps %zmm0, %zmm55568; X64-NEXT:    vfixupimmps $5, %zmm4, %zmm1, %zmm5 {%k1}5569; X64-NEXT:    vaddps %zmm5, %zmm3, %zmm35570; X64-NEXT:    vfixupimmps $5, {sae}, %zmm2, %zmm1, %zmm05571; X64-NEXT:    vaddps %zmm0, %zmm3, %zmm05572; X64-NEXT:    retq5573;5574; X86-LABEL: test_int_x86_avx512_mask_fixupimm_ps_512:5575; X86:       # %bb.0:5576; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k15577; X86-NEXT:    vmovaps %zmm0, %zmm35578; X86-NEXT:    vfixupimmps $5, %zmm2, %zmm1, %zmm3 {%k1}5579; X86-NEXT:    vxorps %xmm4, %xmm4, %xmm45580; X86-NEXT:    vmovaps %zmm0, %zmm55581; X86-NEXT:    vfixupimmps $5, %zmm4, %zmm1, %zmm5 {%k1}5582; X86-NEXT:    vaddps %zmm5, %zmm3, %zmm35583; X86-NEXT:    vfixupimmps $5, {sae}, %zmm2, %zmm1, %zmm05584; X86-NEXT:    vaddps %zmm0, %zmm3, %zmm05585; X86-NEXT:    retl5586  %res = call <16 x float> @llvm.x86.avx512.mask.fixupimm.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x i32> %x2, i32 5, i16 %x4, i32 4)5587  %res1 = call <16 x float> @llvm.x86.avx512.mask.fixupimm.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x i32> zeroinitializer, i32 5, i16 %x4, i32 4)5588  %res2 = call <16 x float> @llvm.x86.avx512.mask.fixupimm.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x i32> %x2, i32 5, i16 -1, i32 8)5589  %res3 = fadd <16 x float> %res, %res15590  %res4 = fadd <16 x float> %res3, %res25591  ret <16 x float> %res45592}5593 5594define <16 x float>@test_int_x86_avx512_mask_fixupimm_ps_512_load(<16 x float> %x0, <16 x float> %x1, ptr %x2ptr) {5595; X64-LABEL: test_int_x86_avx512_mask_fixupimm_ps_512_load:5596; X64:       # %bb.0:5597; X64-NEXT:    vfixupimmps $5, (%rdi), %zmm1, %zmm05598; X64-NEXT:    retq5599;5600; X86-LABEL: test_int_x86_avx512_mask_fixupimm_ps_512_load:5601; X86:       # %bb.0:5602; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax5603; X86-NEXT:    vfixupimmps $5, (%eax), %zmm1, %zmm05604; X86-NEXT:    retl5605  %x2 = load <16 x i32>, ptr %x2ptr5606  %res = call <16 x float> @llvm.x86.avx512.mask.fixupimm.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x i32> %x2, i32 5, i16 -1, i32 4)5607  ret <16 x float> %res5608}5609 5610declare <16 x float> @llvm.x86.avx512.maskz.fixupimm.ps.512(<16 x float>, <16 x float>, <16 x i32>, i32, i16, i32)5611 5612define <16 x float>@test_int_x86_avx512_maskz_fixupimm_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x i32> %x2, i16 %x4) {5613; X64-LABEL: test_int_x86_avx512_maskz_fixupimm_ps_512:5614; X64:       # %bb.0:5615; X64-NEXT:    kmovw %edi, %k15616; X64-NEXT:    vmovaps %zmm0, %zmm35617; X64-NEXT:    vfixupimmps $5, %zmm2, %zmm1, %zmm3 {%k1} {z}5618; X64-NEXT:    vxorps %xmm4, %xmm4, %xmm45619; X64-NEXT:    vmovaps %zmm0, %zmm55620; X64-NEXT:    vfixupimmps $6, {sae}, %zmm4, %zmm1, %zmm5 {%k1} {z}5621; X64-NEXT:    vaddps %zmm5, %zmm3, %zmm35622; X64-NEXT:    vfixupimmps $7, %zmm2, %zmm1, %zmm05623; X64-NEXT:    vaddps %zmm0, %zmm3, %zmm05624; X64-NEXT:    retq5625;5626; X86-LABEL: test_int_x86_avx512_maskz_fixupimm_ps_512:5627; X86:       # %bb.0:5628; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k15629; X86-NEXT:    vmovaps %zmm0, %zmm35630; X86-NEXT:    vfixupimmps $5, %zmm2, %zmm1, %zmm3 {%k1} {z}5631; X86-NEXT:    vxorps %xmm4, %xmm4, %xmm45632; X86-NEXT:    vmovaps %zmm0, %zmm55633; X86-NEXT:    vfixupimmps $6, {sae}, %zmm4, %zmm1, %zmm5 {%k1} {z}5634; X86-NEXT:    vaddps %zmm5, %zmm3, %zmm35635; X86-NEXT:    vfixupimmps $7, %zmm2, %zmm1, %zmm05636; X86-NEXT:    vaddps %zmm0, %zmm3, %zmm05637; X86-NEXT:    retl5638  %res = call <16 x float> @llvm.x86.avx512.maskz.fixupimm.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x i32> %x2, i32 5, i16 %x4, i32 4)5639  %res1 = call <16 x float> @llvm.x86.avx512.maskz.fixupimm.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x i32> zeroinitializer, i32 6, i16 %x4, i32 8)5640  %res2 = call <16 x float> @llvm.x86.avx512.maskz.fixupimm.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x i32> %x2, i32 7, i16 -1, i32 4)5641  %res3 = fadd <16 x float> %res, %res15642  %res4 = fadd <16 x float> %res3, %res25643  ret <16 x float> %res45644}5645 5646declare <2 x double> @llvm.x86.avx512.mask.fixupimm.sd(<2 x double>, <2 x double>, <2 x i64>, i32, i8, i32)5647 5648define <2 x double>@test_int_x86_avx512_mask_fixupimm_sd(<2 x double> %x0, <2 x double> %x1, <2 x i64> %x2, i8 %x4) {5649; X64-LABEL: test_int_x86_avx512_mask_fixupimm_sd:5650; X64:       # %bb.0:5651; X64-NEXT:    kmovw %edi, %k15652; X64-NEXT:    vmovapd %xmm0, %xmm35653; X64-NEXT:    vfixupimmsd $5, %xmm2, %xmm1, %xmm3 {%k1}5654; X64-NEXT:    vxorpd %xmm4, %xmm4, %xmm45655; X64-NEXT:    vmovapd %xmm0, %xmm55656; X64-NEXT:    vfixupimmsd $5, {sae}, %xmm4, %xmm1, %xmm5 {%k1}5657; X64-NEXT:    vaddpd %xmm5, %xmm3, %xmm35658; X64-NEXT:    vfixupimmsd $6, %xmm2, %xmm1, %xmm05659; X64-NEXT:    vaddpd %xmm0, %xmm3, %xmm05660; X64-NEXT:    retq5661;5662; X86-LABEL: test_int_x86_avx512_mask_fixupimm_sd:5663; X86:       # %bb.0:5664; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax5665; X86-NEXT:    kmovw %eax, %k15666; X86-NEXT:    vmovapd %xmm0, %xmm35667; X86-NEXT:    vfixupimmsd $5, %xmm2, %xmm1, %xmm3 {%k1}5668; X86-NEXT:    vxorpd %xmm4, %xmm4, %xmm45669; X86-NEXT:    vmovapd %xmm0, %xmm55670; X86-NEXT:    vfixupimmsd $5, {sae}, %xmm4, %xmm1, %xmm5 {%k1}5671; X86-NEXT:    vaddpd %xmm5, %xmm3, %xmm35672; X86-NEXT:    vfixupimmsd $6, %xmm2, %xmm1, %xmm05673; X86-NEXT:    vaddpd %xmm0, %xmm3, %xmm05674; X86-NEXT:    retl5675  %res = call <2 x double> @llvm.x86.avx512.mask.fixupimm.sd(<2 x double> %x0, <2 x double> %x1, <2 x i64> %x2, i32 5, i8 %x4, i32 4)5676  %res1 = call <2 x double> @llvm.x86.avx512.mask.fixupimm.sd(<2 x double> %x0, <2 x double> %x1, <2 x i64> zeroinitializer, i32 5, i8 %x4, i32 8)5677  %res2 = call <2 x double> @llvm.x86.avx512.mask.fixupimm.sd(<2 x double> %x0, <2 x double> %x1, <2 x i64> %x2, i32 6, i8 -1, i32 4)5678  %res3 = fadd <2 x double> %res, %res15679  %res4 = fadd <2 x double> %res3, %res25680  ret <2 x double> %res45681}5682 5683declare <2 x double> @llvm.x86.avx512.maskz.fixupimm.sd(<2 x double>, <2 x double>, <2 x i64>, i32, i8, i32)5684 5685define <2 x double>@test_int_x86_avx512_maskz_fixupimm_sd(<2 x double> %x0, <2 x double> %x1, <2 x i64> %x2, i8 %x4) {5686; X64-LABEL: test_int_x86_avx512_maskz_fixupimm_sd:5687; X64:       # %bb.0:5688; X64-NEXT:    kmovw %edi, %k15689; X64-NEXT:    vmovapd %xmm0, %xmm35690; X64-NEXT:    vfixupimmsd $5, %xmm2, %xmm1, %xmm3 {%k1} {z}5691; X64-NEXT:    vxorpd %xmm4, %xmm4, %xmm45692; X64-NEXT:    vmovapd %xmm0, %xmm55693; X64-NEXT:    vfixupimmsd $5, {sae}, %xmm4, %xmm1, %xmm5 {%k1} {z}5694; X64-NEXT:    vaddpd %xmm5, %xmm3, %xmm35695; X64-NEXT:    vfixupimmsd $5, {sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}5696; X64-NEXT:    vaddpd %xmm0, %xmm3, %xmm05697; X64-NEXT:    retq5698;5699; X86-LABEL: test_int_x86_avx512_maskz_fixupimm_sd:5700; X86:       # %bb.0:5701; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax5702; X86-NEXT:    kmovw %eax, %k15703; X86-NEXT:    vmovapd %xmm0, %xmm35704; X86-NEXT:    vfixupimmsd $5, %xmm2, %xmm1, %xmm3 {%k1} {z}5705; X86-NEXT:    vxorpd %xmm4, %xmm4, %xmm45706; X86-NEXT:    vmovapd %xmm0, %xmm55707; X86-NEXT:    vfixupimmsd $5, {sae}, %xmm4, %xmm1, %xmm5 {%k1} {z}5708; X86-NEXT:    vaddpd %xmm5, %xmm3, %xmm35709; X86-NEXT:    vfixupimmsd $5, {sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}5710; X86-NEXT:    vaddpd %xmm0, %xmm3, %xmm05711; X86-NEXT:    retl5712  %res = call <2 x double> @llvm.x86.avx512.maskz.fixupimm.sd(<2 x double> %x0, <2 x double> %x1, <2 x i64> %x2, i32 5, i8 %x4, i32 4)5713  %res1 = call <2 x double> @llvm.x86.avx512.maskz.fixupimm.sd(<2 x double> %x0, <2 x double> %x1, <2 x i64> zeroinitializer, i32 5, i8 %x4, i32 8)5714  %res2 = call <2 x double> @llvm.x86.avx512.maskz.fixupimm.sd(<2 x double> %x0, <2 x double> %x1, <2 x i64> %x2, i32 5, i8 %x4, i32 8)5715  %res3 = fadd <2 x double> %res, %res15716  %res4 = fadd <2 x double> %res3, %res25717  ret <2 x double> %res45718}5719 5720declare double @llvm.fma.f64(double, double, double) #15721declare double @llvm.x86.avx512.vfmadd.f64(double, double, double, i32) #05722 5723define <2 x double> @test_int_x86_avx512_mask_vfmadd_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3, i32 %x4) {5724; X64-LABEL: test_int_x86_avx512_mask_vfmadd_sd:5725; X64:       # %bb.0:5726; X64-NEXT:    kmovw %edi, %k15727; X64-NEXT:    vmovapd %xmm0, %xmm35728; X64-NEXT:    vfmadd213sd {{.*#+}} xmm3 {%k1} = (xmm1 * xmm3) + xmm25729; X64-NEXT:    vmovapd %xmm0, %xmm45730; X64-NEXT:    vfmadd213sd {rz-sae}, %xmm2, %xmm1, %xmm45731; X64-NEXT:    vaddpd %xmm4, %xmm3, %xmm35732; X64-NEXT:    vfmadd213sd {ru-sae}, %xmm2, %xmm1, %xmm0 {%k1}5733; X64-NEXT:    vaddpd %xmm3, %xmm0, %xmm05734; X64-NEXT:    retq5735;5736; X86-LABEL: test_int_x86_avx512_mask_vfmadd_sd:5737; X86:       # %bb.0:5738; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax5739; X86-NEXT:    kmovw %eax, %k15740; X86-NEXT:    vmovapd %xmm0, %xmm35741; X86-NEXT:    vfmadd213sd {{.*#+}} xmm3 {%k1} = (xmm1 * xmm3) + xmm25742; X86-NEXT:    vmovapd %xmm0, %xmm45743; X86-NEXT:    vfmadd213sd {rz-sae}, %xmm2, %xmm1, %xmm45744; X86-NEXT:    vaddpd %xmm4, %xmm3, %xmm35745; X86-NEXT:    vfmadd213sd {ru-sae}, %xmm2, %xmm1, %xmm0 {%k1}5746; X86-NEXT:    vaddpd %xmm3, %xmm0, %xmm05747; X86-NEXT:    retl5748  %1 = extractelement <2 x double> %x0, i64 05749  %2 = extractelement <2 x double> %x1, i64 05750  %3 = extractelement <2 x double> %x2, i64 05751  %4 = call double @llvm.fma.f64(double %1, double %2, double %3)5752  %5 = bitcast i8 %x3 to <8 x i1>5753  %6 = extractelement <8 x i1> %5, i64 05754  %7 = select i1 %6, double %4, double %15755  %8 = insertelement <2 x double> %x0, double %7, i64 05756  %9 = extractelement <2 x double> %x0, i64 05757  %10 = extractelement <2 x double> %x1, i64 05758  %11 = extractelement <2 x double> %x2, i64 05759  %12 = call double @llvm.x86.avx512.vfmadd.f64(double %9, double %10, double %11, i32 11)5760  %13 = insertelement <2 x double> %x0, double %12, i64 05761  %14 = extractelement <2 x double> %x0, i64 05762  %15 = extractelement <2 x double> %x1, i64 05763  %16 = extractelement <2 x double> %x2, i64 05764  %17 = call double @llvm.x86.avx512.vfmadd.f64(double %14, double %15, double %16, i32 10)5765  %18 = bitcast i8 %x3 to <8 x i1>5766  %19 = extractelement <8 x i1> %18, i64 05767  %20 = select i1 %19, double %17, double %145768  %21 = insertelement <2 x double> %x0, double %20, i64 05769  %res3 = fadd <2 x double> %8, %135770  %res4 = fadd <2 x double> %21, %res35771  ret <2 x double> %res45772}5773 5774define <4 x float> @test_int_x86_avx512_mask_vfmadd_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3, i32 %x4) {5775; X64-LABEL: test_int_x86_avx512_mask_vfmadd_ss:5776; X64:       # %bb.0:5777; X64-NEXT:    kmovw %edi, %k15778; X64-NEXT:    vmovaps %xmm0, %xmm35779; X64-NEXT:    vfmadd213ss {{.*#+}} xmm3 {%k1} = (xmm1 * xmm3) + xmm25780; X64-NEXT:    vmovaps %xmm0, %xmm45781; X64-NEXT:    vfmadd213ss {rz-sae}, %xmm2, %xmm1, %xmm45782; X64-NEXT:    vaddps %xmm4, %xmm3, %xmm35783; X64-NEXT:    vfmadd213ss {ru-sae}, %xmm2, %xmm1, %xmm0 {%k1}5784; X64-NEXT:    vaddps %xmm3, %xmm0, %xmm05785; X64-NEXT:    retq5786;5787; X86-LABEL: test_int_x86_avx512_mask_vfmadd_ss:5788; X86:       # %bb.0:5789; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax5790; X86-NEXT:    kmovw %eax, %k15791; X86-NEXT:    vmovaps %xmm0, %xmm35792; X86-NEXT:    vfmadd213ss {{.*#+}} xmm3 {%k1} = (xmm1 * xmm3) + xmm25793; X86-NEXT:    vmovaps %xmm0, %xmm45794; X86-NEXT:    vfmadd213ss {rz-sae}, %xmm2, %xmm1, %xmm45795; X86-NEXT:    vaddps %xmm4, %xmm3, %xmm35796; X86-NEXT:    vfmadd213ss {ru-sae}, %xmm2, %xmm1, %xmm0 {%k1}5797; X86-NEXT:    vaddps %xmm3, %xmm0, %xmm05798; X86-NEXT:    retl5799  %1 = extractelement <4 x float> %x0, i64 05800  %2 = extractelement <4 x float> %x1, i64 05801  %3 = extractelement <4 x float> %x2, i64 05802  %4 = call float @llvm.fma.f32(float %1, float %2, float %3)5803  %5 = bitcast i8 %x3 to <8 x i1>5804  %6 = extractelement <8 x i1> %5, i64 05805  %7 = select i1 %6, float %4, float %15806  %8 = insertelement <4 x float> %x0, float %7, i64 05807  %9 = extractelement <4 x float> %x0, i64 05808  %10 = extractelement <4 x float> %x1, i64 05809  %11 = extractelement <4 x float> %x2, i64 05810  %12 = call float @llvm.x86.avx512.vfmadd.f32(float %9, float %10, float %11, i32 11)5811  %13 = insertelement <4 x float> %x0, float %12, i64 05812  %14 = extractelement <4 x float> %x0, i64 05813  %15 = extractelement <4 x float> %x1, i64 05814  %16 = extractelement <4 x float> %x2, i64 05815  %17 = call float @llvm.x86.avx512.vfmadd.f32(float %14, float %15, float %16, i32 10)5816  %18 = bitcast i8 %x3 to <8 x i1>5817  %19 = extractelement <8 x i1> %18, i64 05818  %20 = select i1 %19, float %17, float %145819  %21 = insertelement <4 x float> %x0, float %20, i64 05820  %res3 = fadd <4 x float> %8, %135821  %res4 = fadd <4 x float> %21, %res35822  ret <4 x float> %res45823}5824 5825define <2 x double>@test_int_x86_avx512_maskz_vfmadd_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3,i32 %x4 ){5826; X64-LABEL: test_int_x86_avx512_maskz_vfmadd_sd:5827; X64:       # %bb.0:5828; X64-NEXT:    kmovw %edi, %k15829; X64-NEXT:    vmovapd %xmm0, %xmm35830; X64-NEXT:    vfmadd213sd {{.*#+}} xmm3 {%k1} {z} = (xmm1 * xmm3) + xmm25831; X64-NEXT:    vfmadd213sd {rz-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}5832; X64-NEXT:    vaddpd %xmm0, %xmm3, %xmm05833; X64-NEXT:    retq5834;5835; X86-LABEL: test_int_x86_avx512_maskz_vfmadd_sd:5836; X86:       # %bb.0:5837; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax5838; X86-NEXT:    kmovw %eax, %k15839; X86-NEXT:    vmovapd %xmm0, %xmm35840; X86-NEXT:    vfmadd213sd {{.*#+}} xmm3 {%k1} {z} = (xmm1 * xmm3) + xmm25841; X86-NEXT:    vfmadd213sd {rz-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}5842; X86-NEXT:    vaddpd %xmm0, %xmm3, %xmm05843; X86-NEXT:    retl5844  %1 = extractelement <2 x double> %x0, i64 05845  %2 = extractelement <2 x double> %x1, i64 05846  %3 = extractelement <2 x double> %x2, i64 05847  %4 = call double @llvm.fma.f64(double %1, double %2, double %3)5848  %5 = bitcast i8 %x3 to <8 x i1>5849  %6 = extractelement <8 x i1> %5, i64 05850  %7 = select i1 %6, double %4, double 0.000000e+005851  %8 = insertelement <2 x double> %x0, double %7, i64 05852  %9 = extractelement <2 x double> %x0, i64 05853  %10 = extractelement <2 x double> %x1, i64 05854  %11 = extractelement <2 x double> %x2, i64 05855  %12 = call double @llvm.x86.avx512.vfmadd.f64(double %9, double %10, double %11, i32 11)5856  %13 = bitcast i8 %x3 to <8 x i1>5857  %14 = extractelement <8 x i1> %13, i64 05858  %15 = select i1 %14, double %12, double 0.000000e+005859  %16 = insertelement <2 x double> %x0, double %15, i64 05860  %res2 = fadd <2 x double> %8, %165861  ret <2 x double> %res25862}5863 5864declare float @llvm.fma.f32(float, float, float) #15865declare float @llvm.x86.avx512.vfmadd.f32(float, float, float, i32) #05866 5867define <4 x float>@test_int_x86_avx512_maskz_vfmadd_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3,i32 %x4 ){5868; X64-LABEL: test_int_x86_avx512_maskz_vfmadd_ss:5869; X64:       # %bb.0:5870; X64-NEXT:    kmovw %edi, %k15871; X64-NEXT:    vmovaps %xmm0, %xmm35872; X64-NEXT:    vfmadd213ss {{.*#+}} xmm3 {%k1} {z} = (xmm1 * xmm3) + xmm25873; X64-NEXT:    vfmadd213ss {rz-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}5874; X64-NEXT:    vaddps %xmm0, %xmm3, %xmm05875; X64-NEXT:    retq5876;5877; X86-LABEL: test_int_x86_avx512_maskz_vfmadd_ss:5878; X86:       # %bb.0:5879; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax5880; X86-NEXT:    kmovw %eax, %k15881; X86-NEXT:    vmovaps %xmm0, %xmm35882; X86-NEXT:    vfmadd213ss {{.*#+}} xmm3 {%k1} {z} = (xmm1 * xmm3) + xmm25883; X86-NEXT:    vfmadd213ss {rz-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z}5884; X86-NEXT:    vaddps %xmm0, %xmm3, %xmm05885; X86-NEXT:    retl5886  %1 = extractelement <4 x float> %x0, i64 05887  %2 = extractelement <4 x float> %x1, i64 05888  %3 = extractelement <4 x float> %x2, i64 05889  %4 = call float @llvm.fma.f32(float %1, float %2, float %3)5890  %5 = bitcast i8 %x3 to <8 x i1>5891  %6 = extractelement <8 x i1> %5, i64 05892  %7 = select i1 %6, float %4, float 0.000000e+005893  %8 = insertelement <4 x float> %x0, float %7, i64 05894  %9 = extractelement <4 x float> %x0, i64 05895  %10 = extractelement <4 x float> %x1, i64 05896  %11 = extractelement <4 x float> %x2, i64 05897  %12 = call float @llvm.x86.avx512.vfmadd.f32(float %9, float %10, float %11, i32 11)5898  %13 = bitcast i8 %x3 to <8 x i1>5899  %14 = extractelement <8 x i1> %13, i64 05900  %15 = select i1 %14, float %12, float 0.000000e+005901  %16 = insertelement <4 x float> %x0, float %15, i64 05902  %res2 = fadd <4 x float> %8, %165903  ret <4 x float> %res25904}5905 5906; Make sure we don't commute this to fold the load as that source isn't commutable.5907define <4 x float> @test_int_x86_avx512_maskz_vfmadd_ss_load0(i8 zeroext %0, ptr nocapture readonly %1, float %2, float %3) {5908; X64-LABEL: test_int_x86_avx512_maskz_vfmadd_ss_load0:5909; X64:       # %bb.0:5910; X64-NEXT:    vmovaps (%rsi), %xmm25911; X64-NEXT:    kmovw %edi, %k15912; X64-NEXT:    vfmadd213ss {{.*#+}} xmm2 {%k1} {z} = (xmm0 * xmm2) + xmm15913; X64-NEXT:    vmovaps %xmm2, %xmm05914; X64-NEXT:    retq5915;5916; X86-LABEL: test_int_x86_avx512_maskz_vfmadd_ss_load0:5917; X86:       # %bb.0:5918; X86-NEXT:    vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero5919; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax5920; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx5921; X86-NEXT:    vmovaps (%ecx), %xmm05922; X86-NEXT:    kmovw %eax, %k15923; X86-NEXT:    vfmadd132ss {{.*#+}} xmm0 {%k1} {z} = (xmm0 * mem) + xmm15924; X86-NEXT:    retl5925  %5 = load <4 x float>, ptr %1, align 165926  %6 = extractelement <4 x float> %5, i64 05927  %7 = tail call float @llvm.fma.f32(float %6, float %2, float %3) #25928  %8 = bitcast i8 %0 to <8 x i1>5929  %9 = extractelement <8 x i1> %8, i64 05930  %10 = select i1 %9, float %7, float 0.000000e+005931  %11 = insertelement <4 x float> %5, float %10, i64 05932  ret <4 x float> %115933}5934 5935define <2 x double> @test_int_x86_avx512_mask3_vfmadd_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3, i32 %x4) {5936; X64-LABEL: test_int_x86_avx512_mask3_vfmadd_sd:5937; X64:       # %bb.0:5938; X64-NEXT:    kmovw %edi, %k15939; X64-NEXT:    vmovapd %xmm2, %xmm35940; X64-NEXT:    vfmadd231sd {{.*#+}} xmm3 {%k1} = (xmm0 * xmm1) + xmm35941; X64-NEXT:    vmovapd %xmm2, %xmm45942; X64-NEXT:    vfmadd231sd {rz-sae}, %xmm1, %xmm0, %xmm45943; X64-NEXT:    vaddpd %xmm4, %xmm3, %xmm35944; X64-NEXT:    vfmadd231sd {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}5945; X64-NEXT:    vaddpd %xmm3, %xmm2, %xmm05946; X64-NEXT:    retq5947;5948; X86-LABEL: test_int_x86_avx512_mask3_vfmadd_sd:5949; X86:       # %bb.0:5950; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax5951; X86-NEXT:    kmovw %eax, %k15952; X86-NEXT:    vmovapd %xmm2, %xmm35953; X86-NEXT:    vfmadd231sd {{.*#+}} xmm3 {%k1} = (xmm0 * xmm1) + xmm35954; X86-NEXT:    vmovapd %xmm2, %xmm45955; X86-NEXT:    vfmadd231sd {rz-sae}, %xmm1, %xmm0, %xmm45956; X86-NEXT:    vaddpd %xmm4, %xmm3, %xmm35957; X86-NEXT:    vfmadd231sd {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}5958; X86-NEXT:    vaddpd %xmm3, %xmm2, %xmm05959; X86-NEXT:    retl5960  %1 = extractelement <2 x double> %x0, i64 05961  %2 = extractelement <2 x double> %x1, i64 05962  %3 = extractelement <2 x double> %x2, i64 05963  %4 = call double @llvm.fma.f64(double %1, double %2, double %3)5964  %5 = bitcast i8 %x3 to <8 x i1>5965  %6 = extractelement <8 x i1> %5, i64 05966  %7 = select i1 %6, double %4, double %35967  %8 = insertelement <2 x double> %x2, double %7, i64 05968  %9 = extractelement <2 x double> %x0, i64 05969  %10 = extractelement <2 x double> %x1, i64 05970  %11 = extractelement <2 x double> %x2, i64 05971  %12 = call double @llvm.x86.avx512.vfmadd.f64(double %9, double %10, double %11, i32 11)5972  %13 = insertelement <2 x double> %x2, double %12, i64 05973  %14 = extractelement <2 x double> %x0, i64 05974  %15 = extractelement <2 x double> %x1, i64 05975  %16 = extractelement <2 x double> %x2, i64 05976  %17 = call double @llvm.x86.avx512.vfmadd.f64(double %14, double %15, double %16, i32 10)5977  %18 = bitcast i8 %x3 to <8 x i1>5978  %19 = extractelement <8 x i1> %18, i64 05979  %20 = select i1 %19, double %17, double %165980  %21 = insertelement <2 x double> %x2, double %20, i64 05981  %res3 = fadd <2 x double> %8, %135982  %res4 = fadd <2 x double> %21, %res35983  ret <2 x double> %res45984}5985 5986define <4 x float> @test_int_x86_avx512_mask3_vfmadd_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3, i32 %x4) {5987; X64-LABEL: test_int_x86_avx512_mask3_vfmadd_ss:5988; X64:       # %bb.0:5989; X64-NEXT:    kmovw %edi, %k15990; X64-NEXT:    vmovaps %xmm2, %xmm35991; X64-NEXT:    vfmadd231ss {{.*#+}} xmm3 {%k1} = (xmm0 * xmm1) + xmm35992; X64-NEXT:    vmovaps %xmm2, %xmm45993; X64-NEXT:    vfmadd231ss {rz-sae}, %xmm1, %xmm0, %xmm45994; X64-NEXT:    vaddps %xmm4, %xmm3, %xmm35995; X64-NEXT:    vfmadd231ss {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}5996; X64-NEXT:    vaddps %xmm3, %xmm2, %xmm05997; X64-NEXT:    retq5998;5999; X86-LABEL: test_int_x86_avx512_mask3_vfmadd_ss:6000; X86:       # %bb.0:6001; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6002; X86-NEXT:    kmovw %eax, %k16003; X86-NEXT:    vmovaps %xmm2, %xmm36004; X86-NEXT:    vfmadd231ss {{.*#+}} xmm3 {%k1} = (xmm0 * xmm1) + xmm36005; X86-NEXT:    vmovaps %xmm2, %xmm46006; X86-NEXT:    vfmadd231ss {rz-sae}, %xmm1, %xmm0, %xmm46007; X86-NEXT:    vaddps %xmm4, %xmm3, %xmm36008; X86-NEXT:    vfmadd231ss {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}6009; X86-NEXT:    vaddps %xmm3, %xmm2, %xmm06010; X86-NEXT:    retl6011  %1 = extractelement <4 x float> %x0, i64 06012  %2 = extractelement <4 x float> %x1, i64 06013  %3 = extractelement <4 x float> %x2, i64 06014  %4 = call float @llvm.fma.f32(float %1, float %2, float %3)6015  %5 = bitcast i8 %x3 to <8 x i1>6016  %6 = extractelement <8 x i1> %5, i64 06017  %7 = select i1 %6, float %4, float %36018  %8 = insertelement <4 x float> %x2, float %7, i64 06019  %9 = extractelement <4 x float> %x0, i64 06020  %10 = extractelement <4 x float> %x1, i64 06021  %11 = extractelement <4 x float> %x2, i64 06022  %12 = call float @llvm.x86.avx512.vfmadd.f32(float %9, float %10, float %11, i32 11)6023  %13 = insertelement <4 x float> %x2, float %12, i64 06024  %14 = extractelement <4 x float> %x0, i64 06025  %15 = extractelement <4 x float> %x1, i64 06026  %16 = extractelement <4 x float> %x2, i64 06027  %17 = call float @llvm.x86.avx512.vfmadd.f32(float %14, float %15, float %16, i32 10)6028  %18 = bitcast i8 %x3 to <8 x i1>6029  %19 = extractelement <8 x i1> %18, i64 06030  %20 = select i1 %19, float %17, float %166031  %21 = insertelement <4 x float> %x2, float %20, i64 06032  %res3 = fadd <4 x float> %8, %136033  %res4 = fadd <4 x float> %21, %res36034  ret <4 x float> %res46035}6036 6037define void @fmadd_ss_mask_memfold(ptr %a, ptr %b, i8 %c) {6038; X64-LABEL: fmadd_ss_mask_memfold:6039; X64:       # %bb.0:6040; X64-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero6041; X64-NEXT:    vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero6042; X64-NEXT:    vfmadd213ss {{.*#+}} xmm1 = (xmm0 * xmm1) + xmm06043; X64-NEXT:    kmovw %edx, %k16044; X64-NEXT:    vmovss %xmm1, %xmm0, %xmm0 {%k1}6045; X64-NEXT:    vmovss %xmm0, (%rdi)6046; X64-NEXT:    retq6047;6048; X86-LABEL: fmadd_ss_mask_memfold:6049; X86:       # %bb.0:6050; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6051; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx6052; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx6053; X86-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero6054; X86-NEXT:    vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero6055; X86-NEXT:    vfmadd213ss {{.*#+}} xmm1 = (xmm0 * xmm1) + xmm06056; X86-NEXT:    kmovw %eax, %k16057; X86-NEXT:    vmovss %xmm1, %xmm0, %xmm0 {%k1}6058; X86-NEXT:    vmovss %xmm0, (%edx)6059; X86-NEXT:    retl6060  %a.val = load float, ptr %a6061  %av0 = insertelement <4 x float> undef, float %a.val, i32 06062  %av1 = insertelement <4 x float> %av0, float 0.000000e+00, i32 16063  %av2 = insertelement <4 x float> %av1, float 0.000000e+00, i32 26064  %av  = insertelement <4 x float> %av2, float 0.000000e+00, i32 36065 6066  %b.val = load float, ptr %b6067  %bv0 = insertelement <4 x float> undef, float %b.val, i32 06068  %bv1 = insertelement <4 x float> %bv0, float 0.000000e+00, i32 16069  %bv2 = insertelement <4 x float> %bv1, float 0.000000e+00, i32 26070  %bv =  insertelement <4 x float> %bv2, float 0.000000e+00, i32 36071  %1 = extractelement <4 x float> %av, i64 06072  %2 = extractelement <4 x float> %bv, i64 06073  %3 = extractelement <4 x float> %av, i64 06074  %4 = call float @llvm.fma.f32(float %1, float %2, float %3)6075  %5 = bitcast i8 %c to <8 x i1>6076  %6 = extractelement <8 x i1> %5, i64 06077  %7 = select i1 %6, float %4, float %16078  %8 = insertelement <4 x float> %av, float %7, i64 06079  %sr = extractelement <4 x float> %8, i32 06080  store float %sr, ptr %a6081  ret void6082}6083 6084define void @fmadd_ss_maskz_memfold(ptr %a, ptr %b, i8 %c) {6085; X64-LABEL: fmadd_ss_maskz_memfold:6086; X64:       # %bb.0:6087; X64-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero6088; X64-NEXT:    vfmadd231ss {{.*#+}} xmm0 = (xmm0 * mem) + xmm06089; X64-NEXT:    kmovw %edx, %k16090; X64-NEXT:    vmovss %xmm0, %xmm0, %xmm0 {%k1} {z}6091; X64-NEXT:    vmovss %xmm0, (%rdi)6092; X64-NEXT:    retq6093;6094; X86-LABEL: fmadd_ss_maskz_memfold:6095; X86:       # %bb.0:6096; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6097; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx6098; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx6099; X86-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero6100; X86-NEXT:    vfmadd231ss {{.*#+}} xmm0 = (xmm0 * mem) + xmm06101; X86-NEXT:    kmovw %eax, %k16102; X86-NEXT:    vmovss %xmm0, %xmm0, %xmm0 {%k1} {z}6103; X86-NEXT:    vmovss %xmm0, (%edx)6104; X86-NEXT:    retl6105  %a.val = load float, ptr %a6106  %av0 = insertelement <4 x float> undef, float %a.val, i32 06107  %av1 = insertelement <4 x float> %av0, float 0.000000e+00, i32 16108  %av2 = insertelement <4 x float> %av1, float 0.000000e+00, i32 26109  %av  = insertelement <4 x float> %av2, float 0.000000e+00, i32 36110 6111  %b.val = load float, ptr %b6112  %bv0 = insertelement <4 x float> undef, float %b.val, i32 06113  %bv1 = insertelement <4 x float> %bv0, float 0.000000e+00, i32 16114  %bv2 = insertelement <4 x float> %bv1, float 0.000000e+00, i32 26115  %bv  = insertelement <4 x float> %bv2, float 0.000000e+00, i32 36116  %1 = extractelement <4 x float> %av, i64 06117  %2 = extractelement <4 x float> %bv, i64 06118  %3 = extractelement <4 x float> %av, i64 06119  %4 = call float @llvm.fma.f32(float %1, float %2, float %3)6120  %5 = bitcast i8 %c to <8 x i1>6121  %6 = extractelement <8 x i1> %5, i64 06122  %7 = select i1 %6, float %4, float 0.000000e+006123  %8 = insertelement <4 x float> %av, float %7, i64 06124  %sr = extractelement <4 x float> %8, i32 06125  store float %sr, ptr %a6126  ret void6127}6128 6129define void @fmadd_sd_mask_memfold(ptr %a, ptr %b, i8 %c) {6130; X64-LABEL: fmadd_sd_mask_memfold:6131; X64:       # %bb.0:6132; X64-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero6133; X64-NEXT:    vmovsd {{.*#+}} xmm1 = mem[0],zero6134; X64-NEXT:    vfmadd213sd {{.*#+}} xmm1 = (xmm0 * xmm1) + xmm06135; X64-NEXT:    kmovw %edx, %k16136; X64-NEXT:    vmovsd %xmm1, %xmm0, %xmm0 {%k1}6137; X64-NEXT:    vmovsd %xmm0, (%rdi)6138; X64-NEXT:    retq6139;6140; X86-LABEL: fmadd_sd_mask_memfold:6141; X86:       # %bb.0:6142; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6143; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx6144; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx6145; X86-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero6146; X86-NEXT:    vmovsd {{.*#+}} xmm1 = mem[0],zero6147; X86-NEXT:    vfmadd213sd {{.*#+}} xmm1 = (xmm0 * xmm1) + xmm06148; X86-NEXT:    kmovw %eax, %k16149; X86-NEXT:    vmovsd %xmm1, %xmm0, %xmm0 {%k1}6150; X86-NEXT:    vmovsd %xmm0, (%edx)6151; X86-NEXT:    retl6152  %a.val = load double, ptr %a6153  %av0 = insertelement <2 x double> undef, double %a.val, i32 06154  %av = insertelement <2 x double> %av0, double 0.000000e+00, i32 16155 6156  %b.val = load double, ptr %b6157  %bv0 = insertelement <2 x double> undef, double %b.val, i32 06158  %bv = insertelement <2 x double> %bv0, double 0.000000e+00, i32 16159  %1 = extractelement <2 x double> %av, i64 06160  %2 = extractelement <2 x double> %bv, i64 06161  %3 = extractelement <2 x double> %av, i64 06162  %4 = call double @llvm.fma.f64(double %1, double %2, double %3)6163  %5 = bitcast i8 %c to <8 x i1>6164  %6 = extractelement <8 x i1> %5, i64 06165  %7 = select i1 %6, double %4, double %16166  %8 = insertelement <2 x double> %av, double %7, i64 06167  %sr = extractelement <2 x double> %8, i32 06168  store double %sr, ptr %a6169  ret void6170}6171 6172define void @fmadd_sd_maskz_memfold(ptr %a, ptr %b, i8 %c) {6173; X64-LABEL: fmadd_sd_maskz_memfold:6174; X64:       # %bb.0:6175; X64-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero6176; X64-NEXT:    vfmadd231sd {{.*#+}} xmm0 = (xmm0 * mem) + xmm06177; X64-NEXT:    kmovw %edx, %k16178; X64-NEXT:    vmovsd %xmm0, %xmm0, %xmm0 {%k1} {z}6179; X64-NEXT:    vmovsd %xmm0, (%rdi)6180; X64-NEXT:    retq6181;6182; X86-LABEL: fmadd_sd_maskz_memfold:6183; X86:       # %bb.0:6184; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6185; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx6186; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx6187; X86-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero6188; X86-NEXT:    vfmadd231sd {{.*#+}} xmm0 = (xmm0 * mem) + xmm06189; X86-NEXT:    kmovw %eax, %k16190; X86-NEXT:    vmovsd %xmm0, %xmm0, %xmm0 {%k1} {z}6191; X86-NEXT:    vmovsd %xmm0, (%edx)6192; X86-NEXT:    retl6193  %a.val = load double, ptr %a6194  %av0 = insertelement <2 x double> undef, double %a.val, i32 06195  %av = insertelement <2 x double> %av0, double 0.000000e+00, i32 16196 6197  %b.val = load double, ptr %b6198  %bv0 = insertelement <2 x double> undef, double %b.val, i32 06199  %bv = insertelement <2 x double> %bv0, double 0.000000e+00, i32 16200  %1 = extractelement <2 x double> %av, i64 06201  %2 = extractelement <2 x double> %bv, i64 06202  %3 = extractelement <2 x double> %av, i64 06203  %4 = call double @llvm.fma.f64(double %1, double %2, double %3)6204  %5 = bitcast i8 %c to <8 x i1>6205  %6 = extractelement <8 x i1> %5, i64 06206  %7 = select i1 %6, double %4, double 0.000000e+006207  %8 = insertelement <2 x double> %av, double %7, i64 06208  %sr = extractelement <2 x double> %8, i32 06209  store double %sr, ptr %a6210  ret void6211}6212 6213define <2 x double> @test_int_x86_avx512_mask3_vfmsub_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3, i32 %x4) {6214; X64-LABEL: test_int_x86_avx512_mask3_vfmsub_sd:6215; X64:       # %bb.0:6216; X64-NEXT:    kmovw %edi, %k16217; X64-NEXT:    vmovapd %xmm2, %xmm36218; X64-NEXT:    vfmsub231sd {{.*#+}} xmm3 {%k1} = (xmm0 * xmm1) - xmm36219; X64-NEXT:    vmovapd %xmm2, %xmm46220; X64-NEXT:    vfmsub231sd {rz-sae}, %xmm1, %xmm0, %xmm46221; X64-NEXT:    vaddpd %xmm4, %xmm3, %xmm36222; X64-NEXT:    vfmsub231sd {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}6223; X64-NEXT:    vaddpd %xmm3, %xmm2, %xmm06224; X64-NEXT:    retq6225;6226; X86-LABEL: test_int_x86_avx512_mask3_vfmsub_sd:6227; X86:       # %bb.0:6228; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6229; X86-NEXT:    kmovw %eax, %k16230; X86-NEXT:    vmovapd %xmm2, %xmm36231; X86-NEXT:    vfmsub231sd {{.*#+}} xmm3 {%k1} = (xmm0 * xmm1) - xmm36232; X86-NEXT:    vmovapd %xmm2, %xmm46233; X86-NEXT:    vfmsub231sd {rz-sae}, %xmm1, %xmm0, %xmm46234; X86-NEXT:    vaddpd %xmm4, %xmm3, %xmm36235; X86-NEXT:    vfmsub231sd {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}6236; X86-NEXT:    vaddpd %xmm3, %xmm2, %xmm06237; X86-NEXT:    retl6238  %1 = fneg <2 x double> %x26239  %2 = extractelement <2 x double> %x0, i64 06240  %3 = extractelement <2 x double> %x1, i64 06241  %4 = extractelement <2 x double> %1, i64 06242  %5 = call double @llvm.fma.f64(double %2, double %3, double %4)6243  %6 = extractelement <2 x double> %x2, i64 06244  %7 = bitcast i8 %x3 to <8 x i1>6245  %8 = extractelement <8 x i1> %7, i64 06246  %9 = select i1 %8, double %5, double %66247  %10 = insertelement <2 x double> %x2, double %9, i64 06248  %11 = fneg <2 x double> %x26249  %12 = extractelement <2 x double> %x0, i64 06250  %13 = extractelement <2 x double> %x1, i64 06251  %14 = extractelement <2 x double> %11, i64 06252  %15 = call double @llvm.x86.avx512.vfmadd.f64(double %12, double %13, double %14, i32 11)6253  %16 = extractelement <2 x double> %x2, i64 06254  %17 = insertelement <2 x double> %x2, double %15, i64 06255  %18 = fneg <2 x double> %x26256  %19 = extractelement <2 x double> %x0, i64 06257  %20 = extractelement <2 x double> %x1, i64 06258  %21 = extractelement <2 x double> %18, i64 06259  %22 = call double @llvm.x86.avx512.vfmadd.f64(double %19, double %20, double %21, i32 10)6260  %23 = extractelement <2 x double> %x2, i64 06261  %24 = bitcast i8 %x3 to <8 x i1>6262  %25 = extractelement <8 x i1> %24, i64 06263  %26 = select i1 %25, double %22, double %236264  %27 = insertelement <2 x double> %x2, double %26, i64 06265  %res3 = fadd <2 x double> %10, %176266  %res4 = fadd <2 x double> %27, %res36267  ret <2 x double> %res46268}6269 6270define <4 x float> @test_int_x86_avx512_mask3_vfmsub_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3, i32 %x4) {6271; X64-LABEL: test_int_x86_avx512_mask3_vfmsub_ss:6272; X64:       # %bb.0:6273; X64-NEXT:    kmovw %edi, %k16274; X64-NEXT:    vmovaps %xmm2, %xmm36275; X64-NEXT:    vfmsub231ss {{.*#+}} xmm3 {%k1} = (xmm0 * xmm1) - xmm36276; X64-NEXT:    vmovaps %xmm2, %xmm46277; X64-NEXT:    vfmsub231ss {rz-sae}, %xmm1, %xmm0, %xmm46278; X64-NEXT:    vaddps %xmm4, %xmm3, %xmm36279; X64-NEXT:    vfmsub231ss {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}6280; X64-NEXT:    vaddps %xmm3, %xmm2, %xmm06281; X64-NEXT:    retq6282;6283; X86-LABEL: test_int_x86_avx512_mask3_vfmsub_ss:6284; X86:       # %bb.0:6285; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6286; X86-NEXT:    kmovw %eax, %k16287; X86-NEXT:    vmovaps %xmm2, %xmm36288; X86-NEXT:    vfmsub231ss {{.*#+}} xmm3 {%k1} = (xmm0 * xmm1) - xmm36289; X86-NEXT:    vmovaps %xmm2, %xmm46290; X86-NEXT:    vfmsub231ss {rz-sae}, %xmm1, %xmm0, %xmm46291; X86-NEXT:    vaddps %xmm4, %xmm3, %xmm36292; X86-NEXT:    vfmsub231ss {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}6293; X86-NEXT:    vaddps %xmm3, %xmm2, %xmm06294; X86-NEXT:    retl6295  %1 = fneg <4 x float> %x26296  %2 = extractelement <4 x float> %x0, i64 06297  %3 = extractelement <4 x float> %x1, i64 06298  %4 = extractelement <4 x float> %1, i64 06299  %5 = call float @llvm.fma.f32(float %2, float %3, float %4)6300  %6 = extractelement <4 x float> %x2, i64 06301  %7 = bitcast i8 %x3 to <8 x i1>6302  %8 = extractelement <8 x i1> %7, i64 06303  %9 = select i1 %8, float %5, float %66304  %10 = insertelement <4 x float> %x2, float %9, i64 06305  %11 = fneg <4 x float> %x26306  %12 = extractelement <4 x float> %x0, i64 06307  %13 = extractelement <4 x float> %x1, i64 06308  %14 = extractelement <4 x float> %11, i64 06309  %15 = call float @llvm.x86.avx512.vfmadd.f32(float %12, float %13, float %14, i32 11)6310  %16 = extractelement <4 x float> %x2, i64 06311  %17 = insertelement <4 x float> %x2, float %15, i64 06312  %18 = fneg <4 x float> %x26313  %19 = extractelement <4 x float> %x0, i64 06314  %20 = extractelement <4 x float> %x1, i64 06315  %21 = extractelement <4 x float> %18, i64 06316  %22 = call float @llvm.x86.avx512.vfmadd.f32(float %19, float %20, float %21, i32 10)6317  %23 = extractelement <4 x float> %x2, i64 06318  %24 = bitcast i8 %x3 to <8 x i1>6319  %25 = extractelement <8 x i1> %24, i64 06320  %26 = select i1 %25, float %22, float %236321  %27 = insertelement <4 x float> %x2, float %26, i64 06322  %res3 = fadd <4 x float> %10, %176323  %res4 = fadd <4 x float> %27, %res36324  ret <4 x float> %res46325}6326 6327define <2 x double> @test_int_x86_avx512_mask3_vfnmsub_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3, i32 %x4) {6328; X64-LABEL: test_int_x86_avx512_mask3_vfnmsub_sd:6329; X64:       # %bb.0:6330; X64-NEXT:    kmovw %edi, %k16331; X64-NEXT:    vmovapd %xmm2, %xmm36332; X64-NEXT:    vfnmsub231sd {{.*#+}} xmm3 {%k1} = -(xmm0 * xmm1) - xmm36333; X64-NEXT:    vmovapd %xmm2, %xmm46334; X64-NEXT:    vfnmsub231sd {rz-sae}, %xmm1, %xmm0, %xmm46335; X64-NEXT:    vaddpd %xmm4, %xmm3, %xmm36336; X64-NEXT:    vfnmsub231sd {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}6337; X64-NEXT:    vaddpd %xmm3, %xmm2, %xmm06338; X64-NEXT:    retq6339;6340; X86-LABEL: test_int_x86_avx512_mask3_vfnmsub_sd:6341; X86:       # %bb.0:6342; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6343; X86-NEXT:    kmovw %eax, %k16344; X86-NEXT:    vmovapd %xmm2, %xmm36345; X86-NEXT:    vfnmsub231sd {{.*#+}} xmm3 {%k1} = -(xmm0 * xmm1) - xmm36346; X86-NEXT:    vmovapd %xmm2, %xmm46347; X86-NEXT:    vfnmsub231sd {rz-sae}, %xmm1, %xmm0, %xmm46348; X86-NEXT:    vaddpd %xmm4, %xmm3, %xmm36349; X86-NEXT:    vfnmsub231sd {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}6350; X86-NEXT:    vaddpd %xmm3, %xmm2, %xmm06351; X86-NEXT:    retl6352  %1 = fneg <2 x double> %x06353  %2 = fneg <2 x double> %x26354  %3 = extractelement <2 x double> %1, i64 06355  %4 = extractelement <2 x double> %x1, i64 06356  %5 = extractelement <2 x double> %2, i64 06357  %6 = call double @llvm.fma.f64(double %3, double %4, double %5)6358  %7 = extractelement <2 x double> %x2, i64 06359  %8 = bitcast i8 %x3 to <8 x i1>6360  %9 = extractelement <8 x i1> %8, i64 06361  %10 = select i1 %9, double %6, double %76362  %11 = insertelement <2 x double> %x2, double %10, i64 06363  %12 = fneg <2 x double> %x06364  %13 = fneg <2 x double> %x26365  %14 = extractelement <2 x double> %12, i64 06366  %15 = extractelement <2 x double> %x1, i64 06367  %16 = extractelement <2 x double> %13, i64 06368  %17 = call double @llvm.x86.avx512.vfmadd.f64(double %14, double %15, double %16, i32 11)6369  %18 = extractelement <2 x double> %x2, i64 06370  %19 = insertelement <2 x double> %x2, double %17, i64 06371  %20 = fneg <2 x double> %x06372  %21 = fneg <2 x double> %x26373  %22 = extractelement <2 x double> %20, i64 06374  %23 = extractelement <2 x double> %x1, i64 06375  %24 = extractelement <2 x double> %21, i64 06376  %25 = call double @llvm.x86.avx512.vfmadd.f64(double %22, double %23, double %24, i32 10)6377  %26 = extractelement <2 x double> %x2, i64 06378  %27 = bitcast i8 %x3 to <8 x i1>6379  %28 = extractelement <8 x i1> %27, i64 06380  %29 = select i1 %28, double %25, double %266381  %30 = insertelement <2 x double> %x2, double %29, i64 06382  %res3 = fadd <2 x double> %11, %196383  %res4 = fadd <2 x double> %30, %res36384  ret <2 x double> %res46385}6386 6387define <4 x float> @test_int_x86_avx512_mask3_vfnmsub_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3, i32 %x4) {6388; X64-LABEL: test_int_x86_avx512_mask3_vfnmsub_ss:6389; X64:       # %bb.0:6390; X64-NEXT:    kmovw %edi, %k16391; X64-NEXT:    vmovaps %xmm2, %xmm36392; X64-NEXT:    vfnmsub231ss {{.*#+}} xmm3 {%k1} = -(xmm0 * xmm1) - xmm36393; X64-NEXT:    vmovaps %xmm2, %xmm46394; X64-NEXT:    vfnmsub231ss {rz-sae}, %xmm1, %xmm0, %xmm46395; X64-NEXT:    vaddps %xmm4, %xmm3, %xmm36396; X64-NEXT:    vfnmsub231ss {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}6397; X64-NEXT:    vaddps %xmm3, %xmm2, %xmm06398; X64-NEXT:    retq6399;6400; X86-LABEL: test_int_x86_avx512_mask3_vfnmsub_ss:6401; X86:       # %bb.0:6402; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6403; X86-NEXT:    kmovw %eax, %k16404; X86-NEXT:    vmovaps %xmm2, %xmm36405; X86-NEXT:    vfnmsub231ss {{.*#+}} xmm3 {%k1} = -(xmm0 * xmm1) - xmm36406; X86-NEXT:    vmovaps %xmm2, %xmm46407; X86-NEXT:    vfnmsub231ss {rz-sae}, %xmm1, %xmm0, %xmm46408; X86-NEXT:    vaddps %xmm4, %xmm3, %xmm36409; X86-NEXT:    vfnmsub231ss {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}6410; X86-NEXT:    vaddps %xmm3, %xmm2, %xmm06411; X86-NEXT:    retl6412  %1 = fneg <4 x float> %x06413  %2 = fneg <4 x float> %x26414  %3 = extractelement <4 x float> %1, i64 06415  %4 = extractelement <4 x float> %x1, i64 06416  %5 = extractelement <4 x float> %2, i64 06417  %6 = call float @llvm.fma.f32(float %3, float %4, float %5)6418  %7 = extractelement <4 x float> %x2, i64 06419  %8 = bitcast i8 %x3 to <8 x i1>6420  %9 = extractelement <8 x i1> %8, i64 06421  %10 = select i1 %9, float %6, float %76422  %11 = insertelement <4 x float> %x2, float %10, i64 06423  %12 = fneg <4 x float> %x06424  %13 = fneg <4 x float> %x26425  %14 = extractelement <4 x float> %12, i64 06426  %15 = extractelement <4 x float> %x1, i64 06427  %16 = extractelement <4 x float> %13, i64 06428  %17 = call float @llvm.x86.avx512.vfmadd.f32(float %14, float %15, float %16, i32 11)6429  %18 = extractelement <4 x float> %x2, i64 06430  %19 = insertelement <4 x float> %x2, float %17, i64 06431  %20 = fneg <4 x float> %x06432  %21 = fneg <4 x float> %x26433  %22 = extractelement <4 x float> %20, i64 06434  %23 = extractelement <4 x float> %x1, i64 06435  %24 = extractelement <4 x float> %21, i64 06436  %25 = call float @llvm.x86.avx512.vfmadd.f32(float %22, float %23, float %24, i32 10)6437  %26 = extractelement <4 x float> %x2, i64 06438  %27 = bitcast i8 %x3 to <8 x i1>6439  %28 = extractelement <8 x i1> %27, i64 06440  %29 = select i1 %28, float %25, float %266441  %30 = insertelement <4 x float> %x2, float %29, i64 06442  %res3 = fadd <4 x float> %11, %196443  %res4 = fadd <4 x float> %30, %res36444  ret <4 x float> %res46445}6446 6447define <4 x float>@test_int_x86_avx512_mask3_vfmadd_ss_rm(<4 x float> %x0, <4 x float> %x1, ptr%ptr_b ,i8 %x3,i32 %x4) {6448; X64-LABEL: test_int_x86_avx512_mask3_vfmadd_ss_rm:6449; X64:       # %bb.0:6450; X64-NEXT:    kmovw %esi, %k16451; X64-NEXT:    vfmadd231ss {{.*#+}} xmm1 {%k1} = (xmm0 * mem) + xmm16452; X64-NEXT:    vmovaps %xmm1, %xmm06453; X64-NEXT:    retq6454;6455; X86-LABEL: test_int_x86_avx512_mask3_vfmadd_ss_rm:6456; X86:       # %bb.0:6457; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax6458; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %ecx6459; X86-NEXT:    kmovw %ecx, %k16460; X86-NEXT:    vfmadd231ss {{.*#+}} xmm1 {%k1} = (xmm0 * mem) + xmm16461; X86-NEXT:    vmovaps %xmm1, %xmm06462; X86-NEXT:    retl6463  %q = load float, ptr %ptr_b6464  %vecinit.i = insertelement <4 x float> undef, float %q, i32 06465  %1 = extractelement <4 x float> %x0, i64 06466  %2 = extractelement <4 x float> %vecinit.i, i64 06467  %3 = extractelement <4 x float> %x1, i64 06468  %4 = call float @llvm.fma.f32(float %1, float %2, float %3)6469  %5 = bitcast i8 %x3 to <8 x i1>6470  %6 = extractelement <8 x i1> %5, i64 06471  %7 = select i1 %6, float %4, float %36472  %8 = insertelement <4 x float> %x1, float %7, i64 06473  ret <4 x float> %86474}6475 6476define <4 x float>@test_int_x86_avx512_mask_vfmadd_ss_rm(<4 x float> %x0, <4 x float> %x1,ptr%ptr_b ,i8 %x3,i32 %x4) {6477; X64-LABEL: test_int_x86_avx512_mask_vfmadd_ss_rm:6478; X64:       # %bb.0:6479; X64-NEXT:    kmovw %esi, %k16480; X64-NEXT:    vfmadd132ss {{.*#+}} xmm0 {%k1} = (xmm0 * mem) + xmm16481; X64-NEXT:    retq6482;6483; X86-LABEL: test_int_x86_avx512_mask_vfmadd_ss_rm:6484; X86:       # %bb.0:6485; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax6486; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %ecx6487; X86-NEXT:    kmovw %ecx, %k16488; X86-NEXT:    vfmadd132ss {{.*#+}} xmm0 {%k1} = (xmm0 * mem) + xmm16489; X86-NEXT:    retl6490  %q = load float, ptr %ptr_b6491  %vecinit.i = insertelement <4 x float> undef, float %q, i32 06492  %1 = extractelement <4 x float> %x0, i64 06493  %2 = extractelement <4 x float> %vecinit.i, i64 06494  %3 = extractelement <4 x float> %x1, i64 06495  %4 = call float @llvm.fma.f32(float %1, float %2, float %3)6496  %5 = bitcast i8 %x3 to <8 x i1>6497  %6 = extractelement <8 x i1> %5, i64 06498  %7 = select i1 %6, float %4, float %16499  %8 = insertelement <4 x float> %x0, float %7, i64 06500  ret <4 x float> %86501}6502 6503 6504define <4 x float>@test_int_x86_avx512_maskz_vfmadd_ss_rm(<4 x float> %x0, <4 x float> %x1,ptr%ptr_b ,i8 %x3,i32 %x4) {6505; CHECK-LABEL: test_int_x86_avx512_maskz_vfmadd_ss_rm:6506; CHECK:       # %bb.0:6507; CHECK-NEXT:    vxorps %xmm1, %xmm1, %xmm16508; CHECK-NEXT:    vmovss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]6509; CHECK-NEXT:    ret{{[l|q]}}6510  %q = load float, ptr %ptr_b6511  %vecinit.i = insertelement <4 x float> undef, float %q, i32 06512  %1 = extractelement <4 x float> %x0, i64 06513  %2 = extractelement <4 x float> %x1, i64 06514  %3 = extractelement <4 x float> %vecinit.i, i64 06515  %4 = call float @llvm.fma.f32(float %1, float %2, float %3)6516  %5 = select i1 false, float %4, float 0.000000e+006517  %6 = insertelement <4 x float> %x0, float %5, i64 06518  ret <4 x float> %66519}6520 6521define <16 x i32> @test_x86_avx512_psll_d_512(<16 x i32> %a0, <4 x i32> %a1) {6522; CHECK-LABEL: test_x86_avx512_psll_d_512:6523; CHECK:       # %bb.0:6524; CHECK-NEXT:    vpslld %xmm1, %zmm0, %zmm06525; CHECK-NEXT:    ret{{[l|q]}}6526  %res = call <16 x i32> @llvm.x86.avx512.psll.d.512(<16 x i32> %a0, <4 x i32> %a1) ; <<16 x i32>> [#uses=1]6527  ret <16 x i32> %res6528}6529define <16 x i32> @test_x86_avx512_mask_psll_d_512(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %passthru, i16 %mask) {6530; X64-LABEL: test_x86_avx512_mask_psll_d_512:6531; X64:       # %bb.0:6532; X64-NEXT:    kmovw %edi, %k16533; X64-NEXT:    vpslld %xmm1, %zmm0, %zmm2 {%k1}6534; X64-NEXT:    vmovdqa64 %zmm2, %zmm06535; X64-NEXT:    retq6536;6537; X86-LABEL: test_x86_avx512_mask_psll_d_512:6538; X86:       # %bb.0:6539; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k16540; X86-NEXT:    vpslld %xmm1, %zmm0, %zmm2 {%k1}6541; X86-NEXT:    vmovdqa64 %zmm2, %zmm06542; X86-NEXT:    retl6543  %res = call <16 x i32> @llvm.x86.avx512.psll.d.512(<16 x i32> %a0, <4 x i32> %a1) ; <<16 x i32>> [#uses=1]6544  %mask.cast = bitcast i16 %mask to <16 x i1>6545  %res2 = select <16 x i1> %mask.cast, <16 x i32> %res, <16 x i32> %passthru6546  ret <16 x i32> %res26547}6548define <16 x i32> @test_x86_avx512_maskz_psll_d_512(<16 x i32> %a0, <4 x i32> %a1, i16 %mask) {6549; X64-LABEL: test_x86_avx512_maskz_psll_d_512:6550; X64:       # %bb.0:6551; X64-NEXT:    kmovw %edi, %k16552; X64-NEXT:    vpslld %xmm1, %zmm0, %zmm0 {%k1} {z}6553; X64-NEXT:    retq6554;6555; X86-LABEL: test_x86_avx512_maskz_psll_d_512:6556; X86:       # %bb.0:6557; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k16558; X86-NEXT:    vpslld %xmm1, %zmm0, %zmm0 {%k1} {z}6559; X86-NEXT:    retl6560  %res = call <16 x i32> @llvm.x86.avx512.psll.d.512(<16 x i32> %a0, <4 x i32> %a1) ; <<16 x i32>> [#uses=1]6561  %mask.cast = bitcast i16 %mask to <16 x i1>6562  %res2 = select <16 x i1> %mask.cast, <16 x i32> %res, <16 x i32> zeroinitializer6563  ret <16 x i32> %res26564}6565declare <16 x i32> @llvm.x86.avx512.psll.d.512(<16 x i32>, <4 x i32>) nounwind readnone6566 6567 6568define <8 x i64> @test_x86_avx512_psll_q_512(<8 x i64> %a0, <2 x i64> %a1) {6569; CHECK-LABEL: test_x86_avx512_psll_q_512:6570; CHECK:       # %bb.0:6571; CHECK-NEXT:    vpsllq %xmm1, %zmm0, %zmm06572; CHECK-NEXT:    ret{{[l|q]}}6573  %res = call <8 x i64> @llvm.x86.avx512.psll.q.512(<8 x i64> %a0, <2 x i64> %a1) ; <<8 x i64>> [#uses=1]6574  ret <8 x i64> %res6575}6576define <8 x i64> @test_x86_avx512_mask_psll_q_512(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %passthru, i8 %mask) {6577; X64-LABEL: test_x86_avx512_mask_psll_q_512:6578; X64:       # %bb.0:6579; X64-NEXT:    kmovw %edi, %k16580; X64-NEXT:    vpsllq %xmm1, %zmm0, %zmm2 {%k1}6581; X64-NEXT:    vmovdqa64 %zmm2, %zmm06582; X64-NEXT:    retq6583;6584; X86-LABEL: test_x86_avx512_mask_psll_q_512:6585; X86:       # %bb.0:6586; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6587; X86-NEXT:    kmovw %eax, %k16588; X86-NEXT:    vpsllq %xmm1, %zmm0, %zmm2 {%k1}6589; X86-NEXT:    vmovdqa64 %zmm2, %zmm06590; X86-NEXT:    retl6591  %res = call <8 x i64> @llvm.x86.avx512.psll.q.512(<8 x i64> %a0, <2 x i64> %a1) ; <<8 x i64>> [#uses=1]6592  %mask.cast = bitcast i8 %mask to <8 x i1>6593  %res2 = select <8 x i1> %mask.cast, <8 x i64> %res, <8 x i64> %passthru6594  ret <8 x i64> %res26595}6596define <8 x i64> @test_x86_avx512_maskz_psll_q_512(<8 x i64> %a0, <2 x i64> %a1, i8 %mask) {6597; X64-LABEL: test_x86_avx512_maskz_psll_q_512:6598; X64:       # %bb.0:6599; X64-NEXT:    kmovw %edi, %k16600; X64-NEXT:    vpsllq %xmm1, %zmm0, %zmm0 {%k1} {z}6601; X64-NEXT:    retq6602;6603; X86-LABEL: test_x86_avx512_maskz_psll_q_512:6604; X86:       # %bb.0:6605; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6606; X86-NEXT:    kmovw %eax, %k16607; X86-NEXT:    vpsllq %xmm1, %zmm0, %zmm0 {%k1} {z}6608; X86-NEXT:    retl6609  %res = call <8 x i64> @llvm.x86.avx512.psll.q.512(<8 x i64> %a0, <2 x i64> %a1) ; <<8 x i64>> [#uses=1]6610  %mask.cast = bitcast i8 %mask to <8 x i1>6611  %res2 = select <8 x i1> %mask.cast, <8 x i64> %res, <8 x i64> zeroinitializer6612  ret <8 x i64> %res26613}6614declare <8 x i64> @llvm.x86.avx512.psll.q.512(<8 x i64>, <2 x i64>) nounwind readnone6615 6616 6617define <16 x i32> @test_x86_avx512_pslli_d_512(<16 x i32> %a0) {6618; CHECK-LABEL: test_x86_avx512_pslli_d_512:6619; CHECK:       # %bb.0:6620; CHECK-NEXT:    vpslld $7, %zmm0, %zmm06621; CHECK-NEXT:    ret{{[l|q]}}6622  %res = call <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32> %a0, i32 7) ; <<16 x i32>> [#uses=1]6623  ret <16 x i32> %res6624}6625define <16 x i32> @test_x86_avx512_mask_pslli_d_512(<16 x i32> %a0, <16 x i32> %passthru, i16 %mask) {6626; X64-LABEL: test_x86_avx512_mask_pslli_d_512:6627; X64:       # %bb.0:6628; X64-NEXT:    kmovw %edi, %k16629; X64-NEXT:    vpslld $7, %zmm0, %zmm1 {%k1}6630; X64-NEXT:    vmovdqa64 %zmm1, %zmm06631; X64-NEXT:    retq6632;6633; X86-LABEL: test_x86_avx512_mask_pslli_d_512:6634; X86:       # %bb.0:6635; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k16636; X86-NEXT:    vpslld $7, %zmm0, %zmm1 {%k1}6637; X86-NEXT:    vmovdqa64 %zmm1, %zmm06638; X86-NEXT:    retl6639  %res = call <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32> %a0, i32 7) ; <<16 x i32>> [#uses=1]6640  %mask.cast = bitcast i16 %mask to <16 x i1>6641  %res2 = select <16 x i1> %mask.cast, <16 x i32> %res, <16 x i32> %passthru6642  ret <16 x i32> %res26643}6644define <16 x i32> @test_x86_avx512_maskz_pslli_d_512(<16 x i32> %a0, i16 %mask) {6645; X64-LABEL: test_x86_avx512_maskz_pslli_d_512:6646; X64:       # %bb.0:6647; X64-NEXT:    kmovw %edi, %k16648; X64-NEXT:    vpslld $7, %zmm0, %zmm0 {%k1} {z}6649; X64-NEXT:    retq6650;6651; X86-LABEL: test_x86_avx512_maskz_pslli_d_512:6652; X86:       # %bb.0:6653; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k16654; X86-NEXT:    vpslld $7, %zmm0, %zmm0 {%k1} {z}6655; X86-NEXT:    retl6656  %res = call <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32> %a0, i32 7) ; <<16 x i32>> [#uses=1]6657  %mask.cast = bitcast i16 %mask to <16 x i1>6658  %res2 = select <16 x i1> %mask.cast, <16 x i32> %res, <16 x i32> zeroinitializer6659  ret <16 x i32> %res26660}6661declare <16 x i32> @llvm.x86.avx512.pslli.d.512(<16 x i32>, i32) nounwind readnone6662 6663 6664define <8 x i64> @test_x86_avx512_pslli_q_512(<8 x i64> %a0) {6665; CHECK-LABEL: test_x86_avx512_pslli_q_512:6666; CHECK:       # %bb.0:6667; CHECK-NEXT:    vpsllq $7, %zmm0, %zmm06668; CHECK-NEXT:    ret{{[l|q]}}6669  %res = call <8 x i64> @llvm.x86.avx512.pslli.q.512(<8 x i64> %a0, i32 7) ; <<8 x i64>> [#uses=1]6670  ret <8 x i64> %res6671}6672define <8 x i64> @test_x86_avx512_mask_pslli_q_512(<8 x i64> %a0, <8 x i64> %passthru, i8 %mask) {6673; X64-LABEL: test_x86_avx512_mask_pslli_q_512:6674; X64:       # %bb.0:6675; X64-NEXT:    kmovw %edi, %k16676; X64-NEXT:    vpsllq $7, %zmm0, %zmm1 {%k1}6677; X64-NEXT:    vmovdqa64 %zmm1, %zmm06678; X64-NEXT:    retq6679;6680; X86-LABEL: test_x86_avx512_mask_pslli_q_512:6681; X86:       # %bb.0:6682; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6683; X86-NEXT:    kmovw %eax, %k16684; X86-NEXT:    vpsllq $7, %zmm0, %zmm1 {%k1}6685; X86-NEXT:    vmovdqa64 %zmm1, %zmm06686; X86-NEXT:    retl6687  %res = call <8 x i64> @llvm.x86.avx512.pslli.q.512(<8 x i64> %a0, i32 7) ; <<8 x i64>> [#uses=1]6688  %mask.cast = bitcast i8 %mask to <8 x i1>6689  %res2 = select <8 x i1> %mask.cast, <8 x i64> %res, <8 x i64> %passthru6690  ret <8 x i64> %res26691}6692define <8 x i64> @test_x86_avx512_maskz_pslli_q_512(<8 x i64> %a0, <8 x i64> %passthru, i8 %mask) {6693; X64-LABEL: test_x86_avx512_maskz_pslli_q_512:6694; X64:       # %bb.0:6695; X64-NEXT:    kmovw %edi, %k16696; X64-NEXT:    vpsllq $7, %zmm0, %zmm0 {%k1} {z}6697; X64-NEXT:    retq6698;6699; X86-LABEL: test_x86_avx512_maskz_pslli_q_512:6700; X86:       # %bb.0:6701; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6702; X86-NEXT:    kmovw %eax, %k16703; X86-NEXT:    vpsllq $7, %zmm0, %zmm0 {%k1} {z}6704; X86-NEXT:    retl6705  %res = call <8 x i64> @llvm.x86.avx512.pslli.q.512(<8 x i64> %a0, i32 7) ; <<8 x i64>> [#uses=1]6706  %mask.cast = bitcast i8 %mask to <8 x i1>6707  %res2 = select <8 x i1> %mask.cast, <8 x i64> %res, <8 x i64> zeroinitializer6708  ret <8 x i64> %res26709}6710declare <8 x i64> @llvm.x86.avx512.pslli.q.512(<8 x i64>, i32) nounwind readnone6711 6712 6713define <8 x i64> @test_x86_avx512_psra_q_512(<8 x i64> %a0, <2 x i64> %a1) {6714; CHECK-LABEL: test_x86_avx512_psra_q_512:6715; CHECK:       # %bb.0:6716; CHECK-NEXT:    vpsraq %xmm1, %zmm0, %zmm06717; CHECK-NEXT:    ret{{[l|q]}}6718  %res = call <8 x i64> @llvm.x86.avx512.psra.q.512(<8 x i64> %a0, <2 x i64> %a1) ; <<8 x i64>> [#uses=1]6719  ret <8 x i64> %res6720}6721define <8 x i64> @test_x86_avx512_mask_psra_q_512(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %passthru, i8 %mask) {6722; X64-LABEL: test_x86_avx512_mask_psra_q_512:6723; X64:       # %bb.0:6724; X64-NEXT:    kmovw %edi, %k16725; X64-NEXT:    vpsraq %xmm1, %zmm0, %zmm2 {%k1}6726; X64-NEXT:    vmovdqa64 %zmm2, %zmm06727; X64-NEXT:    retq6728;6729; X86-LABEL: test_x86_avx512_mask_psra_q_512:6730; X86:       # %bb.0:6731; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6732; X86-NEXT:    kmovw %eax, %k16733; X86-NEXT:    vpsraq %xmm1, %zmm0, %zmm2 {%k1}6734; X86-NEXT:    vmovdqa64 %zmm2, %zmm06735; X86-NEXT:    retl6736  %res = call <8 x i64> @llvm.x86.avx512.psra.q.512(<8 x i64> %a0, <2 x i64> %a1) ; <<8 x i64>> [#uses=1]6737  %mask.cast = bitcast i8 %mask to <8 x i1>6738  %res2 = select <8 x i1> %mask.cast, <8 x i64> %res, <8 x i64> %passthru6739  ret <8 x i64> %res26740}6741define <8 x i64> @test_x86_avx512_maskz_psra_q_512(<8 x i64> %a0, <2 x i64> %a1, i8 %mask) {6742; X64-LABEL: test_x86_avx512_maskz_psra_q_512:6743; X64:       # %bb.0:6744; X64-NEXT:    kmovw %edi, %k16745; X64-NEXT:    vpsraq %xmm1, %zmm0, %zmm0 {%k1} {z}6746; X64-NEXT:    retq6747;6748; X86-LABEL: test_x86_avx512_maskz_psra_q_512:6749; X86:       # %bb.0:6750; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6751; X86-NEXT:    kmovw %eax, %k16752; X86-NEXT:    vpsraq %xmm1, %zmm0, %zmm0 {%k1} {z}6753; X86-NEXT:    retl6754  %res = call <8 x i64> @llvm.x86.avx512.psra.q.512(<8 x i64> %a0, <2 x i64> %a1) ; <<8 x i64>> [#uses=1]6755  %mask.cast = bitcast i8 %mask to <8 x i1>6756  %res2 = select <8 x i1> %mask.cast, <8 x i64> %res, <8 x i64> zeroinitializer6757  ret <8 x i64> %res26758}6759declare <8 x i64> @llvm.x86.avx512.psra.q.512(<8 x i64>, <2 x i64>) nounwind readnone6760 6761 6762define <16 x i32> @test_x86_avx512_psra_d_512(<16 x i32> %a0, <4 x i32> %a1) {6763; CHECK-LABEL: test_x86_avx512_psra_d_512:6764; CHECK:       # %bb.0:6765; CHECK-NEXT:    vpsrad %xmm1, %zmm0, %zmm06766; CHECK-NEXT:    ret{{[l|q]}}6767  %res = call <16 x i32> @llvm.x86.avx512.psra.d.512(<16 x i32> %a0, <4 x i32> %a1) ; <<16 x i32>> [#uses=1]6768  ret <16 x i32> %res6769}6770define <16 x i32> @test_x86_avx512_mask_psra_d_512(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %passthru, i16 %mask) {6771; X64-LABEL: test_x86_avx512_mask_psra_d_512:6772; X64:       # %bb.0:6773; X64-NEXT:    kmovw %edi, %k16774; X64-NEXT:    vpsrad %xmm1, %zmm0, %zmm2 {%k1}6775; X64-NEXT:    vmovdqa64 %zmm2, %zmm06776; X64-NEXT:    retq6777;6778; X86-LABEL: test_x86_avx512_mask_psra_d_512:6779; X86:       # %bb.0:6780; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k16781; X86-NEXT:    vpsrad %xmm1, %zmm0, %zmm2 {%k1}6782; X86-NEXT:    vmovdqa64 %zmm2, %zmm06783; X86-NEXT:    retl6784  %res = call <16 x i32> @llvm.x86.avx512.psra.d.512(<16 x i32> %a0, <4 x i32> %a1) ; <<16 x i32>> [#uses=1]6785  %mask.cast = bitcast i16 %mask to <16 x i1>6786  %res2 = select <16 x i1> %mask.cast, <16 x i32> %res, <16 x i32> %passthru6787  ret <16 x i32> %res26788}6789define <16 x i32> @test_x86_avx512_maskz_psra_d_512(<16 x i32> %a0, <4 x i32> %a1, i16 %mask) {6790; X64-LABEL: test_x86_avx512_maskz_psra_d_512:6791; X64:       # %bb.0:6792; X64-NEXT:    kmovw %edi, %k16793; X64-NEXT:    vpsrad %xmm1, %zmm0, %zmm0 {%k1} {z}6794; X64-NEXT:    retq6795;6796; X86-LABEL: test_x86_avx512_maskz_psra_d_512:6797; X86:       # %bb.0:6798; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k16799; X86-NEXT:    vpsrad %xmm1, %zmm0, %zmm0 {%k1} {z}6800; X86-NEXT:    retl6801  %res = call <16 x i32> @llvm.x86.avx512.psra.d.512(<16 x i32> %a0, <4 x i32> %a1) ; <<16 x i32>> [#uses=1]6802  %mask.cast = bitcast i16 %mask to <16 x i1>6803  %res2 = select <16 x i1> %mask.cast, <16 x i32> %res, <16 x i32> zeroinitializer6804  ret <16 x i32> %res26805}6806declare <16 x i32> @llvm.x86.avx512.psra.d.512(<16 x i32>, <4 x i32>) nounwind readnone6807 6808 6809 6810define <8 x i64> @test_x86_avx512_psrai_q_512(<8 x i64> %a0) {6811; CHECK-LABEL: test_x86_avx512_psrai_q_512:6812; CHECK:       # %bb.0:6813; CHECK-NEXT:    vpsraq $7, %zmm0, %zmm06814; CHECK-NEXT:    ret{{[l|q]}}6815  %res = call <8 x i64> @llvm.x86.avx512.psrai.q.512(<8 x i64> %a0, i32 7) ; <<8 x i64>> [#uses=1]6816  ret <8 x i64> %res6817}6818define <8 x i64> @test_x86_avx512_mask_psrai_q_512(<8 x i64> %a0, <8 x i64> %passthru, i8 %mask) {6819; X64-LABEL: test_x86_avx512_mask_psrai_q_512:6820; X64:       # %bb.0:6821; X64-NEXT:    kmovw %edi, %k16822; X64-NEXT:    vpsraq $7, %zmm0, %zmm1 {%k1}6823; X64-NEXT:    vmovdqa64 %zmm1, %zmm06824; X64-NEXT:    retq6825;6826; X86-LABEL: test_x86_avx512_mask_psrai_q_512:6827; X86:       # %bb.0:6828; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6829; X86-NEXT:    kmovw %eax, %k16830; X86-NEXT:    vpsraq $7, %zmm0, %zmm1 {%k1}6831; X86-NEXT:    vmovdqa64 %zmm1, %zmm06832; X86-NEXT:    retl6833  %res = call <8 x i64> @llvm.x86.avx512.psrai.q.512(<8 x i64> %a0, i32 7) ; <<8 x i64>> [#uses=1]6834  %mask.cast = bitcast i8 %mask to <8 x i1>6835  %res2 = select <8 x i1> %mask.cast, <8 x i64> %res, <8 x i64> %passthru6836  ret <8 x i64> %res26837}6838define <8 x i64> @test_x86_avx512_maskz_psrai_q_512(<8 x i64> %a0, i8 %mask) {6839; X64-LABEL: test_x86_avx512_maskz_psrai_q_512:6840; X64:       # %bb.0:6841; X64-NEXT:    kmovw %edi, %k16842; X64-NEXT:    vpsraq $7, %zmm0, %zmm0 {%k1} {z}6843; X64-NEXT:    retq6844;6845; X86-LABEL: test_x86_avx512_maskz_psrai_q_512:6846; X86:       # %bb.0:6847; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6848; X86-NEXT:    kmovw %eax, %k16849; X86-NEXT:    vpsraq $7, %zmm0, %zmm0 {%k1} {z}6850; X86-NEXT:    retl6851  %res = call <8 x i64> @llvm.x86.avx512.psrai.q.512(<8 x i64> %a0, i32 7) ; <<8 x i64>> [#uses=1]6852  %mask.cast = bitcast i8 %mask to <8 x i1>6853  %res2 = select <8 x i1> %mask.cast, <8 x i64> %res, <8 x i64> zeroinitializer6854  ret <8 x i64> %res26855}6856declare <8 x i64> @llvm.x86.avx512.psrai.q.512(<8 x i64>, i32) nounwind readnone6857 6858 6859define <16 x i32> @test_x86_avx512_psrai_d_512(<16 x i32> %a0) {6860; CHECK-LABEL: test_x86_avx512_psrai_d_512:6861; CHECK:       # %bb.0:6862; CHECK-NEXT:    vpsrad $7, %zmm0, %zmm06863; CHECK-NEXT:    ret{{[l|q]}}6864  %res = call <16 x i32> @llvm.x86.avx512.psrai.d.512(<16 x i32> %a0, i32 7) ; <<16 x i32>> [#uses=1]6865  ret <16 x i32> %res6866}6867define <16 x i32> @test_x86_avx512_mask_psrai_d_512(<16 x i32> %a0, <16 x i32> %passthru, i16 %mask) {6868; X64-LABEL: test_x86_avx512_mask_psrai_d_512:6869; X64:       # %bb.0:6870; X64-NEXT:    kmovw %edi, %k16871; X64-NEXT:    vpsrad $7, %zmm0, %zmm1 {%k1}6872; X64-NEXT:    vmovdqa64 %zmm1, %zmm06873; X64-NEXT:    retq6874;6875; X86-LABEL: test_x86_avx512_mask_psrai_d_512:6876; X86:       # %bb.0:6877; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k16878; X86-NEXT:    vpsrad $7, %zmm0, %zmm1 {%k1}6879; X86-NEXT:    vmovdqa64 %zmm1, %zmm06880; X86-NEXT:    retl6881  %res = call <16 x i32> @llvm.x86.avx512.psrai.d.512(<16 x i32> %a0, i32 7) ; <<16 x i32>> [#uses=1]6882  %mask.cast = bitcast i16 %mask to <16 x i1>6883  %res2 = select <16 x i1> %mask.cast, <16 x i32> %res, <16 x i32> %passthru6884  ret <16 x i32> %res26885}6886define <16 x i32> @test_x86_avx512_maskz_psrai_d_512(<16 x i32> %a0, i16 %mask) {6887; X64-LABEL: test_x86_avx512_maskz_psrai_d_512:6888; X64:       # %bb.0:6889; X64-NEXT:    kmovw %edi, %k16890; X64-NEXT:    vpsrad $7, %zmm0, %zmm0 {%k1} {z}6891; X64-NEXT:    retq6892;6893; X86-LABEL: test_x86_avx512_maskz_psrai_d_512:6894; X86:       # %bb.0:6895; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k16896; X86-NEXT:    vpsrad $7, %zmm0, %zmm0 {%k1} {z}6897; X86-NEXT:    retl6898  %res = call <16 x i32> @llvm.x86.avx512.psrai.d.512(<16 x i32> %a0, i32 7) ; <<16 x i32>> [#uses=1]6899  %mask.cast = bitcast i16 %mask to <16 x i1>6900  %res2 = select <16 x i1> %mask.cast, <16 x i32> %res, <16 x i32> zeroinitializer6901  ret <16 x i32> %res26902}6903declare <16 x i32> @llvm.x86.avx512.psrai.d.512(<16 x i32>, i32) nounwind readnone6904 6905 6906 6907define <16 x i32> @test_x86_avx512_psrl_d_512(<16 x i32> %a0, <4 x i32> %a1) {6908; CHECK-LABEL: test_x86_avx512_psrl_d_512:6909; CHECK:       # %bb.0:6910; CHECK-NEXT:    vpsrld %xmm1, %zmm0, %zmm06911; CHECK-NEXT:    ret{{[l|q]}}6912  %res = call <16 x i32> @llvm.x86.avx512.psrl.d.512(<16 x i32> %a0, <4 x i32> %a1) ; <<16 x i32>> [#uses=1]6913  ret <16 x i32> %res6914}6915define <16 x i32> @test_x86_avx512_mask_psrl_d_512(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %passthru, i16 %mask) {6916; X64-LABEL: test_x86_avx512_mask_psrl_d_512:6917; X64:       # %bb.0:6918; X64-NEXT:    kmovw %edi, %k16919; X64-NEXT:    vpsrld %xmm1, %zmm0, %zmm2 {%k1}6920; X64-NEXT:    vmovdqa64 %zmm2, %zmm06921; X64-NEXT:    retq6922;6923; X86-LABEL: test_x86_avx512_mask_psrl_d_512:6924; X86:       # %bb.0:6925; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k16926; X86-NEXT:    vpsrld %xmm1, %zmm0, %zmm2 {%k1}6927; X86-NEXT:    vmovdqa64 %zmm2, %zmm06928; X86-NEXT:    retl6929  %res = call <16 x i32> @llvm.x86.avx512.psrl.d.512(<16 x i32> %a0, <4 x i32> %a1) ; <<16 x i32>> [#uses=1]6930  %mask.cast = bitcast i16 %mask to <16 x i1>6931  %res2 = select <16 x i1> %mask.cast, <16 x i32> %res, <16 x i32> %passthru6932  ret <16 x i32> %res26933}6934define <16 x i32> @test_x86_avx512_maskz_psrl_d_512(<16 x i32> %a0, <4 x i32> %a1, i16 %mask) {6935; X64-LABEL: test_x86_avx512_maskz_psrl_d_512:6936; X64:       # %bb.0:6937; X64-NEXT:    kmovw %edi, %k16938; X64-NEXT:    vpsrld %xmm1, %zmm0, %zmm0 {%k1} {z}6939; X64-NEXT:    retq6940;6941; X86-LABEL: test_x86_avx512_maskz_psrl_d_512:6942; X86:       # %bb.0:6943; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k16944; X86-NEXT:    vpsrld %xmm1, %zmm0, %zmm0 {%k1} {z}6945; X86-NEXT:    retl6946  %res = call <16 x i32> @llvm.x86.avx512.psrl.d.512(<16 x i32> %a0, <4 x i32> %a1) ; <<16 x i32>> [#uses=1]6947  %mask.cast = bitcast i16 %mask to <16 x i1>6948  %res2 = select <16 x i1> %mask.cast, <16 x i32> %res, <16 x i32> zeroinitializer6949  ret <16 x i32> %res26950}6951declare <16 x i32> @llvm.x86.avx512.psrl.d.512(<16 x i32>, <4 x i32>) nounwind readnone6952 6953 6954define <8 x i64> @test_x86_avx512_psrl_q_512(<8 x i64> %a0, <2 x i64> %a1) {6955; CHECK-LABEL: test_x86_avx512_psrl_q_512:6956; CHECK:       # %bb.0:6957; CHECK-NEXT:    vpsrlq %xmm1, %zmm0, %zmm06958; CHECK-NEXT:    ret{{[l|q]}}6959  %res = call <8 x i64> @llvm.x86.avx512.psrl.q.512(<8 x i64> %a0, <2 x i64> %a1) ; <<8 x i64>> [#uses=1]6960  ret <8 x i64> %res6961}6962define <8 x i64> @test_x86_avx512_mask_psrl_q_512(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %passthru, i8 %mask) {6963; X64-LABEL: test_x86_avx512_mask_psrl_q_512:6964; X64:       # %bb.0:6965; X64-NEXT:    kmovw %edi, %k16966; X64-NEXT:    vpsrlq %xmm1, %zmm0, %zmm2 {%k1}6967; X64-NEXT:    vmovdqa64 %zmm2, %zmm06968; X64-NEXT:    retq6969;6970; X86-LABEL: test_x86_avx512_mask_psrl_q_512:6971; X86:       # %bb.0:6972; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6973; X86-NEXT:    kmovw %eax, %k16974; X86-NEXT:    vpsrlq %xmm1, %zmm0, %zmm2 {%k1}6975; X86-NEXT:    vmovdqa64 %zmm2, %zmm06976; X86-NEXT:    retl6977  %res = call <8 x i64> @llvm.x86.avx512.psrl.q.512(<8 x i64> %a0, <2 x i64> %a1) ; <<8 x i64>> [#uses=1]6978  %mask.cast = bitcast i8 %mask to <8 x i1>6979  %res2 = select <8 x i1> %mask.cast, <8 x i64> %res, <8 x i64> %passthru6980  ret <8 x i64> %res26981}6982define <8 x i64> @test_x86_avx512_maskz_psrl_q_512(<8 x i64> %a0, <2 x i64> %a1, i8 %mask) {6983; X64-LABEL: test_x86_avx512_maskz_psrl_q_512:6984; X64:       # %bb.0:6985; X64-NEXT:    kmovw %edi, %k16986; X64-NEXT:    vpsrlq %xmm1, %zmm0, %zmm0 {%k1} {z}6987; X64-NEXT:    retq6988;6989; X86-LABEL: test_x86_avx512_maskz_psrl_q_512:6990; X86:       # %bb.0:6991; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax6992; X86-NEXT:    kmovw %eax, %k16993; X86-NEXT:    vpsrlq %xmm1, %zmm0, %zmm0 {%k1} {z}6994; X86-NEXT:    retl6995  %res = call <8 x i64> @llvm.x86.avx512.psrl.q.512(<8 x i64> %a0, <2 x i64> %a1) ; <<8 x i64>> [#uses=1]6996  %mask.cast = bitcast i8 %mask to <8 x i1>6997  %res2 = select <8 x i1> %mask.cast, <8 x i64> %res, <8 x i64> zeroinitializer6998  ret <8 x i64> %res26999}7000declare <8 x i64> @llvm.x86.avx512.psrl.q.512(<8 x i64>, <2 x i64>) nounwind readnone7001 7002 7003define <16 x i32> @test_x86_avx512_psrli_d_512(<16 x i32> %a0) {7004; CHECK-LABEL: test_x86_avx512_psrli_d_512:7005; CHECK:       # %bb.0:7006; CHECK-NEXT:    vpsrld $7, %zmm0, %zmm07007; CHECK-NEXT:    ret{{[l|q]}}7008  %res = call <16 x i32> @llvm.x86.avx512.psrli.d.512(<16 x i32> %a0, i32 7) ; <<16 x i32>> [#uses=1]7009  ret <16 x i32> %res7010}7011define <16 x i32> @test_x86_avx512_mask_psrli_d_512(<16 x i32> %a0, <16 x i32> %passthru, i16 %mask) {7012; X64-LABEL: test_x86_avx512_mask_psrli_d_512:7013; X64:       # %bb.0:7014; X64-NEXT:    kmovw %edi, %k17015; X64-NEXT:    vpsrld $7, %zmm0, %zmm1 {%k1}7016; X64-NEXT:    vmovdqa64 %zmm1, %zmm07017; X64-NEXT:    retq7018;7019; X86-LABEL: test_x86_avx512_mask_psrli_d_512:7020; X86:       # %bb.0:7021; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k17022; X86-NEXT:    vpsrld $7, %zmm0, %zmm1 {%k1}7023; X86-NEXT:    vmovdqa64 %zmm1, %zmm07024; X86-NEXT:    retl7025  %res = call <16 x i32> @llvm.x86.avx512.psrli.d.512(<16 x i32> %a0, i32 7) ; <<16 x i32>> [#uses=1]7026  %mask.cast = bitcast i16 %mask to <16 x i1>7027  %res2 = select <16 x i1> %mask.cast, <16 x i32> %res, <16 x i32> %passthru7028  ret <16 x i32> %res27029}7030define <16 x i32> @test_x86_avx512_maskz_psrli_d_512(<16 x i32> %a0, i16 %mask) {7031; X64-LABEL: test_x86_avx512_maskz_psrli_d_512:7032; X64:       # %bb.0:7033; X64-NEXT:    kmovw %edi, %k17034; X64-NEXT:    vpsrld $7, %zmm0, %zmm0 {%k1} {z}7035; X64-NEXT:    retq7036;7037; X86-LABEL: test_x86_avx512_maskz_psrli_d_512:7038; X86:       # %bb.0:7039; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k17040; X86-NEXT:    vpsrld $7, %zmm0, %zmm0 {%k1} {z}7041; X86-NEXT:    retl7042  %res = call <16 x i32> @llvm.x86.avx512.psrli.d.512(<16 x i32> %a0, i32 7) ; <<16 x i32>> [#uses=1]7043  %mask.cast = bitcast i16 %mask to <16 x i1>7044  %res2 = select <16 x i1> %mask.cast, <16 x i32> %res, <16 x i32> zeroinitializer7045  ret <16 x i32> %res27046}7047declare <16 x i32> @llvm.x86.avx512.psrli.d.512(<16 x i32>, i32) nounwind readnone7048 7049 7050define <8 x i64> @test_x86_avx512_psrli_q_512(<8 x i64> %a0) {7051; CHECK-LABEL: test_x86_avx512_psrli_q_512:7052; CHECK:       # %bb.0:7053; CHECK-NEXT:    vpsrlq $7, %zmm0, %zmm07054; CHECK-NEXT:    ret{{[l|q]}}7055  %res = call <8 x i64> @llvm.x86.avx512.psrli.q.512(<8 x i64> %a0, i32 7) ; <<8 x i64>> [#uses=1]7056  ret <8 x i64> %res7057}7058define <8 x i64> @test_x86_avx512_mask_psrli_q_512(<8 x i64> %a0, <8 x i64> %passthru, i8 %mask) {7059; X64-LABEL: test_x86_avx512_mask_psrli_q_512:7060; X64:       # %bb.0:7061; X64-NEXT:    kmovw %edi, %k17062; X64-NEXT:    vpsrlq $7, %zmm0, %zmm1 {%k1}7063; X64-NEXT:    vmovdqa64 %zmm1, %zmm07064; X64-NEXT:    retq7065;7066; X86-LABEL: test_x86_avx512_mask_psrli_q_512:7067; X86:       # %bb.0:7068; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax7069; X86-NEXT:    kmovw %eax, %k17070; X86-NEXT:    vpsrlq $7, %zmm0, %zmm1 {%k1}7071; X86-NEXT:    vmovdqa64 %zmm1, %zmm07072; X86-NEXT:    retl7073  %res = call <8 x i64> @llvm.x86.avx512.psrli.q.512(<8 x i64> %a0, i32 7) ; <<8 x i64>> [#uses=1]7074  %mask.cast = bitcast i8 %mask to <8 x i1>7075  %res2 = select <8 x i1> %mask.cast, <8 x i64> %res, <8 x i64> %passthru7076  ret <8 x i64> %res27077}7078define <8 x i64> @test_x86_avx512_maskz_psrli_q_512(<8 x i64> %a0, i8 %mask) {7079; X64-LABEL: test_x86_avx512_maskz_psrli_q_512:7080; X64:       # %bb.0:7081; X64-NEXT:    kmovw %edi, %k17082; X64-NEXT:    vpsrlq $7, %zmm0, %zmm0 {%k1} {z}7083; X64-NEXT:    retq7084;7085; X86-LABEL: test_x86_avx512_maskz_psrli_q_512:7086; X86:       # %bb.0:7087; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax7088; X86-NEXT:    kmovw %eax, %k17089; X86-NEXT:    vpsrlq $7, %zmm0, %zmm0 {%k1} {z}7090; X86-NEXT:    retl7091  %res = call <8 x i64> @llvm.x86.avx512.psrli.q.512(<8 x i64> %a0, i32 7) ; <<8 x i64>> [#uses=1]7092  %mask.cast = bitcast i8 %mask to <8 x i1>7093  %res2 = select <8 x i1> %mask.cast, <8 x i64> %res, <8 x i64> zeroinitializer7094  ret <8 x i64> %res27095}7096declare <8 x i64> @llvm.x86.avx512.psrli.q.512(<8 x i64>, i32) nounwind readnone7097 7098define <16 x i32> @test_x86_avx512_psllv_d_512(<16 x i32> %a0, <16 x i32> %a1) {7099; CHECK-LABEL: test_x86_avx512_psllv_d_512:7100; CHECK:       # %bb.0:7101; CHECK-NEXT:    vpsllvd %zmm1, %zmm0, %zmm07102; CHECK-NEXT:    ret{{[l|q]}}7103  %res = call <16 x i32> @llvm.x86.avx512.psllv.d.512(<16 x i32> %a0, <16 x i32> %a1)7104  ret <16 x i32> %res7105}7106 7107define <16 x i32> @test_x86_avx512_psllv_d_512_const() {7108; X64-LABEL: test_x86_avx512_psllv_d_512_const:7109; X64:       # %bb.0:7110; X64-NEXT:    vpmovsxbd {{.*#+}} zmm0 = [2,9,0,4294967295,3,7,4294967295,0,4,5,4294967294,0,5,3,4294967293,0]7111; X64-NEXT:    vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm07112; X64-NEXT:    vpmovsxbd {{.*#+}} zmm1 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4294967295]7113; X64-NEXT:    vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm17114; X64-NEXT:    vpaddd %zmm1, %zmm0, %zmm07115; X64-NEXT:    retq7116;7117; X86-LABEL: test_x86_avx512_psllv_d_512_const:7118; X86:       # %bb.0:7119; X86-NEXT:    vpmovsxbd {{.*#+}} zmm0 = [2,9,0,4294967295,3,7,4294967295,0,4,5,4294967294,0,5,3,4294967293,0]7120; X86-NEXT:    vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}, %zmm0, %zmm07121; X86-NEXT:    vpmovsxbd {{.*#+}} zmm1 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4294967295]7122; X86-NEXT:    vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}, %zmm1, %zmm17123; X86-NEXT:    vpaddd %zmm1, %zmm0, %zmm07124; X86-NEXT:    retl7125  %res0 = call <16 x i32> @llvm.x86.avx512.psllv.d.512(<16 x i32> <i32 2, i32 9, i32 0, i32 -1, i32 3, i32 7, i32 -1, i32 0, i32 4, i32 5, i32 -2, i32 0, i32 5, i32 3, i32 -3, i32 0>, <16 x i32> <i32 1, i32 0, i32 33, i32 -1,i32 2, i32 0, i32 34, i32 -2, i32 3, i32 0, i32 35, i32 -1, i32 4, i32 0, i32 36, i32 -3>)7126  %res1 = call <16 x i32> @llvm.x86.avx512.psllv.d.512(<16 x i32> <i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 -1>, <16 x i32> <i32 1, i32 1, i32 1,  i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1,  i32 1, i32 1, i32 1, i32 1, i32 -1>)7127  %res2 = add <16 x i32> %res0, %res17128  ret <16 x i32> %res27129}7130 7131define <16 x i32> @test_x86_avx512_mask_psllv_d_512(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask) {7132; X64-LABEL: test_x86_avx512_mask_psllv_d_512:7133; X64:       # %bb.0:7134; X64-NEXT:    kmovw %edi, %k17135; X64-NEXT:    vpsllvd %zmm1, %zmm0, %zmm2 {%k1}7136; X64-NEXT:    vmovdqa64 %zmm2, %zmm07137; X64-NEXT:    retq7138;7139; X86-LABEL: test_x86_avx512_mask_psllv_d_512:7140; X86:       # %bb.0:7141; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k17142; X86-NEXT:    vpsllvd %zmm1, %zmm0, %zmm2 {%k1}7143; X86-NEXT:    vmovdqa64 %zmm2, %zmm07144; X86-NEXT:    retl7145  %res = call <16 x i32> @llvm.x86.avx512.psllv.d.512(<16 x i32> %a0, <16 x i32> %a1)7146  %mask.cast = bitcast i16 %mask to <16 x i1>7147  %res2 = select <16 x i1> %mask.cast, <16 x i32> %res, <16 x i32> %a27148  ret <16 x i32> %res27149}7150 7151define <16 x i32> @test_x86_avx512_maskz_psllv_d_512(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {7152; X64-LABEL: test_x86_avx512_maskz_psllv_d_512:7153; X64:       # %bb.0:7154; X64-NEXT:    kmovw %edi, %k17155; X64-NEXT:    vpsllvd %zmm1, %zmm0, %zmm0 {%k1} {z}7156; X64-NEXT:    retq7157;7158; X86-LABEL: test_x86_avx512_maskz_psllv_d_512:7159; X86:       # %bb.0:7160; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k17161; X86-NEXT:    vpsllvd %zmm1, %zmm0, %zmm0 {%k1} {z}7162; X86-NEXT:    retl7163  %res = call <16 x i32> @llvm.x86.avx512.psllv.d.512(<16 x i32> %a0, <16 x i32> %a1)7164  %mask.cast = bitcast i16 %mask to <16 x i1>7165  %res2 = select <16 x i1> %mask.cast, <16 x i32> %res, <16 x i32> zeroinitializer7166  ret <16 x i32> %res27167}7168 7169declare <16 x i32> @llvm.x86.avx512.psllv.d.512(<16 x i32>, <16 x i32>) nounwind readnone7170 7171define <8 x i64> @test_x86_avx512_psllv_q_512(<8 x i64> %a0, <8 x i64> %a1) {7172; CHECK-LABEL: test_x86_avx512_psllv_q_512:7173; CHECK:       # %bb.0:7174; CHECK-NEXT:    vpsllvq %zmm1, %zmm0, %zmm07175; CHECK-NEXT:    ret{{[l|q]}}7176  %res = call <8 x i64> @llvm.x86.avx512.psllv.q.512(<8 x i64> %a0, <8 x i64> %a1)7177  ret <8 x i64> %res7178}7179 7180define <8 x i64> @test_x86_avx512_psllv_q_512_const() {7181; X64-LABEL: test_x86_avx512_psllv_q_512_const:7182; X64:       # %bb.0:7183; X64-NEXT:    vpmovsxbq {{.*#+}} zmm0 = [2,9,0,18446744073709551615,3,7,18446744073709551615,0]7184; X64-NEXT:    vpsllvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm07185; X64-NEXT:    vpmovsxbq {{.*#+}} zmm1 = [4,4,4,4,4,4,4,18446744073709551615]7186; X64-NEXT:    vpsllvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm17187; X64-NEXT:    vpaddq %zmm1, %zmm0, %zmm07188; X64-NEXT:    retq7189;7190; X86-LABEL: test_x86_avx512_psllv_q_512_const:7191; X86:       # %bb.0:7192; X86-NEXT:    vpmovsxbq {{.*#+}} zmm0 = [2,9,0,18446744073709551615,3,7,18446744073709551615,0]7193; X86-NEXT:    vpsllvq {{\.?LCPI[0-9]+_[0-9]+}}, %zmm0, %zmm07194; X86-NEXT:    vpmovsxbq {{.*#+}} zmm1 = [4,4,4,4,4,4,4,18446744073709551615]7195; X86-NEXT:    vpsllvq {{\.?LCPI[0-9]+_[0-9]+}}, %zmm1, %zmm17196; X86-NEXT:    vpaddq %zmm1, %zmm0, %zmm07197; X86-NEXT:    retl7198  %res0 = call <8 x i64> @llvm.x86.avx512.psllv.q.512(<8 x i64> <i64 2, i64 9, i64 0, i64 -1, i64 3, i64 7, i64 -1, i64 0>, <8 x i64> <i64 1, i64 0, i64 33, i64 -1,i64 2, i64 0, i64 34, i64 -2>)7199  %res1 = call <8 x i64> @llvm.x86.avx512.psllv.q.512(<8 x i64> <i64 4, i64 4, i64 4, i64 4, i64 4, i64 4, i64 4, i64 -1>, <8 x i64> <i64 1, i64 1, i64 1, i64 1,  i64 1, i64 1, i64 1, i64 -1>)7200  %res2 = add <8 x i64> %res0, %res17201  ret <8 x i64> %res27202}7203 7204define <8 x i64> @test_x86_avx512_mask_psllv_q_512(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask) {7205; X64-LABEL: test_x86_avx512_mask_psllv_q_512:7206; X64:       # %bb.0:7207; X64-NEXT:    kmovw %edi, %k17208; X64-NEXT:    vpsllvq %zmm1, %zmm0, %zmm2 {%k1}7209; X64-NEXT:    vmovdqa64 %zmm2, %zmm07210; X64-NEXT:    retq7211;7212; X86-LABEL: test_x86_avx512_mask_psllv_q_512:7213; X86:       # %bb.0:7214; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax7215; X86-NEXT:    kmovw %eax, %k17216; X86-NEXT:    vpsllvq %zmm1, %zmm0, %zmm2 {%k1}7217; X86-NEXT:    vmovdqa64 %zmm2, %zmm07218; X86-NEXT:    retl7219  %res = call <8 x i64> @llvm.x86.avx512.psllv.q.512(<8 x i64> %a0, <8 x i64> %a1)7220  %mask.cast = bitcast i8 %mask to <8 x i1>7221  %res2 = select <8 x i1> %mask.cast, <8 x i64> %res, <8 x i64> %a27222  ret <8 x i64> %res27223}7224 7225define <8 x i64> @test_x86_avx512_maskz_psllv_q_512(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {7226; X64-LABEL: test_x86_avx512_maskz_psllv_q_512:7227; X64:       # %bb.0:7228; X64-NEXT:    kmovw %edi, %k17229; X64-NEXT:    vpsllvq %zmm1, %zmm0, %zmm0 {%k1} {z}7230; X64-NEXT:    retq7231;7232; X86-LABEL: test_x86_avx512_maskz_psllv_q_512:7233; X86:       # %bb.0:7234; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax7235; X86-NEXT:    kmovw %eax, %k17236; X86-NEXT:    vpsllvq %zmm1, %zmm0, %zmm0 {%k1} {z}7237; X86-NEXT:    retl7238  %res = call <8 x i64> @llvm.x86.avx512.psllv.q.512(<8 x i64> %a0, <8 x i64> %a1)7239  %mask.cast = bitcast i8 %mask to <8 x i1>7240  %res2 = select <8 x i1> %mask.cast, <8 x i64> %res, <8 x i64> zeroinitializer7241  ret <8 x i64> %res27242}7243 7244declare <8 x i64> @llvm.x86.avx512.psllv.q.512(<8 x i64>, <8 x i64>) nounwind readnone7245 7246define <16 x i32> @test_x86_avx512_psrav_d_512(<16 x i32> %a0, <16 x i32> %a1) {7247; CHECK-LABEL: test_x86_avx512_psrav_d_512:7248; CHECK:       # %bb.0:7249; CHECK-NEXT:    vpsravd %zmm1, %zmm0, %zmm07250; CHECK-NEXT:    ret{{[l|q]}}7251  %res = call <16 x i32> @llvm.x86.avx512.psrav.d.512(<16 x i32> %a0, <16 x i32> %a1)7252  ret <16 x i32> %res7253}7254 7255define <16 x i32> @test_x86_avx512_mask_psrav_d_512(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask) {7256; X64-LABEL: test_x86_avx512_mask_psrav_d_512:7257; X64:       # %bb.0:7258; X64-NEXT:    kmovw %edi, %k17259; X64-NEXT:    vpsravd %zmm1, %zmm0, %zmm2 {%k1}7260; X64-NEXT:    vmovdqa64 %zmm2, %zmm07261; X64-NEXT:    retq7262;7263; X86-LABEL: test_x86_avx512_mask_psrav_d_512:7264; X86:       # %bb.0:7265; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k17266; X86-NEXT:    vpsravd %zmm1, %zmm0, %zmm2 {%k1}7267; X86-NEXT:    vmovdqa64 %zmm2, %zmm07268; X86-NEXT:    retl7269  %res = call <16 x i32> @llvm.x86.avx512.psrav.d.512(<16 x i32> %a0, <16 x i32> %a1)7270  %mask.cast = bitcast i16 %mask to <16 x i1>7271  %res2 = select <16 x i1> %mask.cast, <16 x i32> %res, <16 x i32> %a27272  ret <16 x i32> %res27273}7274 7275define <16 x i32> @test_x86_avx512_maskz_psrav_d_512(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {7276; X64-LABEL: test_x86_avx512_maskz_psrav_d_512:7277; X64:       # %bb.0:7278; X64-NEXT:    kmovw %edi, %k17279; X64-NEXT:    vpsravd %zmm1, %zmm0, %zmm0 {%k1} {z}7280; X64-NEXT:    retq7281;7282; X86-LABEL: test_x86_avx512_maskz_psrav_d_512:7283; X86:       # %bb.0:7284; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k17285; X86-NEXT:    vpsravd %zmm1, %zmm0, %zmm0 {%k1} {z}7286; X86-NEXT:    retl7287  %res = call <16 x i32> @llvm.x86.avx512.psrav.d.512(<16 x i32> %a0, <16 x i32> %a1)7288  %mask.cast = bitcast i16 %mask to <16 x i1>7289  %res2 = select <16 x i1> %mask.cast, <16 x i32> %res, <16 x i32> zeroinitializer7290  ret <16 x i32> %res27291}7292 7293declare <16 x i32> @llvm.x86.avx512.psrav.d.512(<16 x i32>, <16 x i32>) nounwind readnone7294 7295define <8 x i64> @test_x86_avx512_psrav_q_512(<8 x i64> %a0, <8 x i64> %a1) {7296; CHECK-LABEL: test_x86_avx512_psrav_q_512:7297; CHECK:       # %bb.0:7298; CHECK-NEXT:    vpsravq %zmm1, %zmm0, %zmm07299; CHECK-NEXT:    ret{{[l|q]}}7300  %res = call <8 x i64> @llvm.x86.avx512.psrav.q.512(<8 x i64> %a0, <8 x i64> %a1)7301  ret <8 x i64> %res7302}7303 7304define <8 x i64> @test_x86_avx512_mask_psrav_q_512(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask) {7305; X64-LABEL: test_x86_avx512_mask_psrav_q_512:7306; X64:       # %bb.0:7307; X64-NEXT:    kmovw %edi, %k17308; X64-NEXT:    vpsravq %zmm1, %zmm0, %zmm2 {%k1}7309; X64-NEXT:    vmovdqa64 %zmm2, %zmm07310; X64-NEXT:    retq7311;7312; X86-LABEL: test_x86_avx512_mask_psrav_q_512:7313; X86:       # %bb.0:7314; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax7315; X86-NEXT:    kmovw %eax, %k17316; X86-NEXT:    vpsravq %zmm1, %zmm0, %zmm2 {%k1}7317; X86-NEXT:    vmovdqa64 %zmm2, %zmm07318; X86-NEXT:    retl7319  %res = call <8 x i64> @llvm.x86.avx512.psrav.q.512(<8 x i64> %a0, <8 x i64> %a1)7320  %mask.cast = bitcast i8 %mask to <8 x i1>7321  %res2 = select <8 x i1> %mask.cast, <8 x i64> %res, <8 x i64> %a27322  ret <8 x i64> %res27323}7324 7325define <8 x i64> @test_x86_avx512_maskz_psrav_q_512(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {7326; X64-LABEL: test_x86_avx512_maskz_psrav_q_512:7327; X64:       # %bb.0:7328; X64-NEXT:    kmovw %edi, %k17329; X64-NEXT:    vpsravq %zmm1, %zmm0, %zmm0 {%k1} {z}7330; X64-NEXT:    retq7331;7332; X86-LABEL: test_x86_avx512_maskz_psrav_q_512:7333; X86:       # %bb.0:7334; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax7335; X86-NEXT:    kmovw %eax, %k17336; X86-NEXT:    vpsravq %zmm1, %zmm0, %zmm0 {%k1} {z}7337; X86-NEXT:    retl7338  %res = call <8 x i64> @llvm.x86.avx512.psrav.q.512(<8 x i64> %a0, <8 x i64> %a1)7339  %mask.cast = bitcast i8 %mask to <8 x i1>7340  %res2 = select <8 x i1> %mask.cast, <8 x i64> %res, <8 x i64> zeroinitializer7341  ret <8 x i64> %res27342}7343 7344declare <8 x i64> @llvm.x86.avx512.psrav.q.512(<8 x i64>, <8 x i64>) nounwind readnone7345 7346define <16 x i32> @test_x86_avx512_psrlv_d_512(<16 x i32> %a0, <16 x i32> %a1) {7347; CHECK-LABEL: test_x86_avx512_psrlv_d_512:7348; CHECK:       # %bb.0:7349; CHECK-NEXT:    vpsrlvd %zmm1, %zmm0, %zmm07350; CHECK-NEXT:    ret{{[l|q]}}7351  %res = call <16 x i32> @llvm.x86.avx512.psrlv.d.512(<16 x i32> %a0, <16 x i32> %a1)7352  ret <16 x i32> %res7353}7354 7355define <16 x i32> @test_x86_avx512_psrlv_d_512_const() {7356; X64-LABEL: test_x86_avx512_psrlv_d_512_const:7357; X64:       # %bb.0:7358; X64-NEXT:    vpmovsxbd {{.*#+}} zmm0 = [2,9,0,4294967295,3,7,4294967295,0,4,5,4294967294,0,5,3,4294967293,0]7359; X64-NEXT:    vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm07360; X64-NEXT:    vpmovsxbd {{.*#+}} zmm1 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4294967295]7361; X64-NEXT:    vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm17362; X64-NEXT:    vpaddd %zmm1, %zmm0, %zmm07363; X64-NEXT:    retq7364;7365; X86-LABEL: test_x86_avx512_psrlv_d_512_const:7366; X86:       # %bb.0:7367; X86-NEXT:    vpmovsxbd {{.*#+}} zmm0 = [2,9,0,4294967295,3,7,4294967295,0,4,5,4294967294,0,5,3,4294967293,0]7368; X86-NEXT:    vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}, %zmm0, %zmm07369; X86-NEXT:    vpmovsxbd {{.*#+}} zmm1 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4294967295]7370; X86-NEXT:    vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}, %zmm1, %zmm17371; X86-NEXT:    vpaddd %zmm1, %zmm0, %zmm07372; X86-NEXT:    retl7373  %res0 = call <16 x i32> @llvm.x86.avx512.psrlv.d.512(<16 x i32> <i32 2, i32 9, i32 0, i32 -1, i32 3, i32 7, i32 -1, i32 0, i32 4, i32 5, i32 -2, i32 0, i32 5, i32 3, i32 -3, i32 0>, <16 x i32> <i32 1, i32 0, i32 33, i32 -1,i32 2, i32 0, i32 34, i32 -2, i32 3, i32 0, i32 35, i32 -1, i32 4, i32 0, i32 36, i32 -3>)7374  %res1 = call <16 x i32> @llvm.x86.avx512.psrlv.d.512(<16 x i32> <i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 -1>, <16 x i32> <i32 1, i32 1, i32 1,  i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1,  i32 1, i32 1, i32 1, i32 1, i32 -1  >)7375  %res2 = add <16 x i32> %res0, %res17376  ret <16 x i32> %res27377}7378 7379define <16 x i32> @test_x86_avx512_mask_psrlv_d_512(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask) {7380; X64-LABEL: test_x86_avx512_mask_psrlv_d_512:7381; X64:       # %bb.0:7382; X64-NEXT:    kmovw %edi, %k17383; X64-NEXT:    vpsrlvd %zmm1, %zmm0, %zmm2 {%k1}7384; X64-NEXT:    vmovdqa64 %zmm2, %zmm07385; X64-NEXT:    retq7386;7387; X86-LABEL: test_x86_avx512_mask_psrlv_d_512:7388; X86:       # %bb.0:7389; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k17390; X86-NEXT:    vpsrlvd %zmm1, %zmm0, %zmm2 {%k1}7391; X86-NEXT:    vmovdqa64 %zmm2, %zmm07392; X86-NEXT:    retl7393  %res = call <16 x i32> @llvm.x86.avx512.psrlv.d.512(<16 x i32> %a0, <16 x i32> %a1)7394  %mask.cast = bitcast i16 %mask to <16 x i1>7395  %res2 = select <16 x i1> %mask.cast, <16 x i32> %res, <16 x i32> %a27396  ret <16 x i32> %res27397}7398 7399define <16 x i32> @test_x86_avx512_maskz_psrlv_d_512(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {7400; X64-LABEL: test_x86_avx512_maskz_psrlv_d_512:7401; X64:       # %bb.0:7402; X64-NEXT:    kmovw %edi, %k17403; X64-NEXT:    vpsrlvd %zmm1, %zmm0, %zmm0 {%k1} {z}7404; X64-NEXT:    retq7405;7406; X86-LABEL: test_x86_avx512_maskz_psrlv_d_512:7407; X86:       # %bb.0:7408; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k17409; X86-NEXT:    vpsrlvd %zmm1, %zmm0, %zmm0 {%k1} {z}7410; X86-NEXT:    retl7411  %res = call <16 x i32> @llvm.x86.avx512.psrlv.d.512(<16 x i32> %a0, <16 x i32> %a1)7412  %mask.cast = bitcast i16 %mask to <16 x i1>7413  %res2 = select <16 x i1> %mask.cast, <16 x i32> %res, <16 x i32> zeroinitializer7414  ret <16 x i32> %res27415}7416 7417declare <16 x i32> @llvm.x86.avx512.psrlv.d.512(<16 x i32>, <16 x i32>) nounwind readnone7418 7419define <8 x i64> @test_x86_avx512_psrlv_q_512(<8 x i64> %a0, <8 x i64> %a1) {7420; CHECK-LABEL: test_x86_avx512_psrlv_q_512:7421; CHECK:       # %bb.0:7422; CHECK-NEXT:    vpsrlvq %zmm1, %zmm0, %zmm07423; CHECK-NEXT:    ret{{[l|q]}}7424  %res = call <8 x i64> @llvm.x86.avx512.psrlv.q.512(<8 x i64> %a0, <8 x i64> %a1)7425  ret <8 x i64> %res7426}7427 7428define <8 x i64> @test_x86_avx512_psrlv_q_512_const() {7429; X64-LABEL: test_x86_avx512_psrlv_q_512_const:7430; X64:       # %bb.0:7431; X64-NEXT:    vpmovsxbq {{.*#+}} zmm0 = [2,9,0,18446744073709551615,3,7,18446744073709551615,0]7432; X64-NEXT:    vpsrlvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm07433; X64-NEXT:    vpmovsxbq {{.*#+}} zmm1 = [4,4,4,4,4,4,4,18446744073709551615]7434; X64-NEXT:    vpsrlvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm17435; X64-NEXT:    vpaddq %zmm1, %zmm0, %zmm07436; X64-NEXT:    retq7437;7438; X86-LABEL: test_x86_avx512_psrlv_q_512_const:7439; X86:       # %bb.0:7440; X86-NEXT:    vpmovsxbq {{.*#+}} zmm0 = [2,9,0,18446744073709551615,3,7,18446744073709551615,0]7441; X86-NEXT:    vpsrlvq {{\.?LCPI[0-9]+_[0-9]+}}, %zmm0, %zmm07442; X86-NEXT:    vpmovsxbq {{.*#+}} zmm1 = [4,4,4,4,4,4,4,18446744073709551615]7443; X86-NEXT:    vpsrlvq {{\.?LCPI[0-9]+_[0-9]+}}, %zmm1, %zmm17444; X86-NEXT:    vpaddq %zmm1, %zmm0, %zmm07445; X86-NEXT:    retl7446  %res0 = call <8 x i64> @llvm.x86.avx512.psrlv.q.512(<8 x i64> <i64 2, i64 9, i64 0, i64 -1, i64 3, i64 7, i64 -1, i64 0>, <8 x i64> <i64 1, i64 0, i64 33, i64 -1,i64 2, i64 0, i64 34, i64 -2>)7447  %res1 = call <8 x i64> @llvm.x86.avx512.psrlv.q.512(<8 x i64> <i64 4, i64 4, i64 4, i64 4, i64 4, i64 4, i64 4, i64 -1>, <8 x i64> <i64 1, i64 1, i64 1, i64 1,  i64 1, i64 1, i64 1, i64 -1>)7448  %res2 = add <8 x i64> %res0, %res17449  ret <8 x i64> %res27450}7451 7452define <8 x i64> @test_x86_avx512_mask_psrlv_q_512(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask) {7453; X64-LABEL: test_x86_avx512_mask_psrlv_q_512:7454; X64:       # %bb.0:7455; X64-NEXT:    kmovw %edi, %k17456; X64-NEXT:    vpsrlvq %zmm1, %zmm0, %zmm2 {%k1}7457; X64-NEXT:    vmovdqa64 %zmm2, %zmm07458; X64-NEXT:    retq7459;7460; X86-LABEL: test_x86_avx512_mask_psrlv_q_512:7461; X86:       # %bb.0:7462; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax7463; X86-NEXT:    kmovw %eax, %k17464; X86-NEXT:    vpsrlvq %zmm1, %zmm0, %zmm2 {%k1}7465; X86-NEXT:    vmovdqa64 %zmm2, %zmm07466; X86-NEXT:    retl7467  %res = call <8 x i64> @llvm.x86.avx512.psrlv.q.512(<8 x i64> %a0, <8 x i64> %a1)7468  %mask.cast = bitcast i8 %mask to <8 x i1>7469  %res2 = select <8 x i1> %mask.cast, <8 x i64> %res, <8 x i64> %a27470  ret <8 x i64> %res27471}7472 7473define <8 x i64> @test_x86_avx512_maskz_psrlv_q_512(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {7474; X64-LABEL: test_x86_avx512_maskz_psrlv_q_512:7475; X64:       # %bb.0:7476; X64-NEXT:    kmovw %edi, %k17477; X64-NEXT:    vpsrlvq %zmm1, %zmm0, %zmm0 {%k1} {z}7478; X64-NEXT:    retq7479;7480; X86-LABEL: test_x86_avx512_maskz_psrlv_q_512:7481; X86:       # %bb.0:7482; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax7483; X86-NEXT:    kmovw %eax, %k17484; X86-NEXT:    vpsrlvq %zmm1, %zmm0, %zmm0 {%k1} {z}7485; X86-NEXT:    retl7486  %res = call <8 x i64> @llvm.x86.avx512.psrlv.q.512(<8 x i64> %a0, <8 x i64> %a1)7487  %mask.cast = bitcast i8 %mask to <8 x i1>7488  %res2 = select <8 x i1> %mask.cast, <8 x i64> %res, <8 x i64> zeroinitializer7489  ret <8 x i64> %res27490}7491 7492declare <8 x i64> @llvm.x86.avx512.psrlv.q.512(<8 x i64>, <8 x i64>) nounwind readnone7493 7494 7495define <8 x double> @test_mm256_castpd128_pd256_freeze(<2 x double> %a0) nounwind {7496; CHECK-LABEL: test_mm256_castpd128_pd256_freeze:7497; CHECK:       # %bb.0:7498; CHECK-NEXT:    vmovaps %xmm0, %xmm07499; CHECK-NEXT:    ret{{[l|q]}}7500  %a1 = freeze <2 x double> poison7501  %res = shufflevector <2 x double> %a0, <2 x double> %a1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3>7502  ret <8 x double> %res7503}7504 7505 7506define <8 x double> @test_mm256_castpd256_pd256_freeze(<4 x double> %a0) nounwind {7507; CHECK-LABEL: test_mm256_castpd256_pd256_freeze:7508; CHECK:       # %bb.0:7509; CHECK-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm07510; CHECK-NEXT:    ret{{[l|q]}}7511  %a1 = freeze <4 x double> poison7512  %res = shufflevector <4 x double> %a0, <4 x double> %a1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>7513  ret <8 x double> %res7514}7515 7516 7517define <16 x float> @test_mm256_castps128_ps512_freeze(<4 x float> %a0) nounwind {7518; CHECK-LABEL: test_mm256_castps128_ps512_freeze:7519; CHECK:       # %bb.0:7520; CHECK-NEXT:    vmovaps %xmm0, %xmm07521; CHECK-NEXT:    ret{{[l|q]}}7522  %a1 = freeze <4 x float> poison7523  %res = shufflevector <4 x float> %a0, <4 x float> %a1, <16x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>7524  ret <16 x float> %res7525}7526 7527 7528define <16 x float> @test_mm256_castps256_ps512_freeze(<8 x float> %a0) nounwind {7529; CHECK-LABEL: test_mm256_castps256_ps512_freeze:7530; CHECK:       # %bb.0:7531; CHECK-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm07532; CHECK-NEXT:    ret{{[l|q]}}7533  %a1 = freeze <8 x float> poison7534  %res = shufflevector <8 x float> %a0, <8 x float> %a1, <16x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>7535  ret <16 x float> %res7536}7537 7538 7539define <8 x i64> @test_mm512_castsi128_si512_freeze(<2 x i64> %a0) nounwind {7540; CHECK-LABEL: test_mm512_castsi128_si512_freeze:7541; CHECK:       # %bb.0:7542; CHECK-NEXT:    vmovaps %xmm0, %xmm07543; CHECK-NEXT:    ret{{[l|q]}}7544  %a1 = freeze <2 x i64> poison7545  %res = shufflevector <2 x i64> %a0, <2 x i64> %a1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3>7546  ret <8 x i64> %res7547}7548 7549 7550define <8 x i64> @test_mm512_castsi256_si512_pd256_freeze(<4 x i64> %a0) nounwind {7551; CHECK-LABEL: test_mm512_castsi256_si512_pd256_freeze:7552; CHECK:       # %bb.0:7553; CHECK-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm07554; CHECK-NEXT:    ret{{[l|q]}}7555  %a1 = freeze <4 x i64> poison7556  %res = shufflevector <4 x i64> %a0, <4 x i64> %a1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>7557  ret <8 x i64> %res7558}7559 7560 7561define <16 x float> @bad_mask_transition(<8 x double> %a, <8 x double> %b, <8 x double> %c, <8 x double> %d, <16 x float> %e, <16 x float> %f) {7562; X64-LABEL: bad_mask_transition:7563; X64:       # %bb.0: # %entry7564; X64-NEXT:    vcmplt_oqpd %zmm1, %zmm0, %k07565; X64-NEXT:    vcmplt_oqpd %zmm3, %zmm2, %k17566; X64-NEXT:    kunpckbw %k0, %k1, %k17567; X64-NEXT:    vblendmps %zmm5, %zmm4, %zmm0 {%k1}7568; X64-NEXT:    retq7569;7570; X86-LABEL: bad_mask_transition:7571; X86:       # %bb.0: # %entry7572; X86-NEXT:    pushl %ebp7573; X86-NEXT:    .cfi_def_cfa_offset 87574; X86-NEXT:    .cfi_offset %ebp, -87575; X86-NEXT:    movl %esp, %ebp7576; X86-NEXT:    .cfi_def_cfa_register %ebp7577; X86-NEXT:    andl $-64, %esp7578; X86-NEXT:    subl $64, %esp7579; X86-NEXT:    vmovaps 72(%ebp), %zmm37580; X86-NEXT:    vcmplt_oqpd %zmm1, %zmm0, %k07581; X86-NEXT:    vcmplt_oqpd 8(%ebp), %zmm2, %k17582; X86-NEXT:    kunpckbw %k0, %k1, %k17583; X86-NEXT:    vmovaps 136(%ebp), %zmm3 {%k1}7584; X86-NEXT:    vmovaps %zmm3, %zmm07585; X86-NEXT:    movl %ebp, %esp7586; X86-NEXT:    popl %ebp7587; X86-NEXT:    .cfi_def_cfa %esp, 47588; X86-NEXT:    retl7589entry:7590  %0 = call <8 x i1> @llvm.x86.avx512.mask.cmp.pd.512(<8 x double> %a, <8 x double> %b, i32 17, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, i32 4)7591  %1 = bitcast <8 x i1> %0 to i87592  %2 = call <8 x i1> @llvm.x86.avx512.mask.cmp.pd.512(<8 x double> %c, <8 x double> %d, i32 17, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, i32 4)7593  %3 = bitcast <8 x i1> %2 to i87594  %conv = zext i8 %1 to i167595  %conv2 = zext i8 %3 to i167596  %4 = bitcast i16 %conv to <16 x i1>7597  %5 = bitcast i16 %conv2 to <16 x i1>7598  %6 = shufflevector <16 x i1> %4, <16 x i1> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>7599  %7 = shufflevector <16 x i1> %5, <16 x i1> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>7600  %8 = shufflevector <8 x i1> %6, <8 x i1> %7, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>7601  %9 = select <16 x i1> %8, <16 x float> %f, <16 x float> %e7602  ret <16 x float> %97603}7604 7605define <16 x float> @bad_mask_transition_2(<8 x double> %a, <8 x double> %b, <8 x double> %c, <8 x double> %d, <16 x float> %e, <16 x float> %f) {7606; X64-LABEL: bad_mask_transition_2:7607; X64:       # %bb.0: # %entry7608; X64-NEXT:    vcmplt_oqpd %zmm1, %zmm0, %k17609; X64-NEXT:    vblendmps %zmm5, %zmm4, %zmm0 {%k1}7610; X64-NEXT:    retq7611;7612; X86-LABEL: bad_mask_transition_2:7613; X86:       # %bb.0: # %entry7614; X86-NEXT:    pushl %ebp7615; X86-NEXT:    .cfi_def_cfa_offset 87616; X86-NEXT:    .cfi_offset %ebp, -87617; X86-NEXT:    movl %esp, %ebp7618; X86-NEXT:    .cfi_def_cfa_register %ebp7619; X86-NEXT:    andl $-64, %esp7620; X86-NEXT:    subl $64, %esp7621; X86-NEXT:    vmovaps 72(%ebp), %zmm27622; X86-NEXT:    vcmplt_oqpd %zmm1, %zmm0, %k17623; X86-NEXT:    vmovaps 136(%ebp), %zmm2 {%k1}7624; X86-NEXT:    vmovaps %zmm2, %zmm07625; X86-NEXT:    movl %ebp, %esp7626; X86-NEXT:    popl %ebp7627; X86-NEXT:    .cfi_def_cfa %esp, 47628; X86-NEXT:    retl7629entry:7630  %0 = call <8 x i1> @llvm.x86.avx512.mask.cmp.pd.512(<8 x double> %a, <8 x double> %b, i32 17, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, i32 4)7631  %1 = bitcast <8 x i1> %0 to i87632  %conv = zext i8 %1 to i167633  %2 = bitcast i16 %conv to <16 x i1>7634  %3 = select <16 x i1> %2, <16 x float> %f, <16 x float> %e7635  ret <16 x float> %37636}7637 7638declare <8 x double> @llvm.x86.avx512.mask.compress.v8f64(<8 x double>, <8 x double>, <8 x i1>)7639declare <16 x float> @llvm.x86.avx512.mask.compress.v16f32(<16 x float>, <16 x float>, <16 x i1>)7640declare <8 x i64> @llvm.x86.avx512.mask.compress.v8i64(<8 x i64>, <8 x i64>, <8 x i1>)7641declare <16 x i32> @llvm.x86.avx512.mask.compress.v16i32(<16 x i32>, <16 x i32>, <16 x i1>)7642declare <8 x double> @llvm.x86.avx512.mask.expand.v8f64(<8 x double>, <8 x double>, <8 x i1>)7643declare <16 x float> @llvm.x86.avx512.mask.expand.v16f32(<16 x float>, <16 x float>, <16 x i1>)7644declare <8 x i64> @llvm.x86.avx512.mask.expand.v8i64(<8 x i64>, <8 x i64>, <8 x i1>)7645declare <16 x i32> @llvm.x86.avx512.mask.expand.v16i32(<16 x i32>, <16 x i32>, <16 x i1>)7646