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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s3 4define i8 @test_int_x86_avx512_mask_cmp_ss(<4 x float> %a, ptr %b, i8 %mask) {5; CHECK-LABEL: test_int_x86_avx512_mask_cmp_ss:6; CHECK: ## %bb.0:7; CHECK-NEXT: kmovw %esi, %k18; CHECK-NEXT: vcmpunordss (%rdi), %xmm0, %k0 {%k1}9; CHECK-NEXT: kmovw %k0, %eax10; CHECK-NEXT: ## kill: def $al killed $al killed $eax11; CHECK-NEXT: retq12 %b.val = load float, ptr %b13 %bv0 = insertelement <4 x float> undef, float %b.val, i32 014 %bv1 = insertelement <4 x float> %bv0, float 0.000000e+00, i32 115 %bv2 = insertelement <4 x float> %bv1, float 0.000000e+00, i32 216 %bv = insertelement <4 x float> %bv2, float 0.000000e+00, i32 317 %res2 = call i8 @llvm.x86.avx512.mask.cmp.ss(<4 x float> %a, <4 x float> %bv, i32 3, i8 %mask, i32 4)18 ret i8 %res219}20declare i8 @llvm.x86.avx512.mask.cmp.ss(<4 x float>, <4 x float>, i32, i8, i32)21 22define <4 x float> @test_mask_max_ss(<4 x float> %a, ptr %b, i8 %mask) {23; CHECK-LABEL: test_mask_max_ss:24; CHECK: ## %bb.0:25; CHECK-NEXT: kmovw %esi, %k126; CHECK-NEXT: vmaxss (%rdi), %xmm0, %xmm0 {%k1} {z}27; CHECK-NEXT: retq28 %b.val = load float, ptr %b29 %bv0 = insertelement <4 x float> undef, float %b.val, i32 030 %bv1 = insertelement <4 x float> %bv0, float 0.000000e+00, i32 131 %bv2 = insertelement <4 x float> %bv1, float 0.000000e+00, i32 232 %bv = insertelement <4 x float> %bv2, float 0.000000e+00, i32 333 %res = call <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>%a, <4 x float> %bv, <4 x float> zeroinitializer, i8 %mask, i32 4)34 ret <4 x float> %res35}36declare <4 x float> @llvm.x86.avx512.mask.max.ss.round(<4 x float>, <4 x float>, <4 x float>, i8, i32) nounwind readnone37 38define <4 x float> @test_maskz_add_ss(<4 x float> %a, ptr %b, i8 %mask) {39; CHECK-LABEL: test_maskz_add_ss:40; CHECK: ## %bb.0:41; CHECK-NEXT: kmovw %esi, %k142; CHECK-NEXT: vaddss (%rdi), %xmm0, %xmm0 {%k1} {z}43; CHECK-NEXT: retq44 %b.val = load float, ptr %b45 %bv0 = insertelement <4 x float> undef, float %b.val, i32 046 %bv1 = insertelement <4 x float> %bv0, float 0.000000e+00, i32 147 %bv2 = insertelement <4 x float> %bv1, float 0.000000e+00, i32 248 %bv = insertelement <4 x float> %bv2, float 0.000000e+00, i32 349 %res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>%a, <4 x float> %bv, <4 x float> zeroinitializer, i8 %mask, i32 4)50 ret <4 x float> %res51}52 53declare <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float>, <4 x float>, <4 x float>, i8, i32) nounwind readnone54 55declare <2 x double> @llvm.x86.avx512.mask.vfmadd.sd(<2 x double>, <2 x double>, <2 x double>, i8, i32)56 57define <2 x double> @test_int_x86_avx512_mask_vfmadd_sd(<2 x double> %a, <2 x double> %b, ptr %c, i8 %mask){58; CHECK-LABEL: test_int_x86_avx512_mask_vfmadd_sd:59; CHECK: ## %bb.0:60; CHECK-NEXT: kmovw %esi, %k161; CHECK-NEXT: vfmadd213sd {{.*#+}} xmm0 {%k1} = (xmm1 * xmm0) + mem62; CHECK-NEXT: retq63 %c.val = load double, ptr %c64 %cv0 = insertelement <2 x double> undef, double %c.val, i32 065 %cv = insertelement <2 x double> %cv0, double 0.000000e+00, i32 166 %res = call <2 x double> @llvm.x86.avx512.mask.vfmadd.sd(<2 x double> %a, <2 x double> %b, <2 x double> %cv, i8 %mask, i32 4)67 ret <2 x double> %res68}69 70; Test what happens when the load when we have multiple uses of the fadds DAG node via separate vselect nodes.71define <4 x float> @test_mask_add_ss_double_use(<4 x float> %a, ptr %b, i8 %mask, <4 x float> %c) {72; CHECK-LABEL: test_mask_add_ss_double_use:73; CHECK: ## %bb.0:74; CHECK-NEXT: kmovw %esi, %k175; CHECK-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero76; CHECK-NEXT: vaddss %xmm2, %xmm0, %xmm1 {%k1}77; CHECK-NEXT: vaddss {rn-sae}, %xmm2, %xmm0, %xmm0 {%k1} {z}78; CHECK-NEXT: vmulps %xmm0, %xmm1, %xmm079; CHECK-NEXT: retq80 %b.val = load float, ptr %b81 %bv0 = insertelement <4 x float> undef, float %b.val, i32 082 %bv1 = insertelement <4 x float> %bv0, float 0.000000e+00, i32 183 %bv2 = insertelement <4 x float> %bv1, float 0.000000e+00, i32 284 %bv = insertelement <4 x float> %bv2, float 0.000000e+00, i32 385 %res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float> %a, <4 x float> %bv, <4 x float> %c, i8 %mask, i32 4)86 %res2 = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float> %a, <4 x float> %bv, <4 x float> zeroinitializer, i8 %mask, i32 8)87 %res3 = fmul <4 x float> %res, %res288 ret <4 x float> %res389}90