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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512bw | FileCheck %s3 4define i32 @f(<16 x float> %A, <16 x float> %AA, ptr %B, <8 x double> %C, <8 x double> %CC, <8 x i64> %E, <8 x i64> %EE, <16 x i32> %F, <16 x i32> %FF, <32 x i16> %G, <32 x i16> %GG, <64 x i8> %H, <64 x i8> %HH, ptr %loadptr) {5; CHECK-LABEL: f:6; CHECK: # %bb.0:7; CHECK-NEXT: pushq %rbp8; CHECK-NEXT: .cfi_def_cfa_offset 169; CHECK-NEXT: .cfi_offset %rbp, -1610; CHECK-NEXT: movq %rsp, %rbp11; CHECK-NEXT: .cfi_def_cfa_register %rbp12; CHECK-NEXT: andq $-64, %rsp13; CHECK-NEXT: subq $64, %rsp14; CHECK-NEXT: vmovdqa64 144(%rbp), %zmm815; CHECK-NEXT: vmovdqa64 16(%rbp), %zmm916; CHECK-NEXT: movl (%rsi), %eax17; CHECK-NEXT: vaddps %zmm1, %zmm0, %zmm018; CHECK-NEXT: vmovntps %zmm0, (%rdi)19; CHECK-NEXT: vpaddq %zmm5, %zmm4, %zmm020; CHECK-NEXT: addl (%rsi), %eax21; CHECK-NEXT: vmovntdq %zmm0, (%rdi)22; CHECK-NEXT: vaddpd %zmm3, %zmm2, %zmm023; CHECK-NEXT: addl (%rsi), %eax24; CHECK-NEXT: vmovntpd %zmm0, (%rdi)25; CHECK-NEXT: vpaddd %zmm7, %zmm6, %zmm026; CHECK-NEXT: addl (%rsi), %eax27; CHECK-NEXT: vmovntdq %zmm0, (%rdi)28; CHECK-NEXT: vpaddw 80(%rbp), %zmm9, %zmm029; CHECK-NEXT: addl (%rsi), %eax30; CHECK-NEXT: vmovntdq %zmm0, (%rdi)31; CHECK-NEXT: vpaddb 208(%rbp), %zmm8, %zmm032; CHECK-NEXT: addl (%rsi), %eax33; CHECK-NEXT: vmovntdq %zmm0, (%rdi)34; CHECK-NEXT: addl (%rsi), %eax35; CHECK-NEXT: movq %rbp, %rsp36; CHECK-NEXT: popq %rbp37; CHECK-NEXT: .cfi_def_cfa %rsp, 838; CHECK-NEXT: vzeroupper39; CHECK-NEXT: retq40 %v0 = load i32, ptr %loadptr, align 141 %A2 = fadd <16 x float> %A, %AA42 store <16 x float> %A2, ptr %B, align 64, !nontemporal !043 %v1 = load i32, ptr %loadptr, align 144 %E2 = add <8 x i64> %E, %EE45 store <8 x i64> %E2, ptr %B, align 64, !nontemporal !046 %v2 = load i32, ptr %loadptr, align 147 %C2 = fadd <8 x double> %C, %CC48 store <8 x double> %C2, ptr %B, align 64, !nontemporal !049 %v3 = load i32, ptr %loadptr, align 150 %F2 = add <16 x i32> %F, %FF51 store <16 x i32> %F2, ptr %B, align 64, !nontemporal !052 %v4 = load i32, ptr %loadptr, align 153 %G2 = add <32 x i16> %G, %GG54 store <32 x i16> %G2, ptr %B, align 64, !nontemporal !055 %v5 = load i32, ptr %loadptr, align 156 %H2 = add <64 x i8> %H, %HH57 store <64 x i8> %H2, ptr %B, align 64, !nontemporal !058 %v6 = load i32, ptr %loadptr, align 159 %sum1 = add i32 %v0, %v160 %sum2 = add i32 %sum1, %v261 %sum3 = add i32 %sum2, %v362 %sum4 = add i32 %sum3, %v463 %sum5 = add i32 %sum4, %v564 %sum6 = add i32 %sum5, %v665 ret i32 %sum666}67 68!0 = !{i32 1}69