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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX3; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=KNL4 5 6define <4 x float> @test_rsqrt14_ss(<4 x float> %a0) {7; CHECK-LABEL: test_rsqrt14_ss:8; CHECK: ## %bb.0:9; CHECK-NEXT: vrsqrt14ss %xmm0, %xmm0, %xmm010; CHECK-NEXT: retq11 %res = call <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float> %a0, <4 x float> %a0, <4 x float> zeroinitializer, i8 -1) ;12 ret <4 x float> %res13}14 15define <4 x float> @test_rsqrt14_ss_load(<4 x float> %a0, ptr %a1ptr) {16; CHECK-LABEL: test_rsqrt14_ss_load:17; CHECK: ## %bb.0:18; CHECK-NEXT: vrsqrt14ss (%rdi), %xmm0, %xmm019; CHECK-NEXT: retq20 %a1 = load <4 x float>, ptr %a1ptr21 %res = call <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 -1) ;22 ret <4 x float> %res23}24declare <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float>, <4 x float>, <4 x float>, i8) nounwind readnone25 26define <4 x float> @test_rcp14_ss(<4 x float> %a0) {27; CHECK-LABEL: test_rcp14_ss:28; CHECK: ## %bb.0:29; CHECK-NEXT: vrcp14ss %xmm0, %xmm0, %xmm030; CHECK-NEXT: retq31 %res = call <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float> %a0, <4 x float> %a0, <4 x float> zeroinitializer, i8 -1) ;32 ret <4 x float> %res33}34 35define <4 x float> @test_rcp14_ss_load(<4 x float> %a0, ptr %a1ptr) {36; CHECK-LABEL: test_rcp14_ss_load:37; CHECK: ## %bb.0:38; CHECK-NEXT: vrcp14ss (%rdi), %xmm0, %xmm039; CHECK-NEXT: retq40 %a1 = load <4 x float>, ptr %a1ptr41 %res = call <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> zeroinitializer, i8 -1) ;42 ret <4 x float> %res43}44declare <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float>, <4 x float>, <4 x float>, i8) nounwind readnone45 46define <2 x double> @test_rsqrt14_sd(<2 x double> %a0) {47; CHECK-LABEL: test_rsqrt14_sd:48; CHECK: ## %bb.0:49; CHECK-NEXT: vrsqrt14sd %xmm0, %xmm0, %xmm050; CHECK-NEXT: retq51 %res = call <2 x double> @llvm.x86.avx512.rsqrt14.sd(<2 x double> %a0, <2 x double> %a0, <2 x double> zeroinitializer, i8 -1) ;52 ret <2 x double> %res53}54 55define <2 x double> @test_rsqrt14_sd_load(<2 x double> %a0, ptr %a1ptr) {56; CHECK-LABEL: test_rsqrt14_sd_load:57; CHECK: ## %bb.0:58; CHECK-NEXT: vrsqrt14sd (%rdi), %xmm0, %xmm059; CHECK-NEXT: retq60 %a1 = load <2 x double>, ptr %a1ptr61 %res = call <2 x double> @llvm.x86.avx512.rsqrt14.sd(<2 x double> %a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 -1) ;62 ret <2 x double> %res63}64declare <2 x double> @llvm.x86.avx512.rsqrt14.sd(<2 x double>, <2 x double>, <2 x double>, i8) nounwind readnone65 66define <2 x double> @test_rcp14_sd(<2 x double> %a0) {67; CHECK-LABEL: test_rcp14_sd:68; CHECK: ## %bb.0:69; CHECK-NEXT: vrcp14sd %xmm0, %xmm0, %xmm070; CHECK-NEXT: retq71 %res = call <2 x double> @llvm.x86.avx512.rcp14.sd(<2 x double> %a0, <2 x double> %a0, <2 x double> zeroinitializer, i8 -1) ;72 ret <2 x double> %res73 74}75 76define <2 x double> @test_rcp14_sd_load(<2 x double> %a0, ptr %a1ptr) {77; CHECK-LABEL: test_rcp14_sd_load:78; CHECK: ## %bb.0:79; CHECK-NEXT: vrcp14sd (%rdi), %xmm0, %xmm080; CHECK-NEXT: retq81 %a1 = load <2 x double>, ptr %a1ptr82 %res = call <2 x double> @llvm.x86.avx512.rcp14.sd(<2 x double> %a0, <2 x double> %a1, <2 x double> zeroinitializer, i8 -1) ;83 ret <2 x double> %res84}85declare <2 x double> @llvm.x86.avx512.rcp14.sd(<2 x double>, <2 x double>, <2 x double>, i8) nounwind readnone86 87declare <4 x float> @llvm.x86.avx512.mask.scalef.ss(<4 x float>, <4 x float>,<4 x float>, i8, i32)88define <4 x float>@test_int_x86_avx512_mask_scalef_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 %x4) {89; SKX-LABEL: test_int_x86_avx512_mask_scalef_ss:90; SKX: ## %bb.0:91; SKX-NEXT: kmovd %edi, %k192; SKX-NEXT: vscalefss %xmm1, %xmm0, %xmm2 {%k1}93; SKX-NEXT: vscalefss {rn-sae}, %xmm1, %xmm0, %xmm094; SKX-NEXT: vaddps %xmm0, %xmm2, %xmm095; SKX-NEXT: retq96;97; KNL-LABEL: test_int_x86_avx512_mask_scalef_ss:98; KNL: ## %bb.0:99; KNL-NEXT: kmovw %edi, %k1100; KNL-NEXT: vscalefss %xmm1, %xmm0, %xmm2 {%k1}101; KNL-NEXT: vscalefss {rn-sae}, %xmm1, %xmm0, %xmm0102; KNL-NEXT: vaddps %xmm0, %xmm2, %xmm0103; KNL-NEXT: retq104 %res = call <4 x float> @llvm.x86.avx512.mask.scalef.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 %x4, i32 4)105 %res1 = call <4 x float> @llvm.x86.avx512.mask.scalef.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 -1, i32 8)106 %res2 = fadd <4 x float> %res, %res1107 ret <4 x float> %res2108}109 110define <4 x float>@test_int_x86_avx512_mask_scalef_ss_load(<4 x float> %x0, ptr %x1ptr) {111; CHECK-LABEL: test_int_x86_avx512_mask_scalef_ss_load:112; CHECK: ## %bb.0:113; CHECK-NEXT: vscalefss (%rdi), %xmm0, %xmm0114; CHECK-NEXT: retq115 %x1 = load <4 x float>, ptr %x1ptr116 %res = call <4 x float> @llvm.x86.avx512.mask.scalef.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> undef, i8 -1, i32 4)117 ret <4 x float> %res118}119 120declare <2 x double> @llvm.x86.avx512.mask.scalef.sd(<2 x double>, <2 x double>,<2 x double>, i8, i32)121define <2 x double>@test_int_x86_avx512_mask_scalef_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x3, i8 %x4) {122; SKX-LABEL: test_int_x86_avx512_mask_scalef_sd:123; SKX: ## %bb.0:124; SKX-NEXT: kmovd %edi, %k1125; SKX-NEXT: vscalefsd %xmm1, %xmm0, %xmm2 {%k1}126; SKX-NEXT: vscalefsd {rn-sae}, %xmm1, %xmm0, %xmm0127; SKX-NEXT: vaddpd %xmm0, %xmm2, %xmm0128; SKX-NEXT: retq129;130; KNL-LABEL: test_int_x86_avx512_mask_scalef_sd:131; KNL: ## %bb.0:132; KNL-NEXT: kmovw %edi, %k1133; KNL-NEXT: vscalefsd %xmm1, %xmm0, %xmm2 {%k1}134; KNL-NEXT: vscalefsd {rn-sae}, %xmm1, %xmm0, %xmm0135; KNL-NEXT: vaddpd %xmm0, %xmm2, %xmm0136; KNL-NEXT: retq137 %res = call <2 x double> @llvm.x86.avx512.mask.scalef.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x3, i8 %x4, i32 4)138 %res1 = call <2 x double> @llvm.x86.avx512.mask.scalef.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x3, i8 -1, i32 8)139 %res2 = fadd <2 x double> %res, %res1140 ret <2 x double> %res2141}142 143define <2 x double>@test_int_x86_avx512_mask_scalef_sd_load(<2 x double> %x0, ptr %x1ptr) {144; CHECK-LABEL: test_int_x86_avx512_mask_scalef_sd_load:145; CHECK: ## %bb.0:146; CHECK-NEXT: vscalefsd (%rdi), %xmm0, %xmm0147; CHECK-NEXT: retq148 %x1 = load <2 x double>, ptr %x1ptr149 %res = call <2 x double> @llvm.x86.avx512.mask.scalef.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> undef, i8 -1, i32 4)150 ret <2 x double> %res151}152