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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2;RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=CHECK,KNL3;RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefixes=CHECK,SKX4 5define <16 x i32> @ashr_16_i32(<16 x i32> %a) {6; CHECK-LABEL: ashr_16_i32:7; CHECK: # %bb.0:8; CHECK-NEXT: vpsrad $12, %zmm0, %zmm09; CHECK-NEXT: retq10 %b = ashr <16 x i32> %a, <i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12>11 ret <16 x i32> %b12}13 14define <16 x i32> @lshr_16_i32(<16 x i32> %a) {15; CHECK-LABEL: lshr_16_i32:16; CHECK: # %bb.0:17; CHECK-NEXT: vpsrld $1, %zmm0, %zmm018; CHECK-NEXT: retq19 %b = lshr <16 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>20 ret <16 x i32> %b21}22 23define <16 x i32> @shl_16_i32(<16 x i32> %a) {24; CHECK-LABEL: shl_16_i32:25; CHECK: # %bb.0:26; CHECK-NEXT: vpslld $12, %zmm0, %zmm027; CHECK-NEXT: retq28 %b = shl <16 x i32> %a, <i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12>29 ret <16 x i32> %b30}31 32define <8 x i64> @ashr_8_i64(<8 x i64> %a) {33; CHECK-LABEL: ashr_8_i64:34; CHECK: # %bb.0:35; CHECK-NEXT: vpsraq $12, %zmm0, %zmm036; CHECK-NEXT: retq37 %b = ashr <8 x i64> %a, <i64 12, i64 12, i64 12, i64 12, i64 12, i64 12, i64 12, i64 12>38 ret <8 x i64> %b39}40 41define <8 x i64> @lshr_8_i64(<8 x i64> %a) {42; CHECK-LABEL: lshr_8_i64:43; CHECK: # %bb.0:44; CHECK-NEXT: vpsrlq $1, %zmm0, %zmm045; CHECK-NEXT: retq46 %b = lshr <8 x i64> %a, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>47 ret <8 x i64> %b48}49 50define <8 x i64> @shl_8_i64(<8 x i64> %a) {51; CHECK-LABEL: shl_8_i64:52; CHECK: # %bb.0:53; CHECK-NEXT: vpsllq $12, %zmm0, %zmm054; CHECK-NEXT: retq55 %b = shl <8 x i64> %a, <i64 12, i64 12, i64 12, i64 12, i64 12, i64 12, i64 12, i64 12>56 ret <8 x i64> %b57}58 59define <4 x i64> @ashr_4_i64(<4 x i64> %a) {60; KNL-LABEL: ashr_4_i64:61; KNL: # %bb.0:62; KNL-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm063; KNL-NEXT: vpsraq $12, %zmm0, %zmm064; KNL-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm065; KNL-NEXT: retq66;67; SKX-LABEL: ashr_4_i64:68; SKX: # %bb.0:69; SKX-NEXT: vpsraq $12, %ymm0, %ymm070; SKX-NEXT: retq71 %b = ashr <4 x i64> %a, <i64 12, i64 12, i64 12, i64 12>72 ret <4 x i64> %b73}74 75define <4 x i64> @lshr_4_i64(<4 x i64> %a) {76; CHECK-LABEL: lshr_4_i64:77; CHECK: # %bb.0:78; CHECK-NEXT: vpsrlq $1, %ymm0, %ymm079; CHECK-NEXT: retq80 %b = lshr <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1>81 ret <4 x i64> %b82}83 84define <4 x i64> @shl_4_i64(<4 x i64> %a) {85; CHECK-LABEL: shl_4_i64:86; CHECK: # %bb.0:87; CHECK-NEXT: vpsllq $12, %ymm0, %ymm088; CHECK-NEXT: retq89 %b = shl <4 x i64> %a, <i64 12, i64 12, i64 12, i64 12>90 ret <4 x i64> %b91}92 93define <8 x i64> @variable_shl4(<8 x i64> %x, <8 x i64> %y) {94; CHECK-LABEL: variable_shl4:95; CHECK: # %bb.0:96; CHECK-NEXT: vpsllvq %zmm1, %zmm0, %zmm097; CHECK-NEXT: retq98 %k = shl <8 x i64> %x, %y99 ret <8 x i64> %k100}101 102define <16 x i32> @variable_shl5(<16 x i32> %x, <16 x i32> %y) {103; CHECK-LABEL: variable_shl5:104; CHECK: # %bb.0:105; CHECK-NEXT: vpsllvd %zmm1, %zmm0, %zmm0106; CHECK-NEXT: retq107 %k = shl <16 x i32> %x, %y108 ret <16 x i32> %k109}110 111define <16 x i32> @variable_srl0(<16 x i32> %x, <16 x i32> %y) {112; CHECK-LABEL: variable_srl0:113; CHECK: # %bb.0:114; CHECK-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0115; CHECK-NEXT: retq116 %k = lshr <16 x i32> %x, %y117 ret <16 x i32> %k118}119 120define <8 x i64> @variable_srl2(<8 x i64> %x, <8 x i64> %y) {121; CHECK-LABEL: variable_srl2:122; CHECK: # %bb.0:123; CHECK-NEXT: vpsrlvq %zmm1, %zmm0, %zmm0124; CHECK-NEXT: retq125 %k = lshr <8 x i64> %x, %y126 ret <8 x i64> %k127}128 129define <16 x i32> @variable_sra1(<16 x i32> %x, <16 x i32> %y) {130; CHECK-LABEL: variable_sra1:131; CHECK: # %bb.0:132; CHECK-NEXT: vpsravd %zmm1, %zmm0, %zmm0133; CHECK-NEXT: retq134 %k = ashr <16 x i32> %x, %y135 ret <16 x i32> %k136}137 138define <8 x i64> @variable_sra2(<8 x i64> %x, <8 x i64> %y) {139; CHECK-LABEL: variable_sra2:140; CHECK: # %bb.0:141; CHECK-NEXT: vpsravq %zmm1, %zmm0, %zmm0142; CHECK-NEXT: retq143 %k = ashr <8 x i64> %x, %y144 ret <8 x i64> %k145}146 147define <4 x i64> @variable_sra3(<4 x i64> %x, <4 x i64> %y) {148; KNL-LABEL: variable_sra3:149; KNL: # %bb.0:150; KNL-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1151; KNL-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0152; KNL-NEXT: vpsravq %zmm1, %zmm0, %zmm0153; KNL-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0154; KNL-NEXT: retq155;156; SKX-LABEL: variable_sra3:157; SKX: # %bb.0:158; SKX-NEXT: vpsravq %ymm1, %ymm0, %ymm0159; SKX-NEXT: retq160 %k = ashr <4 x i64> %x, %y161 ret <4 x i64> %k162}163 164define <8 x i16> @variable_sra4(<8 x i16> %x, <8 x i16> %y) {165; KNL-LABEL: variable_sra4:166; KNL: # %bb.0:167; KNL-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero168; KNL-NEXT: vpmovsxwd %xmm0, %ymm0169; KNL-NEXT: vpsravd %ymm1, %ymm0, %ymm0170; KNL-NEXT: vpmovdw %zmm0, %ymm0171; KNL-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0172; KNL-NEXT: retq173;174; SKX-LABEL: variable_sra4:175; SKX: # %bb.0:176; SKX-NEXT: vpsravw %xmm1, %xmm0, %xmm0177; SKX-NEXT: retq178 %k = ashr <8 x i16> %x, %y179 ret <8 x i16> %k180}181 182define <16 x i32> @variable_sra01_load(<16 x i32> %x, ptr %y) {183; CHECK-LABEL: variable_sra01_load:184; CHECK: # %bb.0:185; CHECK-NEXT: vpsravd (%rdi), %zmm0, %zmm0186; CHECK-NEXT: retq187 %y1 = load <16 x i32>, ptr %y188 %k = ashr <16 x i32> %x, %y1189 ret <16 x i32> %k190}191 192define <16 x i32> @variable_shl1_load(<16 x i32> %x, ptr %y) {193; CHECK-LABEL: variable_shl1_load:194; CHECK: # %bb.0:195; CHECK-NEXT: vpsllvd (%rdi), %zmm0, %zmm0196; CHECK-NEXT: retq197 %y1 = load <16 x i32>, ptr %y198 %k = shl <16 x i32> %x, %y1199 ret <16 x i32> %k200}201 202define <16 x i32> @variable_srl0_load(<16 x i32> %x, ptr %y) {203; CHECK-LABEL: variable_srl0_load:204; CHECK: # %bb.0:205; CHECK-NEXT: vpsrlvd (%rdi), %zmm0, %zmm0206; CHECK-NEXT: retq207 %y1 = load <16 x i32>, ptr %y208 %k = lshr <16 x i32> %x, %y1209 ret <16 x i32> %k210}211 212define <8 x i64> @variable_srl3_load(<8 x i64> %x, ptr %y) {213; CHECK-LABEL: variable_srl3_load:214; CHECK: # %bb.0:215; CHECK-NEXT: vpsrlvq (%rdi), %zmm0, %zmm0216; CHECK-NEXT: retq217 %y1 = load <8 x i64>, ptr %y218 %k = lshr <8 x i64> %x, %y1219 ret <8 x i64> %k220}221