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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl %s -o - | FileCheck %s3 4; FIXME: The non immediate <16 x float> test cases should be fixed by PR343825 6define <4 x float> @test_4xfloat_perm_mask0(<4 x float> %vec) {7; CHECK-LABEL: test_4xfloat_perm_mask0:8; CHECK: # %bb.0:9; CHECK-NEXT: vshufps {{.*#+}} xmm0 = xmm0[2,1,3,1]10; CHECK-NEXT: retq11 %res = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 1>12 ret <4 x float> %res13}14define <4 x float> @test_masked_4xfloat_perm_mask0(<4 x float> %vec, <4 x float> %vec2, <4 x float> %mask) {15; CHECK-LABEL: test_masked_4xfloat_perm_mask0:16; CHECK: # %bb.0:17; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm318; CHECK-NEXT: vcmpeqps %xmm3, %xmm2, %k119; CHECK-NEXT: vshufps {{.*#+}} xmm1 {%k1} = xmm0[2,1,3,1]20; CHECK-NEXT: vmovaps %xmm1, %xmm021; CHECK-NEXT: retq22 %shuf = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 1>23 %cmp = fcmp oeq <4 x float> %mask, zeroinitializer24 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec225 ret <4 x float> %res26}27 28define <4 x float> @test_masked_z_4xfloat_perm_mask0(<4 x float> %vec, <4 x float> %mask) {29; CHECK-LABEL: test_masked_z_4xfloat_perm_mask0:30; CHECK: # %bb.0:31; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm232; CHECK-NEXT: vcmpeqps %xmm2, %xmm1, %k133; CHECK-NEXT: vshufps {{.*#+}} xmm0 {%k1} {z} = xmm0[2,1,3,1]34; CHECK-NEXT: retq35 %shuf = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 1>36 %cmp = fcmp oeq <4 x float> %mask, zeroinitializer37 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> zeroinitializer38 ret <4 x float> %res39}40define <4 x float> @test_masked_4xfloat_perm_mask1(<4 x float> %vec, <4 x float> %vec2, <4 x float> %mask) {41; CHECK-LABEL: test_masked_4xfloat_perm_mask1:42; CHECK: # %bb.0:43; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm344; CHECK-NEXT: vcmpeqps %xmm3, %xmm2, %k145; CHECK-NEXT: vshufps {{.*#+}} xmm1 {%k1} = xmm0[1,2,3,2]46; CHECK-NEXT: vmovaps %xmm1, %xmm047; CHECK-NEXT: retq48 %shuf = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 2>49 %cmp = fcmp oeq <4 x float> %mask, zeroinitializer50 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec251 ret <4 x float> %res52}53 54define <4 x float> @test_masked_z_4xfloat_perm_mask1(<4 x float> %vec, <4 x float> %mask) {55; CHECK-LABEL: test_masked_z_4xfloat_perm_mask1:56; CHECK: # %bb.0:57; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm258; CHECK-NEXT: vcmpeqps %xmm2, %xmm1, %k159; CHECK-NEXT: vshufps {{.*#+}} xmm0 {%k1} {z} = xmm0[1,2,3,2]60; CHECK-NEXT: retq61 %shuf = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 2>62 %cmp = fcmp oeq <4 x float> %mask, zeroinitializer63 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> zeroinitializer64 ret <4 x float> %res65}66define <4 x float> @test_masked_4xfloat_perm_mask2(<4 x float> %vec, <4 x float> %vec2, <4 x float> %mask) {67; CHECK-LABEL: test_masked_4xfloat_perm_mask2:68; CHECK: # %bb.0:69; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm370; CHECK-NEXT: vcmpeqps %xmm3, %xmm2, %k171; CHECK-NEXT: vshufps {{.*#+}} xmm1 {%k1} = xmm0[1,3,2,1]72; CHECK-NEXT: vmovaps %xmm1, %xmm073; CHECK-NEXT: retq74 %shuf = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 1>75 %cmp = fcmp oeq <4 x float> %mask, zeroinitializer76 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec277 ret <4 x float> %res78}79 80define <4 x float> @test_masked_z_4xfloat_perm_mask2(<4 x float> %vec, <4 x float> %mask) {81; CHECK-LABEL: test_masked_z_4xfloat_perm_mask2:82; CHECK: # %bb.0:83; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm284; CHECK-NEXT: vcmpeqps %xmm2, %xmm1, %k185; CHECK-NEXT: vshufps {{.*#+}} xmm0 {%k1} {z} = xmm0[1,3,2,1]86; CHECK-NEXT: retq87 %shuf = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 1>88 %cmp = fcmp oeq <4 x float> %mask, zeroinitializer89 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> zeroinitializer90 ret <4 x float> %res91}92define <4 x float> @test_4xfloat_perm_mask3(<4 x float> %vec) {93; CHECK-LABEL: test_4xfloat_perm_mask3:94; CHECK: # %bb.0:95; CHECK-NEXT: vshufps {{.*#+}} xmm0 = xmm0[1,2,3,2]96; CHECK-NEXT: retq97 %res = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 2>98 ret <4 x float> %res99}100define <4 x float> @test_masked_4xfloat_perm_mask3(<4 x float> %vec, <4 x float> %vec2, <4 x float> %mask) {101; CHECK-LABEL: test_masked_4xfloat_perm_mask3:102; CHECK: # %bb.0:103; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3104; CHECK-NEXT: vcmpeqps %xmm3, %xmm2, %k1105; CHECK-NEXT: vshufps {{.*#+}} xmm1 {%k1} = xmm0[1,2,3,2]106; CHECK-NEXT: vmovaps %xmm1, %xmm0107; CHECK-NEXT: retq108 %shuf = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 2>109 %cmp = fcmp oeq <4 x float> %mask, zeroinitializer110 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2111 ret <4 x float> %res112}113 114define <4 x float> @test_masked_z_4xfloat_perm_mask3(<4 x float> %vec, <4 x float> %mask) {115; CHECK-LABEL: test_masked_z_4xfloat_perm_mask3:116; CHECK: # %bb.0:117; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2118; CHECK-NEXT: vcmpeqps %xmm2, %xmm1, %k1119; CHECK-NEXT: vshufps {{.*#+}} xmm0 {%k1} {z} = xmm0[1,2,3,2]120; CHECK-NEXT: retq121 %shuf = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 2>122 %cmp = fcmp oeq <4 x float> %mask, zeroinitializer123 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> zeroinitializer124 ret <4 x float> %res125}126define <4 x float> @test_4xfloat_perm_mem_mask0(ptr %vp) {127; CHECK-LABEL: test_4xfloat_perm_mem_mask0:128; CHECK: # %bb.0:129; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = mem[3,3,1,3]130; CHECK-NEXT: retq131 %vec = load <4 x float>, ptr %vp132 %res = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 3, i32 3, i32 1, i32 3>133 ret <4 x float> %res134}135define <4 x float> @test_masked_4xfloat_perm_mem_mask0(ptr %vp, <4 x float> %vec2, <4 x float> %mask) {136; CHECK-LABEL: test_masked_4xfloat_perm_mem_mask0:137; CHECK: # %bb.0:138; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2139; CHECK-NEXT: vcmpeqps %xmm2, %xmm1, %k1140; CHECK-NEXT: vpermilps {{.*#+}} xmm0 {%k1} = mem[3,3,1,3]141; CHECK-NEXT: retq142 %vec = load <4 x float>, ptr %vp143 %shuf = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 3, i32 3, i32 1, i32 3>144 %cmp = fcmp oeq <4 x float> %mask, zeroinitializer145 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2146 ret <4 x float> %res147}148 149define <4 x float> @test_masked_z_4xfloat_perm_mem_mask0(ptr %vp, <4 x float> %mask) {150; CHECK-LABEL: test_masked_z_4xfloat_perm_mem_mask0:151; CHECK: # %bb.0:152; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1153; CHECK-NEXT: vcmpeqps %xmm1, %xmm0, %k1154; CHECK-NEXT: vpermilps {{.*#+}} xmm0 {%k1} {z} = mem[3,3,1,3]155; CHECK-NEXT: retq156 %vec = load <4 x float>, ptr %vp157 %shuf = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 3, i32 3, i32 1, i32 3>158 %cmp = fcmp oeq <4 x float> %mask, zeroinitializer159 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> zeroinitializer160 ret <4 x float> %res161}162 163define <4 x float> @test_masked_4xfloat_perm_mem_mask1(ptr %vp, <4 x float> %vec2, <4 x float> %mask) {164; CHECK-LABEL: test_masked_4xfloat_perm_mem_mask1:165; CHECK: # %bb.0:166; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2167; CHECK-NEXT: vcmpeqps %xmm2, %xmm1, %k1168; CHECK-NEXT: vpermilps {{.*#+}} xmm0 {%k1} = mem[1,3,2,0]169; CHECK-NEXT: retq170 %vec = load <4 x float>, ptr %vp171 %shuf = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0>172 %cmp = fcmp oeq <4 x float> %mask, zeroinitializer173 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2174 ret <4 x float> %res175}176 177define <4 x float> @test_masked_z_4xfloat_perm_mem_mask1(ptr %vp, <4 x float> %mask) {178; CHECK-LABEL: test_masked_z_4xfloat_perm_mem_mask1:179; CHECK: # %bb.0:180; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1181; CHECK-NEXT: vcmpeqps %xmm1, %xmm0, %k1182; CHECK-NEXT: vpermilps {{.*#+}} xmm0 {%k1} {z} = mem[1,3,2,0]183; CHECK-NEXT: retq184 %vec = load <4 x float>, ptr %vp185 %shuf = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0>186 %cmp = fcmp oeq <4 x float> %mask, zeroinitializer187 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> zeroinitializer188 ret <4 x float> %res189}190 191define <4 x float> @test_masked_4xfloat_perm_mem_mask2(ptr %vp, <4 x float> %vec2, <4 x float> %mask) {192; CHECK-LABEL: test_masked_4xfloat_perm_mem_mask2:193; CHECK: # %bb.0:194; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2195; CHECK-NEXT: vcmpeqps %xmm2, %xmm1, %k1196; CHECK-NEXT: vpermilps {{.*#+}} xmm0 {%k1} = mem[2,1,3,2]197; CHECK-NEXT: retq198 %vec = load <4 x float>, ptr %vp199 %shuf = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 2>200 %cmp = fcmp oeq <4 x float> %mask, zeroinitializer201 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2202 ret <4 x float> %res203}204 205define <4 x float> @test_masked_z_4xfloat_perm_mem_mask2(ptr %vp, <4 x float> %mask) {206; CHECK-LABEL: test_masked_z_4xfloat_perm_mem_mask2:207; CHECK: # %bb.0:208; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1209; CHECK-NEXT: vcmpeqps %xmm1, %xmm0, %k1210; CHECK-NEXT: vpermilps {{.*#+}} xmm0 {%k1} {z} = mem[2,1,3,2]211; CHECK-NEXT: retq212 %vec = load <4 x float>, ptr %vp213 %shuf = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 2>214 %cmp = fcmp oeq <4 x float> %mask, zeroinitializer215 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> zeroinitializer216 ret <4 x float> %res217}218 219define <4 x float> @test_4xfloat_perm_mem_mask3(ptr %vp) {220; CHECK-LABEL: test_4xfloat_perm_mem_mask3:221; CHECK: # %bb.0:222; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = mem[0,1,3,0]223; CHECK-NEXT: retq224 %vec = load <4 x float>, ptr %vp225 %res = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 0, i32 1, i32 3, i32 0>226 ret <4 x float> %res227}228define <4 x float> @test_masked_4xfloat_perm_mem_mask3(ptr %vp, <4 x float> %vec2, <4 x float> %mask) {229; CHECK-LABEL: test_masked_4xfloat_perm_mem_mask3:230; CHECK: # %bb.0:231; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2232; CHECK-NEXT: vcmpeqps %xmm2, %xmm1, %k1233; CHECK-NEXT: vpermilps {{.*#+}} xmm0 {%k1} = mem[0,1,3,0]234; CHECK-NEXT: retq235 %vec = load <4 x float>, ptr %vp236 %shuf = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 0, i32 1, i32 3, i32 0>237 %cmp = fcmp oeq <4 x float> %mask, zeroinitializer238 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> %vec2239 ret <4 x float> %res240}241 242define <4 x float> @test_masked_z_4xfloat_perm_mem_mask3(ptr %vp, <4 x float> %mask) {243; CHECK-LABEL: test_masked_z_4xfloat_perm_mem_mask3:244; CHECK: # %bb.0:245; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1246; CHECK-NEXT: vcmpeqps %xmm1, %xmm0, %k1247; CHECK-NEXT: vpermilps {{.*#+}} xmm0 {%k1} {z} = mem[0,1,3,0]248; CHECK-NEXT: retq249 %vec = load <4 x float>, ptr %vp250 %shuf = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> <i32 0, i32 1, i32 3, i32 0>251 %cmp = fcmp oeq <4 x float> %mask, zeroinitializer252 %res = select <4 x i1> %cmp, <4 x float> %shuf, <4 x float> zeroinitializer253 ret <4 x float> %res254}255 256define <8 x float> @test_8xfloat_perm_mask0(<8 x float> %vec) {257; CHECK-LABEL: test_8xfloat_perm_mask0:258; CHECK: # %bb.0:259; CHECK-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,1,2,3,4,6,6,6]260; CHECK-NEXT: retq261 %res = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 6, i32 6, i32 6>262 ret <8 x float> %res263}264define <8 x float> @test_masked_8xfloat_perm_mask0(<8 x float> %vec, <8 x float> %vec2, <8 x float> %mask) {265; CHECK-LABEL: test_masked_8xfloat_perm_mask0:266; CHECK: # %bb.0:267; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3268; CHECK-NEXT: vcmpeqps %ymm3, %ymm2, %k1269; CHECK-NEXT: vpermilps {{.*#+}} ymm1 {%k1} = ymm0[0,1,2,3,4,6,6,6]270; CHECK-NEXT: vmovaps %ymm1, %ymm0271; CHECK-NEXT: retq272 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 6, i32 6, i32 6>273 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer274 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec2275 ret <8 x float> %res276}277 278define <8 x float> @test_masked_z_8xfloat_perm_mask0(<8 x float> %vec, <8 x float> %mask) {279; CHECK-LABEL: test_masked_z_8xfloat_perm_mask0:280; CHECK: # %bb.0:281; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2282; CHECK-NEXT: vcmpeqps %ymm2, %ymm1, %k1283; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} {z} = ymm0[0,1,2,3,4,6,6,6]284; CHECK-NEXT: retq285 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 6, i32 6, i32 6>286 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer287 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer288 ret <8 x float> %res289}290define <8 x float> @test_masked_8xfloat_perm_imm_mask1(<8 x float> %vec, <8 x float> %vec2, <8 x float> %mask) {291; CHECK-LABEL: test_masked_8xfloat_perm_imm_mask1:292; CHECK: # %bb.0:293; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3294; CHECK-NEXT: vcmpeqps %ymm3, %ymm2, %k1295; CHECK-NEXT: vshufps {{.*#+}} ymm1 {%k1} = ymm0[3,2,3,2,7,6,7,6]296; CHECK-NEXT: vmovaps %ymm1, %ymm0297; CHECK-NEXT: retq298 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 3, i32 2, i32 3, i32 2, i32 7, i32 6, i32 7, i32 6>299 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer300 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec2301 ret <8 x float> %res302}303 304define <8 x float> @test_masked_z_8xfloat_perm_imm_mask1(<8 x float> %vec, <8 x float> %mask) {305; CHECK-LABEL: test_masked_z_8xfloat_perm_imm_mask1:306; CHECK: # %bb.0:307; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2308; CHECK-NEXT: vcmpeqps %ymm2, %ymm1, %k1309; CHECK-NEXT: vshufps {{.*#+}} ymm0 {%k1} {z} = ymm0[3,2,3,2,7,6,7,6]310; CHECK-NEXT: retq311 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 3, i32 2, i32 3, i32 2, i32 7, i32 6, i32 7, i32 6>312 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer313 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer314 ret <8 x float> %res315}316define <8 x float> @test_masked_8xfloat_perm_mask2(<8 x float> %vec, <8 x float> %vec2, <8 x float> %mask) {317; CHECK-LABEL: test_masked_8xfloat_perm_mask2:318; CHECK: # %bb.0:319; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3320; CHECK-NEXT: vcmpeqps %ymm3, %ymm2, %k1321; CHECK-NEXT: vpermilps {{.*#+}} ymm1 {%k1} = ymm0[2,1,2,1,6,5,4,4]322; CHECK-NEXT: vmovaps %ymm1, %ymm0323; CHECK-NEXT: retq324 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 2, i32 1, i32 2, i32 1, i32 6, i32 5, i32 4, i32 4>325 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer326 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec2327 ret <8 x float> %res328}329 330define <8 x float> @test_masked_z_8xfloat_perm_mask2(<8 x float> %vec, <8 x float> %mask) {331; CHECK-LABEL: test_masked_z_8xfloat_perm_mask2:332; CHECK: # %bb.0:333; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2334; CHECK-NEXT: vcmpeqps %ymm2, %ymm1, %k1335; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} {z} = ymm0[2,1,2,1,6,5,4,4]336; CHECK-NEXT: retq337 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 2, i32 1, i32 2, i32 1, i32 6, i32 5, i32 4, i32 4>338 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer339 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer340 ret <8 x float> %res341}342define <8 x float> @test_8xfloat_perm_imm_mask3(<8 x float> %vec) {343; CHECK-LABEL: test_8xfloat_perm_imm_mask3:344; CHECK: # %bb.0:345; CHECK-NEXT: vshufps {{.*#+}} ymm0 = ymm0[2,2,1,0,6,6,5,4]346; CHECK-NEXT: retq347 %res = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 2, i32 2, i32 1, i32 0, i32 6, i32 6, i32 5, i32 4>348 ret <8 x float> %res349}350define <8 x float> @test_masked_8xfloat_perm_imm_mask3(<8 x float> %vec, <8 x float> %vec2, <8 x float> %mask) {351; CHECK-LABEL: test_masked_8xfloat_perm_imm_mask3:352; CHECK: # %bb.0:353; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3354; CHECK-NEXT: vcmpeqps %ymm3, %ymm2, %k1355; CHECK-NEXT: vshufps {{.*#+}} ymm1 {%k1} = ymm0[2,2,1,0,6,6,5,4]356; CHECK-NEXT: vmovaps %ymm1, %ymm0357; CHECK-NEXT: retq358 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 2, i32 2, i32 1, i32 0, i32 6, i32 6, i32 5, i32 4>359 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer360 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec2361 ret <8 x float> %res362}363 364define <8 x float> @test_masked_z_8xfloat_perm_imm_mask3(<8 x float> %vec, <8 x float> %mask) {365; CHECK-LABEL: test_masked_z_8xfloat_perm_imm_mask3:366; CHECK: # %bb.0:367; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2368; CHECK-NEXT: vcmpeqps %ymm2, %ymm1, %k1369; CHECK-NEXT: vshufps {{.*#+}} ymm0 {%k1} {z} = ymm0[2,2,1,0,6,6,5,4]370; CHECK-NEXT: retq371 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 2, i32 2, i32 1, i32 0, i32 6, i32 6, i32 5, i32 4>372 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer373 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer374 ret <8 x float> %res375}376define <8 x float> @test_masked_8xfloat_perm_mask4(<8 x float> %vec, <8 x float> %vec2, <8 x float> %mask) {377; CHECK-LABEL: test_masked_8xfloat_perm_mask4:378; CHECK: # %bb.0:379; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3380; CHECK-NEXT: vcmpeqps %ymm3, %ymm2, %k1381; CHECK-NEXT: vpermilps {{.*#+}} ymm1 {%k1} = ymm0[3,3,3,3,7,7,6,5]382; CHECK-NEXT: vmovaps %ymm1, %ymm0383; CHECK-NEXT: retq384 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 7, i32 7, i32 6, i32 5>385 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer386 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec2387 ret <8 x float> %res388}389 390define <8 x float> @test_masked_z_8xfloat_perm_mask4(<8 x float> %vec, <8 x float> %mask) {391; CHECK-LABEL: test_masked_z_8xfloat_perm_mask4:392; CHECK: # %bb.0:393; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2394; CHECK-NEXT: vcmpeqps %ymm2, %ymm1, %k1395; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} {z} = ymm0[3,3,3,3,7,7,6,5]396; CHECK-NEXT: retq397 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 7, i32 7, i32 6, i32 5>398 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer399 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer400 ret <8 x float> %res401}402define <8 x float> @test_masked_8xfloat_perm_imm_mask5(<8 x float> %vec, <8 x float> %vec2, <8 x float> %mask) {403; CHECK-LABEL: test_masked_8xfloat_perm_imm_mask5:404; CHECK: # %bb.0:405; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3406; CHECK-NEXT: vcmpeqps %ymm3, %ymm2, %k1407; CHECK-NEXT: vshufps {{.*#+}} ymm1 {%k1} = ymm0[2,1,3,3,6,5,7,7]408; CHECK-NEXT: vmovaps %ymm1, %ymm0409; CHECK-NEXT: retq410 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 2, i32 1, i32 3, i32 3, i32 6, i32 5, i32 7, i32 7>411 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer412 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec2413 ret <8 x float> %res414}415 416define <8 x float> @test_masked_z_8xfloat_perm_imm_mask5(<8 x float> %vec, <8 x float> %mask) {417; CHECK-LABEL: test_masked_z_8xfloat_perm_imm_mask5:418; CHECK: # %bb.0:419; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2420; CHECK-NEXT: vcmpeqps %ymm2, %ymm1, %k1421; CHECK-NEXT: vshufps {{.*#+}} ymm0 {%k1} {z} = ymm0[2,1,3,3,6,5,7,7]422; CHECK-NEXT: retq423 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 2, i32 1, i32 3, i32 3, i32 6, i32 5, i32 7, i32 7>424 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer425 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer426 ret <8 x float> %res427}428define <8 x float> @test_8xfloat_perm_mask6(<8 x float> %vec) {429; CHECK-LABEL: test_8xfloat_perm_mask6:430; CHECK: # %bb.0:431; CHECK-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,3,2,5,6,7,7]432; CHECK-NEXT: retq433 %res = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 3, i32 2, i32 3, i32 2, i32 5, i32 6, i32 7, i32 7>434 ret <8 x float> %res435}436define <8 x float> @test_masked_8xfloat_perm_mask6(<8 x float> %vec, <8 x float> %vec2, <8 x float> %mask) {437; CHECK-LABEL: test_masked_8xfloat_perm_mask6:438; CHECK: # %bb.0:439; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3440; CHECK-NEXT: vcmpeqps %ymm3, %ymm2, %k1441; CHECK-NEXT: vpermilps {{.*#+}} ymm1 {%k1} = ymm0[3,2,3,2,5,6,7,7]442; CHECK-NEXT: vmovaps %ymm1, %ymm0443; CHECK-NEXT: retq444 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 3, i32 2, i32 3, i32 2, i32 5, i32 6, i32 7, i32 7>445 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer446 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec2447 ret <8 x float> %res448}449 450define <8 x float> @test_masked_z_8xfloat_perm_mask6(<8 x float> %vec, <8 x float> %mask) {451; CHECK-LABEL: test_masked_z_8xfloat_perm_mask6:452; CHECK: # %bb.0:453; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2454; CHECK-NEXT: vcmpeqps %ymm2, %ymm1, %k1455; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} {z} = ymm0[3,2,3,2,5,6,7,7]456; CHECK-NEXT: retq457 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 3, i32 2, i32 3, i32 2, i32 5, i32 6, i32 7, i32 7>458 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer459 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer460 ret <8 x float> %res461}462define <8 x float> @test_masked_8xfloat_perm_imm_mask7(<8 x float> %vec, <8 x float> %vec2, <8 x float> %mask) {463; CHECK-LABEL: test_masked_8xfloat_perm_imm_mask7:464; CHECK: # %bb.0:465; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3466; CHECK-NEXT: vcmpeqps %ymm3, %ymm2, %k1467; CHECK-NEXT: vshufps {{.*#+}} ymm1 {%k1} = ymm0[3,0,2,1,7,4,6,5]468; CHECK-NEXT: vmovaps %ymm1, %ymm0469; CHECK-NEXT: retq470 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 3, i32 0, i32 2, i32 1, i32 7, i32 4, i32 6, i32 5>471 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer472 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec2473 ret <8 x float> %res474}475 476define <8 x float> @test_masked_z_8xfloat_perm_imm_mask7(<8 x float> %vec, <8 x float> %mask) {477; CHECK-LABEL: test_masked_z_8xfloat_perm_imm_mask7:478; CHECK: # %bb.0:479; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2480; CHECK-NEXT: vcmpeqps %ymm2, %ymm1, %k1481; CHECK-NEXT: vshufps {{.*#+}} ymm0 {%k1} {z} = ymm0[3,0,2,1,7,4,6,5]482; CHECK-NEXT: retq483 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 3, i32 0, i32 2, i32 1, i32 7, i32 4, i32 6, i32 5>484 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer485 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer486 ret <8 x float> %res487}488define <8 x float> @test_8xfloat_perm_mem_mask0(ptr %vp) {489; CHECK-LABEL: test_8xfloat_perm_mem_mask0:490; CHECK: # %bb.0:491; CHECK-NEXT: vmovaps (%rdi), %ymm0492; CHECK-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,0,0,2,4,6,7,6]493; CHECK-NEXT: retq494 %vec = load <8 x float>, ptr %vp495 %res = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 3, i32 0, i32 0, i32 2, i32 4, i32 6, i32 7, i32 6>496 ret <8 x float> %res497}498define <8 x float> @test_masked_8xfloat_perm_mem_mask0(ptr %vp, <8 x float> %vec2, <8 x float> %mask) {499; CHECK-LABEL: test_masked_8xfloat_perm_mem_mask0:500; CHECK: # %bb.0:501; CHECK-NEXT: vmovaps (%rdi), %ymm2502; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3503; CHECK-NEXT: vcmpeqps %ymm3, %ymm1, %k1504; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} = ymm2[3,0,0,2,4,6,7,6]505; CHECK-NEXT: retq506 %vec = load <8 x float>, ptr %vp507 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 3, i32 0, i32 0, i32 2, i32 4, i32 6, i32 7, i32 6>508 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer509 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec2510 ret <8 x float> %res511}512 513define <8 x float> @test_masked_z_8xfloat_perm_mem_mask0(ptr %vp, <8 x float> %mask) {514; CHECK-LABEL: test_masked_z_8xfloat_perm_mem_mask0:515; CHECK: # %bb.0:516; CHECK-NEXT: vmovaps (%rdi), %ymm1517; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2518; CHECK-NEXT: vcmpeqps %ymm2, %ymm0, %k1519; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} {z} = ymm1[3,0,0,2,4,6,7,6]520; CHECK-NEXT: retq521 %vec = load <8 x float>, ptr %vp522 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 3, i32 0, i32 0, i32 2, i32 4, i32 6, i32 7, i32 6>523 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer524 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer525 ret <8 x float> %res526}527 528define <8 x float> @test_masked_8xfloat_perm_imm_mem_mask1(ptr %vp, <8 x float> %vec2, <8 x float> %mask) {529; CHECK-LABEL: test_masked_8xfloat_perm_imm_mem_mask1:530; CHECK: # %bb.0:531; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2532; CHECK-NEXT: vcmpeqps %ymm2, %ymm1, %k1533; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} = mem[2,0,2,2,6,4,6,6]534; CHECK-NEXT: retq535 %vec = load <8 x float>, ptr %vp536 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 2, i32 0, i32 2, i32 2, i32 6, i32 4, i32 6, i32 6>537 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer538 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec2539 ret <8 x float> %res540}541 542define <8 x float> @test_masked_z_8xfloat_perm_imm_mem_mask1(ptr %vp, <8 x float> %mask) {543; CHECK-LABEL: test_masked_z_8xfloat_perm_imm_mem_mask1:544; CHECK: # %bb.0:545; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1546; CHECK-NEXT: vcmpeqps %ymm1, %ymm0, %k1547; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} {z} = mem[2,0,2,2,6,4,6,6]548; CHECK-NEXT: retq549 %vec = load <8 x float>, ptr %vp550 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 2, i32 0, i32 2, i32 2, i32 6, i32 4, i32 6, i32 6>551 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer552 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer553 ret <8 x float> %res554}555 556define <8 x float> @test_masked_8xfloat_perm_mem_mask2(ptr %vp, <8 x float> %vec2, <8 x float> %mask) {557; CHECK-LABEL: test_masked_8xfloat_perm_mem_mask2:558; CHECK: # %bb.0:559; CHECK-NEXT: vmovaps (%rdi), %ymm2560; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3561; CHECK-NEXT: vcmpeqps %ymm3, %ymm1, %k1562; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} = ymm2[2,1,1,3,4,4,7,4]563; CHECK-NEXT: retq564 %vec = load <8 x float>, ptr %vp565 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 2, i32 1, i32 1, i32 3, i32 4, i32 4, i32 7, i32 4>566 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer567 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec2568 ret <8 x float> %res569}570 571define <8 x float> @test_masked_z_8xfloat_perm_mem_mask2(ptr %vp, <8 x float> %mask) {572; CHECK-LABEL: test_masked_z_8xfloat_perm_mem_mask2:573; CHECK: # %bb.0:574; CHECK-NEXT: vmovaps (%rdi), %ymm1575; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2576; CHECK-NEXT: vcmpeqps %ymm2, %ymm0, %k1577; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} {z} = ymm1[2,1,1,3,4,4,7,4]578; CHECK-NEXT: retq579 %vec = load <8 x float>, ptr %vp580 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 2, i32 1, i32 1, i32 3, i32 4, i32 4, i32 7, i32 4>581 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer582 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer583 ret <8 x float> %res584}585 586define <8 x float> @test_8xfloat_perm_imm_mem_mask3(ptr %vp) {587; CHECK-LABEL: test_8xfloat_perm_imm_mem_mask3:588; CHECK: # %bb.0:589; CHECK-NEXT: vpermilps {{.*#+}} ymm0 = mem[0,0,3,3,4,4,7,7]590; CHECK-NEXT: retq591 %vec = load <8 x float>, ptr %vp592 %res = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 0, i32 0, i32 3, i32 3, i32 4, i32 4, i32 7, i32 7>593 ret <8 x float> %res594}595define <8 x float> @test_masked_8xfloat_perm_imm_mem_mask3(ptr %vp, <8 x float> %vec2, <8 x float> %mask) {596; CHECK-LABEL: test_masked_8xfloat_perm_imm_mem_mask3:597; CHECK: # %bb.0:598; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2599; CHECK-NEXT: vcmpeqps %ymm2, %ymm1, %k1600; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} = mem[0,0,3,3,4,4,7,7]601; CHECK-NEXT: retq602 %vec = load <8 x float>, ptr %vp603 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 0, i32 0, i32 3, i32 3, i32 4, i32 4, i32 7, i32 7>604 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer605 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec2606 ret <8 x float> %res607}608 609define <8 x float> @test_masked_z_8xfloat_perm_imm_mem_mask3(ptr %vp, <8 x float> %mask) {610; CHECK-LABEL: test_masked_z_8xfloat_perm_imm_mem_mask3:611; CHECK: # %bb.0:612; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1613; CHECK-NEXT: vcmpeqps %ymm1, %ymm0, %k1614; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} {z} = mem[0,0,3,3,4,4,7,7]615; CHECK-NEXT: retq616 %vec = load <8 x float>, ptr %vp617 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 0, i32 0, i32 3, i32 3, i32 4, i32 4, i32 7, i32 7>618 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer619 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer620 ret <8 x float> %res621}622 623define <8 x float> @test_masked_8xfloat_perm_mem_mask4(ptr %vp, <8 x float> %vec2, <8 x float> %mask) {624; CHECK-LABEL: test_masked_8xfloat_perm_mem_mask4:625; CHECK: # %bb.0:626; CHECK-NEXT: vmovaps (%rdi), %ymm2627; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3628; CHECK-NEXT: vcmpeqps %ymm3, %ymm1, %k1629; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} = ymm2[0,1,0,1,4,6,5,4]630; CHECK-NEXT: retq631 %vec = load <8 x float>, ptr %vp632 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 6, i32 5, i32 4>633 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer634 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec2635 ret <8 x float> %res636}637 638define <8 x float> @test_masked_z_8xfloat_perm_mem_mask4(ptr %vp, <8 x float> %mask) {639; CHECK-LABEL: test_masked_z_8xfloat_perm_mem_mask4:640; CHECK: # %bb.0:641; CHECK-NEXT: vmovaps (%rdi), %ymm1642; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2643; CHECK-NEXT: vcmpeqps %ymm2, %ymm0, %k1644; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} {z} = ymm1[0,1,0,1,4,6,5,4]645; CHECK-NEXT: retq646 %vec = load <8 x float>, ptr %vp647 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 6, i32 5, i32 4>648 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer649 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer650 ret <8 x float> %res651}652 653define <8 x float> @test_masked_8xfloat_perm_imm_mem_mask5(ptr %vp, <8 x float> %vec2, <8 x float> %mask) {654; CHECK-LABEL: test_masked_8xfloat_perm_imm_mem_mask5:655; CHECK: # %bb.0:656; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2657; CHECK-NEXT: vcmpeqps %ymm2, %ymm1, %k1658; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} = mem[2,0,0,3,6,4,4,7]659; CHECK-NEXT: retq660 %vec = load <8 x float>, ptr %vp661 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 2, i32 0, i32 0, i32 3, i32 6, i32 4, i32 4, i32 7>662 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer663 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec2664 ret <8 x float> %res665}666 667define <8 x float> @test_masked_z_8xfloat_perm_imm_mem_mask5(ptr %vp, <8 x float> %mask) {668; CHECK-LABEL: test_masked_z_8xfloat_perm_imm_mem_mask5:669; CHECK: # %bb.0:670; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1671; CHECK-NEXT: vcmpeqps %ymm1, %ymm0, %k1672; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} {z} = mem[2,0,0,3,6,4,4,7]673; CHECK-NEXT: retq674 %vec = load <8 x float>, ptr %vp675 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 2, i32 0, i32 0, i32 3, i32 6, i32 4, i32 4, i32 7>676 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer677 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer678 ret <8 x float> %res679}680 681define <8 x float> @test_8xfloat_perm_mem_mask6(ptr %vp) {682; CHECK-LABEL: test_8xfloat_perm_mem_mask6:683; CHECK: # %bb.0:684; CHECK-NEXT: vmovaps (%rdi), %ymm0685; CHECK-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,1,2,3,7,4,6,7]686; CHECK-NEXT: retq687 %vec = load <8 x float>, ptr %vp688 %res = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 4, i32 6, i32 7>689 ret <8 x float> %res690}691define <8 x float> @test_masked_8xfloat_perm_mem_mask6(ptr %vp, <8 x float> %vec2, <8 x float> %mask) {692; CHECK-LABEL: test_masked_8xfloat_perm_mem_mask6:693; CHECK: # %bb.0:694; CHECK-NEXT: vmovaps (%rdi), %ymm2695; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3696; CHECK-NEXT: vcmpeqps %ymm3, %ymm1, %k1697; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} = ymm2[0,1,2,3,7,4,6,7]698; CHECK-NEXT: retq699 %vec = load <8 x float>, ptr %vp700 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 4, i32 6, i32 7>701 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer702 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec2703 ret <8 x float> %res704}705 706define <8 x float> @test_masked_z_8xfloat_perm_mem_mask6(ptr %vp, <8 x float> %mask) {707; CHECK-LABEL: test_masked_z_8xfloat_perm_mem_mask6:708; CHECK: # %bb.0:709; CHECK-NEXT: vmovaps (%rdi), %ymm1710; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2711; CHECK-NEXT: vcmpeqps %ymm2, %ymm0, %k1712; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} {z} = ymm1[0,1,2,3,7,4,6,7]713; CHECK-NEXT: retq714 %vec = load <8 x float>, ptr %vp715 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 4, i32 6, i32 7>716 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer717 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer718 ret <8 x float> %res719}720 721define <8 x float> @test_masked_8xfloat_perm_imm_mem_mask7(ptr %vp, <8 x float> %vec2, <8 x float> %mask) {722; CHECK-LABEL: test_masked_8xfloat_perm_imm_mem_mask7:723; CHECK: # %bb.0:724; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2725; CHECK-NEXT: vcmpeqps %ymm2, %ymm1, %k1726; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} = mem[0,2,3,1,4,6,7,5]727; CHECK-NEXT: retq728 %vec = load <8 x float>, ptr %vp729 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 0, i32 2, i32 3, i32 1, i32 4, i32 6, i32 7, i32 5>730 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer731 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec2732 ret <8 x float> %res733}734 735define <8 x float> @test_masked_z_8xfloat_perm_imm_mem_mask7(ptr %vp, <8 x float> %mask) {736; CHECK-LABEL: test_masked_z_8xfloat_perm_imm_mem_mask7:737; CHECK: # %bb.0:738; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1739; CHECK-NEXT: vcmpeqps %ymm1, %ymm0, %k1740; CHECK-NEXT: vpermilps {{.*#+}} ymm0 {%k1} {z} = mem[0,2,3,1,4,6,7,5]741; CHECK-NEXT: retq742 %vec = load <8 x float>, ptr %vp743 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 0, i32 2, i32 3, i32 1, i32 4, i32 6, i32 7, i32 5>744 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer745 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer746 ret <8 x float> %res747}748 749define <16 x float> @test_16xfloat_perm_mask0(<16 x float> %vec) {750; CHECK-LABEL: test_16xfloat_perm_mask0:751; CHECK: # %bb.0:752; CHECK-NEXT: vpermilps {{.*#+}} zmm0 = zmm0[1,1,3,1,6,4,6,5,8,9,8,11,13,13,13,15]753; CHECK-NEXT: retq754 %res = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 1, i32 3, i32 1, i32 6, i32 4, i32 6, i32 5, i32 8, i32 9, i32 8, i32 11, i32 13, i32 13, i32 13, i32 15>755 ret <16 x float> %res756}757define <16 x float> @test_masked_16xfloat_perm_mask0(<16 x float> %vec, <16 x float> %vec2, <16 x float> %mask) {758; CHECK-LABEL: test_masked_16xfloat_perm_mask0:759; CHECK: # %bb.0:760; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3761; CHECK-NEXT: vcmpeqps %zmm3, %zmm2, %k1762; CHECK-NEXT: vpermilps {{.*#+}} zmm1 {%k1} = zmm0[1,1,3,1,6,4,6,5,8,9,8,11,13,13,13,15]763; CHECK-NEXT: vmovaps %zmm1, %zmm0764; CHECK-NEXT: retq765 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 1, i32 3, i32 1, i32 6, i32 4, i32 6, i32 5, i32 8, i32 9, i32 8, i32 11, i32 13, i32 13, i32 13, i32 15>766 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer767 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec2768 ret <16 x float> %res769}770 771define <16 x float> @test_masked_z_16xfloat_perm_mask0(<16 x float> %vec, <16 x float> %mask) {772; CHECK-LABEL: test_masked_z_16xfloat_perm_mask0:773; CHECK: # %bb.0:774; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2775; CHECK-NEXT: vcmpeqps %zmm2, %zmm1, %k1776; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} {z} = zmm0[1,1,3,1,6,4,6,5,8,9,8,11,13,13,13,15]777; CHECK-NEXT: retq778 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 1, i32 3, i32 1, i32 6, i32 4, i32 6, i32 5, i32 8, i32 9, i32 8, i32 11, i32 13, i32 13, i32 13, i32 15>779 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer780 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer781 ret <16 x float> %res782}783define <16 x float> @test_masked_16xfloat_perm_imm_mask1(<16 x float> %vec, <16 x float> %vec2, <16 x float> %mask) {784; CHECK-LABEL: test_masked_16xfloat_perm_imm_mask1:785; CHECK: # %bb.0:786; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3787; CHECK-NEXT: vcmpeqps %zmm3, %zmm2, %k1788; CHECK-NEXT: vshufps {{.*#+}} zmm1 {%k1} = zmm0[2,2,2,1,6,6,6,5,10,10,10,9,14,14,14,13]789; CHECK-NEXT: vmovaps %zmm1, %zmm0790; CHECK-NEXT: retq791 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 2, i32 2, i32 2, i32 1, i32 6, i32 6, i32 6, i32 5, i32 10, i32 10, i32 10, i32 9, i32 14, i32 14, i32 14, i32 13>792 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer793 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec2794 ret <16 x float> %res795}796 797define <16 x float> @test_masked_z_16xfloat_perm_imm_mask1(<16 x float> %vec, <16 x float> %mask) {798; CHECK-LABEL: test_masked_z_16xfloat_perm_imm_mask1:799; CHECK: # %bb.0:800; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2801; CHECK-NEXT: vcmpeqps %zmm2, %zmm1, %k1802; CHECK-NEXT: vshufps {{.*#+}} zmm0 {%k1} {z} = zmm0[2,2,2,1,6,6,6,5,10,10,10,9,14,14,14,13]803; CHECK-NEXT: retq804 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 2, i32 2, i32 2, i32 1, i32 6, i32 6, i32 6, i32 5, i32 10, i32 10, i32 10, i32 9, i32 14, i32 14, i32 14, i32 13>805 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer806 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer807 ret <16 x float> %res808}809define <16 x float> @test_masked_16xfloat_perm_mask2(<16 x float> %vec, <16 x float> %vec2, <16 x float> %mask) {810; CHECK-LABEL: test_masked_16xfloat_perm_mask2:811; CHECK: # %bb.0:812; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3813; CHECK-NEXT: vcmpeqps %zmm3, %zmm2, %k1814; CHECK-NEXT: vpermilps {{.*#+}} zmm1 {%k1} = zmm0[1,2,0,0,5,4,6,5,11,10,9,9,14,13,14,12]815; CHECK-NEXT: vmovaps %zmm1, %zmm0816; CHECK-NEXT: retq817 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 2, i32 0, i32 0, i32 5, i32 4, i32 6, i32 5, i32 11, i32 10, i32 9, i32 9, i32 14, i32 13, i32 14, i32 12>818 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer819 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec2820 ret <16 x float> %res821}822 823define <16 x float> @test_masked_z_16xfloat_perm_mask2(<16 x float> %vec, <16 x float> %mask) {824; CHECK-LABEL: test_masked_z_16xfloat_perm_mask2:825; CHECK: # %bb.0:826; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2827; CHECK-NEXT: vcmpeqps %zmm2, %zmm1, %k1828; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} {z} = zmm0[1,2,0,0,5,4,6,5,11,10,9,9,14,13,14,12]829; CHECK-NEXT: retq830 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 2, i32 0, i32 0, i32 5, i32 4, i32 6, i32 5, i32 11, i32 10, i32 9, i32 9, i32 14, i32 13, i32 14, i32 12>831 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer832 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer833 ret <16 x float> %res834}835define <16 x float> @test_16xfloat_perm_imm_mask3(<16 x float> %vec) {836; CHECK-LABEL: test_16xfloat_perm_imm_mask3:837; CHECK: # %bb.0:838; CHECK-NEXT: vshufps {{.*#+}} zmm0 = zmm0[1,1,0,2,5,5,4,6,9,9,8,10,13,13,12,14]839; CHECK-NEXT: retq840 %res = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 1, i32 0, i32 2, i32 5, i32 5, i32 4, i32 6, i32 9, i32 9, i32 8, i32 10, i32 13, i32 13, i32 12, i32 14>841 ret <16 x float> %res842}843define <16 x float> @test_masked_16xfloat_perm_imm_mask3(<16 x float> %vec, <16 x float> %vec2, <16 x float> %mask) {844; CHECK-LABEL: test_masked_16xfloat_perm_imm_mask3:845; CHECK: # %bb.0:846; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3847; CHECK-NEXT: vcmpeqps %zmm3, %zmm2, %k1848; CHECK-NEXT: vshufps {{.*#+}} zmm1 {%k1} = zmm0[1,1,0,2,5,5,4,6,9,9,8,10,13,13,12,14]849; CHECK-NEXT: vmovaps %zmm1, %zmm0850; CHECK-NEXT: retq851 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 1, i32 0, i32 2, i32 5, i32 5, i32 4, i32 6, i32 9, i32 9, i32 8, i32 10, i32 13, i32 13, i32 12, i32 14>852 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer853 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec2854 ret <16 x float> %res855}856 857define <16 x float> @test_masked_z_16xfloat_perm_imm_mask3(<16 x float> %vec, <16 x float> %mask) {858; CHECK-LABEL: test_masked_z_16xfloat_perm_imm_mask3:859; CHECK: # %bb.0:860; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2861; CHECK-NEXT: vcmpeqps %zmm2, %zmm1, %k1862; CHECK-NEXT: vshufps {{.*#+}} zmm0 {%k1} {z} = zmm0[1,1,0,2,5,5,4,6,9,9,8,10,13,13,12,14]863; CHECK-NEXT: retq864 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 1, i32 0, i32 2, i32 5, i32 5, i32 4, i32 6, i32 9, i32 9, i32 8, i32 10, i32 13, i32 13, i32 12, i32 14>865 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer866 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer867 ret <16 x float> %res868}869define <16 x float> @test_masked_16xfloat_perm_mask4(<16 x float> %vec, <16 x float> %vec2, <16 x float> %mask) {870; CHECK-LABEL: test_masked_16xfloat_perm_mask4:871; CHECK: # %bb.0:872; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3873; CHECK-NEXT: vcmpeqps %zmm3, %zmm2, %k1874; CHECK-NEXT: vpermilps {{.*#+}} zmm1 {%k1} = zmm0[1,2,3,3,5,5,5,7,11,11,8,11,14,12,14,15]875; CHECK-NEXT: vmovaps %zmm1, %zmm0876; CHECK-NEXT: retq877 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 2, i32 3, i32 3, i32 5, i32 5, i32 5, i32 7, i32 11, i32 11, i32 8, i32 11, i32 14, i32 12, i32 14, i32 15>878 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer879 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec2880 ret <16 x float> %res881}882 883define <16 x float> @test_masked_z_16xfloat_perm_mask4(<16 x float> %vec, <16 x float> %mask) {884; CHECK-LABEL: test_masked_z_16xfloat_perm_mask4:885; CHECK: # %bb.0:886; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2887; CHECK-NEXT: vcmpeqps %zmm2, %zmm1, %k1888; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} {z} = zmm0[1,2,3,3,5,5,5,7,11,11,8,11,14,12,14,15]889; CHECK-NEXT: retq890 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 2, i32 3, i32 3, i32 5, i32 5, i32 5, i32 7, i32 11, i32 11, i32 8, i32 11, i32 14, i32 12, i32 14, i32 15>891 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer892 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer893 ret <16 x float> %res894}895define <16 x float> @test_masked_16xfloat_perm_imm_mask5(<16 x float> %vec, <16 x float> %vec2, <16 x float> %mask) {896; CHECK-LABEL: test_masked_16xfloat_perm_imm_mask5:897; CHECK: # %bb.0:898; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3899; CHECK-NEXT: vcmpeqps %zmm3, %zmm2, %k1900; CHECK-NEXT: vshufps {{.*#+}} zmm1 {%k1} = zmm0[1,2,1,0,5,6,5,4,9,10,9,8,13,14,13,12]901; CHECK-NEXT: vmovaps %zmm1, %zmm0902; CHECK-NEXT: retq903 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 2, i32 1, i32 0, i32 5, i32 6, i32 5, i32 4, i32 9, i32 10, i32 9, i32 8, i32 13, i32 14, i32 13, i32 12>904 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer905 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec2906 ret <16 x float> %res907}908 909define <16 x float> @test_masked_z_16xfloat_perm_imm_mask5(<16 x float> %vec, <16 x float> %mask) {910; CHECK-LABEL: test_masked_z_16xfloat_perm_imm_mask5:911; CHECK: # %bb.0:912; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2913; CHECK-NEXT: vcmpeqps %zmm2, %zmm1, %k1914; CHECK-NEXT: vshufps {{.*#+}} zmm0 {%k1} {z} = zmm0[1,2,1,0,5,6,5,4,9,10,9,8,13,14,13,12]915; CHECK-NEXT: retq916 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 2, i32 1, i32 0, i32 5, i32 6, i32 5, i32 4, i32 9, i32 10, i32 9, i32 8, i32 13, i32 14, i32 13, i32 12>917 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer918 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer919 ret <16 x float> %res920}921define <16 x float> @test_16xfloat_perm_mask6(<16 x float> %vec) {922; CHECK-LABEL: test_16xfloat_perm_mask6:923; CHECK: # %bb.0:924; CHECK-NEXT: vpermilps {{.*#+}} zmm0 = zmm0[2,0,3,2,4,4,6,7,9,11,8,11,13,12,13,13]925; CHECK-NEXT: retq926 %res = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 2, i32 0, i32 3, i32 2, i32 4, i32 4, i32 6, i32 7, i32 9, i32 11, i32 8, i32 11, i32 13, i32 12, i32 13, i32 13>927 ret <16 x float> %res928}929define <16 x float> @test_masked_16xfloat_perm_mask6(<16 x float> %vec, <16 x float> %vec2, <16 x float> %mask) {930; CHECK-LABEL: test_masked_16xfloat_perm_mask6:931; CHECK: # %bb.0:932; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3933; CHECK-NEXT: vcmpeqps %zmm3, %zmm2, %k1934; CHECK-NEXT: vpermilps {{.*#+}} zmm1 {%k1} = zmm0[2,0,3,2,4,4,6,7,9,11,8,11,13,12,13,13]935; CHECK-NEXT: vmovaps %zmm1, %zmm0936; CHECK-NEXT: retq937 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 2, i32 0, i32 3, i32 2, i32 4, i32 4, i32 6, i32 7, i32 9, i32 11, i32 8, i32 11, i32 13, i32 12, i32 13, i32 13>938 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer939 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec2940 ret <16 x float> %res941}942 943define <16 x float> @test_masked_z_16xfloat_perm_mask6(<16 x float> %vec, <16 x float> %mask) {944; CHECK-LABEL: test_masked_z_16xfloat_perm_mask6:945; CHECK: # %bb.0:946; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2947; CHECK-NEXT: vcmpeqps %zmm2, %zmm1, %k1948; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} {z} = zmm0[2,0,3,2,4,4,6,7,9,11,8,11,13,12,13,13]949; CHECK-NEXT: retq950 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 2, i32 0, i32 3, i32 2, i32 4, i32 4, i32 6, i32 7, i32 9, i32 11, i32 8, i32 11, i32 13, i32 12, i32 13, i32 13>951 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer952 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer953 ret <16 x float> %res954}955define <16 x float> @test_masked_16xfloat_perm_imm_mask7(<16 x float> %vec, <16 x float> %vec2, <16 x float> %mask) {956; CHECK-LABEL: test_masked_16xfloat_perm_imm_mask7:957; CHECK: # %bb.0:958; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3959; CHECK-NEXT: vcmpeqps %zmm3, %zmm2, %k1960; CHECK-NEXT: vshufps {{.*#+}} zmm1 {%k1} = zmm0[3,3,0,2,7,7,4,6,11,11,8,10,15,15,12,14]961; CHECK-NEXT: vmovaps %zmm1, %zmm0962; CHECK-NEXT: retq963 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 3, i32 3, i32 0, i32 2, i32 7, i32 7, i32 4, i32 6, i32 11, i32 11, i32 8, i32 10, i32 15, i32 15, i32 12, i32 14>964 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer965 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec2966 ret <16 x float> %res967}968 969define <16 x float> @test_masked_z_16xfloat_perm_imm_mask7(<16 x float> %vec, <16 x float> %mask) {970; CHECK-LABEL: test_masked_z_16xfloat_perm_imm_mask7:971; CHECK: # %bb.0:972; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2973; CHECK-NEXT: vcmpeqps %zmm2, %zmm1, %k1974; CHECK-NEXT: vshufps {{.*#+}} zmm0 {%k1} {z} = zmm0[3,3,0,2,7,7,4,6,11,11,8,10,15,15,12,14]975; CHECK-NEXT: retq976 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 3, i32 3, i32 0, i32 2, i32 7, i32 7, i32 4, i32 6, i32 11, i32 11, i32 8, i32 10, i32 15, i32 15, i32 12, i32 14>977 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer978 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer979 ret <16 x float> %res980}981define <16 x float> @test_16xfloat_perm_mem_mask0(ptr %vp) {982; CHECK-LABEL: test_16xfloat_perm_mem_mask0:983; CHECK: # %bb.0:984; CHECK-NEXT: vmovaps (%rdi), %zmm0985; CHECK-NEXT: vpermilps {{.*#+}} zmm0 = zmm0[3,3,3,0,6,6,6,6,11,10,9,10,12,14,12,12]986; CHECK-NEXT: retq987 %vec = load <16 x float>, ptr %vp988 %res = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 3, i32 3, i32 3, i32 0, i32 6, i32 6, i32 6, i32 6, i32 11, i32 10, i32 9, i32 10, i32 12, i32 14, i32 12, i32 12>989 ret <16 x float> %res990}991define <16 x float> @test_masked_16xfloat_perm_mem_mask0(ptr %vp, <16 x float> %vec2, <16 x float> %mask) {992; CHECK-LABEL: test_masked_16xfloat_perm_mem_mask0:993; CHECK: # %bb.0:994; CHECK-NEXT: vmovaps (%rdi), %zmm2995; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3996; CHECK-NEXT: vcmpeqps %zmm3, %zmm1, %k1997; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} = zmm2[3,3,3,0,6,6,6,6,11,10,9,10,12,14,12,12]998; CHECK-NEXT: retq999 %vec = load <16 x float>, ptr %vp1000 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 3, i32 3, i32 3, i32 0, i32 6, i32 6, i32 6, i32 6, i32 11, i32 10, i32 9, i32 10, i32 12, i32 14, i32 12, i32 12>1001 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer1002 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec21003 ret <16 x float> %res1004}1005 1006define <16 x float> @test_masked_z_16xfloat_perm_mem_mask0(ptr %vp, <16 x float> %mask) {1007; CHECK-LABEL: test_masked_z_16xfloat_perm_mem_mask0:1008; CHECK: # %bb.0:1009; CHECK-NEXT: vmovaps (%rdi), %zmm11010; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm21011; CHECK-NEXT: vcmpeqps %zmm2, %zmm0, %k11012; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} {z} = zmm1[3,3,3,0,6,6,6,6,11,10,9,10,12,14,12,12]1013; CHECK-NEXT: retq1014 %vec = load <16 x float>, ptr %vp1015 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 3, i32 3, i32 3, i32 0, i32 6, i32 6, i32 6, i32 6, i32 11, i32 10, i32 9, i32 10, i32 12, i32 14, i32 12, i32 12>1016 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer1017 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer1018 ret <16 x float> %res1019}1020 1021define <16 x float> @test_masked_16xfloat_perm_imm_mem_mask1(ptr %vp, <16 x float> %vec2, <16 x float> %mask) {1022; CHECK-LABEL: test_masked_16xfloat_perm_imm_mem_mask1:1023; CHECK: # %bb.0:1024; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm21025; CHECK-NEXT: vcmpeqps %zmm2, %zmm1, %k11026; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} = mem[1,3,2,1,5,7,6,5,9,11,10,9,13,15,14,13]1027; CHECK-NEXT: retq1028 %vec = load <16 x float>, ptr %vp1029 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 3, i32 2, i32 1, i32 5, i32 7, i32 6, i32 5, i32 9, i32 11, i32 10, i32 9, i32 13, i32 15, i32 14, i32 13>1030 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer1031 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec21032 ret <16 x float> %res1033}1034 1035define <16 x float> @test_masked_z_16xfloat_perm_imm_mem_mask1(ptr %vp, <16 x float> %mask) {1036; CHECK-LABEL: test_masked_z_16xfloat_perm_imm_mem_mask1:1037; CHECK: # %bb.0:1038; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm11039; CHECK-NEXT: vcmpeqps %zmm1, %zmm0, %k11040; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} {z} = mem[1,3,2,1,5,7,6,5,9,11,10,9,13,15,14,13]1041; CHECK-NEXT: retq1042 %vec = load <16 x float>, ptr %vp1043 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 3, i32 2, i32 1, i32 5, i32 7, i32 6, i32 5, i32 9, i32 11, i32 10, i32 9, i32 13, i32 15, i32 14, i32 13>1044 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer1045 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer1046 ret <16 x float> %res1047}1048 1049define <16 x float> @test_masked_16xfloat_perm_mem_mask2(ptr %vp, <16 x float> %vec2, <16 x float> %mask) {1050; CHECK-LABEL: test_masked_16xfloat_perm_mem_mask2:1051; CHECK: # %bb.0:1052; CHECK-NEXT: vmovaps (%rdi), %zmm21053; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm31054; CHECK-NEXT: vcmpeqps %zmm3, %zmm1, %k11055; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} = zmm2[2,0,0,3,5,5,6,5,9,8,8,8,14,12,13,13]1056; CHECK-NEXT: retq1057 %vec = load <16 x float>, ptr %vp1058 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 2, i32 0, i32 0, i32 3, i32 5, i32 5, i32 6, i32 5, i32 9, i32 8, i32 8, i32 8, i32 14, i32 12, i32 13, i32 13>1059 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer1060 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec21061 ret <16 x float> %res1062}1063 1064define <16 x float> @test_masked_z_16xfloat_perm_mem_mask2(ptr %vp, <16 x float> %mask) {1065; CHECK-LABEL: test_masked_z_16xfloat_perm_mem_mask2:1066; CHECK: # %bb.0:1067; CHECK-NEXT: vmovaps (%rdi), %zmm11068; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm21069; CHECK-NEXT: vcmpeqps %zmm2, %zmm0, %k11070; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} {z} = zmm1[2,0,0,3,5,5,6,5,9,8,8,8,14,12,13,13]1071; CHECK-NEXT: retq1072 %vec = load <16 x float>, ptr %vp1073 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 2, i32 0, i32 0, i32 3, i32 5, i32 5, i32 6, i32 5, i32 9, i32 8, i32 8, i32 8, i32 14, i32 12, i32 13, i32 13>1074 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer1075 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer1076 ret <16 x float> %res1077}1078 1079define <16 x float> @test_16xfloat_perm_imm_mem_mask3(ptr %vp) {1080; CHECK-LABEL: test_16xfloat_perm_imm_mem_mask3:1081; CHECK: # %bb.0:1082; CHECK-NEXT: vpermilps {{.*#+}} zmm0 = mem[1,0,3,1,5,4,7,5,9,8,11,9,13,12,15,13]1083; CHECK-NEXT: retq1084 %vec = load <16 x float>, ptr %vp1085 %res = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 0, i32 3, i32 1, i32 5, i32 4, i32 7, i32 5, i32 9, i32 8, i32 11, i32 9, i32 13, i32 12, i32 15, i32 13>1086 ret <16 x float> %res1087}1088define <16 x float> @test_masked_16xfloat_perm_imm_mem_mask3(ptr %vp, <16 x float> %vec2, <16 x float> %mask) {1089; CHECK-LABEL: test_masked_16xfloat_perm_imm_mem_mask3:1090; CHECK: # %bb.0:1091; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm21092; CHECK-NEXT: vcmpeqps %zmm2, %zmm1, %k11093; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} = mem[1,0,3,1,5,4,7,5,9,8,11,9,13,12,15,13]1094; CHECK-NEXT: retq1095 %vec = load <16 x float>, ptr %vp1096 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 0, i32 3, i32 1, i32 5, i32 4, i32 7, i32 5, i32 9, i32 8, i32 11, i32 9, i32 13, i32 12, i32 15, i32 13>1097 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer1098 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec21099 ret <16 x float> %res1100}1101 1102define <16 x float> @test_masked_z_16xfloat_perm_imm_mem_mask3(ptr %vp, <16 x float> %mask) {1103; CHECK-LABEL: test_masked_z_16xfloat_perm_imm_mem_mask3:1104; CHECK: # %bb.0:1105; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm11106; CHECK-NEXT: vcmpeqps %zmm1, %zmm0, %k11107; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} {z} = mem[1,0,3,1,5,4,7,5,9,8,11,9,13,12,15,13]1108; CHECK-NEXT: retq1109 %vec = load <16 x float>, ptr %vp1110 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 0, i32 3, i32 1, i32 5, i32 4, i32 7, i32 5, i32 9, i32 8, i32 11, i32 9, i32 13, i32 12, i32 15, i32 13>1111 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer1112 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer1113 ret <16 x float> %res1114}1115 1116define <16 x float> @test_masked_16xfloat_perm_mem_mask4(ptr %vp, <16 x float> %vec2, <16 x float> %mask) {1117; CHECK-LABEL: test_masked_16xfloat_perm_mem_mask4:1118; CHECK: # %bb.0:1119; CHECK-NEXT: vmovaps (%rdi), %zmm21120; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm31121; CHECK-NEXT: vcmpeqps %zmm3, %zmm1, %k11122; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} = zmm2[3,3,1,1,6,5,5,6,11,11,10,9,15,14,12,12]1123; CHECK-NEXT: retq1124 %vec = load <16 x float>, ptr %vp1125 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 3, i32 3, i32 1, i32 1, i32 6, i32 5, i32 5, i32 6, i32 11, i32 11, i32 10, i32 9, i32 15, i32 14, i32 12, i32 12>1126 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer1127 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec21128 ret <16 x float> %res1129}1130 1131define <16 x float> @test_masked_z_16xfloat_perm_mem_mask4(ptr %vp, <16 x float> %mask) {1132; CHECK-LABEL: test_masked_z_16xfloat_perm_mem_mask4:1133; CHECK: # %bb.0:1134; CHECK-NEXT: vmovaps (%rdi), %zmm11135; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm21136; CHECK-NEXT: vcmpeqps %zmm2, %zmm0, %k11137; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} {z} = zmm1[3,3,1,1,6,5,5,6,11,11,10,9,15,14,12,12]1138; CHECK-NEXT: retq1139 %vec = load <16 x float>, ptr %vp1140 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 3, i32 3, i32 1, i32 1, i32 6, i32 5, i32 5, i32 6, i32 11, i32 11, i32 10, i32 9, i32 15, i32 14, i32 12, i32 12>1141 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer1142 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer1143 ret <16 x float> %res1144}1145 1146define <16 x float> @test_masked_16xfloat_perm_imm_mem_mask5(ptr %vp, <16 x float> %vec2, <16 x float> %mask) {1147; CHECK-LABEL: test_masked_16xfloat_perm_imm_mem_mask5:1148; CHECK: # %bb.0:1149; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm21150; CHECK-NEXT: vcmpeqps %zmm2, %zmm1, %k11151; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} = mem[2,0,0,1,6,4,4,5,10,8,8,9,14,12,12,13]1152; CHECK-NEXT: retq1153 %vec = load <16 x float>, ptr %vp1154 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 2, i32 0, i32 0, i32 1, i32 6, i32 4, i32 4, i32 5, i32 10, i32 8, i32 8, i32 9, i32 14, i32 12, i32 12, i32 13>1155 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer1156 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec21157 ret <16 x float> %res1158}1159 1160define <16 x float> @test_masked_z_16xfloat_perm_imm_mem_mask5(ptr %vp, <16 x float> %mask) {1161; CHECK-LABEL: test_masked_z_16xfloat_perm_imm_mem_mask5:1162; CHECK: # %bb.0:1163; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm11164; CHECK-NEXT: vcmpeqps %zmm1, %zmm0, %k11165; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} {z} = mem[2,0,0,1,6,4,4,5,10,8,8,9,14,12,12,13]1166; CHECK-NEXT: retq1167 %vec = load <16 x float>, ptr %vp1168 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 2, i32 0, i32 0, i32 1, i32 6, i32 4, i32 4, i32 5, i32 10, i32 8, i32 8, i32 9, i32 14, i32 12, i32 12, i32 13>1169 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer1170 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer1171 ret <16 x float> %res1172}1173 1174define <16 x float> @test_16xfloat_perm_mem_mask6(ptr %vp) {1175; CHECK-LABEL: test_16xfloat_perm_mem_mask6:1176; CHECK: # %bb.0:1177; CHECK-NEXT: vmovaps (%rdi), %zmm01178; CHECK-NEXT: vpermilps {{.*#+}} zmm0 = zmm0[2,1,1,2,6,5,5,7,9,11,9,9,12,15,14,15]1179; CHECK-NEXT: retq1180 %vec = load <16 x float>, ptr %vp1181 %res = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 2, i32 1, i32 1, i32 2, i32 6, i32 5, i32 5, i32 7, i32 9, i32 11, i32 9, i32 9, i32 12, i32 15, i32 14, i32 15>1182 ret <16 x float> %res1183}1184define <16 x float> @test_masked_16xfloat_perm_mem_mask6(ptr %vp, <16 x float> %vec2, <16 x float> %mask) {1185; CHECK-LABEL: test_masked_16xfloat_perm_mem_mask6:1186; CHECK: # %bb.0:1187; CHECK-NEXT: vmovaps (%rdi), %zmm21188; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm31189; CHECK-NEXT: vcmpeqps %zmm3, %zmm1, %k11190; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} = zmm2[2,1,1,2,6,5,5,7,9,11,9,9,12,15,14,15]1191; CHECK-NEXT: retq1192 %vec = load <16 x float>, ptr %vp1193 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 2, i32 1, i32 1, i32 2, i32 6, i32 5, i32 5, i32 7, i32 9, i32 11, i32 9, i32 9, i32 12, i32 15, i32 14, i32 15>1194 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer1195 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec21196 ret <16 x float> %res1197}1198 1199define <16 x float> @test_masked_z_16xfloat_perm_mem_mask6(ptr %vp, <16 x float> %mask) {1200; CHECK-LABEL: test_masked_z_16xfloat_perm_mem_mask6:1201; CHECK: # %bb.0:1202; CHECK-NEXT: vmovaps (%rdi), %zmm11203; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm21204; CHECK-NEXT: vcmpeqps %zmm2, %zmm0, %k11205; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} {z} = zmm1[2,1,1,2,6,5,5,7,9,11,9,9,12,15,14,15]1206; CHECK-NEXT: retq1207 %vec = load <16 x float>, ptr %vp1208 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 2, i32 1, i32 1, i32 2, i32 6, i32 5, i32 5, i32 7, i32 9, i32 11, i32 9, i32 9, i32 12, i32 15, i32 14, i32 15>1209 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer1210 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer1211 ret <16 x float> %res1212}1213 1214define <16 x float> @test_masked_16xfloat_perm_imm_mem_mask7(ptr %vp, <16 x float> %vec2, <16 x float> %mask) {1215; CHECK-LABEL: test_masked_16xfloat_perm_imm_mem_mask7:1216; CHECK: # %bb.0:1217; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm21218; CHECK-NEXT: vcmpeqps %zmm2, %zmm1, %k11219; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} = mem[1,2,0,1,5,6,4,5,9,10,8,9,13,14,12,13]1220; CHECK-NEXT: retq1221 %vec = load <16 x float>, ptr %vp1222 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 2, i32 0, i32 1, i32 5, i32 6, i32 4, i32 5, i32 9, i32 10, i32 8, i32 9, i32 13, i32 14, i32 12, i32 13>1223 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer1224 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec21225 ret <16 x float> %res1226}1227 1228define <16 x float> @test_masked_z_16xfloat_perm_imm_mem_mask7(ptr %vp, <16 x float> %mask) {1229; CHECK-LABEL: test_masked_z_16xfloat_perm_imm_mem_mask7:1230; CHECK: # %bb.0:1231; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm11232; CHECK-NEXT: vcmpeqps %zmm1, %zmm0, %k11233; CHECK-NEXT: vpermilps {{.*#+}} zmm0 {%k1} {z} = mem[1,2,0,1,5,6,4,5,9,10,8,9,13,14,12,13]1234; CHECK-NEXT: retq1235 %vec = load <16 x float>, ptr %vp1236 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 1, i32 2, i32 0, i32 1, i32 5, i32 6, i32 4, i32 5, i32 9, i32 10, i32 8, i32 9, i32 13, i32 14, i32 12, i32 13>1237 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer1238 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer1239 ret <16 x float> %res1240}1241 1242define <2 x double> @test_2xdouble_perm_mask0(<2 x double> %vec) {1243; CHECK-LABEL: test_2xdouble_perm_mask0:1244; CHECK: # %bb.0:1245; CHECK-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]1246; CHECK-NEXT: retq1247 %res = shufflevector <2 x double> %vec, <2 x double> undef, <2 x i32> <i32 1, i32 0>1248 ret <2 x double> %res1249}1250define <2 x double> @test_masked_2xdouble_perm_mask0(<2 x double> %vec, <2 x double> %vec2, <2 x double> %mask) {1251; CHECK-LABEL: test_masked_2xdouble_perm_mask0:1252; CHECK: # %bb.0:1253; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm31254; CHECK-NEXT: vcmpeqpd %xmm3, %xmm2, %k11255; CHECK-NEXT: vshufpd {{.*#+}} xmm1 {%k1} = xmm0[1,0]1256; CHECK-NEXT: vmovapd %xmm1, %xmm01257; CHECK-NEXT: retq1258 %shuf = shufflevector <2 x double> %vec, <2 x double> undef, <2 x i32> <i32 1, i32 0>1259 %cmp = fcmp oeq <2 x double> %mask, zeroinitializer1260 %res = select <2 x i1> %cmp, <2 x double> %shuf, <2 x double> %vec21261 ret <2 x double> %res1262}1263 1264define <2 x double> @test_masked_z_2xdouble_perm_mask0(<2 x double> %vec, <2 x double> %mask) {1265; CHECK-LABEL: test_masked_z_2xdouble_perm_mask0:1266; CHECK: # %bb.0:1267; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21268; CHECK-NEXT: vcmpeqpd %xmm2, %xmm1, %k11269; CHECK-NEXT: vshufpd {{.*#+}} xmm0 {%k1} {z} = xmm0[1,0]1270; CHECK-NEXT: retq1271 %shuf = shufflevector <2 x double> %vec, <2 x double> undef, <2 x i32> <i32 1, i32 0>1272 %cmp = fcmp oeq <2 x double> %mask, zeroinitializer1273 %res = select <2 x i1> %cmp, <2 x double> %shuf, <2 x double> zeroinitializer1274 ret <2 x double> %res1275}1276define <2 x double> @test_masked_2xdouble_perm_mask1(<2 x double> %vec, <2 x double> %vec2, <2 x double> %mask) {1277; CHECK-LABEL: test_masked_2xdouble_perm_mask1:1278; CHECK: # %bb.0:1279; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm31280; CHECK-NEXT: vcmpeqpd %xmm3, %xmm2, %k11281; CHECK-NEXT: vshufpd {{.*#+}} xmm1 {%k1} = xmm0[1,0]1282; CHECK-NEXT: vmovapd %xmm1, %xmm01283; CHECK-NEXT: retq1284 %shuf = shufflevector <2 x double> %vec, <2 x double> undef, <2 x i32> <i32 1, i32 0>1285 %cmp = fcmp oeq <2 x double> %mask, zeroinitializer1286 %res = select <2 x i1> %cmp, <2 x double> %shuf, <2 x double> %vec21287 ret <2 x double> %res1288}1289 1290define <2 x double> @test_masked_z_2xdouble_perm_mask1(<2 x double> %vec, <2 x double> %mask) {1291; CHECK-LABEL: test_masked_z_2xdouble_perm_mask1:1292; CHECK: # %bb.0:1293; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21294; CHECK-NEXT: vcmpeqpd %xmm2, %xmm1, %k11295; CHECK-NEXT: vshufpd {{.*#+}} xmm0 {%k1} {z} = xmm0[1,0]1296; CHECK-NEXT: retq1297 %shuf = shufflevector <2 x double> %vec, <2 x double> undef, <2 x i32> <i32 1, i32 0>1298 %cmp = fcmp oeq <2 x double> %mask, zeroinitializer1299 %res = select <2 x i1> %cmp, <2 x double> %shuf, <2 x double> zeroinitializer1300 ret <2 x double> %res1301}1302define <2 x double> @test_2xdouble_perm_mem_mask0(ptr %vp) {1303; CHECK-LABEL: test_2xdouble_perm_mem_mask0:1304; CHECK: # %bb.0:1305; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 = mem[1,0]1306; CHECK-NEXT: retq1307 %vec = load <2 x double>, ptr %vp1308 %res = shufflevector <2 x double> %vec, <2 x double> undef, <2 x i32> <i32 1, i32 0>1309 ret <2 x double> %res1310}1311define <2 x double> @test_masked_2xdouble_perm_mem_mask0(ptr %vp, <2 x double> %vec2, <2 x double> %mask) {1312; CHECK-LABEL: test_masked_2xdouble_perm_mem_mask0:1313; CHECK: # %bb.0:1314; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21315; CHECK-NEXT: vcmpeqpd %xmm2, %xmm1, %k11316; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 {%k1} = mem[1,0]1317; CHECK-NEXT: retq1318 %vec = load <2 x double>, ptr %vp1319 %shuf = shufflevector <2 x double> %vec, <2 x double> undef, <2 x i32> <i32 1, i32 0>1320 %cmp = fcmp oeq <2 x double> %mask, zeroinitializer1321 %res = select <2 x i1> %cmp, <2 x double> %shuf, <2 x double> %vec21322 ret <2 x double> %res1323}1324 1325define <2 x double> @test_masked_z_2xdouble_perm_mem_mask0(ptr %vp, <2 x double> %mask) {1326; CHECK-LABEL: test_masked_z_2xdouble_perm_mem_mask0:1327; CHECK: # %bb.0:1328; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm11329; CHECK-NEXT: vcmpeqpd %xmm1, %xmm0, %k11330; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 {%k1} {z} = mem[1,0]1331; CHECK-NEXT: retq1332 %vec = load <2 x double>, ptr %vp1333 %shuf = shufflevector <2 x double> %vec, <2 x double> undef, <2 x i32> <i32 1, i32 0>1334 %cmp = fcmp oeq <2 x double> %mask, zeroinitializer1335 %res = select <2 x i1> %cmp, <2 x double> %shuf, <2 x double> zeroinitializer1336 ret <2 x double> %res1337}1338 1339define <2 x double> @test_masked_2xdouble_perm_mem_mask1(ptr %vp, <2 x double> %vec2, <2 x double> %mask) {1340; CHECK-LABEL: test_masked_2xdouble_perm_mem_mask1:1341; CHECK: # %bb.0:1342; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21343; CHECK-NEXT: vcmpeqpd %xmm2, %xmm1, %k11344; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 {%k1} = mem[1,0]1345; CHECK-NEXT: retq1346 %vec = load <2 x double>, ptr %vp1347 %shuf = shufflevector <2 x double> %vec, <2 x double> undef, <2 x i32> <i32 1, i32 0>1348 %cmp = fcmp oeq <2 x double> %mask, zeroinitializer1349 %res = select <2 x i1> %cmp, <2 x double> %shuf, <2 x double> %vec21350 ret <2 x double> %res1351}1352 1353define <2 x double> @test_masked_z_2xdouble_perm_mem_mask1(ptr %vp, <2 x double> %mask) {1354; CHECK-LABEL: test_masked_z_2xdouble_perm_mem_mask1:1355; CHECK: # %bb.0:1356; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm11357; CHECK-NEXT: vcmpeqpd %xmm1, %xmm0, %k11358; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 {%k1} {z} = mem[1,0]1359; CHECK-NEXT: retq1360 %vec = load <2 x double>, ptr %vp1361 %shuf = shufflevector <2 x double> %vec, <2 x double> undef, <2 x i32> <i32 1, i32 0>1362 %cmp = fcmp oeq <2 x double> %mask, zeroinitializer1363 %res = select <2 x i1> %cmp, <2 x double> %shuf, <2 x double> zeroinitializer1364 ret <2 x double> %res1365}1366 1367define <4 x double> @test_4xdouble_perm_mask0(<4 x double> %vec) {1368; CHECK-LABEL: test_4xdouble_perm_mask0:1369; CHECK: # %bb.0:1370; CHECK-NEXT: vshufpd {{.*#+}} ymm0 = ymm0[1,0,2,3]1371; CHECK-NEXT: retq1372 %res = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 1, i32 0, i32 2, i32 3>1373 ret <4 x double> %res1374}1375define <4 x double> @test_masked_4xdouble_perm_mask0(<4 x double> %vec, <4 x double> %vec2, <4 x double> %mask) {1376; CHECK-LABEL: test_masked_4xdouble_perm_mask0:1377; CHECK: # %bb.0:1378; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm31379; CHECK-NEXT: vcmpeqpd %ymm3, %ymm2, %k11380; CHECK-NEXT: vshufpd {{.*#+}} ymm1 {%k1} = ymm0[1,0,2,3]1381; CHECK-NEXT: vmovapd %ymm1, %ymm01382; CHECK-NEXT: retq1383 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 1, i32 0, i32 2, i32 3>1384 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer1385 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec21386 ret <4 x double> %res1387}1388 1389define <4 x double> @test_masked_z_4xdouble_perm_mask0(<4 x double> %vec, <4 x double> %mask) {1390; CHECK-LABEL: test_masked_z_4xdouble_perm_mask0:1391; CHECK: # %bb.0:1392; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21393; CHECK-NEXT: vcmpeqpd %ymm2, %ymm1, %k11394; CHECK-NEXT: vshufpd {{.*#+}} ymm0 {%k1} {z} = ymm0[1,0,2,3]1395; CHECK-NEXT: retq1396 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 1, i32 0, i32 2, i32 3>1397 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer1398 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> zeroinitializer1399 ret <4 x double> %res1400}1401define <4 x double> @test_masked_4xdouble_perm_mask1(<4 x double> %vec, <4 x double> %vec2, <4 x double> %mask) {1402; CHECK-LABEL: test_masked_4xdouble_perm_mask1:1403; CHECK: # %bb.0:1404; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm31405; CHECK-NEXT: vcmpeqpd %ymm3, %ymm2, %k11406; CHECK-NEXT: vshufpd {{.*#+}} ymm1 {%k1} = ymm0[1,1,2,2]1407; CHECK-NEXT: vmovapd %ymm1, %ymm01408; CHECK-NEXT: retq1409 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 1, i32 1, i32 2, i32 2>1410 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer1411 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec21412 ret <4 x double> %res1413}1414 1415define <4 x double> @test_masked_z_4xdouble_perm_mask1(<4 x double> %vec, <4 x double> %mask) {1416; CHECK-LABEL: test_masked_z_4xdouble_perm_mask1:1417; CHECK: # %bb.0:1418; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21419; CHECK-NEXT: vcmpeqpd %ymm2, %ymm1, %k11420; CHECK-NEXT: vshufpd {{.*#+}} ymm0 {%k1} {z} = ymm0[1,1,2,2]1421; CHECK-NEXT: retq1422 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 1, i32 1, i32 2, i32 2>1423 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer1424 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> zeroinitializer1425 ret <4 x double> %res1426}1427define <4 x double> @test_masked_4xdouble_perm_mask2(<4 x double> %vec, <4 x double> %vec2, <4 x double> %mask) {1428; CHECK-LABEL: test_masked_4xdouble_perm_mask2:1429; CHECK: # %bb.0:1430; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm31431; CHECK-NEXT: vcmpeqpd %ymm3, %ymm2, %k11432; CHECK-NEXT: vshufpd {{.*#+}} ymm1 {%k1} = ymm0[0,1,3,3]1433; CHECK-NEXT: vmovapd %ymm1, %ymm01434; CHECK-NEXT: retq1435 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 0, i32 1, i32 3, i32 3>1436 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer1437 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec21438 ret <4 x double> %res1439}1440 1441define <4 x double> @test_masked_z_4xdouble_perm_mask2(<4 x double> %vec, <4 x double> %mask) {1442; CHECK-LABEL: test_masked_z_4xdouble_perm_mask2:1443; CHECK: # %bb.0:1444; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21445; CHECK-NEXT: vcmpeqpd %ymm2, %ymm1, %k11446; CHECK-NEXT: vshufpd {{.*#+}} ymm0 {%k1} {z} = ymm0[0,1,3,3]1447; CHECK-NEXT: retq1448 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 0, i32 1, i32 3, i32 3>1449 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer1450 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> zeroinitializer1451 ret <4 x double> %res1452}1453define <4 x double> @test_4xdouble_perm_mask3(<4 x double> %vec) {1454; CHECK-LABEL: test_4xdouble_perm_mask3:1455; CHECK: # %bb.0:1456; CHECK-NEXT: vshufpd {{.*#+}} ymm0 = ymm0[1,1,2,2]1457; CHECK-NEXT: retq1458 %res = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 1, i32 1, i32 2, i32 2>1459 ret <4 x double> %res1460}1461define <4 x double> @test_masked_4xdouble_perm_mask3(<4 x double> %vec, <4 x double> %vec2, <4 x double> %mask) {1462; CHECK-LABEL: test_masked_4xdouble_perm_mask3:1463; CHECK: # %bb.0:1464; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm31465; CHECK-NEXT: vcmpeqpd %ymm3, %ymm2, %k11466; CHECK-NEXT: vshufpd {{.*#+}} ymm1 {%k1} = ymm0[1,1,2,2]1467; CHECK-NEXT: vmovapd %ymm1, %ymm01468; CHECK-NEXT: retq1469 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 1, i32 1, i32 2, i32 2>1470 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer1471 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec21472 ret <4 x double> %res1473}1474 1475define <4 x double> @test_masked_z_4xdouble_perm_mask3(<4 x double> %vec, <4 x double> %mask) {1476; CHECK-LABEL: test_masked_z_4xdouble_perm_mask3:1477; CHECK: # %bb.0:1478; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21479; CHECK-NEXT: vcmpeqpd %ymm2, %ymm1, %k11480; CHECK-NEXT: vshufpd {{.*#+}} ymm0 {%k1} {z} = ymm0[1,1,2,2]1481; CHECK-NEXT: retq1482 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 1, i32 1, i32 2, i32 2>1483 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer1484 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> zeroinitializer1485 ret <4 x double> %res1486}1487define <4 x double> @test_4xdouble_perm_mem_mask0(ptr %vp) {1488; CHECK-LABEL: test_4xdouble_perm_mem_mask0:1489; CHECK: # %bb.0:1490; CHECK-NEXT: vpermilpd {{.*#+}} ymm0 = mem[0,1,2,2]1491; CHECK-NEXT: retq1492 %vec = load <4 x double>, ptr %vp1493 %res = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 2>1494 ret <4 x double> %res1495}1496define <4 x double> @test_masked_4xdouble_perm_mem_mask0(ptr %vp, <4 x double> %vec2, <4 x double> %mask) {1497; CHECK-LABEL: test_masked_4xdouble_perm_mem_mask0:1498; CHECK: # %bb.0:1499; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21500; CHECK-NEXT: vcmpeqpd %ymm2, %ymm1, %k11501; CHECK-NEXT: vpermilpd {{.*#+}} ymm0 {%k1} = mem[0,1,2,2]1502; CHECK-NEXT: retq1503 %vec = load <4 x double>, ptr %vp1504 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 2>1505 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer1506 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec21507 ret <4 x double> %res1508}1509 1510define <4 x double> @test_masked_z_4xdouble_perm_mem_mask0(ptr %vp, <4 x double> %mask) {1511; CHECK-LABEL: test_masked_z_4xdouble_perm_mem_mask0:1512; CHECK: # %bb.0:1513; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm11514; CHECK-NEXT: vcmpeqpd %ymm1, %ymm0, %k11515; CHECK-NEXT: vpermilpd {{.*#+}} ymm0 {%k1} {z} = mem[0,1,2,2]1516; CHECK-NEXT: retq1517 %vec = load <4 x double>, ptr %vp1518 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 2>1519 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer1520 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> zeroinitializer1521 ret <4 x double> %res1522}1523 1524define <4 x double> @test_masked_4xdouble_perm_mem_mask1(ptr %vp, <4 x double> %vec2, <4 x double> %mask) {1525; CHECK-LABEL: test_masked_4xdouble_perm_mem_mask1:1526; CHECK: # %bb.0:1527; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21528; CHECK-NEXT: vcmpeqpd %ymm2, %ymm1, %k11529; CHECK-NEXT: vpermilpd {{.*#+}} ymm0 {%k1} = mem[0,1,3,3]1530; CHECK-NEXT: retq1531 %vec = load <4 x double>, ptr %vp1532 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 0, i32 1, i32 3, i32 3>1533 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer1534 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec21535 ret <4 x double> %res1536}1537 1538define <4 x double> @test_masked_z_4xdouble_perm_mem_mask1(ptr %vp, <4 x double> %mask) {1539; CHECK-LABEL: test_masked_z_4xdouble_perm_mem_mask1:1540; CHECK: # %bb.0:1541; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm11542; CHECK-NEXT: vcmpeqpd %ymm1, %ymm0, %k11543; CHECK-NEXT: vpermilpd {{.*#+}} ymm0 {%k1} {z} = mem[0,1,3,3]1544; CHECK-NEXT: retq1545 %vec = load <4 x double>, ptr %vp1546 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 0, i32 1, i32 3, i32 3>1547 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer1548 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> zeroinitializer1549 ret <4 x double> %res1550}1551 1552define <4 x double> @test_masked_4xdouble_perm_mem_mask2(ptr %vp, <4 x double> %vec2, <4 x double> %mask) {1553; CHECK-LABEL: test_masked_4xdouble_perm_mem_mask2:1554; CHECK: # %bb.0:1555; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21556; CHECK-NEXT: vcmpeqpd %ymm2, %ymm1, %k11557; CHECK-NEXT: vpermilpd {{.*#+}} ymm0 {%k1} = mem[1,0,3,3]1558; CHECK-NEXT: retq1559 %vec = load <4 x double>, ptr %vp1560 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 3>1561 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer1562 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec21563 ret <4 x double> %res1564}1565 1566define <4 x double> @test_masked_z_4xdouble_perm_mem_mask2(ptr %vp, <4 x double> %mask) {1567; CHECK-LABEL: test_masked_z_4xdouble_perm_mem_mask2:1568; CHECK: # %bb.0:1569; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm11570; CHECK-NEXT: vcmpeqpd %ymm1, %ymm0, %k11571; CHECK-NEXT: vpermilpd {{.*#+}} ymm0 {%k1} {z} = mem[1,0,3,3]1572; CHECK-NEXT: retq1573 %vec = load <4 x double>, ptr %vp1574 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 3>1575 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer1576 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> zeroinitializer1577 ret <4 x double> %res1578}1579 1580define <4 x double> @test_4xdouble_perm_mem_mask3(ptr %vp) {1581; CHECK-LABEL: test_4xdouble_perm_mem_mask3:1582; CHECK: # %bb.0:1583; CHECK-NEXT: vpermilpd {{.*#+}} ymm0 = mem[1,0,3,2]1584; CHECK-NEXT: retq1585 %vec = load <4 x double>, ptr %vp1586 %res = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>1587 ret <4 x double> %res1588}1589define <4 x double> @test_masked_4xdouble_perm_mem_mask3(ptr %vp, <4 x double> %vec2, <4 x double> %mask) {1590; CHECK-LABEL: test_masked_4xdouble_perm_mem_mask3:1591; CHECK: # %bb.0:1592; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21593; CHECK-NEXT: vcmpeqpd %ymm2, %ymm1, %k11594; CHECK-NEXT: vpermilpd {{.*#+}} ymm0 {%k1} = mem[1,0,3,2]1595; CHECK-NEXT: retq1596 %vec = load <4 x double>, ptr %vp1597 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>1598 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer1599 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec21600 ret <4 x double> %res1601}1602 1603define <4 x double> @test_masked_z_4xdouble_perm_mem_mask3(ptr %vp, <4 x double> %mask) {1604; CHECK-LABEL: test_masked_z_4xdouble_perm_mem_mask3:1605; CHECK: # %bb.0:1606; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm11607; CHECK-NEXT: vcmpeqpd %ymm1, %ymm0, %k11608; CHECK-NEXT: vpermilpd {{.*#+}} ymm0 {%k1} {z} = mem[1,0,3,2]1609; CHECK-NEXT: retq1610 %vec = load <4 x double>, ptr %vp1611 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>1612 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer1613 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> zeroinitializer1614 ret <4 x double> %res1615}1616 1617define <8 x double> @test_8xdouble_perm_mask0(<8 x double> %vec) {1618; CHECK-LABEL: test_8xdouble_perm_mask0:1619; CHECK: # %bb.0:1620; CHECK-NEXT: vshufpd {{.*#+}} zmm0 = zmm0[0,0,3,2,4,5,7,6]1621; CHECK-NEXT: retq1622 %res = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 0, i32 3, i32 2, i32 4, i32 5, i32 7, i32 6>1623 ret <8 x double> %res1624}1625define <8 x double> @test_masked_8xdouble_perm_mask0(<8 x double> %vec, <8 x double> %vec2, <8 x double> %mask) {1626; CHECK-LABEL: test_masked_8xdouble_perm_mask0:1627; CHECK: # %bb.0:1628; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm31629; CHECK-NEXT: vcmpeqpd %zmm3, %zmm2, %k11630; CHECK-NEXT: vshufpd {{.*#+}} zmm1 {%k1} = zmm0[0,0,3,2,4,5,7,6]1631; CHECK-NEXT: vmovapd %zmm1, %zmm01632; CHECK-NEXT: retq1633 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 0, i32 3, i32 2, i32 4, i32 5, i32 7, i32 6>1634 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer1635 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec21636 ret <8 x double> %res1637}1638 1639define <8 x double> @test_masked_z_8xdouble_perm_mask0(<8 x double> %vec, <8 x double> %mask) {1640; CHECK-LABEL: test_masked_z_8xdouble_perm_mask0:1641; CHECK: # %bb.0:1642; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21643; CHECK-NEXT: vcmpeqpd %zmm2, %zmm1, %k11644; CHECK-NEXT: vshufpd {{.*#+}} zmm0 {%k1} {z} = zmm0[0,0,3,2,4,5,7,6]1645; CHECK-NEXT: retq1646 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 0, i32 3, i32 2, i32 4, i32 5, i32 7, i32 6>1647 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer1648 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer1649 ret <8 x double> %res1650}1651define <8 x double> @test_masked_8xdouble_perm_mask1(<8 x double> %vec, <8 x double> %vec2, <8 x double> %mask) {1652; CHECK-LABEL: test_masked_8xdouble_perm_mask1:1653; CHECK: # %bb.0:1654; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm31655; CHECK-NEXT: vcmpeqpd %zmm3, %zmm2, %k11656; CHECK-NEXT: vshufpd {{.*#+}} zmm1 {%k1} = zmm0[0,1,2,3,4,4,7,6]1657; CHECK-NEXT: vmovapd %zmm1, %zmm01658; CHECK-NEXT: retq1659 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 7, i32 6>1660 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer1661 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec21662 ret <8 x double> %res1663}1664 1665define <8 x double> @test_masked_z_8xdouble_perm_mask1(<8 x double> %vec, <8 x double> %mask) {1666; CHECK-LABEL: test_masked_z_8xdouble_perm_mask1:1667; CHECK: # %bb.0:1668; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21669; CHECK-NEXT: vcmpeqpd %zmm2, %zmm1, %k11670; CHECK-NEXT: vshufpd {{.*#+}} zmm0 {%k1} {z} = zmm0[0,1,2,3,4,4,7,6]1671; CHECK-NEXT: retq1672 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 7, i32 6>1673 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer1674 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer1675 ret <8 x double> %res1676}1677define <8 x double> @test_masked_8xdouble_perm_mask2(<8 x double> %vec, <8 x double> %vec2, <8 x double> %mask) {1678; CHECK-LABEL: test_masked_8xdouble_perm_mask2:1679; CHECK: # %bb.0:1680; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm31681; CHECK-NEXT: vcmpeqpd %zmm3, %zmm2, %k11682; CHECK-NEXT: vshufpd {{.*#+}} zmm1 {%k1} = zmm0[0,0,2,3,5,5,6,7]1683; CHECK-NEXT: vmovapd %zmm1, %zmm01684; CHECK-NEXT: retq1685 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 0, i32 2, i32 3, i32 5, i32 5, i32 6, i32 7>1686 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer1687 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec21688 ret <8 x double> %res1689}1690 1691define <8 x double> @test_masked_z_8xdouble_perm_mask2(<8 x double> %vec, <8 x double> %mask) {1692; CHECK-LABEL: test_masked_z_8xdouble_perm_mask2:1693; CHECK: # %bb.0:1694; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21695; CHECK-NEXT: vcmpeqpd %zmm2, %zmm1, %k11696; CHECK-NEXT: vshufpd {{.*#+}} zmm0 {%k1} {z} = zmm0[0,0,2,3,5,5,6,7]1697; CHECK-NEXT: retq1698 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 0, i32 2, i32 3, i32 5, i32 5, i32 6, i32 7>1699 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer1700 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer1701 ret <8 x double> %res1702}1703define <8 x double> @test_8xdouble_perm_mask3(<8 x double> %vec) {1704; CHECK-LABEL: test_8xdouble_perm_mask3:1705; CHECK: # %bb.0:1706; CHECK-NEXT: vshufpd {{.*#+}} zmm0 = zmm0[0,1,2,2,4,4,6,7]1707; CHECK-NEXT: retq1708 %res = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 2, i32 4, i32 4, i32 6, i32 7>1709 ret <8 x double> %res1710}1711define <8 x double> @test_masked_8xdouble_perm_mask3(<8 x double> %vec, <8 x double> %vec2, <8 x double> %mask) {1712; CHECK-LABEL: test_masked_8xdouble_perm_mask3:1713; CHECK: # %bb.0:1714; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm31715; CHECK-NEXT: vcmpeqpd %zmm3, %zmm2, %k11716; CHECK-NEXT: vshufpd {{.*#+}} zmm1 {%k1} = zmm0[0,1,2,2,4,4,6,7]1717; CHECK-NEXT: vmovapd %zmm1, %zmm01718; CHECK-NEXT: retq1719 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 2, i32 4, i32 4, i32 6, i32 7>1720 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer1721 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec21722 ret <8 x double> %res1723}1724 1725define <8 x double> @test_masked_z_8xdouble_perm_mask3(<8 x double> %vec, <8 x double> %mask) {1726; CHECK-LABEL: test_masked_z_8xdouble_perm_mask3:1727; CHECK: # %bb.0:1728; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21729; CHECK-NEXT: vcmpeqpd %zmm2, %zmm1, %k11730; CHECK-NEXT: vshufpd {{.*#+}} zmm0 {%k1} {z} = zmm0[0,1,2,2,4,4,6,7]1731; CHECK-NEXT: retq1732 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 2, i32 4, i32 4, i32 6, i32 7>1733 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer1734 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer1735 ret <8 x double> %res1736}1737define <8 x double> @test_8xdouble_perm_mem_mask0(ptr %vp) {1738; CHECK-LABEL: test_8xdouble_perm_mem_mask0:1739; CHECK: # %bb.0:1740; CHECK-NEXT: vpermilpd {{.*#+}} zmm0 = mem[0,1,2,3,5,4,7,6]1741; CHECK-NEXT: retq1742 %vec = load <8 x double>, ptr %vp1743 %res = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 4, i32 7, i32 6>1744 ret <8 x double> %res1745}1746define <8 x double> @test_masked_8xdouble_perm_mem_mask0(ptr %vp, <8 x double> %vec2, <8 x double> %mask) {1747; CHECK-LABEL: test_masked_8xdouble_perm_mem_mask0:1748; CHECK: # %bb.0:1749; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21750; CHECK-NEXT: vcmpeqpd %zmm2, %zmm1, %k11751; CHECK-NEXT: vpermilpd {{.*#+}} zmm0 {%k1} = mem[0,1,2,3,5,4,7,6]1752; CHECK-NEXT: retq1753 %vec = load <8 x double>, ptr %vp1754 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 4, i32 7, i32 6>1755 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer1756 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec21757 ret <8 x double> %res1758}1759 1760define <8 x double> @test_masked_z_8xdouble_perm_mem_mask0(ptr %vp, <8 x double> %mask) {1761; CHECK-LABEL: test_masked_z_8xdouble_perm_mem_mask0:1762; CHECK: # %bb.0:1763; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm11764; CHECK-NEXT: vcmpeqpd %zmm1, %zmm0, %k11765; CHECK-NEXT: vpermilpd {{.*#+}} zmm0 {%k1} {z} = mem[0,1,2,3,5,4,7,6]1766; CHECK-NEXT: retq1767 %vec = load <8 x double>, ptr %vp1768 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 4, i32 7, i32 6>1769 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer1770 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer1771 ret <8 x double> %res1772}1773 1774define <8 x double> @test_masked_8xdouble_perm_mem_mask1(ptr %vp, <8 x double> %vec2, <8 x double> %mask) {1775; CHECK-LABEL: test_masked_8xdouble_perm_mem_mask1:1776; CHECK: # %bb.0:1777; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21778; CHECK-NEXT: vcmpeqpd %zmm2, %zmm1, %k11779; CHECK-NEXT: vpermilpd {{.*#+}} zmm0 {%k1} = mem[0,1,3,3,4,5,7,7]1780; CHECK-NEXT: retq1781 %vec = load <8 x double>, ptr %vp1782 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 1, i32 3, i32 3, i32 4, i32 5, i32 7, i32 7>1783 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer1784 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec21785 ret <8 x double> %res1786}1787 1788define <8 x double> @test_masked_z_8xdouble_perm_mem_mask1(ptr %vp, <8 x double> %mask) {1789; CHECK-LABEL: test_masked_z_8xdouble_perm_mem_mask1:1790; CHECK: # %bb.0:1791; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm11792; CHECK-NEXT: vcmpeqpd %zmm1, %zmm0, %k11793; CHECK-NEXT: vpermilpd {{.*#+}} zmm0 {%k1} {z} = mem[0,1,3,3,4,5,7,7]1794; CHECK-NEXT: retq1795 %vec = load <8 x double>, ptr %vp1796 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 1, i32 3, i32 3, i32 4, i32 5, i32 7, i32 7>1797 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer1798 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer1799 ret <8 x double> %res1800}1801 1802define <8 x double> @test_masked_8xdouble_perm_mem_mask2(ptr %vp, <8 x double> %vec2, <8 x double> %mask) {1803; CHECK-LABEL: test_masked_8xdouble_perm_mem_mask2:1804; CHECK: # %bb.0:1805; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21806; CHECK-NEXT: vcmpeqpd %zmm2, %zmm1, %k11807; CHECK-NEXT: vpermilpd {{.*#+}} zmm0 {%k1} = mem[1,1,3,3,5,4,7,6]1808; CHECK-NEXT: retq1809 %vec = load <8 x double>, ptr %vp1810 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 4, i32 7, i32 6>1811 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer1812 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec21813 ret <8 x double> %res1814}1815 1816define <8 x double> @test_masked_z_8xdouble_perm_mem_mask2(ptr %vp, <8 x double> %mask) {1817; CHECK-LABEL: test_masked_z_8xdouble_perm_mem_mask2:1818; CHECK: # %bb.0:1819; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm11820; CHECK-NEXT: vcmpeqpd %zmm1, %zmm0, %k11821; CHECK-NEXT: vpermilpd {{.*#+}} zmm0 {%k1} {z} = mem[1,1,3,3,5,4,7,6]1822; CHECK-NEXT: retq1823 %vec = load <8 x double>, ptr %vp1824 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 4, i32 7, i32 6>1825 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer1826 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer1827 ret <8 x double> %res1828}1829 1830define <8 x double> @test_8xdouble_perm_mem_mask3(ptr %vp) {1831; CHECK-LABEL: test_8xdouble_perm_mem_mask3:1832; CHECK: # %bb.0:1833; CHECK-NEXT: vpermilpd {{.*#+}} zmm0 = mem[1,0,3,2,4,5,6,7]1834; CHECK-NEXT: retq1835 %vec = load <8 x double>, ptr %vp1836 %res = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7>1837 ret <8 x double> %res1838}1839define <8 x double> @test_masked_8xdouble_perm_mem_mask3(ptr %vp, <8 x double> %vec2, <8 x double> %mask) {1840; CHECK-LABEL: test_masked_8xdouble_perm_mem_mask3:1841; CHECK: # %bb.0:1842; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm21843; CHECK-NEXT: vcmpeqpd %zmm2, %zmm1, %k11844; CHECK-NEXT: vpermilpd {{.*#+}} zmm0 {%k1} = mem[1,0,3,2,4,5,6,7]1845; CHECK-NEXT: retq1846 %vec = load <8 x double>, ptr %vp1847 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7>1848 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer1849 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec21850 ret <8 x double> %res1851}1852 1853define <8 x double> @test_masked_z_8xdouble_perm_mem_mask3(ptr %vp, <8 x double> %mask) {1854; CHECK-LABEL: test_masked_z_8xdouble_perm_mem_mask3:1855; CHECK: # %bb.0:1856; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm11857; CHECK-NEXT: vcmpeqpd %zmm1, %zmm0, %k11858; CHECK-NEXT: vpermilpd {{.*#+}} zmm0 {%k1} {z} = mem[1,0,3,2,4,5,6,7]1859; CHECK-NEXT: retq1860 %vec = load <8 x double>, ptr %vp1861 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7>1862 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer1863 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer1864 ret <8 x double> %res1865}1866 1867