3018 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512bw %s -o - | FileCheck %s3 4define <16 x i16> @test_16xi16_perm_mask0(<16 x i16> %vec) {5; CHECK-LABEL: test_16xi16_perm_mask0:6; CHECK: # %bb.0:7; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm1 = [8,6,12,4,7,9,14,8,4,12,9,4,14,15,12,14]8; CHECK-NEXT: vpermw %ymm0, %ymm1, %ymm09; CHECK-NEXT: retq10 %res = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 8, i32 6, i32 12, i32 4, i32 7, i32 9, i32 14, i32 8, i32 4, i32 12, i32 9, i32 4, i32 14, i32 15, i32 12, i32 14>11 ret <16 x i16> %res12}13define <16 x i16> @test_masked_16xi16_perm_mask0(<16 x i16> %vec, <16 x i16> %vec2, <16 x i16> %mask) {14; CHECK-LABEL: test_masked_16xi16_perm_mask0:15; CHECK: # %bb.0:16; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm3 = [8,6,12,4,7,9,14,8,4,12,9,4,14,15,12,14]17; CHECK-NEXT: vptestnmw %ymm2, %ymm2, %k118; CHECK-NEXT: vpermw %ymm0, %ymm3, %ymm1 {%k1}19; CHECK-NEXT: vmovdqa %ymm1, %ymm020; CHECK-NEXT: retq21 %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 8, i32 6, i32 12, i32 4, i32 7, i32 9, i32 14, i32 8, i32 4, i32 12, i32 9, i32 4, i32 14, i32 15, i32 12, i32 14>22 %cmp = icmp eq <16 x i16> %mask, zeroinitializer23 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec224 ret <16 x i16> %res25}26 27define <16 x i16> @test_masked_z_16xi16_perm_mask0(<16 x i16> %vec, <16 x i16> %mask) {28; CHECK-LABEL: test_masked_z_16xi16_perm_mask0:29; CHECK: # %bb.0:30; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm2 = [8,6,12,4,7,9,14,8,4,12,9,4,14,15,12,14]31; CHECK-NEXT: vptestnmw %ymm1, %ymm1, %k132; CHECK-NEXT: vpermw %ymm0, %ymm2, %ymm0 {%k1} {z}33; CHECK-NEXT: retq34 %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 8, i32 6, i32 12, i32 4, i32 7, i32 9, i32 14, i32 8, i32 4, i32 12, i32 9, i32 4, i32 14, i32 15, i32 12, i32 14>35 %cmp = icmp eq <16 x i16> %mask, zeroinitializer36 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer37 ret <16 x i16> %res38}39define <16 x i16> @test_masked_16xi16_perm_mask1(<16 x i16> %vec, <16 x i16> %vec2, <16 x i16> %mask) {40; CHECK-LABEL: test_masked_16xi16_perm_mask1:41; CHECK: # %bb.0:42; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm3 = [4,11,14,10,7,1,6,9,14,15,7,13,4,12,8,0]43; CHECK-NEXT: vptestnmw %ymm2, %ymm2, %k144; CHECK-NEXT: vpermw %ymm0, %ymm3, %ymm1 {%k1}45; CHECK-NEXT: vmovdqa %ymm1, %ymm046; CHECK-NEXT: retq47 %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 4, i32 11, i32 14, i32 10, i32 7, i32 1, i32 6, i32 9, i32 14, i32 15, i32 7, i32 13, i32 4, i32 12, i32 8, i32 0>48 %cmp = icmp eq <16 x i16> %mask, zeroinitializer49 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec250 ret <16 x i16> %res51}52 53define <16 x i16> @test_masked_z_16xi16_perm_mask1(<16 x i16> %vec, <16 x i16> %mask) {54; CHECK-LABEL: test_masked_z_16xi16_perm_mask1:55; CHECK: # %bb.0:56; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm2 = [4,11,14,10,7,1,6,9,14,15,7,13,4,12,8,0]57; CHECK-NEXT: vptestnmw %ymm1, %ymm1, %k158; CHECK-NEXT: vpermw %ymm0, %ymm2, %ymm0 {%k1} {z}59; CHECK-NEXT: retq60 %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 4, i32 11, i32 14, i32 10, i32 7, i32 1, i32 6, i32 9, i32 14, i32 15, i32 7, i32 13, i32 4, i32 12, i32 8, i32 0>61 %cmp = icmp eq <16 x i16> %mask, zeroinitializer62 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer63 ret <16 x i16> %res64}65define <16 x i16> @test_masked_16xi16_perm_mask2(<16 x i16> %vec, <16 x i16> %vec2, <16 x i16> %mask) {66; CHECK-LABEL: test_masked_16xi16_perm_mask2:67; CHECK: # %bb.0:68; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm3 = [11,6,13,10,0,7,13,3,5,13,3,9,3,15,12,7]69; CHECK-NEXT: vptestnmw %ymm2, %ymm2, %k170; CHECK-NEXT: vpermw %ymm0, %ymm3, %ymm1 {%k1}71; CHECK-NEXT: vmovdqa %ymm1, %ymm072; CHECK-NEXT: retq73 %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 11, i32 6, i32 13, i32 10, i32 0, i32 7, i32 13, i32 3, i32 5, i32 13, i32 3, i32 9, i32 3, i32 15, i32 12, i32 7>74 %cmp = icmp eq <16 x i16> %mask, zeroinitializer75 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec276 ret <16 x i16> %res77}78 79define <16 x i16> @test_masked_z_16xi16_perm_mask2(<16 x i16> %vec, <16 x i16> %mask) {80; CHECK-LABEL: test_masked_z_16xi16_perm_mask2:81; CHECK: # %bb.0:82; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm2 = [11,6,13,10,0,7,13,3,5,13,3,9,3,15,12,7]83; CHECK-NEXT: vptestnmw %ymm1, %ymm1, %k184; CHECK-NEXT: vpermw %ymm0, %ymm2, %ymm0 {%k1} {z}85; CHECK-NEXT: retq86 %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 11, i32 6, i32 13, i32 10, i32 0, i32 7, i32 13, i32 3, i32 5, i32 13, i32 3, i32 9, i32 3, i32 15, i32 12, i32 7>87 %cmp = icmp eq <16 x i16> %mask, zeroinitializer88 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer89 ret <16 x i16> %res90}91define <16 x i16> @test_16xi16_perm_mask3(<16 x i16> %vec) {92; CHECK-LABEL: test_16xi16_perm_mask3:93; CHECK: # %bb.0:94; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm1 = [1,5,8,14,1,8,11,8,13,8,15,9,9,7,9,6]95; CHECK-NEXT: vpermw %ymm0, %ymm1, %ymm096; CHECK-NEXT: retq97 %res = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 1, i32 5, i32 8, i32 14, i32 1, i32 8, i32 11, i32 8, i32 13, i32 8, i32 15, i32 9, i32 9, i32 7, i32 9, i32 6>98 ret <16 x i16> %res99}100define <16 x i16> @test_masked_16xi16_perm_mask3(<16 x i16> %vec, <16 x i16> %vec2, <16 x i16> %mask) {101; CHECK-LABEL: test_masked_16xi16_perm_mask3:102; CHECK: # %bb.0:103; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm3 = [1,5,8,14,1,8,11,8,13,8,15,9,9,7,9,6]104; CHECK-NEXT: vptestnmw %ymm2, %ymm2, %k1105; CHECK-NEXT: vpermw %ymm0, %ymm3, %ymm1 {%k1}106; CHECK-NEXT: vmovdqa %ymm1, %ymm0107; CHECK-NEXT: retq108 %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 1, i32 5, i32 8, i32 14, i32 1, i32 8, i32 11, i32 8, i32 13, i32 8, i32 15, i32 9, i32 9, i32 7, i32 9, i32 6>109 %cmp = icmp eq <16 x i16> %mask, zeroinitializer110 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec2111 ret <16 x i16> %res112}113 114define <16 x i16> @test_masked_z_16xi16_perm_mask3(<16 x i16> %vec, <16 x i16> %mask) {115; CHECK-LABEL: test_masked_z_16xi16_perm_mask3:116; CHECK: # %bb.0:117; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm2 = [1,5,8,14,1,8,11,8,13,8,15,9,9,7,9,6]118; CHECK-NEXT: vptestnmw %ymm1, %ymm1, %k1119; CHECK-NEXT: vpermw %ymm0, %ymm2, %ymm0 {%k1} {z}120; CHECK-NEXT: retq121 %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 1, i32 5, i32 8, i32 14, i32 1, i32 8, i32 11, i32 8, i32 13, i32 8, i32 15, i32 9, i32 9, i32 7, i32 9, i32 6>122 %cmp = icmp eq <16 x i16> %mask, zeroinitializer123 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer124 ret <16 x i16> %res125}126define <16 x i16> @test_16xi16_perm_mem_mask0(ptr %vp) {127; CHECK-LABEL: test_16xi16_perm_mem_mask0:128; CHECK: # %bb.0:129; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm0 = [9,10,7,1,12,14,14,13,14,14,8,6,11,4,12,13]130; CHECK-NEXT: vpermw (%rdi), %ymm0, %ymm0131; CHECK-NEXT: retq132 %vec = load <16 x i16>, ptr %vp133 %res = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 9, i32 10, i32 7, i32 1, i32 12, i32 14, i32 14, i32 13, i32 14, i32 14, i32 8, i32 6, i32 11, i32 4, i32 12, i32 13>134 ret <16 x i16> %res135}136define <16 x i16> @test_masked_16xi16_perm_mem_mask0(ptr %vp, <16 x i16> %vec2, <16 x i16> %mask) {137; CHECK-LABEL: test_masked_16xi16_perm_mem_mask0:138; CHECK: # %bb.0:139; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm2 = [9,10,7,1,12,14,14,13,14,14,8,6,11,4,12,13]140; CHECK-NEXT: vptestnmw %ymm1, %ymm1, %k1141; CHECK-NEXT: vpermw (%rdi), %ymm2, %ymm0 {%k1}142; CHECK-NEXT: retq143 %vec = load <16 x i16>, ptr %vp144 %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 9, i32 10, i32 7, i32 1, i32 12, i32 14, i32 14, i32 13, i32 14, i32 14, i32 8, i32 6, i32 11, i32 4, i32 12, i32 13>145 %cmp = icmp eq <16 x i16> %mask, zeroinitializer146 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec2147 ret <16 x i16> %res148}149 150define <16 x i16> @test_masked_z_16xi16_perm_mem_mask0(ptr %vp, <16 x i16> %mask) {151; CHECK-LABEL: test_masked_z_16xi16_perm_mem_mask0:152; CHECK: # %bb.0:153; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm1 = [9,10,7,1,12,14,14,13,14,14,8,6,11,4,12,13]154; CHECK-NEXT: vptestnmw %ymm0, %ymm0, %k1155; CHECK-NEXT: vpermw (%rdi), %ymm1, %ymm0 {%k1} {z}156; CHECK-NEXT: retq157 %vec = load <16 x i16>, ptr %vp158 %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 9, i32 10, i32 7, i32 1, i32 12, i32 14, i32 14, i32 13, i32 14, i32 14, i32 8, i32 6, i32 11, i32 4, i32 12, i32 13>159 %cmp = icmp eq <16 x i16> %mask, zeroinitializer160 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer161 ret <16 x i16> %res162}163 164define <16 x i16> @test_masked_16xi16_perm_mem_mask1(ptr %vp, <16 x i16> %vec2, <16 x i16> %mask) {165; CHECK-LABEL: test_masked_16xi16_perm_mem_mask1:166; CHECK: # %bb.0:167; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm2 = [14,9,15,9,7,10,15,14,12,1,9,7,10,13,3,11]168; CHECK-NEXT: vptestnmw %ymm1, %ymm1, %k1169; CHECK-NEXT: vpermw (%rdi), %ymm2, %ymm0 {%k1}170; CHECK-NEXT: retq171 %vec = load <16 x i16>, ptr %vp172 %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 14, i32 9, i32 15, i32 9, i32 7, i32 10, i32 15, i32 14, i32 12, i32 1, i32 9, i32 7, i32 10, i32 13, i32 3, i32 11>173 %cmp = icmp eq <16 x i16> %mask, zeroinitializer174 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec2175 ret <16 x i16> %res176}177 178define <16 x i16> @test_masked_z_16xi16_perm_mem_mask1(ptr %vp, <16 x i16> %mask) {179; CHECK-LABEL: test_masked_z_16xi16_perm_mem_mask1:180; CHECK: # %bb.0:181; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm1 = [14,9,15,9,7,10,15,14,12,1,9,7,10,13,3,11]182; CHECK-NEXT: vptestnmw %ymm0, %ymm0, %k1183; CHECK-NEXT: vpermw (%rdi), %ymm1, %ymm0 {%k1} {z}184; CHECK-NEXT: retq185 %vec = load <16 x i16>, ptr %vp186 %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 14, i32 9, i32 15, i32 9, i32 7, i32 10, i32 15, i32 14, i32 12, i32 1, i32 9, i32 7, i32 10, i32 13, i32 3, i32 11>187 %cmp = icmp eq <16 x i16> %mask, zeroinitializer188 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer189 ret <16 x i16> %res190}191 192define <16 x i16> @test_masked_16xi16_perm_mem_mask2(ptr %vp, <16 x i16> %vec2, <16 x i16> %mask) {193; CHECK-LABEL: test_masked_16xi16_perm_mem_mask2:194; CHECK: # %bb.0:195; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm2 = [1,3,12,5,13,1,2,11,0,9,14,8,10,0,10,9]196; CHECK-NEXT: vptestnmw %ymm1, %ymm1, %k1197; CHECK-NEXT: vpermw (%rdi), %ymm2, %ymm0 {%k1}198; CHECK-NEXT: retq199 %vec = load <16 x i16>, ptr %vp200 %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 1, i32 3, i32 12, i32 5, i32 13, i32 1, i32 2, i32 11, i32 0, i32 9, i32 14, i32 8, i32 10, i32 0, i32 10, i32 9>201 %cmp = icmp eq <16 x i16> %mask, zeroinitializer202 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec2203 ret <16 x i16> %res204}205 206define <16 x i16> @test_masked_z_16xi16_perm_mem_mask2(ptr %vp, <16 x i16> %mask) {207; CHECK-LABEL: test_masked_z_16xi16_perm_mem_mask2:208; CHECK: # %bb.0:209; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm1 = [1,3,12,5,13,1,2,11,0,9,14,8,10,0,10,9]210; CHECK-NEXT: vptestnmw %ymm0, %ymm0, %k1211; CHECK-NEXT: vpermw (%rdi), %ymm1, %ymm0 {%k1} {z}212; CHECK-NEXT: retq213 %vec = load <16 x i16>, ptr %vp214 %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 1, i32 3, i32 12, i32 5, i32 13, i32 1, i32 2, i32 11, i32 0, i32 9, i32 14, i32 8, i32 10, i32 0, i32 10, i32 9>215 %cmp = icmp eq <16 x i16> %mask, zeroinitializer216 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer217 ret <16 x i16> %res218}219 220define <16 x i16> @test_16xi16_perm_mem_mask3(ptr %vp) {221; CHECK-LABEL: test_16xi16_perm_mem_mask3:222; CHECK: # %bb.0:223; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm0 = [9,6,5,15,0,0,15,2,1,3,12,14,0,6,1,4]224; CHECK-NEXT: vpermw (%rdi), %ymm0, %ymm0225; CHECK-NEXT: retq226 %vec = load <16 x i16>, ptr %vp227 %res = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 9, i32 6, i32 5, i32 15, i32 0, i32 0, i32 15, i32 2, i32 1, i32 3, i32 12, i32 14, i32 0, i32 6, i32 1, i32 4>228 ret <16 x i16> %res229}230define <16 x i16> @test_masked_16xi16_perm_mem_mask3(ptr %vp, <16 x i16> %vec2, <16 x i16> %mask) {231; CHECK-LABEL: test_masked_16xi16_perm_mem_mask3:232; CHECK: # %bb.0:233; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm2 = [9,6,5,15,0,0,15,2,1,3,12,14,0,6,1,4]234; CHECK-NEXT: vptestnmw %ymm1, %ymm1, %k1235; CHECK-NEXT: vpermw (%rdi), %ymm2, %ymm0 {%k1}236; CHECK-NEXT: retq237 %vec = load <16 x i16>, ptr %vp238 %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 9, i32 6, i32 5, i32 15, i32 0, i32 0, i32 15, i32 2, i32 1, i32 3, i32 12, i32 14, i32 0, i32 6, i32 1, i32 4>239 %cmp = icmp eq <16 x i16> %mask, zeroinitializer240 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec2241 ret <16 x i16> %res242}243 244define <16 x i16> @test_masked_z_16xi16_perm_mem_mask3(ptr %vp, <16 x i16> %mask) {245; CHECK-LABEL: test_masked_z_16xi16_perm_mem_mask3:246; CHECK: # %bb.0:247; CHECK-NEXT: vpmovsxbw {{.*#+}} ymm1 = [9,6,5,15,0,0,15,2,1,3,12,14,0,6,1,4]248; CHECK-NEXT: vptestnmw %ymm0, %ymm0, %k1249; CHECK-NEXT: vpermw (%rdi), %ymm1, %ymm0 {%k1} {z}250; CHECK-NEXT: retq251 %vec = load <16 x i16>, ptr %vp252 %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 9, i32 6, i32 5, i32 15, i32 0, i32 0, i32 15, i32 2, i32 1, i32 3, i32 12, i32 14, i32 0, i32 6, i32 1, i32 4>253 %cmp = icmp eq <16 x i16> %mask, zeroinitializer254 %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer255 ret <16 x i16> %res256}257 258define <32 x i16> @test_32xi16_perm_mask0(<32 x i16> %vec) {259; CHECK-LABEL: test_32xi16_perm_mask0:260; CHECK: # %bb.0:261; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm1 = [16,1,3,31,6,11,23,26,29,5,21,30,1,21,27,10,8,19,14,5,15,13,18,16,9,11,26,8,17,0,23,10]262; CHECK-NEXT: vpermw %zmm0, %zmm1, %zmm0263; CHECK-NEXT: retq264 %res = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 16, i32 1, i32 3, i32 31, i32 6, i32 11, i32 23, i32 26, i32 29, i32 5, i32 21, i32 30, i32 1, i32 21, i32 27, i32 10, i32 8, i32 19, i32 14, i32 5, i32 15, i32 13, i32 18, i32 16, i32 9, i32 11, i32 26, i32 8, i32 17, i32 0, i32 23, i32 10>265 ret <32 x i16> %res266}267define <32 x i16> @test_masked_32xi16_perm_mask0(<32 x i16> %vec, <32 x i16> %vec2, <32 x i16> %mask) {268; CHECK-LABEL: test_masked_32xi16_perm_mask0:269; CHECK: # %bb.0:270; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm3 = [16,1,3,31,6,11,23,26,29,5,21,30,1,21,27,10,8,19,14,5,15,13,18,16,9,11,26,8,17,0,23,10]271; CHECK-NEXT: vptestnmw %zmm2, %zmm2, %k1272; CHECK-NEXT: vpermw %zmm0, %zmm3, %zmm1 {%k1}273; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0274; CHECK-NEXT: retq275 %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 16, i32 1, i32 3, i32 31, i32 6, i32 11, i32 23, i32 26, i32 29, i32 5, i32 21, i32 30, i32 1, i32 21, i32 27, i32 10, i32 8, i32 19, i32 14, i32 5, i32 15, i32 13, i32 18, i32 16, i32 9, i32 11, i32 26, i32 8, i32 17, i32 0, i32 23, i32 10>276 %cmp = icmp eq <32 x i16> %mask, zeroinitializer277 %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec2278 ret <32 x i16> %res279}280 281define <32 x i16> @test_masked_z_32xi16_perm_mask0(<32 x i16> %vec, <32 x i16> %mask) {282; CHECK-LABEL: test_masked_z_32xi16_perm_mask0:283; CHECK: # %bb.0:284; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm2 = [16,1,3,31,6,11,23,26,29,5,21,30,1,21,27,10,8,19,14,5,15,13,18,16,9,11,26,8,17,0,23,10]285; CHECK-NEXT: vptestnmw %zmm1, %zmm1, %k1286; CHECK-NEXT: vpermw %zmm0, %zmm2, %zmm0 {%k1} {z}287; CHECK-NEXT: retq288 %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 16, i32 1, i32 3, i32 31, i32 6, i32 11, i32 23, i32 26, i32 29, i32 5, i32 21, i32 30, i32 1, i32 21, i32 27, i32 10, i32 8, i32 19, i32 14, i32 5, i32 15, i32 13, i32 18, i32 16, i32 9, i32 11, i32 26, i32 8, i32 17, i32 0, i32 23, i32 10>289 %cmp = icmp eq <32 x i16> %mask, zeroinitializer290 %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer291 ret <32 x i16> %res292}293define <32 x i16> @test_masked_32xi16_perm_mask1(<32 x i16> %vec, <32 x i16> %vec2, <32 x i16> %mask) {294; CHECK-LABEL: test_masked_32xi16_perm_mask1:295; CHECK: # %bb.0:296; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm3 = [1,8,7,30,11,9,11,30,20,19,22,12,13,20,0,6,10,7,20,12,28,18,13,12,22,13,21,1,14,8,5,16]297; CHECK-NEXT: vptestnmw %zmm2, %zmm2, %k1298; CHECK-NEXT: vpermw %zmm0, %zmm3, %zmm1 {%k1}299; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0300; CHECK-NEXT: retq301 %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 1, i32 8, i32 7, i32 30, i32 11, i32 9, i32 11, i32 30, i32 20, i32 19, i32 22, i32 12, i32 13, i32 20, i32 0, i32 6, i32 10, i32 7, i32 20, i32 12, i32 28, i32 18, i32 13, i32 12, i32 22, i32 13, i32 21, i32 1, i32 14, i32 8, i32 5, i32 16>302 %cmp = icmp eq <32 x i16> %mask, zeroinitializer303 %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec2304 ret <32 x i16> %res305}306 307define <32 x i16> @test_masked_z_32xi16_perm_mask1(<32 x i16> %vec, <32 x i16> %mask) {308; CHECK-LABEL: test_masked_z_32xi16_perm_mask1:309; CHECK: # %bb.0:310; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm2 = [1,8,7,30,11,9,11,30,20,19,22,12,13,20,0,6,10,7,20,12,28,18,13,12,22,13,21,1,14,8,5,16]311; CHECK-NEXT: vptestnmw %zmm1, %zmm1, %k1312; CHECK-NEXT: vpermw %zmm0, %zmm2, %zmm0 {%k1} {z}313; CHECK-NEXT: retq314 %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 1, i32 8, i32 7, i32 30, i32 11, i32 9, i32 11, i32 30, i32 20, i32 19, i32 22, i32 12, i32 13, i32 20, i32 0, i32 6, i32 10, i32 7, i32 20, i32 12, i32 28, i32 18, i32 13, i32 12, i32 22, i32 13, i32 21, i32 1, i32 14, i32 8, i32 5, i32 16>315 %cmp = icmp eq <32 x i16> %mask, zeroinitializer316 %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer317 ret <32 x i16> %res318}319define <32 x i16> @test_masked_32xi16_perm_mask2(<32 x i16> %vec, <32 x i16> %vec2, <32 x i16> %mask) {320; CHECK-LABEL: test_masked_32xi16_perm_mask2:321; CHECK: # %bb.0:322; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm3 = [15,17,24,28,15,9,14,25,28,25,6,31,20,2,23,31,12,21,10,6,22,0,26,16,3,3,20,27,8,31,3,27]323; CHECK-NEXT: vptestnmw %zmm2, %zmm2, %k1324; CHECK-NEXT: vpermw %zmm0, %zmm3, %zmm1 {%k1}325; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0326; CHECK-NEXT: retq327 %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 15, i32 17, i32 24, i32 28, i32 15, i32 9, i32 14, i32 25, i32 28, i32 25, i32 6, i32 31, i32 20, i32 2, i32 23, i32 31, i32 12, i32 21, i32 10, i32 6, i32 22, i32 0, i32 26, i32 16, i32 3, i32 3, i32 20, i32 27, i32 8, i32 31, i32 3, i32 27>328 %cmp = icmp eq <32 x i16> %mask, zeroinitializer329 %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec2330 ret <32 x i16> %res331}332 333define <32 x i16> @test_masked_z_32xi16_perm_mask2(<32 x i16> %vec, <32 x i16> %mask) {334; CHECK-LABEL: test_masked_z_32xi16_perm_mask2:335; CHECK: # %bb.0:336; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm2 = [15,17,24,28,15,9,14,25,28,25,6,31,20,2,23,31,12,21,10,6,22,0,26,16,3,3,20,27,8,31,3,27]337; CHECK-NEXT: vptestnmw %zmm1, %zmm1, %k1338; CHECK-NEXT: vpermw %zmm0, %zmm2, %zmm0 {%k1} {z}339; CHECK-NEXT: retq340 %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 15, i32 17, i32 24, i32 28, i32 15, i32 9, i32 14, i32 25, i32 28, i32 25, i32 6, i32 31, i32 20, i32 2, i32 23, i32 31, i32 12, i32 21, i32 10, i32 6, i32 22, i32 0, i32 26, i32 16, i32 3, i32 3, i32 20, i32 27, i32 8, i32 31, i32 3, i32 27>341 %cmp = icmp eq <32 x i16> %mask, zeroinitializer342 %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer343 ret <32 x i16> %res344}345define <32 x i16> @test_32xi16_perm_mask3(<32 x i16> %vec) {346; CHECK-LABEL: test_32xi16_perm_mask3:347; CHECK: # %bb.0:348; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm1 = [12,2,8,14,25,27,4,16,20,11,27,8,0,1,21,17,30,30,29,1,23,22,20,22,28,20,11,17,6,18,0,4]349; CHECK-NEXT: vpermw %zmm0, %zmm1, %zmm0350; CHECK-NEXT: retq351 %res = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 12, i32 2, i32 8, i32 14, i32 25, i32 27, i32 4, i32 16, i32 20, i32 11, i32 27, i32 8, i32 0, i32 1, i32 21, i32 17, i32 30, i32 30, i32 29, i32 1, i32 23, i32 22, i32 20, i32 22, i32 28, i32 20, i32 11, i32 17, i32 6, i32 18, i32 0, i32 4>352 ret <32 x i16> %res353}354define <32 x i16> @test_masked_32xi16_perm_mask3(<32 x i16> %vec, <32 x i16> %vec2, <32 x i16> %mask) {355; CHECK-LABEL: test_masked_32xi16_perm_mask3:356; CHECK: # %bb.0:357; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm3 = [12,2,8,14,25,27,4,16,20,11,27,8,0,1,21,17,30,30,29,1,23,22,20,22,28,20,11,17,6,18,0,4]358; CHECK-NEXT: vptestnmw %zmm2, %zmm2, %k1359; CHECK-NEXT: vpermw %zmm0, %zmm3, %zmm1 {%k1}360; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0361; CHECK-NEXT: retq362 %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 12, i32 2, i32 8, i32 14, i32 25, i32 27, i32 4, i32 16, i32 20, i32 11, i32 27, i32 8, i32 0, i32 1, i32 21, i32 17, i32 30, i32 30, i32 29, i32 1, i32 23, i32 22, i32 20, i32 22, i32 28, i32 20, i32 11, i32 17, i32 6, i32 18, i32 0, i32 4>363 %cmp = icmp eq <32 x i16> %mask, zeroinitializer364 %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec2365 ret <32 x i16> %res366}367 368define <32 x i16> @test_masked_z_32xi16_perm_mask3(<32 x i16> %vec, <32 x i16> %mask) {369; CHECK-LABEL: test_masked_z_32xi16_perm_mask3:370; CHECK: # %bb.0:371; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm2 = [12,2,8,14,25,27,4,16,20,11,27,8,0,1,21,17,30,30,29,1,23,22,20,22,28,20,11,17,6,18,0,4]372; CHECK-NEXT: vptestnmw %zmm1, %zmm1, %k1373; CHECK-NEXT: vpermw %zmm0, %zmm2, %zmm0 {%k1} {z}374; CHECK-NEXT: retq375 %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 12, i32 2, i32 8, i32 14, i32 25, i32 27, i32 4, i32 16, i32 20, i32 11, i32 27, i32 8, i32 0, i32 1, i32 21, i32 17, i32 30, i32 30, i32 29, i32 1, i32 23, i32 22, i32 20, i32 22, i32 28, i32 20, i32 11, i32 17, i32 6, i32 18, i32 0, i32 4>376 %cmp = icmp eq <32 x i16> %mask, zeroinitializer377 %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer378 ret <32 x i16> %res379}380define <32 x i16> @test_32xi16_perm_mem_mask0(ptr %vp) {381; CHECK-LABEL: test_32xi16_perm_mem_mask0:382; CHECK: # %bb.0:383; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm0 = [19,1,5,31,9,12,17,9,15,7,1,5,16,2,12,10,13,3,29,15,26,31,10,15,22,13,9,23,28,29,20,12]384; CHECK-NEXT: vpermw (%rdi), %zmm0, %zmm0385; CHECK-NEXT: retq386 %vec = load <32 x i16>, ptr %vp387 %res = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 19, i32 1, i32 5, i32 31, i32 9, i32 12, i32 17, i32 9, i32 15, i32 7, i32 1, i32 5, i32 16, i32 2, i32 12, i32 10, i32 13, i32 3, i32 29, i32 15, i32 26, i32 31, i32 10, i32 15, i32 22, i32 13, i32 9, i32 23, i32 28, i32 29, i32 20, i32 12>388 ret <32 x i16> %res389}390define <32 x i16> @test_masked_32xi16_perm_mem_mask0(ptr %vp, <32 x i16> %vec2, <32 x i16> %mask) {391; CHECK-LABEL: test_masked_32xi16_perm_mem_mask0:392; CHECK: # %bb.0:393; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm2 = [19,1,5,31,9,12,17,9,15,7,1,5,16,2,12,10,13,3,29,15,26,31,10,15,22,13,9,23,28,29,20,12]394; CHECK-NEXT: vptestnmw %zmm1, %zmm1, %k1395; CHECK-NEXT: vpermw (%rdi), %zmm2, %zmm0 {%k1}396; CHECK-NEXT: retq397 %vec = load <32 x i16>, ptr %vp398 %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 19, i32 1, i32 5, i32 31, i32 9, i32 12, i32 17, i32 9, i32 15, i32 7, i32 1, i32 5, i32 16, i32 2, i32 12, i32 10, i32 13, i32 3, i32 29, i32 15, i32 26, i32 31, i32 10, i32 15, i32 22, i32 13, i32 9, i32 23, i32 28, i32 29, i32 20, i32 12>399 %cmp = icmp eq <32 x i16> %mask, zeroinitializer400 %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec2401 ret <32 x i16> %res402}403 404define <32 x i16> @test_masked_z_32xi16_perm_mem_mask0(ptr %vp, <32 x i16> %mask) {405; CHECK-LABEL: test_masked_z_32xi16_perm_mem_mask0:406; CHECK: # %bb.0:407; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm1 = [19,1,5,31,9,12,17,9,15,7,1,5,16,2,12,10,13,3,29,15,26,31,10,15,22,13,9,23,28,29,20,12]408; CHECK-NEXT: vptestnmw %zmm0, %zmm0, %k1409; CHECK-NEXT: vpermw (%rdi), %zmm1, %zmm0 {%k1} {z}410; CHECK-NEXT: retq411 %vec = load <32 x i16>, ptr %vp412 %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 19, i32 1, i32 5, i32 31, i32 9, i32 12, i32 17, i32 9, i32 15, i32 7, i32 1, i32 5, i32 16, i32 2, i32 12, i32 10, i32 13, i32 3, i32 29, i32 15, i32 26, i32 31, i32 10, i32 15, i32 22, i32 13, i32 9, i32 23, i32 28, i32 29, i32 20, i32 12>413 %cmp = icmp eq <32 x i16> %mask, zeroinitializer414 %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer415 ret <32 x i16> %res416}417 418define <32 x i16> @test_masked_32xi16_perm_mem_mask1(ptr %vp, <32 x i16> %vec2, <32 x i16> %mask) {419; CHECK-LABEL: test_masked_32xi16_perm_mem_mask1:420; CHECK: # %bb.0:421; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm2 = [31,20,2,2,23,1,0,12,16,14,15,18,21,13,11,31,8,24,13,11,2,27,22,28,14,21,3,12,6,1,30,6]422; CHECK-NEXT: vptestnmw %zmm1, %zmm1, %k1423; CHECK-NEXT: vpermw (%rdi), %zmm2, %zmm0 {%k1}424; CHECK-NEXT: retq425 %vec = load <32 x i16>, ptr %vp426 %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 31, i32 20, i32 2, i32 2, i32 23, i32 1, i32 0, i32 12, i32 16, i32 14, i32 15, i32 18, i32 21, i32 13, i32 11, i32 31, i32 8, i32 24, i32 13, i32 11, i32 2, i32 27, i32 22, i32 28, i32 14, i32 21, i32 3, i32 12, i32 6, i32 1, i32 30, i32 6>427 %cmp = icmp eq <32 x i16> %mask, zeroinitializer428 %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec2429 ret <32 x i16> %res430}431 432define <32 x i16> @test_masked_z_32xi16_perm_mem_mask1(ptr %vp, <32 x i16> %mask) {433; CHECK-LABEL: test_masked_z_32xi16_perm_mem_mask1:434; CHECK: # %bb.0:435; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm1 = [31,20,2,2,23,1,0,12,16,14,15,18,21,13,11,31,8,24,13,11,2,27,22,28,14,21,3,12,6,1,30,6]436; CHECK-NEXT: vptestnmw %zmm0, %zmm0, %k1437; CHECK-NEXT: vpermw (%rdi), %zmm1, %zmm0 {%k1} {z}438; CHECK-NEXT: retq439 %vec = load <32 x i16>, ptr %vp440 %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 31, i32 20, i32 2, i32 2, i32 23, i32 1, i32 0, i32 12, i32 16, i32 14, i32 15, i32 18, i32 21, i32 13, i32 11, i32 31, i32 8, i32 24, i32 13, i32 11, i32 2, i32 27, i32 22, i32 28, i32 14, i32 21, i32 3, i32 12, i32 6, i32 1, i32 30, i32 6>441 %cmp = icmp eq <32 x i16> %mask, zeroinitializer442 %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer443 ret <32 x i16> %res444}445 446define <32 x i16> @test_masked_32xi16_perm_mem_mask2(ptr %vp, <32 x i16> %vec2, <32 x i16> %mask) {447; CHECK-LABEL: test_masked_32xi16_perm_mem_mask2:448; CHECK: # %bb.0:449; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm2 = [4,6,12,17,4,31,31,4,12,21,28,15,29,10,15,15,21,6,19,7,10,30,28,26,1,4,8,25,26,18,22,25]450; CHECK-NEXT: vptestnmw %zmm1, %zmm1, %k1451; CHECK-NEXT: vpermw (%rdi), %zmm2, %zmm0 {%k1}452; CHECK-NEXT: retq453 %vec = load <32 x i16>, ptr %vp454 %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 4, i32 6, i32 12, i32 17, i32 4, i32 31, i32 31, i32 4, i32 12, i32 21, i32 28, i32 15, i32 29, i32 10, i32 15, i32 15, i32 21, i32 6, i32 19, i32 7, i32 10, i32 30, i32 28, i32 26, i32 1, i32 4, i32 8, i32 25, i32 26, i32 18, i32 22, i32 25>455 %cmp = icmp eq <32 x i16> %mask, zeroinitializer456 %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec2457 ret <32 x i16> %res458}459 460define <32 x i16> @test_masked_z_32xi16_perm_mem_mask2(ptr %vp, <32 x i16> %mask) {461; CHECK-LABEL: test_masked_z_32xi16_perm_mem_mask2:462; CHECK: # %bb.0:463; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm1 = [4,6,12,17,4,31,31,4,12,21,28,15,29,10,15,15,21,6,19,7,10,30,28,26,1,4,8,25,26,18,22,25]464; CHECK-NEXT: vptestnmw %zmm0, %zmm0, %k1465; CHECK-NEXT: vpermw (%rdi), %zmm1, %zmm0 {%k1} {z}466; CHECK-NEXT: retq467 %vec = load <32 x i16>, ptr %vp468 %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 4, i32 6, i32 12, i32 17, i32 4, i32 31, i32 31, i32 4, i32 12, i32 21, i32 28, i32 15, i32 29, i32 10, i32 15, i32 15, i32 21, i32 6, i32 19, i32 7, i32 10, i32 30, i32 28, i32 26, i32 1, i32 4, i32 8, i32 25, i32 26, i32 18, i32 22, i32 25>469 %cmp = icmp eq <32 x i16> %mask, zeroinitializer470 %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer471 ret <32 x i16> %res472}473 474define <32 x i16> @test_32xi16_perm_mem_mask3(ptr %vp) {475; CHECK-LABEL: test_32xi16_perm_mem_mask3:476; CHECK: # %bb.0:477; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm0 = [2,2,27,1,7,1,0,27,10,5,4,20,30,16,28,16,18,21,25,24,31,23,28,6,17,19,26,15,25,12,18,27]478; CHECK-NEXT: vpermw (%rdi), %zmm0, %zmm0479; CHECK-NEXT: retq480 %vec = load <32 x i16>, ptr %vp481 %res = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 2, i32 2, i32 27, i32 1, i32 7, i32 1, i32 0, i32 27, i32 10, i32 5, i32 4, i32 20, i32 30, i32 16, i32 28, i32 16, i32 18, i32 21, i32 25, i32 24, i32 31, i32 23, i32 28, i32 6, i32 17, i32 19, i32 26, i32 15, i32 25, i32 12, i32 18, i32 27>482 ret <32 x i16> %res483}484define <32 x i16> @test_masked_32xi16_perm_mem_mask3(ptr %vp, <32 x i16> %vec2, <32 x i16> %mask) {485; CHECK-LABEL: test_masked_32xi16_perm_mem_mask3:486; CHECK: # %bb.0:487; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm2 = [2,2,27,1,7,1,0,27,10,5,4,20,30,16,28,16,18,21,25,24,31,23,28,6,17,19,26,15,25,12,18,27]488; CHECK-NEXT: vptestnmw %zmm1, %zmm1, %k1489; CHECK-NEXT: vpermw (%rdi), %zmm2, %zmm0 {%k1}490; CHECK-NEXT: retq491 %vec = load <32 x i16>, ptr %vp492 %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 2, i32 2, i32 27, i32 1, i32 7, i32 1, i32 0, i32 27, i32 10, i32 5, i32 4, i32 20, i32 30, i32 16, i32 28, i32 16, i32 18, i32 21, i32 25, i32 24, i32 31, i32 23, i32 28, i32 6, i32 17, i32 19, i32 26, i32 15, i32 25, i32 12, i32 18, i32 27>493 %cmp = icmp eq <32 x i16> %mask, zeroinitializer494 %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec2495 ret <32 x i16> %res496}497 498define <32 x i16> @test_masked_z_32xi16_perm_mem_mask3(ptr %vp, <32 x i16> %mask) {499; CHECK-LABEL: test_masked_z_32xi16_perm_mem_mask3:500; CHECK: # %bb.0:501; CHECK-NEXT: vpmovsxbw {{.*#+}} zmm1 = [2,2,27,1,7,1,0,27,10,5,4,20,30,16,28,16,18,21,25,24,31,23,28,6,17,19,26,15,25,12,18,27]502; CHECK-NEXT: vptestnmw %zmm0, %zmm0, %k1503; CHECK-NEXT: vpermw (%rdi), %zmm1, %zmm0 {%k1} {z}504; CHECK-NEXT: retq505 %vec = load <32 x i16>, ptr %vp506 %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 2, i32 2, i32 27, i32 1, i32 7, i32 1, i32 0, i32 27, i32 10, i32 5, i32 4, i32 20, i32 30, i32 16, i32 28, i32 16, i32 18, i32 21, i32 25, i32 24, i32 31, i32 23, i32 28, i32 6, i32 17, i32 19, i32 26, i32 15, i32 25, i32 12, i32 18, i32 27>507 %cmp = icmp eq <32 x i16> %mask, zeroinitializer508 %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer509 ret <32 x i16> %res510}511 512define <8 x i32> @test_8xi32_perm_mask0(<8 x i32> %vec) {513; CHECK-LABEL: test_8xi32_perm_mask0:514; CHECK: # %bb.0:515; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm1 = [4,2,0,6,7,2,3,6]516; CHECK-NEXT: vpermps %ymm0, %ymm1, %ymm0517; CHECK-NEXT: retq518 %res = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 4, i32 2, i32 0, i32 6, i32 7, i32 2, i32 3, i32 6>519 ret <8 x i32> %res520}521define <8 x i32> @test_masked_8xi32_perm_mask0(<8 x i32> %vec, <8 x i32> %vec2, <8 x i32> %mask) {522; CHECK-LABEL: test_masked_8xi32_perm_mask0:523; CHECK: # %bb.0:524; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm3 = [4,2,0,6,7,2,3,6]525; CHECK-NEXT: vptestnmd %ymm2, %ymm2, %k1526; CHECK-NEXT: vpermd %ymm0, %ymm3, %ymm1 {%k1}527; CHECK-NEXT: vmovdqa %ymm1, %ymm0528; CHECK-NEXT: retq529 %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 4, i32 2, i32 0, i32 6, i32 7, i32 2, i32 3, i32 6>530 %cmp = icmp eq <8 x i32> %mask, zeroinitializer531 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec2532 ret <8 x i32> %res533}534 535define <8 x i32> @test_masked_z_8xi32_perm_mask0(<8 x i32> %vec, <8 x i32> %mask) {536; CHECK-LABEL: test_masked_z_8xi32_perm_mask0:537; CHECK: # %bb.0:538; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm2 = [4,2,0,6,7,2,3,6]539; CHECK-NEXT: vptestnmd %ymm1, %ymm1, %k1540; CHECK-NEXT: vpermd %ymm0, %ymm2, %ymm0 {%k1} {z}541; CHECK-NEXT: retq542 %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 4, i32 2, i32 0, i32 6, i32 7, i32 2, i32 3, i32 6>543 %cmp = icmp eq <8 x i32> %mask, zeroinitializer544 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> zeroinitializer545 ret <8 x i32> %res546}547define <8 x i32> @test_masked_8xi32_perm_mask1(<8 x i32> %vec, <8 x i32> %vec2, <8 x i32> %mask) {548; CHECK-LABEL: test_masked_8xi32_perm_mask1:549; CHECK: # %bb.0:550; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm3 = [0,5,1,2,6,0,0,3]551; CHECK-NEXT: vptestnmd %ymm2, %ymm2, %k1552; CHECK-NEXT: vpermd %ymm0, %ymm3, %ymm1 {%k1}553; CHECK-NEXT: vmovdqa %ymm1, %ymm0554; CHECK-NEXT: retq555 %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 0, i32 5, i32 1, i32 2, i32 6, i32 0, i32 0, i32 3>556 %cmp = icmp eq <8 x i32> %mask, zeroinitializer557 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec2558 ret <8 x i32> %res559}560 561define <8 x i32> @test_masked_z_8xi32_perm_mask1(<8 x i32> %vec, <8 x i32> %mask) {562; CHECK-LABEL: test_masked_z_8xi32_perm_mask1:563; CHECK: # %bb.0:564; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm2 = [0,5,1,2,6,0,0,3]565; CHECK-NEXT: vptestnmd %ymm1, %ymm1, %k1566; CHECK-NEXT: vpermd %ymm0, %ymm2, %ymm0 {%k1} {z}567; CHECK-NEXT: retq568 %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 0, i32 5, i32 1, i32 2, i32 6, i32 0, i32 0, i32 3>569 %cmp = icmp eq <8 x i32> %mask, zeroinitializer570 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> zeroinitializer571 ret <8 x i32> %res572}573define <8 x i32> @test_masked_8xi32_perm_mask2(<8 x i32> %vec, <8 x i32> %vec2, <8 x i32> %mask) {574; CHECK-LABEL: test_masked_8xi32_perm_mask2:575; CHECK: # %bb.0:576; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm3 = [3,6,5,5,1,7,3,4]577; CHECK-NEXT: vptestnmd %ymm2, %ymm2, %k1578; CHECK-NEXT: vpermd %ymm0, %ymm3, %ymm1 {%k1}579; CHECK-NEXT: vmovdqa %ymm1, %ymm0580; CHECK-NEXT: retq581 %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 3, i32 6, i32 5, i32 5, i32 1, i32 7, i32 3, i32 4>582 %cmp = icmp eq <8 x i32> %mask, zeroinitializer583 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec2584 ret <8 x i32> %res585}586 587define <8 x i32> @test_masked_z_8xi32_perm_mask2(<8 x i32> %vec, <8 x i32> %mask) {588; CHECK-LABEL: test_masked_z_8xi32_perm_mask2:589; CHECK: # %bb.0:590; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm2 = [3,6,5,5,1,7,3,4]591; CHECK-NEXT: vptestnmd %ymm1, %ymm1, %k1592; CHECK-NEXT: vpermd %ymm0, %ymm2, %ymm0 {%k1} {z}593; CHECK-NEXT: retq594 %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 3, i32 6, i32 5, i32 5, i32 1, i32 7, i32 3, i32 4>595 %cmp = icmp eq <8 x i32> %mask, zeroinitializer596 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> zeroinitializer597 ret <8 x i32> %res598}599define <8 x i32> @test_8xi32_perm_mask3(<8 x i32> %vec) {600; CHECK-LABEL: test_8xi32_perm_mask3:601; CHECK: # %bb.0:602; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm1 = [3,0,3,1,0,4,5,0]603; CHECK-NEXT: vpermps %ymm0, %ymm1, %ymm0604; CHECK-NEXT: retq605 %res = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 3, i32 0, i32 3, i32 1, i32 0, i32 4, i32 5, i32 0>606 ret <8 x i32> %res607}608define <8 x i32> @test_masked_8xi32_perm_mask3(<8 x i32> %vec, <8 x i32> %vec2, <8 x i32> %mask) {609; CHECK-LABEL: test_masked_8xi32_perm_mask3:610; CHECK: # %bb.0:611; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm3 = [3,0,3,1,0,4,5,0]612; CHECK-NEXT: vptestnmd %ymm2, %ymm2, %k1613; CHECK-NEXT: vpermd %ymm0, %ymm3, %ymm1 {%k1}614; CHECK-NEXT: vmovdqa %ymm1, %ymm0615; CHECK-NEXT: retq616 %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 3, i32 0, i32 3, i32 1, i32 0, i32 4, i32 5, i32 0>617 %cmp = icmp eq <8 x i32> %mask, zeroinitializer618 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec2619 ret <8 x i32> %res620}621 622define <8 x i32> @test_masked_z_8xi32_perm_mask3(<8 x i32> %vec, <8 x i32> %mask) {623; CHECK-LABEL: test_masked_z_8xi32_perm_mask3:624; CHECK: # %bb.0:625; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm2 = [3,0,3,1,0,4,5,0]626; CHECK-NEXT: vptestnmd %ymm1, %ymm1, %k1627; CHECK-NEXT: vpermd %ymm0, %ymm2, %ymm0 {%k1} {z}628; CHECK-NEXT: retq629 %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 3, i32 0, i32 3, i32 1, i32 0, i32 4, i32 5, i32 0>630 %cmp = icmp eq <8 x i32> %mask, zeroinitializer631 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> zeroinitializer632 ret <8 x i32> %res633}634define <8 x i32> @test_8xi32_perm_mem_mask0(ptr %vp) {635; CHECK-LABEL: test_8xi32_perm_mem_mask0:636; CHECK: # %bb.0:637; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm0 = [3,7,4,3,5,2,0,5]638; CHECK-NEXT: vpermps (%rdi), %ymm0, %ymm0639; CHECK-NEXT: retq640 %vec = load <8 x i32>, ptr %vp641 %res = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 3, i32 7, i32 4, i32 3, i32 5, i32 2, i32 0, i32 5>642 ret <8 x i32> %res643}644define <8 x i32> @test_masked_8xi32_perm_mem_mask0(ptr %vp, <8 x i32> %vec2, <8 x i32> %mask) {645; CHECK-LABEL: test_masked_8xi32_perm_mem_mask0:646; CHECK: # %bb.0:647; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm2 = [3,7,4,3,5,2,0,5]648; CHECK-NEXT: vptestnmd %ymm1, %ymm1, %k1649; CHECK-NEXT: vpermd (%rdi), %ymm2, %ymm0 {%k1}650; CHECK-NEXT: retq651 %vec = load <8 x i32>, ptr %vp652 %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 3, i32 7, i32 4, i32 3, i32 5, i32 2, i32 0, i32 5>653 %cmp = icmp eq <8 x i32> %mask, zeroinitializer654 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec2655 ret <8 x i32> %res656}657 658define <8 x i32> @test_masked_z_8xi32_perm_mem_mask0(ptr %vp, <8 x i32> %mask) {659; CHECK-LABEL: test_masked_z_8xi32_perm_mem_mask0:660; CHECK: # %bb.0:661; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm1 = [3,7,4,3,5,2,0,5]662; CHECK-NEXT: vptestnmd %ymm0, %ymm0, %k1663; CHECK-NEXT: vpermd (%rdi), %ymm1, %ymm0 {%k1} {z}664; CHECK-NEXT: retq665 %vec = load <8 x i32>, ptr %vp666 %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 3, i32 7, i32 4, i32 3, i32 5, i32 2, i32 0, i32 5>667 %cmp = icmp eq <8 x i32> %mask, zeroinitializer668 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> zeroinitializer669 ret <8 x i32> %res670}671 672define <8 x i32> @test_masked_8xi32_perm_mem_mask1(ptr %vp, <8 x i32> %vec2, <8 x i32> %mask) {673; CHECK-LABEL: test_masked_8xi32_perm_mem_mask1:674; CHECK: # %bb.0:675; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm2 = [4,6,1,7,6,7,6,5]676; CHECK-NEXT: vptestnmd %ymm1, %ymm1, %k1677; CHECK-NEXT: vpermd (%rdi), %ymm2, %ymm0 {%k1}678; CHECK-NEXT: retq679 %vec = load <8 x i32>, ptr %vp680 %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 4, i32 6, i32 1, i32 7, i32 6, i32 7, i32 6, i32 5>681 %cmp = icmp eq <8 x i32> %mask, zeroinitializer682 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec2683 ret <8 x i32> %res684}685 686define <8 x i32> @test_masked_z_8xi32_perm_mem_mask1(ptr %vp, <8 x i32> %mask) {687; CHECK-LABEL: test_masked_z_8xi32_perm_mem_mask1:688; CHECK: # %bb.0:689; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm1 = [4,6,1,7,6,7,6,5]690; CHECK-NEXT: vptestnmd %ymm0, %ymm0, %k1691; CHECK-NEXT: vpermd (%rdi), %ymm1, %ymm0 {%k1} {z}692; CHECK-NEXT: retq693 %vec = load <8 x i32>, ptr %vp694 %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 4, i32 6, i32 1, i32 7, i32 6, i32 7, i32 6, i32 5>695 %cmp = icmp eq <8 x i32> %mask, zeroinitializer696 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> zeroinitializer697 ret <8 x i32> %res698}699 700define <8 x i32> @test_masked_8xi32_perm_mem_mask2(ptr %vp, <8 x i32> %vec2, <8 x i32> %mask) {701; CHECK-LABEL: test_masked_8xi32_perm_mem_mask2:702; CHECK: # %bb.0:703; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm2 = [6,4,6,1,6,3,6,3]704; CHECK-NEXT: vptestnmd %ymm1, %ymm1, %k1705; CHECK-NEXT: vpermd (%rdi), %ymm2, %ymm0 {%k1}706; CHECK-NEXT: retq707 %vec = load <8 x i32>, ptr %vp708 %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 6, i32 4, i32 6, i32 1, i32 6, i32 3, i32 6, i32 3>709 %cmp = icmp eq <8 x i32> %mask, zeroinitializer710 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec2711 ret <8 x i32> %res712}713 714define <8 x i32> @test_masked_z_8xi32_perm_mem_mask2(ptr %vp, <8 x i32> %mask) {715; CHECK-LABEL: test_masked_z_8xi32_perm_mem_mask2:716; CHECK: # %bb.0:717; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm1 = [6,4,6,1,6,3,6,3]718; CHECK-NEXT: vptestnmd %ymm0, %ymm0, %k1719; CHECK-NEXT: vpermd (%rdi), %ymm1, %ymm0 {%k1} {z}720; CHECK-NEXT: retq721 %vec = load <8 x i32>, ptr %vp722 %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 6, i32 4, i32 6, i32 1, i32 6, i32 3, i32 6, i32 3>723 %cmp = icmp eq <8 x i32> %mask, zeroinitializer724 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> zeroinitializer725 ret <8 x i32> %res726}727 728define <8 x i32> @test_8xi32_perm_mem_mask3(ptr %vp) {729; CHECK-LABEL: test_8xi32_perm_mem_mask3:730; CHECK: # %bb.0:731; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm0 = [6,0,0,7,3,7,7,5]732; CHECK-NEXT: vpermps (%rdi), %ymm0, %ymm0733; CHECK-NEXT: retq734 %vec = load <8 x i32>, ptr %vp735 %res = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 6, i32 0, i32 0, i32 7, i32 3, i32 7, i32 7, i32 5>736 ret <8 x i32> %res737}738define <8 x i32> @test_masked_8xi32_perm_mem_mask3(ptr %vp, <8 x i32> %vec2, <8 x i32> %mask) {739; CHECK-LABEL: test_masked_8xi32_perm_mem_mask3:740; CHECK: # %bb.0:741; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm2 = [6,0,0,7,3,7,7,5]742; CHECK-NEXT: vptestnmd %ymm1, %ymm1, %k1743; CHECK-NEXT: vpermd (%rdi), %ymm2, %ymm0 {%k1}744; CHECK-NEXT: retq745 %vec = load <8 x i32>, ptr %vp746 %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 6, i32 0, i32 0, i32 7, i32 3, i32 7, i32 7, i32 5>747 %cmp = icmp eq <8 x i32> %mask, zeroinitializer748 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec2749 ret <8 x i32> %res750}751 752define <8 x i32> @test_masked_z_8xi32_perm_mem_mask3(ptr %vp, <8 x i32> %mask) {753; CHECK-LABEL: test_masked_z_8xi32_perm_mem_mask3:754; CHECK: # %bb.0:755; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm1 = [6,0,0,7,3,7,7,5]756; CHECK-NEXT: vptestnmd %ymm0, %ymm0, %k1757; CHECK-NEXT: vpermd (%rdi), %ymm1, %ymm0 {%k1} {z}758; CHECK-NEXT: retq759 %vec = load <8 x i32>, ptr %vp760 %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 6, i32 0, i32 0, i32 7, i32 3, i32 7, i32 7, i32 5>761 %cmp = icmp eq <8 x i32> %mask, zeroinitializer762 %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> zeroinitializer763 ret <8 x i32> %res764}765 766define <16 x i32> @test_16xi32_perm_mask0(<16 x i32> %vec) {767; CHECK-LABEL: test_16xi32_perm_mask0:768; CHECK: # %bb.0:769; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm1 = [14,12,11,6,4,1,6,9,14,14,6,1,12,11,0,7]770; CHECK-NEXT: vpermps %zmm0, %zmm1, %zmm0771; CHECK-NEXT: retq772 %res = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 14, i32 12, i32 11, i32 6, i32 4, i32 1, i32 6, i32 9, i32 14, i32 14, i32 6, i32 1, i32 12, i32 11, i32 0, i32 7>773 ret <16 x i32> %res774}775define <16 x i32> @test_masked_16xi32_perm_mask0(<16 x i32> %vec, <16 x i32> %vec2, <16 x i32> %mask) {776; CHECK-LABEL: test_masked_16xi32_perm_mask0:777; CHECK: # %bb.0:778; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm3 = [14,12,11,6,4,1,6,9,14,14,6,1,12,11,0,7]779; CHECK-NEXT: vptestnmd %zmm2, %zmm2, %k1780; CHECK-NEXT: vpermd %zmm0, %zmm3, %zmm1 {%k1}781; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0782; CHECK-NEXT: retq783 %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 14, i32 12, i32 11, i32 6, i32 4, i32 1, i32 6, i32 9, i32 14, i32 14, i32 6, i32 1, i32 12, i32 11, i32 0, i32 7>784 %cmp = icmp eq <16 x i32> %mask, zeroinitializer785 %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> %vec2786 ret <16 x i32> %res787}788 789define <16 x i32> @test_masked_z_16xi32_perm_mask0(<16 x i32> %vec, <16 x i32> %mask) {790; CHECK-LABEL: test_masked_z_16xi32_perm_mask0:791; CHECK: # %bb.0:792; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm2 = [14,12,11,6,4,1,6,9,14,14,6,1,12,11,0,7]793; CHECK-NEXT: vptestnmd %zmm1, %zmm1, %k1794; CHECK-NEXT: vpermd %zmm0, %zmm2, %zmm0 {%k1} {z}795; CHECK-NEXT: retq796 %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 14, i32 12, i32 11, i32 6, i32 4, i32 1, i32 6, i32 9, i32 14, i32 14, i32 6, i32 1, i32 12, i32 11, i32 0, i32 7>797 %cmp = icmp eq <16 x i32> %mask, zeroinitializer798 %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> zeroinitializer799 ret <16 x i32> %res800}801define <16 x i32> @test_masked_16xi32_perm_mask1(<16 x i32> %vec, <16 x i32> %vec2, <16 x i32> %mask) {802; CHECK-LABEL: test_masked_16xi32_perm_mask1:803; CHECK: # %bb.0:804; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm3 = [10,0,14,15,11,1,1,5,0,5,0,15,13,1,14,3]805; CHECK-NEXT: vptestnmd %zmm2, %zmm2, %k1806; CHECK-NEXT: vpermd %zmm0, %zmm3, %zmm1 {%k1}807; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0808; CHECK-NEXT: retq809 %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 10, i32 0, i32 14, i32 15, i32 11, i32 1, i32 1, i32 5, i32 0, i32 5, i32 0, i32 15, i32 13, i32 1, i32 14, i32 3>810 %cmp = icmp eq <16 x i32> %mask, zeroinitializer811 %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> %vec2812 ret <16 x i32> %res813}814 815define <16 x i32> @test_masked_z_16xi32_perm_mask1(<16 x i32> %vec, <16 x i32> %mask) {816; CHECK-LABEL: test_masked_z_16xi32_perm_mask1:817; CHECK: # %bb.0:818; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm2 = [10,0,14,15,11,1,1,5,0,5,0,15,13,1,14,3]819; CHECK-NEXT: vptestnmd %zmm1, %zmm1, %k1820; CHECK-NEXT: vpermd %zmm0, %zmm2, %zmm0 {%k1} {z}821; CHECK-NEXT: retq822 %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 10, i32 0, i32 14, i32 15, i32 11, i32 1, i32 1, i32 5, i32 0, i32 5, i32 0, i32 15, i32 13, i32 1, i32 14, i32 3>823 %cmp = icmp eq <16 x i32> %mask, zeroinitializer824 %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> zeroinitializer825 ret <16 x i32> %res826}827define <16 x i32> @test_masked_16xi32_perm_mask2(<16 x i32> %vec, <16 x i32> %vec2, <16 x i32> %mask) {828; CHECK-LABEL: test_masked_16xi32_perm_mask2:829; CHECK: # %bb.0:830; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm3 = [3,10,15,1,0,5,0,9,13,2,1,5,15,2,15,5]831; CHECK-NEXT: vptestnmd %zmm2, %zmm2, %k1832; CHECK-NEXT: vpermd %zmm0, %zmm3, %zmm1 {%k1}833; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0834; CHECK-NEXT: retq835 %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 3, i32 10, i32 15, i32 1, i32 0, i32 5, i32 0, i32 9, i32 13, i32 2, i32 1, i32 5, i32 15, i32 2, i32 15, i32 5>836 %cmp = icmp eq <16 x i32> %mask, zeroinitializer837 %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> %vec2838 ret <16 x i32> %res839}840 841define <16 x i32> @test_masked_z_16xi32_perm_mask2(<16 x i32> %vec, <16 x i32> %mask) {842; CHECK-LABEL: test_masked_z_16xi32_perm_mask2:843; CHECK: # %bb.0:844; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm2 = [3,10,15,1,0,5,0,9,13,2,1,5,15,2,15,5]845; CHECK-NEXT: vptestnmd %zmm1, %zmm1, %k1846; CHECK-NEXT: vpermd %zmm0, %zmm2, %zmm0 {%k1} {z}847; CHECK-NEXT: retq848 %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 3, i32 10, i32 15, i32 1, i32 0, i32 5, i32 0, i32 9, i32 13, i32 2, i32 1, i32 5, i32 15, i32 2, i32 15, i32 5>849 %cmp = icmp eq <16 x i32> %mask, zeroinitializer850 %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> zeroinitializer851 ret <16 x i32> %res852}853define <16 x i32> @test_16xi32_perm_mask3(<16 x i32> %vec) {854; CHECK-LABEL: test_16xi32_perm_mask3:855; CHECK: # %bb.0:856; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm1 = [7,4,14,15,10,2,15,1,9,2,14,15,12,5,3,12]857; CHECK-NEXT: vpermps %zmm0, %zmm1, %zmm0858; CHECK-NEXT: retq859 %res = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 7, i32 4, i32 14, i32 15, i32 10, i32 2, i32 15, i32 1, i32 9, i32 2, i32 14, i32 15, i32 12, i32 5, i32 3, i32 12>860 ret <16 x i32> %res861}862define <16 x i32> @test_masked_16xi32_perm_mask3(<16 x i32> %vec, <16 x i32> %vec2, <16 x i32> %mask) {863; CHECK-LABEL: test_masked_16xi32_perm_mask3:864; CHECK: # %bb.0:865; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm3 = [7,4,14,15,10,2,15,1,9,2,14,15,12,5,3,12]866; CHECK-NEXT: vptestnmd %zmm2, %zmm2, %k1867; CHECK-NEXT: vpermd %zmm0, %zmm3, %zmm1 {%k1}868; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0869; CHECK-NEXT: retq870 %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 7, i32 4, i32 14, i32 15, i32 10, i32 2, i32 15, i32 1, i32 9, i32 2, i32 14, i32 15, i32 12, i32 5, i32 3, i32 12>871 %cmp = icmp eq <16 x i32> %mask, zeroinitializer872 %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> %vec2873 ret <16 x i32> %res874}875 876define <16 x i32> @test_masked_z_16xi32_perm_mask3(<16 x i32> %vec, <16 x i32> %mask) {877; CHECK-LABEL: test_masked_z_16xi32_perm_mask3:878; CHECK: # %bb.0:879; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm2 = [7,4,14,15,10,2,15,1,9,2,14,15,12,5,3,12]880; CHECK-NEXT: vptestnmd %zmm1, %zmm1, %k1881; CHECK-NEXT: vpermd %zmm0, %zmm2, %zmm0 {%k1} {z}882; CHECK-NEXT: retq883 %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 7, i32 4, i32 14, i32 15, i32 10, i32 2, i32 15, i32 1, i32 9, i32 2, i32 14, i32 15, i32 12, i32 5, i32 3, i32 12>884 %cmp = icmp eq <16 x i32> %mask, zeroinitializer885 %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> zeroinitializer886 ret <16 x i32> %res887}888define <16 x i32> @test_16xi32_perm_mem_mask0(ptr %vp) {889; CHECK-LABEL: test_16xi32_perm_mem_mask0:890; CHECK: # %bb.0:891; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm0 = [0,1,1,6,8,11,2,6,10,1,7,5,15,0,6,6]892; CHECK-NEXT: vpermps (%rdi), %zmm0, %zmm0893; CHECK-NEXT: retq894 %vec = load <16 x i32>, ptr %vp895 %res = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 0, i32 1, i32 1, i32 6, i32 8, i32 11, i32 2, i32 6, i32 10, i32 1, i32 7, i32 5, i32 15, i32 0, i32 6, i32 6>896 ret <16 x i32> %res897}898define <16 x i32> @test_masked_16xi32_perm_mem_mask0(ptr %vp, <16 x i32> %vec2, <16 x i32> %mask) {899; CHECK-LABEL: test_masked_16xi32_perm_mem_mask0:900; CHECK: # %bb.0:901; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm2 = [0,1,1,6,8,11,2,6,10,1,7,5,15,0,6,6]902; CHECK-NEXT: vptestnmd %zmm1, %zmm1, %k1903; CHECK-NEXT: vpermd (%rdi), %zmm2, %zmm0 {%k1}904; CHECK-NEXT: retq905 %vec = load <16 x i32>, ptr %vp906 %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 0, i32 1, i32 1, i32 6, i32 8, i32 11, i32 2, i32 6, i32 10, i32 1, i32 7, i32 5, i32 15, i32 0, i32 6, i32 6>907 %cmp = icmp eq <16 x i32> %mask, zeroinitializer908 %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> %vec2909 ret <16 x i32> %res910}911 912define <16 x i32> @test_masked_z_16xi32_perm_mem_mask0(ptr %vp, <16 x i32> %mask) {913; CHECK-LABEL: test_masked_z_16xi32_perm_mem_mask0:914; CHECK: # %bb.0:915; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm1 = [0,1,1,6,8,11,2,6,10,1,7,5,15,0,6,6]916; CHECK-NEXT: vptestnmd %zmm0, %zmm0, %k1917; CHECK-NEXT: vpermd (%rdi), %zmm1, %zmm0 {%k1} {z}918; CHECK-NEXT: retq919 %vec = load <16 x i32>, ptr %vp920 %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 0, i32 1, i32 1, i32 6, i32 8, i32 11, i32 2, i32 6, i32 10, i32 1, i32 7, i32 5, i32 15, i32 0, i32 6, i32 6>921 %cmp = icmp eq <16 x i32> %mask, zeroinitializer922 %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> zeroinitializer923 ret <16 x i32> %res924}925 926define <16 x i32> @test_masked_16xi32_perm_mem_mask1(ptr %vp, <16 x i32> %vec2, <16 x i32> %mask) {927; CHECK-LABEL: test_masked_16xi32_perm_mem_mask1:928; CHECK: # %bb.0:929; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm2 = [11,5,3,4,7,15,12,4,8,11,12,7,6,12,6,3]930; CHECK-NEXT: vptestnmd %zmm1, %zmm1, %k1931; CHECK-NEXT: vpermd (%rdi), %zmm2, %zmm0 {%k1}932; CHECK-NEXT: retq933 %vec = load <16 x i32>, ptr %vp934 %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 11, i32 5, i32 3, i32 4, i32 7, i32 15, i32 12, i32 4, i32 8, i32 11, i32 12, i32 7, i32 6, i32 12, i32 6, i32 3>935 %cmp = icmp eq <16 x i32> %mask, zeroinitializer936 %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> %vec2937 ret <16 x i32> %res938}939 940define <16 x i32> @test_masked_z_16xi32_perm_mem_mask1(ptr %vp, <16 x i32> %mask) {941; CHECK-LABEL: test_masked_z_16xi32_perm_mem_mask1:942; CHECK: # %bb.0:943; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm1 = [11,5,3,4,7,15,12,4,8,11,12,7,6,12,6,3]944; CHECK-NEXT: vptestnmd %zmm0, %zmm0, %k1945; CHECK-NEXT: vpermd (%rdi), %zmm1, %zmm0 {%k1} {z}946; CHECK-NEXT: retq947 %vec = load <16 x i32>, ptr %vp948 %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 11, i32 5, i32 3, i32 4, i32 7, i32 15, i32 12, i32 4, i32 8, i32 11, i32 12, i32 7, i32 6, i32 12, i32 6, i32 3>949 %cmp = icmp eq <16 x i32> %mask, zeroinitializer950 %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> zeroinitializer951 ret <16 x i32> %res952}953 954define <16 x i32> @test_masked_16xi32_perm_mem_mask2(ptr %vp, <16 x i32> %vec2, <16 x i32> %mask) {955; CHECK-LABEL: test_masked_16xi32_perm_mem_mask2:956; CHECK: # %bb.0:957; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm2 = [7,14,2,7,10,7,3,0,11,9,0,4,12,10,8,2]958; CHECK-NEXT: vptestnmd %zmm1, %zmm1, %k1959; CHECK-NEXT: vpermd (%rdi), %zmm2, %zmm0 {%k1}960; CHECK-NEXT: retq961 %vec = load <16 x i32>, ptr %vp962 %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 7, i32 14, i32 2, i32 7, i32 10, i32 7, i32 3, i32 0, i32 11, i32 9, i32 0, i32 4, i32 12, i32 10, i32 8, i32 2>963 %cmp = icmp eq <16 x i32> %mask, zeroinitializer964 %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> %vec2965 ret <16 x i32> %res966}967 968define <16 x i32> @test_masked_z_16xi32_perm_mem_mask2(ptr %vp, <16 x i32> %mask) {969; CHECK-LABEL: test_masked_z_16xi32_perm_mem_mask2:970; CHECK: # %bb.0:971; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm1 = [7,14,2,7,10,7,3,0,11,9,0,4,12,10,8,2]972; CHECK-NEXT: vptestnmd %zmm0, %zmm0, %k1973; CHECK-NEXT: vpermd (%rdi), %zmm1, %zmm0 {%k1} {z}974; CHECK-NEXT: retq975 %vec = load <16 x i32>, ptr %vp976 %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 7, i32 14, i32 2, i32 7, i32 10, i32 7, i32 3, i32 0, i32 11, i32 9, i32 0, i32 4, i32 12, i32 10, i32 8, i32 2>977 %cmp = icmp eq <16 x i32> %mask, zeroinitializer978 %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> zeroinitializer979 ret <16 x i32> %res980}981 982define <16 x i32> @test_16xi32_perm_mem_mask3(ptr %vp) {983; CHECK-LABEL: test_16xi32_perm_mem_mask3:984; CHECK: # %bb.0:985; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm0 = [11,7,10,12,3,12,4,15,1,14,0,4,8,9,6,1]986; CHECK-NEXT: vpermps (%rdi), %zmm0, %zmm0987; CHECK-NEXT: retq988 %vec = load <16 x i32>, ptr %vp989 %res = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 11, i32 7, i32 10, i32 12, i32 3, i32 12, i32 4, i32 15, i32 1, i32 14, i32 0, i32 4, i32 8, i32 9, i32 6, i32 1>990 ret <16 x i32> %res991}992define <16 x i32> @test_masked_16xi32_perm_mem_mask3(ptr %vp, <16 x i32> %vec2, <16 x i32> %mask) {993; CHECK-LABEL: test_masked_16xi32_perm_mem_mask3:994; CHECK: # %bb.0:995; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm2 = [11,7,10,12,3,12,4,15,1,14,0,4,8,9,6,1]996; CHECK-NEXT: vptestnmd %zmm1, %zmm1, %k1997; CHECK-NEXT: vpermd (%rdi), %zmm2, %zmm0 {%k1}998; CHECK-NEXT: retq999 %vec = load <16 x i32>, ptr %vp1000 %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 11, i32 7, i32 10, i32 12, i32 3, i32 12, i32 4, i32 15, i32 1, i32 14, i32 0, i32 4, i32 8, i32 9, i32 6, i32 1>1001 %cmp = icmp eq <16 x i32> %mask, zeroinitializer1002 %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> %vec21003 ret <16 x i32> %res1004}1005 1006define <16 x i32> @test_masked_z_16xi32_perm_mem_mask3(ptr %vp, <16 x i32> %mask) {1007; CHECK-LABEL: test_masked_z_16xi32_perm_mem_mask3:1008; CHECK: # %bb.0:1009; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm1 = [11,7,10,12,3,12,4,15,1,14,0,4,8,9,6,1]1010; CHECK-NEXT: vptestnmd %zmm0, %zmm0, %k11011; CHECK-NEXT: vpermd (%rdi), %zmm1, %zmm0 {%k1} {z}1012; CHECK-NEXT: retq1013 %vec = load <16 x i32>, ptr %vp1014 %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 11, i32 7, i32 10, i32 12, i32 3, i32 12, i32 4, i32 15, i32 1, i32 14, i32 0, i32 4, i32 8, i32 9, i32 6, i32 1>1015 %cmp = icmp eq <16 x i32> %mask, zeroinitializer1016 %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> zeroinitializer1017 ret <16 x i32> %res1018}1019 1020define <4 x i64> @test_4xi64_perm_mask0(<4 x i64> %vec) {1021; CHECK-LABEL: test_4xi64_perm_mask0:1022; CHECK: # %bb.0:1023; CHECK-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[2,0,3,1]1024; CHECK-NEXT: retq1025 %res = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1>1026 ret <4 x i64> %res1027}1028define <4 x i64> @test_masked_4xi64_perm_mask0(<4 x i64> %vec, <4 x i64> %vec2, <4 x i64> %mask) {1029; CHECK-LABEL: test_masked_4xi64_perm_mask0:1030; CHECK: # %bb.0:1031; CHECK-NEXT: vptestnmq %ymm2, %ymm2, %k11032; CHECK-NEXT: vpermq {{.*#+}} ymm1 {%k1} = ymm0[2,0,3,1]1033; CHECK-NEXT: vmovdqa %ymm1, %ymm01034; CHECK-NEXT: retq1035 %shuf = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1>1036 %cmp = icmp eq <4 x i64> %mask, zeroinitializer1037 %res = select <4 x i1> %cmp, <4 x i64> %shuf, <4 x i64> %vec21038 ret <4 x i64> %res1039}1040 1041define <4 x i64> @test_masked_z_4xi64_perm_mask0(<4 x i64> %vec, <4 x i64> %mask) {1042; CHECK-LABEL: test_masked_z_4xi64_perm_mask0:1043; CHECK: # %bb.0:1044; CHECK-NEXT: vptestnmq %ymm1, %ymm1, %k11045; CHECK-NEXT: vpermq {{.*#+}} ymm0 {%k1} {z} = ymm0[2,0,3,1]1046; CHECK-NEXT: retq1047 %shuf = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1>1048 %cmp = icmp eq <4 x i64> %mask, zeroinitializer1049 %res = select <4 x i1> %cmp, <4 x i64> %shuf, <4 x i64> zeroinitializer1050 ret <4 x i64> %res1051}1052define <4 x i64> @test_masked_4xi64_perm_mask1(<4 x i64> %vec, <4 x i64> %vec2, <4 x i64> %mask) {1053; CHECK-LABEL: test_masked_4xi64_perm_mask1:1054; CHECK: # %bb.0:1055; CHECK-NEXT: vptestnmq %ymm2, %ymm2, %k11056; CHECK-NEXT: vpermq {{.*#+}} ymm1 {%k1} = ymm0[1,2,0,3]1057; CHECK-NEXT: vmovdqa %ymm1, %ymm01058; CHECK-NEXT: retq1059 %shuf = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 1, i32 2, i32 0, i32 3>1060 %cmp = icmp eq <4 x i64> %mask, zeroinitializer1061 %res = select <4 x i1> %cmp, <4 x i64> %shuf, <4 x i64> %vec21062 ret <4 x i64> %res1063}1064 1065define <4 x i64> @test_masked_z_4xi64_perm_mask1(<4 x i64> %vec, <4 x i64> %mask) {1066; CHECK-LABEL: test_masked_z_4xi64_perm_mask1:1067; CHECK: # %bb.0:1068; CHECK-NEXT: vptestnmq %ymm1, %ymm1, %k11069; CHECK-NEXT: vpermq {{.*#+}} ymm0 {%k1} {z} = ymm0[1,2,0,3]1070; CHECK-NEXT: retq1071 %shuf = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 1, i32 2, i32 0, i32 3>1072 %cmp = icmp eq <4 x i64> %mask, zeroinitializer1073 %res = select <4 x i1> %cmp, <4 x i64> %shuf, <4 x i64> zeroinitializer1074 ret <4 x i64> %res1075}1076define <4 x i64> @test_masked_4xi64_perm_mask2(<4 x i64> %vec, <4 x i64> %vec2, <4 x i64> %mask) {1077; CHECK-LABEL: test_masked_4xi64_perm_mask2:1078; CHECK: # %bb.0:1079; CHECK-NEXT: vptestnmq %ymm2, %ymm2, %k11080; CHECK-NEXT: vpermq {{.*#+}} ymm1 {%k1} = ymm0[2,2,2,1]1081; CHECK-NEXT: vmovdqa %ymm1, %ymm01082; CHECK-NEXT: retq1083 %shuf = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 2, i32 2, i32 2, i32 1>1084 %cmp = icmp eq <4 x i64> %mask, zeroinitializer1085 %res = select <4 x i1> %cmp, <4 x i64> %shuf, <4 x i64> %vec21086 ret <4 x i64> %res1087}1088 1089define <4 x i64> @test_masked_z_4xi64_perm_mask2(<4 x i64> %vec, <4 x i64> %mask) {1090; CHECK-LABEL: test_masked_z_4xi64_perm_mask2:1091; CHECK: # %bb.0:1092; CHECK-NEXT: vptestnmq %ymm1, %ymm1, %k11093; CHECK-NEXT: vpermq {{.*#+}} ymm0 {%k1} {z} = ymm0[2,2,2,1]1094; CHECK-NEXT: retq1095 %shuf = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 2, i32 2, i32 2, i32 1>1096 %cmp = icmp eq <4 x i64> %mask, zeroinitializer1097 %res = select <4 x i1> %cmp, <4 x i64> %shuf, <4 x i64> zeroinitializer1098 ret <4 x i64> %res1099}1100define <4 x i64> @test_4xi64_perm_mask3(<4 x i64> %vec) {1101; CHECK-LABEL: test_4xi64_perm_mask3:1102; CHECK: # %bb.0:1103; CHECK-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[2,1,3,3]1104; CHECK-NEXT: retq1105 %res = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 3>1106 ret <4 x i64> %res1107}1108define <4 x i64> @test_masked_4xi64_perm_mask3(<4 x i64> %vec, <4 x i64> %vec2, <4 x i64> %mask) {1109; CHECK-LABEL: test_masked_4xi64_perm_mask3:1110; CHECK: # %bb.0:1111; CHECK-NEXT: vptestnmq %ymm2, %ymm2, %k11112; CHECK-NEXT: vpermq {{.*#+}} ymm1 {%k1} = ymm0[2,1,3,3]1113; CHECK-NEXT: vmovdqa %ymm1, %ymm01114; CHECK-NEXT: retq1115 %shuf = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 3>1116 %cmp = icmp eq <4 x i64> %mask, zeroinitializer1117 %res = select <4 x i1> %cmp, <4 x i64> %shuf, <4 x i64> %vec21118 ret <4 x i64> %res1119}1120 1121define <4 x i64> @test_masked_z_4xi64_perm_mask3(<4 x i64> %vec, <4 x i64> %mask) {1122; CHECK-LABEL: test_masked_z_4xi64_perm_mask3:1123; CHECK: # %bb.0:1124; CHECK-NEXT: vptestnmq %ymm1, %ymm1, %k11125; CHECK-NEXT: vpermq {{.*#+}} ymm0 {%k1} {z} = ymm0[2,1,3,3]1126; CHECK-NEXT: retq1127 %shuf = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 3>1128 %cmp = icmp eq <4 x i64> %mask, zeroinitializer1129 %res = select <4 x i1> %cmp, <4 x i64> %shuf, <4 x i64> zeroinitializer1130 ret <4 x i64> %res1131}1132define <4 x i64> @test_4xi64_perm_mem_mask0(ptr %vp) {1133; CHECK-LABEL: test_4xi64_perm_mem_mask0:1134; CHECK: # %bb.0:1135; CHECK-NEXT: vpermpd {{.*#+}} ymm0 = mem[2,1,2,0]1136; CHECK-NEXT: retq1137 %vec = load <4 x i64>, ptr %vp1138 %res = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 2, i32 1, i32 2, i32 0>1139 ret <4 x i64> %res1140}1141define <4 x i64> @test_masked_4xi64_perm_mem_mask0(ptr %vp, <4 x i64> %vec2, <4 x i64> %mask) {1142; CHECK-LABEL: test_masked_4xi64_perm_mem_mask0:1143; CHECK: # %bb.0:1144; CHECK-NEXT: vptestnmq %ymm1, %ymm1, %k11145; CHECK-NEXT: vpermq {{.*#+}} ymm0 {%k1} = mem[2,1,2,0]1146; CHECK-NEXT: retq1147 %vec = load <4 x i64>, ptr %vp1148 %shuf = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 2, i32 1, i32 2, i32 0>1149 %cmp = icmp eq <4 x i64> %mask, zeroinitializer1150 %res = select <4 x i1> %cmp, <4 x i64> %shuf, <4 x i64> %vec21151 ret <4 x i64> %res1152}1153 1154define <4 x i64> @test_masked_z_4xi64_perm_mem_mask0(ptr %vp, <4 x i64> %mask) {1155; CHECK-LABEL: test_masked_z_4xi64_perm_mem_mask0:1156; CHECK: # %bb.0:1157; CHECK-NEXT: vptestnmq %ymm0, %ymm0, %k11158; CHECK-NEXT: vpermq {{.*#+}} ymm0 {%k1} {z} = mem[2,1,2,0]1159; CHECK-NEXT: retq1160 %vec = load <4 x i64>, ptr %vp1161 %shuf = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 2, i32 1, i32 2, i32 0>1162 %cmp = icmp eq <4 x i64> %mask, zeroinitializer1163 %res = select <4 x i1> %cmp, <4 x i64> %shuf, <4 x i64> zeroinitializer1164 ret <4 x i64> %res1165}1166 1167define <4 x i64> @test_masked_4xi64_perm_mem_mask1(ptr %vp, <4 x i64> %vec2, <4 x i64> %mask) {1168; CHECK-LABEL: test_masked_4xi64_perm_mem_mask1:1169; CHECK: # %bb.0:1170; CHECK-NEXT: vptestnmq %ymm1, %ymm1, %k11171; CHECK-NEXT: vpermq {{.*#+}} ymm0 {%k1} = mem[2,1,1,1]1172; CHECK-NEXT: retq1173 %vec = load <4 x i64>, ptr %vp1174 %shuf = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 2, i32 1, i32 1, i32 1>1175 %cmp = icmp eq <4 x i64> %mask, zeroinitializer1176 %res = select <4 x i1> %cmp, <4 x i64> %shuf, <4 x i64> %vec21177 ret <4 x i64> %res1178}1179 1180define <4 x i64> @test_masked_z_4xi64_perm_mem_mask1(ptr %vp, <4 x i64> %mask) {1181; CHECK-LABEL: test_masked_z_4xi64_perm_mem_mask1:1182; CHECK: # %bb.0:1183; CHECK-NEXT: vptestnmq %ymm0, %ymm0, %k11184; CHECK-NEXT: vpermq {{.*#+}} ymm0 {%k1} {z} = mem[2,1,1,1]1185; CHECK-NEXT: retq1186 %vec = load <4 x i64>, ptr %vp1187 %shuf = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 2, i32 1, i32 1, i32 1>1188 %cmp = icmp eq <4 x i64> %mask, zeroinitializer1189 %res = select <4 x i1> %cmp, <4 x i64> %shuf, <4 x i64> zeroinitializer1190 ret <4 x i64> %res1191}1192 1193define <4 x i64> @test_masked_4xi64_perm_mem_mask2(ptr %vp, <4 x i64> %vec2, <4 x i64> %mask) {1194; CHECK-LABEL: test_masked_4xi64_perm_mem_mask2:1195; CHECK: # %bb.0:1196; CHECK-NEXT: vptestnmq %ymm1, %ymm1, %k11197; CHECK-NEXT: vpermq {{.*#+}} ymm0 {%k1} = mem[0,1,2,0]1198; CHECK-NEXT: retq1199 %vec = load <4 x i64>, ptr %vp1200 %shuf = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 0>1201 %cmp = icmp eq <4 x i64> %mask, zeroinitializer1202 %res = select <4 x i1> %cmp, <4 x i64> %shuf, <4 x i64> %vec21203 ret <4 x i64> %res1204}1205 1206define <4 x i64> @test_masked_z_4xi64_perm_mem_mask2(ptr %vp, <4 x i64> %mask) {1207; CHECK-LABEL: test_masked_z_4xi64_perm_mem_mask2:1208; CHECK: # %bb.0:1209; CHECK-NEXT: vptestnmq %ymm0, %ymm0, %k11210; CHECK-NEXT: vpermq {{.*#+}} ymm0 {%k1} {z} = mem[0,1,2,0]1211; CHECK-NEXT: retq1212 %vec = load <4 x i64>, ptr %vp1213 %shuf = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 0>1214 %cmp = icmp eq <4 x i64> %mask, zeroinitializer1215 %res = select <4 x i1> %cmp, <4 x i64> %shuf, <4 x i64> zeroinitializer1216 ret <4 x i64> %res1217}1218 1219define <4 x i64> @test_4xi64_perm_mem_mask3(ptr %vp) {1220; CHECK-LABEL: test_4xi64_perm_mem_mask3:1221; CHECK: # %bb.0:1222; CHECK-NEXT: vpermpd {{.*#+}} ymm0 = mem[2,0,1,3]1223; CHECK-NEXT: retq1224 %vec = load <4 x i64>, ptr %vp1225 %res = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3>1226 ret <4 x i64> %res1227}1228define <4 x i64> @test_masked_4xi64_perm_mem_mask3(ptr %vp, <4 x i64> %vec2, <4 x i64> %mask) {1229; CHECK-LABEL: test_masked_4xi64_perm_mem_mask3:1230; CHECK: # %bb.0:1231; CHECK-NEXT: vptestnmq %ymm1, %ymm1, %k11232; CHECK-NEXT: vpermq {{.*#+}} ymm0 {%k1} = mem[2,0,1,3]1233; CHECK-NEXT: retq1234 %vec = load <4 x i64>, ptr %vp1235 %shuf = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3>1236 %cmp = icmp eq <4 x i64> %mask, zeroinitializer1237 %res = select <4 x i1> %cmp, <4 x i64> %shuf, <4 x i64> %vec21238 ret <4 x i64> %res1239}1240 1241define <4 x i64> @test_masked_z_4xi64_perm_mem_mask3(ptr %vp, <4 x i64> %mask) {1242; CHECK-LABEL: test_masked_z_4xi64_perm_mem_mask3:1243; CHECK: # %bb.0:1244; CHECK-NEXT: vptestnmq %ymm0, %ymm0, %k11245; CHECK-NEXT: vpermq {{.*#+}} ymm0 {%k1} {z} = mem[2,0,1,3]1246; CHECK-NEXT: retq1247 %vec = load <4 x i64>, ptr %vp1248 %shuf = shufflevector <4 x i64> %vec, <4 x i64> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3>1249 %cmp = icmp eq <4 x i64> %mask, zeroinitializer1250 %res = select <4 x i1> %cmp, <4 x i64> %shuf, <4 x i64> zeroinitializer1251 ret <4 x i64> %res1252}1253 1254define <8 x i64> @test_8xi64_perm_mask0(<8 x i64> %vec) {1255; CHECK-LABEL: test_8xi64_perm_mask0:1256; CHECK: # %bb.0:1257; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm1 = [0,4,7,6,5,5,1,6]1258; CHECK-NEXT: vpermpd %zmm0, %zmm1, %zmm01259; CHECK-NEXT: retq1260 %res = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 0, i32 4, i32 7, i32 6, i32 5, i32 5, i32 1, i32 6>1261 ret <8 x i64> %res1262}1263define <8 x i64> @test_masked_8xi64_perm_mask0(<8 x i64> %vec, <8 x i64> %vec2, <8 x i64> %mask) {1264; CHECK-LABEL: test_masked_8xi64_perm_mask0:1265; CHECK: # %bb.0:1266; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm3 = [0,4,7,6,5,5,1,6]1267; CHECK-NEXT: vptestnmq %zmm2, %zmm2, %k11268; CHECK-NEXT: vpermq %zmm0, %zmm3, %zmm1 {%k1}1269; CHECK-NEXT: vmovdqa64 %zmm1, %zmm01270; CHECK-NEXT: retq1271 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 0, i32 4, i32 7, i32 6, i32 5, i32 5, i32 1, i32 6>1272 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1273 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> %vec21274 ret <8 x i64> %res1275}1276 1277define <8 x i64> @test_masked_z_8xi64_perm_mask0(<8 x i64> %vec, <8 x i64> %mask) {1278; CHECK-LABEL: test_masked_z_8xi64_perm_mask0:1279; CHECK: # %bb.0:1280; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm2 = [0,4,7,6,5,5,1,6]1281; CHECK-NEXT: vptestnmq %zmm1, %zmm1, %k11282; CHECK-NEXT: vpermq %zmm0, %zmm2, %zmm0 {%k1} {z}1283; CHECK-NEXT: retq1284 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 0, i32 4, i32 7, i32 6, i32 5, i32 5, i32 1, i32 6>1285 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1286 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> zeroinitializer1287 ret <8 x i64> %res1288}1289define <8 x i64> @test_masked_8xi64_perm_imm_mask1(<8 x i64> %vec, <8 x i64> %vec2, <8 x i64> %mask) {1290; CHECK-LABEL: test_masked_8xi64_perm_imm_mask1:1291; CHECK: # %bb.0:1292; CHECK-NEXT: vptestnmq %zmm2, %zmm2, %k11293; CHECK-NEXT: vpermq {{.*#+}} zmm1 {%k1} = zmm0[1,0,1,1,5,4,5,5]1294; CHECK-NEXT: vmovdqa64 %zmm1, %zmm01295; CHECK-NEXT: retq1296 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 1, i32 0, i32 1, i32 1, i32 5, i32 4, i32 5, i32 5>1297 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1298 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> %vec21299 ret <8 x i64> %res1300}1301 1302define <8 x i64> @test_masked_z_8xi64_perm_imm_mask1(<8 x i64> %vec, <8 x i64> %mask) {1303; CHECK-LABEL: test_masked_z_8xi64_perm_imm_mask1:1304; CHECK: # %bb.0:1305; CHECK-NEXT: vptestnmq %zmm1, %zmm1, %k11306; CHECK-NEXT: vpermq {{.*#+}} zmm0 {%k1} {z} = zmm0[1,0,1,1,5,4,5,5]1307; CHECK-NEXT: retq1308 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 1, i32 0, i32 1, i32 1, i32 5, i32 4, i32 5, i32 5>1309 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1310 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> zeroinitializer1311 ret <8 x i64> %res1312}1313define <8 x i64> @test_masked_8xi64_perm_mask2(<8 x i64> %vec, <8 x i64> %vec2, <8 x i64> %mask) {1314; CHECK-LABEL: test_masked_8xi64_perm_mask2:1315; CHECK: # %bb.0:1316; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm3 = [1,3,7,3,3,5,4,1]1317; CHECK-NEXT: vptestnmq %zmm2, %zmm2, %k11318; CHECK-NEXT: vpermq %zmm0, %zmm3, %zmm1 {%k1}1319; CHECK-NEXT: vmovdqa64 %zmm1, %zmm01320; CHECK-NEXT: retq1321 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 1, i32 3, i32 7, i32 3, i32 3, i32 5, i32 4, i32 1>1322 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1323 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> %vec21324 ret <8 x i64> %res1325}1326 1327define <8 x i64> @test_masked_z_8xi64_perm_mask2(<8 x i64> %vec, <8 x i64> %mask) {1328; CHECK-LABEL: test_masked_z_8xi64_perm_mask2:1329; CHECK: # %bb.0:1330; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm2 = [1,3,7,3,3,5,4,1]1331; CHECK-NEXT: vptestnmq %zmm1, %zmm1, %k11332; CHECK-NEXT: vpermq %zmm0, %zmm2, %zmm0 {%k1} {z}1333; CHECK-NEXT: retq1334 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 1, i32 3, i32 7, i32 3, i32 3, i32 5, i32 4, i32 1>1335 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1336 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> zeroinitializer1337 ret <8 x i64> %res1338}1339define <8 x i64> @test_8xi64_perm_imm_mask3(<8 x i64> %vec) {1340; CHECK-LABEL: test_8xi64_perm_imm_mask3:1341; CHECK: # %bb.0:1342; CHECK-NEXT: vpermpd {{.*#+}} zmm0 = zmm0[3,1,3,1,7,5,7,5]1343; CHECK-NEXT: retq1344 %res = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 3, i32 1, i32 3, i32 1, i32 7, i32 5, i32 7, i32 5>1345 ret <8 x i64> %res1346}1347define <8 x i64> @test_masked_8xi64_perm_imm_mask3(<8 x i64> %vec, <8 x i64> %vec2, <8 x i64> %mask) {1348; CHECK-LABEL: test_masked_8xi64_perm_imm_mask3:1349; CHECK: # %bb.0:1350; CHECK-NEXT: vptestnmq %zmm2, %zmm2, %k11351; CHECK-NEXT: vpermq {{.*#+}} zmm1 {%k1} = zmm0[3,1,3,1,7,5,7,5]1352; CHECK-NEXT: vmovdqa64 %zmm1, %zmm01353; CHECK-NEXT: retq1354 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 3, i32 1, i32 3, i32 1, i32 7, i32 5, i32 7, i32 5>1355 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1356 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> %vec21357 ret <8 x i64> %res1358}1359 1360define <8 x i64> @test_masked_z_8xi64_perm_imm_mask3(<8 x i64> %vec, <8 x i64> %mask) {1361; CHECK-LABEL: test_masked_z_8xi64_perm_imm_mask3:1362; CHECK: # %bb.0:1363; CHECK-NEXT: vptestnmq %zmm1, %zmm1, %k11364; CHECK-NEXT: vpermq {{.*#+}} zmm0 {%k1} {z} = zmm0[3,1,3,1,7,5,7,5]1365; CHECK-NEXT: retq1366 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 3, i32 1, i32 3, i32 1, i32 7, i32 5, i32 7, i32 5>1367 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1368 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> zeroinitializer1369 ret <8 x i64> %res1370}1371define <8 x i64> @test_masked_8xi64_perm_mask4(<8 x i64> %vec, <8 x i64> %vec2, <8 x i64> %mask) {1372; CHECK-LABEL: test_masked_8xi64_perm_mask4:1373; CHECK: # %bb.0:1374; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm3 = [6,3,1,1,7,4,0,3]1375; CHECK-NEXT: vptestnmq %zmm2, %zmm2, %k11376; CHECK-NEXT: vpermq %zmm0, %zmm3, %zmm1 {%k1}1377; CHECK-NEXT: vmovdqa64 %zmm1, %zmm01378; CHECK-NEXT: retq1379 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 6, i32 3, i32 1, i32 1, i32 7, i32 4, i32 0, i32 3>1380 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1381 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> %vec21382 ret <8 x i64> %res1383}1384 1385define <8 x i64> @test_masked_z_8xi64_perm_mask4(<8 x i64> %vec, <8 x i64> %mask) {1386; CHECK-LABEL: test_masked_z_8xi64_perm_mask4:1387; CHECK: # %bb.0:1388; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm2 = [6,3,1,1,7,4,0,3]1389; CHECK-NEXT: vptestnmq %zmm1, %zmm1, %k11390; CHECK-NEXT: vpermq %zmm0, %zmm2, %zmm0 {%k1} {z}1391; CHECK-NEXT: retq1392 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 6, i32 3, i32 1, i32 1, i32 7, i32 4, i32 0, i32 3>1393 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1394 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> zeroinitializer1395 ret <8 x i64> %res1396}1397define <8 x i64> @test_masked_8xi64_perm_imm_mask5(<8 x i64> %vec, <8 x i64> %vec2, <8 x i64> %mask) {1398; CHECK-LABEL: test_masked_8xi64_perm_imm_mask5:1399; CHECK: # %bb.0:1400; CHECK-NEXT: vptestnmq %zmm2, %zmm2, %k11401; CHECK-NEXT: vpermq {{.*#+}} zmm1 {%k1} = zmm0[0,0,0,0,4,4,4,4]1402; CHECK-NEXT: vmovdqa64 %zmm1, %zmm01403; CHECK-NEXT: retq1404 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>1405 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1406 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> %vec21407 ret <8 x i64> %res1408}1409 1410define <8 x i64> @test_masked_z_8xi64_perm_imm_mask5(<8 x i64> %vec, <8 x i64> %mask) {1411; CHECK-LABEL: test_masked_z_8xi64_perm_imm_mask5:1412; CHECK: # %bb.0:1413; CHECK-NEXT: vptestnmq %zmm1, %zmm1, %k11414; CHECK-NEXT: vpermq {{.*#+}} zmm0 {%k1} {z} = zmm0[0,0,0,0,4,4,4,4]1415; CHECK-NEXT: retq1416 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>1417 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1418 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> zeroinitializer1419 ret <8 x i64> %res1420}1421define <8 x i64> @test_8xi64_perm_mask6(<8 x i64> %vec) {1422; CHECK-LABEL: test_8xi64_perm_mask6:1423; CHECK: # %bb.0:1424; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm1 = [5,1,4,4,5,4,2,7]1425; CHECK-NEXT: vpermpd %zmm0, %zmm1, %zmm01426; CHECK-NEXT: retq1427 %res = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 5, i32 1, i32 4, i32 4, i32 5, i32 4, i32 2, i32 7>1428 ret <8 x i64> %res1429}1430define <8 x i64> @test_masked_8xi64_perm_mask6(<8 x i64> %vec, <8 x i64> %vec2, <8 x i64> %mask) {1431; CHECK-LABEL: test_masked_8xi64_perm_mask6:1432; CHECK: # %bb.0:1433; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm3 = [5,1,4,4,5,4,2,7]1434; CHECK-NEXT: vptestnmq %zmm2, %zmm2, %k11435; CHECK-NEXT: vpermq %zmm0, %zmm3, %zmm1 {%k1}1436; CHECK-NEXT: vmovdqa64 %zmm1, %zmm01437; CHECK-NEXT: retq1438 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 5, i32 1, i32 4, i32 4, i32 5, i32 4, i32 2, i32 7>1439 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1440 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> %vec21441 ret <8 x i64> %res1442}1443 1444define <8 x i64> @test_masked_z_8xi64_perm_mask6(<8 x i64> %vec, <8 x i64> %mask) {1445; CHECK-LABEL: test_masked_z_8xi64_perm_mask6:1446; CHECK: # %bb.0:1447; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm2 = [5,1,4,4,5,4,2,7]1448; CHECK-NEXT: vptestnmq %zmm1, %zmm1, %k11449; CHECK-NEXT: vpermq %zmm0, %zmm2, %zmm0 {%k1} {z}1450; CHECK-NEXT: retq1451 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 5, i32 1, i32 4, i32 4, i32 5, i32 4, i32 2, i32 7>1452 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1453 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> zeroinitializer1454 ret <8 x i64> %res1455}1456define <8 x i64> @test_masked_8xi64_perm_imm_mask7(<8 x i64> %vec, <8 x i64> %vec2, <8 x i64> %mask) {1457; CHECK-LABEL: test_masked_8xi64_perm_imm_mask7:1458; CHECK: # %bb.0:1459; CHECK-NEXT: vptestnmq %zmm2, %zmm2, %k11460; CHECK-NEXT: vpermq {{.*#+}} zmm1 {%k1} = zmm0[3,3,3,3,7,7,7,7]1461; CHECK-NEXT: vmovdqa64 %zmm1, %zmm01462; CHECK-NEXT: retq1463 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 7, i32 7, i32 7, i32 7>1464 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1465 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> %vec21466 ret <8 x i64> %res1467}1468 1469define <8 x i64> @test_masked_z_8xi64_perm_imm_mask7(<8 x i64> %vec, <8 x i64> %mask) {1470; CHECK-LABEL: test_masked_z_8xi64_perm_imm_mask7:1471; CHECK: # %bb.0:1472; CHECK-NEXT: vptestnmq %zmm1, %zmm1, %k11473; CHECK-NEXT: vpermq {{.*#+}} zmm0 {%k1} {z} = zmm0[3,3,3,3,7,7,7,7]1474; CHECK-NEXT: retq1475 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 7, i32 7, i32 7, i32 7>1476 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1477 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> zeroinitializer1478 ret <8 x i64> %res1479}1480define <8 x i64> @test_8xi64_perm_mem_mask0(ptr %vp) {1481; CHECK-LABEL: test_8xi64_perm_mem_mask0:1482; CHECK: # %bb.0:1483; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm0 = [5,1,6,5,7,3,7,3]1484; CHECK-NEXT: vpermpd (%rdi), %zmm0, %zmm01485; CHECK-NEXT: retq1486 %vec = load <8 x i64>, ptr %vp1487 %res = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 5, i32 1, i32 6, i32 5, i32 7, i32 3, i32 7, i32 3>1488 ret <8 x i64> %res1489}1490define <8 x i64> @test_masked_8xi64_perm_mem_mask0(ptr %vp, <8 x i64> %vec2, <8 x i64> %mask) {1491; CHECK-LABEL: test_masked_8xi64_perm_mem_mask0:1492; CHECK: # %bb.0:1493; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm2 = [5,1,6,5,7,3,7,3]1494; CHECK-NEXT: vptestnmq %zmm1, %zmm1, %k11495; CHECK-NEXT: vpermq (%rdi), %zmm2, %zmm0 {%k1}1496; CHECK-NEXT: retq1497 %vec = load <8 x i64>, ptr %vp1498 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 5, i32 1, i32 6, i32 5, i32 7, i32 3, i32 7, i32 3>1499 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1500 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> %vec21501 ret <8 x i64> %res1502}1503 1504define <8 x i64> @test_masked_z_8xi64_perm_mem_mask0(ptr %vp, <8 x i64> %mask) {1505; CHECK-LABEL: test_masked_z_8xi64_perm_mem_mask0:1506; CHECK: # %bb.0:1507; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm1 = [5,1,6,5,7,3,7,3]1508; CHECK-NEXT: vptestnmq %zmm0, %zmm0, %k11509; CHECK-NEXT: vpermq (%rdi), %zmm1, %zmm0 {%k1} {z}1510; CHECK-NEXT: retq1511 %vec = load <8 x i64>, ptr %vp1512 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 5, i32 1, i32 6, i32 5, i32 7, i32 3, i32 7, i32 3>1513 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1514 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> zeroinitializer1515 ret <8 x i64> %res1516}1517 1518define <8 x i64> @test_masked_8xi64_perm_imm_mem_mask1(ptr %vp, <8 x i64> %vec2, <8 x i64> %mask) {1519; CHECK-LABEL: test_masked_8xi64_perm_imm_mem_mask1:1520; CHECK: # %bb.0:1521; CHECK-NEXT: vptestnmq %zmm1, %zmm1, %k11522; CHECK-NEXT: vpermq {{.*#+}} zmm0 {%k1} = mem[1,1,1,0,5,5,5,4]1523; CHECK-NEXT: retq1524 %vec = load <8 x i64>, ptr %vp1525 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 1, i32 1, i32 1, i32 0, i32 5, i32 5, i32 5, i32 4>1526 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1527 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> %vec21528 ret <8 x i64> %res1529}1530 1531define <8 x i64> @test_masked_z_8xi64_perm_imm_mem_mask1(ptr %vp, <8 x i64> %mask) {1532; CHECK-LABEL: test_masked_z_8xi64_perm_imm_mem_mask1:1533; CHECK: # %bb.0:1534; CHECK-NEXT: vptestnmq %zmm0, %zmm0, %k11535; CHECK-NEXT: vpermq {{.*#+}} zmm0 {%k1} {z} = mem[1,1,1,0,5,5,5,4]1536; CHECK-NEXT: retq1537 %vec = load <8 x i64>, ptr %vp1538 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 1, i32 1, i32 1, i32 0, i32 5, i32 5, i32 5, i32 4>1539 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1540 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> zeroinitializer1541 ret <8 x i64> %res1542}1543 1544define <8 x i64> @test_masked_8xi64_perm_mem_mask2(ptr %vp, <8 x i64> %vec2, <8 x i64> %mask) {1545; CHECK-LABEL: test_masked_8xi64_perm_mem_mask2:1546; CHECK: # %bb.0:1547; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm2 = [0,2,1,4,1,1,5,5]1548; CHECK-NEXT: vptestnmq %zmm1, %zmm1, %k11549; CHECK-NEXT: vpermq (%rdi), %zmm2, %zmm0 {%k1}1550; CHECK-NEXT: retq1551 %vec = load <8 x i64>, ptr %vp1552 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 0, i32 2, i32 1, i32 4, i32 1, i32 1, i32 5, i32 5>1553 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1554 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> %vec21555 ret <8 x i64> %res1556}1557 1558define <8 x i64> @test_masked_z_8xi64_perm_mem_mask2(ptr %vp, <8 x i64> %mask) {1559; CHECK-LABEL: test_masked_z_8xi64_perm_mem_mask2:1560; CHECK: # %bb.0:1561; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm1 = [0,2,1,4,1,1,5,5]1562; CHECK-NEXT: vptestnmq %zmm0, %zmm0, %k11563; CHECK-NEXT: vpermq (%rdi), %zmm1, %zmm0 {%k1} {z}1564; CHECK-NEXT: retq1565 %vec = load <8 x i64>, ptr %vp1566 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 0, i32 2, i32 1, i32 4, i32 1, i32 1, i32 5, i32 5>1567 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1568 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> zeroinitializer1569 ret <8 x i64> %res1570}1571 1572define <8 x i64> @test_8xi64_perm_imm_mem_mask3(ptr %vp) {1573; CHECK-LABEL: test_8xi64_perm_imm_mem_mask3:1574; CHECK: # %bb.0:1575; CHECK-NEXT: vpermpd {{.*#+}} zmm0 = mem[1,3,1,1,5,7,5,5]1576; CHECK-NEXT: retq1577 %vec = load <8 x i64>, ptr %vp1578 %res = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 1, i32 3, i32 1, i32 1, i32 5, i32 7, i32 5, i32 5>1579 ret <8 x i64> %res1580}1581define <8 x i64> @test_masked_8xi64_perm_imm_mem_mask3(ptr %vp, <8 x i64> %vec2, <8 x i64> %mask) {1582; CHECK-LABEL: test_masked_8xi64_perm_imm_mem_mask3:1583; CHECK: # %bb.0:1584; CHECK-NEXT: vptestnmq %zmm1, %zmm1, %k11585; CHECK-NEXT: vpermq {{.*#+}} zmm0 {%k1} = mem[1,3,1,1,5,7,5,5]1586; CHECK-NEXT: retq1587 %vec = load <8 x i64>, ptr %vp1588 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 1, i32 3, i32 1, i32 1, i32 5, i32 7, i32 5, i32 5>1589 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1590 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> %vec21591 ret <8 x i64> %res1592}1593 1594define <8 x i64> @test_masked_z_8xi64_perm_imm_mem_mask3(ptr %vp, <8 x i64> %mask) {1595; CHECK-LABEL: test_masked_z_8xi64_perm_imm_mem_mask3:1596; CHECK: # %bb.0:1597; CHECK-NEXT: vptestnmq %zmm0, %zmm0, %k11598; CHECK-NEXT: vpermq {{.*#+}} zmm0 {%k1} {z} = mem[1,3,1,1,5,7,5,5]1599; CHECK-NEXT: retq1600 %vec = load <8 x i64>, ptr %vp1601 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 1, i32 3, i32 1, i32 1, i32 5, i32 7, i32 5, i32 5>1602 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1603 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> zeroinitializer1604 ret <8 x i64> %res1605}1606 1607define <8 x i64> @test_masked_8xi64_perm_mem_mask4(ptr %vp, <8 x i64> %vec2, <8 x i64> %mask) {1608; CHECK-LABEL: test_masked_8xi64_perm_mem_mask4:1609; CHECK: # %bb.0:1610; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm2 = [5,0,7,0,3,5,0,6]1611; CHECK-NEXT: vptestnmq %zmm1, %zmm1, %k11612; CHECK-NEXT: vpermq (%rdi), %zmm2, %zmm0 {%k1}1613; CHECK-NEXT: retq1614 %vec = load <8 x i64>, ptr %vp1615 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 5, i32 0, i32 7, i32 0, i32 3, i32 5, i32 0, i32 6>1616 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1617 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> %vec21618 ret <8 x i64> %res1619}1620 1621define <8 x i64> @test_masked_z_8xi64_perm_mem_mask4(ptr %vp, <8 x i64> %mask) {1622; CHECK-LABEL: test_masked_z_8xi64_perm_mem_mask4:1623; CHECK: # %bb.0:1624; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm1 = [5,0,7,0,3,5,0,6]1625; CHECK-NEXT: vptestnmq %zmm0, %zmm0, %k11626; CHECK-NEXT: vpermq (%rdi), %zmm1, %zmm0 {%k1} {z}1627; CHECK-NEXT: retq1628 %vec = load <8 x i64>, ptr %vp1629 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 5, i32 0, i32 7, i32 0, i32 3, i32 5, i32 0, i32 6>1630 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1631 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> zeroinitializer1632 ret <8 x i64> %res1633}1634 1635define <8 x i64> @test_masked_8xi64_perm_imm_mem_mask5(ptr %vp, <8 x i64> %vec2, <8 x i64> %mask) {1636; CHECK-LABEL: test_masked_8xi64_perm_imm_mem_mask5:1637; CHECK: # %bb.0:1638; CHECK-NEXT: vptestnmq %zmm1, %zmm1, %k11639; CHECK-NEXT: vpermq {{.*#+}} zmm0 {%k1} = mem[3,1,0,0,7,5,4,4]1640; CHECK-NEXT: retq1641 %vec = load <8 x i64>, ptr %vp1642 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 3, i32 1, i32 0, i32 0, i32 7, i32 5, i32 4, i32 4>1643 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1644 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> %vec21645 ret <8 x i64> %res1646}1647 1648define <8 x i64> @test_masked_z_8xi64_perm_imm_mem_mask5(ptr %vp, <8 x i64> %mask) {1649; CHECK-LABEL: test_masked_z_8xi64_perm_imm_mem_mask5:1650; CHECK: # %bb.0:1651; CHECK-NEXT: vptestnmq %zmm0, %zmm0, %k11652; CHECK-NEXT: vpermq {{.*#+}} zmm0 {%k1} {z} = mem[3,1,0,0,7,5,4,4]1653; CHECK-NEXT: retq1654 %vec = load <8 x i64>, ptr %vp1655 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 3, i32 1, i32 0, i32 0, i32 7, i32 5, i32 4, i32 4>1656 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1657 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> zeroinitializer1658 ret <8 x i64> %res1659}1660 1661define <8 x i64> @test_8xi64_perm_mem_mask6(ptr %vp) {1662; CHECK-LABEL: test_8xi64_perm_mem_mask6:1663; CHECK: # %bb.0:1664; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm0 = [0,6,3,7,3,0,3,6]1665; CHECK-NEXT: vpermpd (%rdi), %zmm0, %zmm01666; CHECK-NEXT: retq1667 %vec = load <8 x i64>, ptr %vp1668 %res = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 0, i32 6, i32 3, i32 7, i32 3, i32 0, i32 3, i32 6>1669 ret <8 x i64> %res1670}1671define <8 x i64> @test_masked_8xi64_perm_mem_mask6(ptr %vp, <8 x i64> %vec2, <8 x i64> %mask) {1672; CHECK-LABEL: test_masked_8xi64_perm_mem_mask6:1673; CHECK: # %bb.0:1674; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm2 = [0,6,3,7,3,0,3,6]1675; CHECK-NEXT: vptestnmq %zmm1, %zmm1, %k11676; CHECK-NEXT: vpermq (%rdi), %zmm2, %zmm0 {%k1}1677; CHECK-NEXT: retq1678 %vec = load <8 x i64>, ptr %vp1679 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 0, i32 6, i32 3, i32 7, i32 3, i32 0, i32 3, i32 6>1680 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1681 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> %vec21682 ret <8 x i64> %res1683}1684 1685define <8 x i64> @test_masked_z_8xi64_perm_mem_mask6(ptr %vp, <8 x i64> %mask) {1686; CHECK-LABEL: test_masked_z_8xi64_perm_mem_mask6:1687; CHECK: # %bb.0:1688; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm1 = [0,6,3,7,3,0,3,6]1689; CHECK-NEXT: vptestnmq %zmm0, %zmm0, %k11690; CHECK-NEXT: vpermq (%rdi), %zmm1, %zmm0 {%k1} {z}1691; CHECK-NEXT: retq1692 %vec = load <8 x i64>, ptr %vp1693 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 0, i32 6, i32 3, i32 7, i32 3, i32 0, i32 3, i32 6>1694 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1695 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> zeroinitializer1696 ret <8 x i64> %res1697}1698 1699define <8 x i64> @test_masked_8xi64_perm_imm_mem_mask7(ptr %vp, <8 x i64> %vec2, <8 x i64> %mask) {1700; CHECK-LABEL: test_masked_8xi64_perm_imm_mem_mask7:1701; CHECK: # %bb.0:1702; CHECK-NEXT: vptestnmq %zmm1, %zmm1, %k11703; CHECK-NEXT: vpermq {{.*#+}} zmm0 {%k1} = mem[3,0,0,1,7,4,4,5]1704; CHECK-NEXT: retq1705 %vec = load <8 x i64>, ptr %vp1706 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 3, i32 0, i32 0, i32 1, i32 7, i32 4, i32 4, i32 5>1707 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1708 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> %vec21709 ret <8 x i64> %res1710}1711 1712define <8 x i64> @test_masked_z_8xi64_perm_imm_mem_mask7(ptr %vp, <8 x i64> %mask) {1713; CHECK-LABEL: test_masked_z_8xi64_perm_imm_mem_mask7:1714; CHECK: # %bb.0:1715; CHECK-NEXT: vptestnmq %zmm0, %zmm0, %k11716; CHECK-NEXT: vpermq {{.*#+}} zmm0 {%k1} {z} = mem[3,0,0,1,7,4,4,5]1717; CHECK-NEXT: retq1718 %vec = load <8 x i64>, ptr %vp1719 %shuf = shufflevector <8 x i64> %vec, <8 x i64> undef, <8 x i32> <i32 3, i32 0, i32 0, i32 1, i32 7, i32 4, i32 4, i32 5>1720 %cmp = icmp eq <8 x i64> %mask, zeroinitializer1721 %res = select <8 x i1> %cmp, <8 x i64> %shuf, <8 x i64> zeroinitializer1722 ret <8 x i64> %res1723}1724 1725define <8 x float> @test_8xfloat_perm_mask0(<8 x float> %vec) {1726; CHECK-LABEL: test_8xfloat_perm_mask0:1727; CHECK: # %bb.0:1728; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm1 = [3,4,2,4,1,2,3,4]1729; CHECK-NEXT: vpermps %ymm0, %ymm1, %ymm01730; CHECK-NEXT: retq1731 %res = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 3, i32 4, i32 2, i32 4, i32 1, i32 2, i32 3, i32 4>1732 ret <8 x float> %res1733}1734define <8 x float> @test_masked_8xfloat_perm_mask0(<8 x float> %vec, <8 x float> %vec2, <8 x float> %mask) {1735; CHECK-LABEL: test_masked_8xfloat_perm_mask0:1736; CHECK: # %bb.0:1737; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm3 = [3,4,2,4,1,2,3,4]1738; CHECK-NEXT: vxorps %xmm4, %xmm4, %xmm41739; CHECK-NEXT: vcmpeqps %ymm4, %ymm2, %k11740; CHECK-NEXT: vpermps %ymm0, %ymm3, %ymm1 {%k1}1741; CHECK-NEXT: vmovaps %ymm1, %ymm01742; CHECK-NEXT: retq1743 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 3, i32 4, i32 2, i32 4, i32 1, i32 2, i32 3, i32 4>1744 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer1745 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec21746 ret <8 x float> %res1747}1748 1749define <8 x float> @test_masked_z_8xfloat_perm_mask0(<8 x float> %vec, <8 x float> %mask) {1750; CHECK-LABEL: test_masked_z_8xfloat_perm_mask0:1751; CHECK: # %bb.0:1752; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm2 = [3,4,2,4,1,2,3,4]1753; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm31754; CHECK-NEXT: vcmpeqps %ymm3, %ymm1, %k11755; CHECK-NEXT: vpermps %ymm0, %ymm2, %ymm0 {%k1} {z}1756; CHECK-NEXT: retq1757 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 3, i32 4, i32 2, i32 4, i32 1, i32 2, i32 3, i32 4>1758 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer1759 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer1760 ret <8 x float> %res1761}1762define <8 x float> @test_masked_8xfloat_perm_mask1(<8 x float> %vec, <8 x float> %vec2, <8 x float> %mask) {1763; CHECK-LABEL: test_masked_8xfloat_perm_mask1:1764; CHECK: # %bb.0:1765; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm3 = [4,2,1,0,6,0,5,1]1766; CHECK-NEXT: vxorps %xmm4, %xmm4, %xmm41767; CHECK-NEXT: vcmpeqps %ymm4, %ymm2, %k11768; CHECK-NEXT: vpermps %ymm0, %ymm3, %ymm1 {%k1}1769; CHECK-NEXT: vmovaps %ymm1, %ymm01770; CHECK-NEXT: retq1771 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 4, i32 2, i32 1, i32 0, i32 6, i32 0, i32 5, i32 1>1772 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer1773 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec21774 ret <8 x float> %res1775}1776 1777define <8 x float> @test_masked_z_8xfloat_perm_mask1(<8 x float> %vec, <8 x float> %mask) {1778; CHECK-LABEL: test_masked_z_8xfloat_perm_mask1:1779; CHECK: # %bb.0:1780; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm2 = [4,2,1,0,6,0,5,1]1781; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm31782; CHECK-NEXT: vcmpeqps %ymm3, %ymm1, %k11783; CHECK-NEXT: vpermps %ymm0, %ymm2, %ymm0 {%k1} {z}1784; CHECK-NEXT: retq1785 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 4, i32 2, i32 1, i32 0, i32 6, i32 0, i32 5, i32 1>1786 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer1787 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer1788 ret <8 x float> %res1789}1790define <8 x float> @test_masked_8xfloat_perm_mask2(<8 x float> %vec, <8 x float> %vec2, <8 x float> %mask) {1791; CHECK-LABEL: test_masked_8xfloat_perm_mask2:1792; CHECK: # %bb.0:1793; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm3 = [2,5,5,5,4,6,0,5]1794; CHECK-NEXT: vxorps %xmm4, %xmm4, %xmm41795; CHECK-NEXT: vcmpeqps %ymm4, %ymm2, %k11796; CHECK-NEXT: vpermps %ymm0, %ymm3, %ymm1 {%k1}1797; CHECK-NEXT: vmovaps %ymm1, %ymm01798; CHECK-NEXT: retq1799 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 2, i32 5, i32 5, i32 5, i32 4, i32 6, i32 0, i32 5>1800 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer1801 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec21802 ret <8 x float> %res1803}1804 1805define <8 x float> @test_masked_z_8xfloat_perm_mask2(<8 x float> %vec, <8 x float> %mask) {1806; CHECK-LABEL: test_masked_z_8xfloat_perm_mask2:1807; CHECK: # %bb.0:1808; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm2 = [2,5,5,5,4,6,0,5]1809; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm31810; CHECK-NEXT: vcmpeqps %ymm3, %ymm1, %k11811; CHECK-NEXT: vpermps %ymm0, %ymm2, %ymm0 {%k1} {z}1812; CHECK-NEXT: retq1813 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 2, i32 5, i32 5, i32 5, i32 4, i32 6, i32 0, i32 5>1814 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer1815 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer1816 ret <8 x float> %res1817}1818define <8 x float> @test_8xfloat_perm_mask3(<8 x float> %vec) {1819; CHECK-LABEL: test_8xfloat_perm_mask3:1820; CHECK: # %bb.0:1821; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm1 = [0,5,2,5,5,5,1,6]1822; CHECK-NEXT: vpermps %ymm0, %ymm1, %ymm01823; CHECK-NEXT: retq1824 %res = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 0, i32 5, i32 2, i32 5, i32 5, i32 5, i32 1, i32 6>1825 ret <8 x float> %res1826}1827define <8 x float> @test_masked_8xfloat_perm_mask3(<8 x float> %vec, <8 x float> %vec2, <8 x float> %mask) {1828; CHECK-LABEL: test_masked_8xfloat_perm_mask3:1829; CHECK: # %bb.0:1830; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm3 = [0,5,2,5,5,5,1,6]1831; CHECK-NEXT: vxorps %xmm4, %xmm4, %xmm41832; CHECK-NEXT: vcmpeqps %ymm4, %ymm2, %k11833; CHECK-NEXT: vpermps %ymm0, %ymm3, %ymm1 {%k1}1834; CHECK-NEXT: vmovaps %ymm1, %ymm01835; CHECK-NEXT: retq1836 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 0, i32 5, i32 2, i32 5, i32 5, i32 5, i32 1, i32 6>1837 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer1838 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec21839 ret <8 x float> %res1840}1841 1842define <8 x float> @test_masked_z_8xfloat_perm_mask3(<8 x float> %vec, <8 x float> %mask) {1843; CHECK-LABEL: test_masked_z_8xfloat_perm_mask3:1844; CHECK: # %bb.0:1845; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm2 = [0,5,2,5,5,5,1,6]1846; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm31847; CHECK-NEXT: vcmpeqps %ymm3, %ymm1, %k11848; CHECK-NEXT: vpermps %ymm0, %ymm2, %ymm0 {%k1} {z}1849; CHECK-NEXT: retq1850 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 0, i32 5, i32 2, i32 5, i32 5, i32 5, i32 1, i32 6>1851 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer1852 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer1853 ret <8 x float> %res1854}1855define <8 x float> @test_8xfloat_perm_mem_mask0(ptr %vp) {1856; CHECK-LABEL: test_8xfloat_perm_mem_mask0:1857; CHECK: # %bb.0:1858; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm0 = [5,2,1,6,4,2,4,0]1859; CHECK-NEXT: vpermps (%rdi), %ymm0, %ymm01860; CHECK-NEXT: retq1861 %vec = load <8 x float>, ptr %vp1862 %res = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 5, i32 2, i32 1, i32 6, i32 4, i32 2, i32 4, i32 0>1863 ret <8 x float> %res1864}1865define <8 x float> @test_masked_8xfloat_perm_mem_mask0(ptr %vp, <8 x float> %vec2, <8 x float> %mask) {1866; CHECK-LABEL: test_masked_8xfloat_perm_mem_mask0:1867; CHECK: # %bb.0:1868; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm2 = [5,2,1,6,4,2,4,0]1869; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm31870; CHECK-NEXT: vcmpeqps %ymm3, %ymm1, %k11871; CHECK-NEXT: vpermps (%rdi), %ymm2, %ymm0 {%k1}1872; CHECK-NEXT: retq1873 %vec = load <8 x float>, ptr %vp1874 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 5, i32 2, i32 1, i32 6, i32 4, i32 2, i32 4, i32 0>1875 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer1876 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec21877 ret <8 x float> %res1878}1879 1880define <8 x float> @test_masked_z_8xfloat_perm_mem_mask0(ptr %vp, <8 x float> %mask) {1881; CHECK-LABEL: test_masked_z_8xfloat_perm_mem_mask0:1882; CHECK: # %bb.0:1883; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm1 = [5,2,1,6,4,2,4,0]1884; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm21885; CHECK-NEXT: vcmpeqps %ymm2, %ymm0, %k11886; CHECK-NEXT: vpermps (%rdi), %ymm1, %ymm0 {%k1} {z}1887; CHECK-NEXT: retq1888 %vec = load <8 x float>, ptr %vp1889 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 5, i32 2, i32 1, i32 6, i32 4, i32 2, i32 4, i32 0>1890 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer1891 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer1892 ret <8 x float> %res1893}1894 1895define <8 x float> @test_masked_8xfloat_perm_mem_mask1(ptr %vp, <8 x float> %vec2, <8 x float> %mask) {1896; CHECK-LABEL: test_masked_8xfloat_perm_mem_mask1:1897; CHECK: # %bb.0:1898; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm2 = [1,3,7,4,0,6,6,6]1899; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm31900; CHECK-NEXT: vcmpeqps %ymm3, %ymm1, %k11901; CHECK-NEXT: vpermps (%rdi), %ymm2, %ymm0 {%k1}1902; CHECK-NEXT: retq1903 %vec = load <8 x float>, ptr %vp1904 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 1, i32 3, i32 7, i32 4, i32 0, i32 6, i32 6, i32 6>1905 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer1906 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec21907 ret <8 x float> %res1908}1909 1910define <8 x float> @test_masked_z_8xfloat_perm_mem_mask1(ptr %vp, <8 x float> %mask) {1911; CHECK-LABEL: test_masked_z_8xfloat_perm_mem_mask1:1912; CHECK: # %bb.0:1913; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm1 = [1,3,7,4,0,6,6,6]1914; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm21915; CHECK-NEXT: vcmpeqps %ymm2, %ymm0, %k11916; CHECK-NEXT: vpermps (%rdi), %ymm1, %ymm0 {%k1} {z}1917; CHECK-NEXT: retq1918 %vec = load <8 x float>, ptr %vp1919 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 1, i32 3, i32 7, i32 4, i32 0, i32 6, i32 6, i32 6>1920 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer1921 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer1922 ret <8 x float> %res1923}1924 1925define <8 x float> @test_masked_8xfloat_perm_mem_mask2(ptr %vp, <8 x float> %vec2, <8 x float> %mask) {1926; CHECK-LABEL: test_masked_8xfloat_perm_mem_mask2:1927; CHECK: # %bb.0:1928; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm2 = [4,5,1,5,6,6,2,4]1929; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm31930; CHECK-NEXT: vcmpeqps %ymm3, %ymm1, %k11931; CHECK-NEXT: vpermps (%rdi), %ymm2, %ymm0 {%k1}1932; CHECK-NEXT: retq1933 %vec = load <8 x float>, ptr %vp1934 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 4, i32 5, i32 1, i32 5, i32 6, i32 6, i32 2, i32 4>1935 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer1936 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec21937 ret <8 x float> %res1938}1939 1940define <8 x float> @test_masked_z_8xfloat_perm_mem_mask2(ptr %vp, <8 x float> %mask) {1941; CHECK-LABEL: test_masked_z_8xfloat_perm_mem_mask2:1942; CHECK: # %bb.0:1943; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm1 = [4,5,1,5,6,6,2,4]1944; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm21945; CHECK-NEXT: vcmpeqps %ymm2, %ymm0, %k11946; CHECK-NEXT: vpermps (%rdi), %ymm1, %ymm0 {%k1} {z}1947; CHECK-NEXT: retq1948 %vec = load <8 x float>, ptr %vp1949 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 4, i32 5, i32 1, i32 5, i32 6, i32 6, i32 2, i32 4>1950 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer1951 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer1952 ret <8 x float> %res1953}1954 1955define <8 x float> @test_8xfloat_perm_mem_mask3(ptr %vp) {1956; CHECK-LABEL: test_8xfloat_perm_mem_mask3:1957; CHECK: # %bb.0:1958; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm0 = [5,7,0,6,4,2,3,0]1959; CHECK-NEXT: vpermps (%rdi), %ymm0, %ymm01960; CHECK-NEXT: retq1961 %vec = load <8 x float>, ptr %vp1962 %res = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 5, i32 7, i32 0, i32 6, i32 4, i32 2, i32 3, i32 0>1963 ret <8 x float> %res1964}1965define <8 x float> @test_masked_8xfloat_perm_mem_mask3(ptr %vp, <8 x float> %vec2, <8 x float> %mask) {1966; CHECK-LABEL: test_masked_8xfloat_perm_mem_mask3:1967; CHECK: # %bb.0:1968; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm2 = [5,7,0,6,4,2,3,0]1969; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm31970; CHECK-NEXT: vcmpeqps %ymm3, %ymm1, %k11971; CHECK-NEXT: vpermps (%rdi), %ymm2, %ymm0 {%k1}1972; CHECK-NEXT: retq1973 %vec = load <8 x float>, ptr %vp1974 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 5, i32 7, i32 0, i32 6, i32 4, i32 2, i32 3, i32 0>1975 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer1976 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> %vec21977 ret <8 x float> %res1978}1979 1980define <8 x float> @test_masked_z_8xfloat_perm_mem_mask3(ptr %vp, <8 x float> %mask) {1981; CHECK-LABEL: test_masked_z_8xfloat_perm_mem_mask3:1982; CHECK: # %bb.0:1983; CHECK-NEXT: vpmovsxbd {{.*#+}} ymm1 = [5,7,0,6,4,2,3,0]1984; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm21985; CHECK-NEXT: vcmpeqps %ymm2, %ymm0, %k11986; CHECK-NEXT: vpermps (%rdi), %ymm1, %ymm0 {%k1} {z}1987; CHECK-NEXT: retq1988 %vec = load <8 x float>, ptr %vp1989 %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> <i32 5, i32 7, i32 0, i32 6, i32 4, i32 2, i32 3, i32 0>1990 %cmp = fcmp oeq <8 x float> %mask, zeroinitializer1991 %res = select <8 x i1> %cmp, <8 x float> %shuf, <8 x float> zeroinitializer1992 ret <8 x float> %res1993}1994 1995define <16 x float> @test_16xfloat_perm_mask0(<16 x float> %vec) {1996; CHECK-LABEL: test_16xfloat_perm_mask0:1997; CHECK: # %bb.0:1998; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm1 = [15,7,5,13,4,9,11,13,12,6,0,0,11,15,5,7]1999; CHECK-NEXT: vpermps %zmm0, %zmm1, %zmm02000; CHECK-NEXT: retq2001 %res = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 15, i32 7, i32 5, i32 13, i32 4, i32 9, i32 11, i32 13, i32 12, i32 6, i32 0, i32 0, i32 11, i32 15, i32 5, i32 7>2002 ret <16 x float> %res2003}2004define <16 x float> @test_masked_16xfloat_perm_mask0(<16 x float> %vec, <16 x float> %vec2, <16 x float> %mask) {2005; CHECK-LABEL: test_masked_16xfloat_perm_mask0:2006; CHECK: # %bb.0:2007; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm3 = [15,7,5,13,4,9,11,13,12,6,0,0,11,15,5,7]2008; CHECK-NEXT: vxorps %xmm4, %xmm4, %xmm42009; CHECK-NEXT: vcmpeqps %zmm4, %zmm2, %k12010; CHECK-NEXT: vpermps %zmm0, %zmm3, %zmm1 {%k1}2011; CHECK-NEXT: vmovaps %zmm1, %zmm02012; CHECK-NEXT: retq2013 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 15, i32 7, i32 5, i32 13, i32 4, i32 9, i32 11, i32 13, i32 12, i32 6, i32 0, i32 0, i32 11, i32 15, i32 5, i32 7>2014 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer2015 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec22016 ret <16 x float> %res2017}2018 2019define <16 x float> @test_masked_z_16xfloat_perm_mask0(<16 x float> %vec, <16 x float> %mask) {2020; CHECK-LABEL: test_masked_z_16xfloat_perm_mask0:2021; CHECK: # %bb.0:2022; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm2 = [15,7,5,13,4,9,11,13,12,6,0,0,11,15,5,7]2023; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm32024; CHECK-NEXT: vcmpeqps %zmm3, %zmm1, %k12025; CHECK-NEXT: vpermps %zmm0, %zmm2, %zmm0 {%k1} {z}2026; CHECK-NEXT: retq2027 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 15, i32 7, i32 5, i32 13, i32 4, i32 9, i32 11, i32 13, i32 12, i32 6, i32 0, i32 0, i32 11, i32 15, i32 5, i32 7>2028 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer2029 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer2030 ret <16 x float> %res2031}2032define <16 x float> @test_masked_16xfloat_perm_mask1(<16 x float> %vec, <16 x float> %vec2, <16 x float> %mask) {2033; CHECK-LABEL: test_masked_16xfloat_perm_mask1:2034; CHECK: # %bb.0:2035; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm3 = [11,10,4,10,4,5,8,11,2,0,10,0,0,3,10,1]2036; CHECK-NEXT: vxorps %xmm4, %xmm4, %xmm42037; CHECK-NEXT: vcmpeqps %zmm4, %zmm2, %k12038; CHECK-NEXT: vpermps %zmm0, %zmm3, %zmm1 {%k1}2039; CHECK-NEXT: vmovaps %zmm1, %zmm02040; CHECK-NEXT: retq2041 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 11, i32 10, i32 4, i32 10, i32 4, i32 5, i32 8, i32 11, i32 2, i32 0, i32 10, i32 0, i32 0, i32 3, i32 10, i32 1>2042 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer2043 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec22044 ret <16 x float> %res2045}2046 2047define <16 x float> @test_masked_z_16xfloat_perm_mask1(<16 x float> %vec, <16 x float> %mask) {2048; CHECK-LABEL: test_masked_z_16xfloat_perm_mask1:2049; CHECK: # %bb.0:2050; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm2 = [11,10,4,10,4,5,8,11,2,0,10,0,0,3,10,1]2051; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm32052; CHECK-NEXT: vcmpeqps %zmm3, %zmm1, %k12053; CHECK-NEXT: vpermps %zmm0, %zmm2, %zmm0 {%k1} {z}2054; CHECK-NEXT: retq2055 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 11, i32 10, i32 4, i32 10, i32 4, i32 5, i32 8, i32 11, i32 2, i32 0, i32 10, i32 0, i32 0, i32 3, i32 10, i32 1>2056 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer2057 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer2058 ret <16 x float> %res2059}2060define <16 x float> @test_masked_16xfloat_perm_mask2(<16 x float> %vec, <16 x float> %vec2, <16 x float> %mask) {2061; CHECK-LABEL: test_masked_16xfloat_perm_mask2:2062; CHECK: # %bb.0:2063; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm3 = [0,15,6,14,3,6,5,2,5,15,11,6,6,4,8,11]2064; CHECK-NEXT: vxorps %xmm4, %xmm4, %xmm42065; CHECK-NEXT: vcmpeqps %zmm4, %zmm2, %k12066; CHECK-NEXT: vpermps %zmm0, %zmm3, %zmm1 {%k1}2067; CHECK-NEXT: vmovaps %zmm1, %zmm02068; CHECK-NEXT: retq2069 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 0, i32 15, i32 6, i32 14, i32 3, i32 6, i32 5, i32 2, i32 5, i32 15, i32 11, i32 6, i32 6, i32 4, i32 8, i32 11>2070 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer2071 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec22072 ret <16 x float> %res2073}2074 2075define <16 x float> @test_masked_z_16xfloat_perm_mask2(<16 x float> %vec, <16 x float> %mask) {2076; CHECK-LABEL: test_masked_z_16xfloat_perm_mask2:2077; CHECK: # %bb.0:2078; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm2 = [0,15,6,14,3,6,5,2,5,15,11,6,6,4,8,11]2079; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm32080; CHECK-NEXT: vcmpeqps %zmm3, %zmm1, %k12081; CHECK-NEXT: vpermps %zmm0, %zmm2, %zmm0 {%k1} {z}2082; CHECK-NEXT: retq2083 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 0, i32 15, i32 6, i32 14, i32 3, i32 6, i32 5, i32 2, i32 5, i32 15, i32 11, i32 6, i32 6, i32 4, i32 8, i32 11>2084 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer2085 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer2086 ret <16 x float> %res2087}2088define <16 x float> @test_16xfloat_perm_mask3(<16 x float> %vec) {2089; CHECK-LABEL: test_16xfloat_perm_mask3:2090; CHECK: # %bb.0:2091; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm1 = [10,7,0,14,6,6,0,2,13,8,11,2,5,13,13,3]2092; CHECK-NEXT: vpermps %zmm0, %zmm1, %zmm02093; CHECK-NEXT: retq2094 %res = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 10, i32 7, i32 0, i32 14, i32 6, i32 6, i32 0, i32 2, i32 13, i32 8, i32 11, i32 2, i32 5, i32 13, i32 13, i32 3>2095 ret <16 x float> %res2096}2097define <16 x float> @test_masked_16xfloat_perm_mask3(<16 x float> %vec, <16 x float> %vec2, <16 x float> %mask) {2098; CHECK-LABEL: test_masked_16xfloat_perm_mask3:2099; CHECK: # %bb.0:2100; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm3 = [10,7,0,14,6,6,0,2,13,8,11,2,5,13,13,3]2101; CHECK-NEXT: vxorps %xmm4, %xmm4, %xmm42102; CHECK-NEXT: vcmpeqps %zmm4, %zmm2, %k12103; CHECK-NEXT: vpermps %zmm0, %zmm3, %zmm1 {%k1}2104; CHECK-NEXT: vmovaps %zmm1, %zmm02105; CHECK-NEXT: retq2106 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 10, i32 7, i32 0, i32 14, i32 6, i32 6, i32 0, i32 2, i32 13, i32 8, i32 11, i32 2, i32 5, i32 13, i32 13, i32 3>2107 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer2108 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec22109 ret <16 x float> %res2110}2111 2112define <16 x float> @test_masked_z_16xfloat_perm_mask3(<16 x float> %vec, <16 x float> %mask) {2113; CHECK-LABEL: test_masked_z_16xfloat_perm_mask3:2114; CHECK: # %bb.0:2115; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm2 = [10,7,0,14,6,6,0,2,13,8,11,2,5,13,13,3]2116; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm32117; CHECK-NEXT: vcmpeqps %zmm3, %zmm1, %k12118; CHECK-NEXT: vpermps %zmm0, %zmm2, %zmm0 {%k1} {z}2119; CHECK-NEXT: retq2120 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 10, i32 7, i32 0, i32 14, i32 6, i32 6, i32 0, i32 2, i32 13, i32 8, i32 11, i32 2, i32 5, i32 13, i32 13, i32 3>2121 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer2122 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer2123 ret <16 x float> %res2124}2125define <16 x float> @test_16xfloat_perm_mem_mask0(ptr %vp) {2126; CHECK-LABEL: test_16xfloat_perm_mem_mask0:2127; CHECK: # %bb.0:2128; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm0 = [10,2,1,14,9,9,7,2,9,4,12,11,0,14,0,1]2129; CHECK-NEXT: vpermps (%rdi), %zmm0, %zmm02130; CHECK-NEXT: retq2131 %vec = load <16 x float>, ptr %vp2132 %res = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 10, i32 2, i32 1, i32 14, i32 9, i32 9, i32 7, i32 2, i32 9, i32 4, i32 12, i32 11, i32 0, i32 14, i32 0, i32 1>2133 ret <16 x float> %res2134}2135define <16 x float> @test_masked_16xfloat_perm_mem_mask0(ptr %vp, <16 x float> %vec2, <16 x float> %mask) {2136; CHECK-LABEL: test_masked_16xfloat_perm_mem_mask0:2137; CHECK: # %bb.0:2138; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm2 = [10,2,1,14,9,9,7,2,9,4,12,11,0,14,0,1]2139; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm32140; CHECK-NEXT: vcmpeqps %zmm3, %zmm1, %k12141; CHECK-NEXT: vpermps (%rdi), %zmm2, %zmm0 {%k1}2142; CHECK-NEXT: retq2143 %vec = load <16 x float>, ptr %vp2144 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 10, i32 2, i32 1, i32 14, i32 9, i32 9, i32 7, i32 2, i32 9, i32 4, i32 12, i32 11, i32 0, i32 14, i32 0, i32 1>2145 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer2146 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec22147 ret <16 x float> %res2148}2149 2150define <16 x float> @test_masked_z_16xfloat_perm_mem_mask0(ptr %vp, <16 x float> %mask) {2151; CHECK-LABEL: test_masked_z_16xfloat_perm_mem_mask0:2152; CHECK: # %bb.0:2153; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm1 = [10,2,1,14,9,9,7,2,9,4,12,11,0,14,0,1]2154; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm22155; CHECK-NEXT: vcmpeqps %zmm2, %zmm0, %k12156; CHECK-NEXT: vpermps (%rdi), %zmm1, %zmm0 {%k1} {z}2157; CHECK-NEXT: retq2158 %vec = load <16 x float>, ptr %vp2159 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 10, i32 2, i32 1, i32 14, i32 9, i32 9, i32 7, i32 2, i32 9, i32 4, i32 12, i32 11, i32 0, i32 14, i32 0, i32 1>2160 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer2161 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer2162 ret <16 x float> %res2163}2164 2165define <16 x float> @test_masked_16xfloat_perm_mem_mask1(ptr %vp, <16 x float> %vec2, <16 x float> %mask) {2166; CHECK-LABEL: test_masked_16xfloat_perm_mem_mask1:2167; CHECK: # %bb.0:2168; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm2 = [4,2,3,5,11,6,4,7,6,4,14,8,15,12,9,4]2169; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm32170; CHECK-NEXT: vcmpeqps %zmm3, %zmm1, %k12171; CHECK-NEXT: vpermps (%rdi), %zmm2, %zmm0 {%k1}2172; CHECK-NEXT: retq2173 %vec = load <16 x float>, ptr %vp2174 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 4, i32 2, i32 3, i32 5, i32 11, i32 6, i32 4, i32 7, i32 6, i32 4, i32 14, i32 8, i32 15, i32 12, i32 9, i32 4>2175 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer2176 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec22177 ret <16 x float> %res2178}2179 2180define <16 x float> @test_masked_z_16xfloat_perm_mem_mask1(ptr %vp, <16 x float> %mask) {2181; CHECK-LABEL: test_masked_z_16xfloat_perm_mem_mask1:2182; CHECK: # %bb.0:2183; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm1 = [4,2,3,5,11,6,4,7,6,4,14,8,15,12,9,4]2184; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm22185; CHECK-NEXT: vcmpeqps %zmm2, %zmm0, %k12186; CHECK-NEXT: vpermps (%rdi), %zmm1, %zmm0 {%k1} {z}2187; CHECK-NEXT: retq2188 %vec = load <16 x float>, ptr %vp2189 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 4, i32 2, i32 3, i32 5, i32 11, i32 6, i32 4, i32 7, i32 6, i32 4, i32 14, i32 8, i32 15, i32 12, i32 9, i32 4>2190 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer2191 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer2192 ret <16 x float> %res2193}2194 2195define <16 x float> @test_masked_16xfloat_perm_mem_mask2(ptr %vp, <16 x float> %vec2, <16 x float> %mask) {2196; CHECK-LABEL: test_masked_16xfloat_perm_mem_mask2:2197; CHECK: # %bb.0:2198; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm2 = [10,7,11,6,7,0,11,0,10,9,12,4,10,3,8,5]2199; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm32200; CHECK-NEXT: vcmpeqps %zmm3, %zmm1, %k12201; CHECK-NEXT: vpermps (%rdi), %zmm2, %zmm0 {%k1}2202; CHECK-NEXT: retq2203 %vec = load <16 x float>, ptr %vp2204 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 10, i32 7, i32 11, i32 6, i32 7, i32 0, i32 11, i32 0, i32 10, i32 9, i32 12, i32 4, i32 10, i32 3, i32 8, i32 5>2205 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer2206 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec22207 ret <16 x float> %res2208}2209 2210define <16 x float> @test_masked_z_16xfloat_perm_mem_mask2(ptr %vp, <16 x float> %mask) {2211; CHECK-LABEL: test_masked_z_16xfloat_perm_mem_mask2:2212; CHECK: # %bb.0:2213; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm1 = [10,7,11,6,7,0,11,0,10,9,12,4,10,3,8,5]2214; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm22215; CHECK-NEXT: vcmpeqps %zmm2, %zmm0, %k12216; CHECK-NEXT: vpermps (%rdi), %zmm1, %zmm0 {%k1} {z}2217; CHECK-NEXT: retq2218 %vec = load <16 x float>, ptr %vp2219 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 10, i32 7, i32 11, i32 6, i32 7, i32 0, i32 11, i32 0, i32 10, i32 9, i32 12, i32 4, i32 10, i32 3, i32 8, i32 5>2220 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer2221 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer2222 ret <16 x float> %res2223}2224 2225define <16 x float> @test_16xfloat_perm_mem_mask3(ptr %vp) {2226; CHECK-LABEL: test_16xfloat_perm_mem_mask3:2227; CHECK: # %bb.0:2228; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm0 = [15,15,3,9,5,15,14,9,11,10,5,14,14,5,11,0]2229; CHECK-NEXT: vpermps (%rdi), %zmm0, %zmm02230; CHECK-NEXT: retq2231 %vec = load <16 x float>, ptr %vp2232 %res = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 15, i32 15, i32 3, i32 9, i32 5, i32 15, i32 14, i32 9, i32 11, i32 10, i32 5, i32 14, i32 14, i32 5, i32 11, i32 0>2233 ret <16 x float> %res2234}2235define <16 x float> @test_masked_16xfloat_perm_mem_mask3(ptr %vp, <16 x float> %vec2, <16 x float> %mask) {2236; CHECK-LABEL: test_masked_16xfloat_perm_mem_mask3:2237; CHECK: # %bb.0:2238; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm2 = [15,15,3,9,5,15,14,9,11,10,5,14,14,5,11,0]2239; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm32240; CHECK-NEXT: vcmpeqps %zmm3, %zmm1, %k12241; CHECK-NEXT: vpermps (%rdi), %zmm2, %zmm0 {%k1}2242; CHECK-NEXT: retq2243 %vec = load <16 x float>, ptr %vp2244 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 15, i32 15, i32 3, i32 9, i32 5, i32 15, i32 14, i32 9, i32 11, i32 10, i32 5, i32 14, i32 14, i32 5, i32 11, i32 0>2245 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer2246 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> %vec22247 ret <16 x float> %res2248}2249 2250define <16 x float> @test_masked_z_16xfloat_perm_mem_mask3(ptr %vp, <16 x float> %mask) {2251; CHECK-LABEL: test_masked_z_16xfloat_perm_mem_mask3:2252; CHECK: # %bb.0:2253; CHECK-NEXT: vpmovsxbd {{.*#+}} zmm1 = [15,15,3,9,5,15,14,9,11,10,5,14,14,5,11,0]2254; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm22255; CHECK-NEXT: vcmpeqps %zmm2, %zmm0, %k12256; CHECK-NEXT: vpermps (%rdi), %zmm1, %zmm0 {%k1} {z}2257; CHECK-NEXT: retq2258 %vec = load <16 x float>, ptr %vp2259 %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> <i32 15, i32 15, i32 3, i32 9, i32 5, i32 15, i32 14, i32 9, i32 11, i32 10, i32 5, i32 14, i32 14, i32 5, i32 11, i32 0>2260 %cmp = fcmp oeq <16 x float> %mask, zeroinitializer2261 %res = select <16 x i1> %cmp, <16 x float> %shuf, <16 x float> zeroinitializer2262 ret <16 x float> %res2263}2264 2265define <4 x double> @test_4xdouble_perm_mask0(<4 x double> %vec) {2266; CHECK-LABEL: test_4xdouble_perm_mask0:2267; CHECK: # %bb.0:2268; CHECK-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[2,1,3,2]2269; CHECK-NEXT: retq2270 %res = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 2>2271 ret <4 x double> %res2272}2273define <4 x double> @test_masked_4xdouble_perm_mask0(<4 x double> %vec, <4 x double> %vec2, <4 x double> %mask) {2274; CHECK-LABEL: test_masked_4xdouble_perm_mask0:2275; CHECK: # %bb.0:2276; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm32277; CHECK-NEXT: vcmpeqpd %ymm3, %ymm2, %k12278; CHECK-NEXT: vpermpd {{.*#+}} ymm1 {%k1} = ymm0[2,1,3,2]2279; CHECK-NEXT: vmovapd %ymm1, %ymm02280; CHECK-NEXT: retq2281 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 2>2282 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer2283 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec22284 ret <4 x double> %res2285}2286 2287define <4 x double> @test_masked_z_4xdouble_perm_mask0(<4 x double> %vec, <4 x double> %mask) {2288; CHECK-LABEL: test_masked_z_4xdouble_perm_mask0:2289; CHECK: # %bb.0:2290; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22291; CHECK-NEXT: vcmpeqpd %ymm2, %ymm1, %k12292; CHECK-NEXT: vpermpd {{.*#+}} ymm0 {%k1} {z} = ymm0[2,1,3,2]2293; CHECK-NEXT: retq2294 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 2>2295 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer2296 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> zeroinitializer2297 ret <4 x double> %res2298}2299define <4 x double> @test_masked_4xdouble_perm_mask1(<4 x double> %vec, <4 x double> %vec2, <4 x double> %mask) {2300; CHECK-LABEL: test_masked_4xdouble_perm_mask1:2301; CHECK: # %bb.0:2302; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm32303; CHECK-NEXT: vcmpeqpd %ymm3, %ymm2, %k12304; CHECK-NEXT: vpermpd {{.*#+}} ymm1 {%k1} = ymm0[3,0,0,0]2305; CHECK-NEXT: vmovapd %ymm1, %ymm02306; CHECK-NEXT: retq2307 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 3, i32 0, i32 0, i32 0>2308 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer2309 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec22310 ret <4 x double> %res2311}2312 2313define <4 x double> @test_masked_z_4xdouble_perm_mask1(<4 x double> %vec, <4 x double> %mask) {2314; CHECK-LABEL: test_masked_z_4xdouble_perm_mask1:2315; CHECK: # %bb.0:2316; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22317; CHECK-NEXT: vcmpeqpd %ymm2, %ymm1, %k12318; CHECK-NEXT: vpermpd {{.*#+}} ymm0 {%k1} {z} = ymm0[3,0,0,0]2319; CHECK-NEXT: retq2320 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 3, i32 0, i32 0, i32 0>2321 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer2322 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> zeroinitializer2323 ret <4 x double> %res2324}2325define <4 x double> @test_masked_4xdouble_perm_mask2(<4 x double> %vec, <4 x double> %vec2, <4 x double> %mask) {2326; CHECK-LABEL: test_masked_4xdouble_perm_mask2:2327; CHECK: # %bb.0:2328; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm32329; CHECK-NEXT: vcmpeqpd %ymm3, %ymm2, %k12330; CHECK-NEXT: vpermpd {{.*#+}} ymm1 {%k1} = ymm0[0,3,3,1]2331; CHECK-NEXT: vmovapd %ymm1, %ymm02332; CHECK-NEXT: retq2333 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 0, i32 3, i32 3, i32 1>2334 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer2335 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec22336 ret <4 x double> %res2337}2338 2339define <4 x double> @test_masked_z_4xdouble_perm_mask2(<4 x double> %vec, <4 x double> %mask) {2340; CHECK-LABEL: test_masked_z_4xdouble_perm_mask2:2341; CHECK: # %bb.0:2342; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22343; CHECK-NEXT: vcmpeqpd %ymm2, %ymm1, %k12344; CHECK-NEXT: vpermpd {{.*#+}} ymm0 {%k1} {z} = ymm0[0,3,3,1]2345; CHECK-NEXT: retq2346 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 0, i32 3, i32 3, i32 1>2347 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer2348 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> zeroinitializer2349 ret <4 x double> %res2350}2351define <4 x double> @test_4xdouble_perm_mask3(<4 x double> %vec) {2352; CHECK-LABEL: test_4xdouble_perm_mask3:2353; CHECK: # %bb.0:2354; CHECK-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[3,3,3,2]2355; CHECK-NEXT: retq2356 %res = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 2>2357 ret <4 x double> %res2358}2359define <4 x double> @test_masked_4xdouble_perm_mask3(<4 x double> %vec, <4 x double> %vec2, <4 x double> %mask) {2360; CHECK-LABEL: test_masked_4xdouble_perm_mask3:2361; CHECK: # %bb.0:2362; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm32363; CHECK-NEXT: vcmpeqpd %ymm3, %ymm2, %k12364; CHECK-NEXT: vpermpd {{.*#+}} ymm1 {%k1} = ymm0[3,3,3,2]2365; CHECK-NEXT: vmovapd %ymm1, %ymm02366; CHECK-NEXT: retq2367 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 2>2368 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer2369 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec22370 ret <4 x double> %res2371}2372 2373define <4 x double> @test_masked_z_4xdouble_perm_mask3(<4 x double> %vec, <4 x double> %mask) {2374; CHECK-LABEL: test_masked_z_4xdouble_perm_mask3:2375; CHECK: # %bb.0:2376; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22377; CHECK-NEXT: vcmpeqpd %ymm2, %ymm1, %k12378; CHECK-NEXT: vpermpd {{.*#+}} ymm0 {%k1} {z} = ymm0[3,3,3,2]2379; CHECK-NEXT: retq2380 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 2>2381 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer2382 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> zeroinitializer2383 ret <4 x double> %res2384}2385define <4 x double> @test_4xdouble_perm_mem_mask0(ptr %vp) {2386; CHECK-LABEL: test_4xdouble_perm_mem_mask0:2387; CHECK: # %bb.0:2388; CHECK-NEXT: vpermpd {{.*#+}} ymm0 = mem[0,0,2,0]2389; CHECK-NEXT: retq2390 %vec = load <4 x double>, ptr %vp2391 %res = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 0>2392 ret <4 x double> %res2393}2394define <4 x double> @test_masked_4xdouble_perm_mem_mask0(ptr %vp, <4 x double> %vec2, <4 x double> %mask) {2395; CHECK-LABEL: test_masked_4xdouble_perm_mem_mask0:2396; CHECK: # %bb.0:2397; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22398; CHECK-NEXT: vcmpeqpd %ymm2, %ymm1, %k12399; CHECK-NEXT: vpermpd {{.*#+}} ymm0 {%k1} = mem[0,0,2,0]2400; CHECK-NEXT: retq2401 %vec = load <4 x double>, ptr %vp2402 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 0>2403 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer2404 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec22405 ret <4 x double> %res2406}2407 2408define <4 x double> @test_masked_z_4xdouble_perm_mem_mask0(ptr %vp, <4 x double> %mask) {2409; CHECK-LABEL: test_masked_z_4xdouble_perm_mem_mask0:2410; CHECK: # %bb.0:2411; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm12412; CHECK-NEXT: vcmpeqpd %ymm1, %ymm0, %k12413; CHECK-NEXT: vpermpd {{.*#+}} ymm0 {%k1} {z} = mem[0,0,2,0]2414; CHECK-NEXT: retq2415 %vec = load <4 x double>, ptr %vp2416 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 0>2417 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer2418 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> zeroinitializer2419 ret <4 x double> %res2420}2421 2422define <4 x double> @test_masked_4xdouble_perm_mem_mask1(ptr %vp, <4 x double> %vec2, <4 x double> %mask) {2423; CHECK-LABEL: test_masked_4xdouble_perm_mem_mask1:2424; CHECK: # %bb.0:2425; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22426; CHECK-NEXT: vcmpeqpd %ymm2, %ymm1, %k12427; CHECK-NEXT: vpermpd {{.*#+}} ymm0 {%k1} = mem[0,2,3,2]2428; CHECK-NEXT: retq2429 %vec = load <4 x double>, ptr %vp2430 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 0, i32 2, i32 3, i32 2>2431 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer2432 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec22433 ret <4 x double> %res2434}2435 2436define <4 x double> @test_masked_z_4xdouble_perm_mem_mask1(ptr %vp, <4 x double> %mask) {2437; CHECK-LABEL: test_masked_z_4xdouble_perm_mem_mask1:2438; CHECK: # %bb.0:2439; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm12440; CHECK-NEXT: vcmpeqpd %ymm1, %ymm0, %k12441; CHECK-NEXT: vpermpd {{.*#+}} ymm0 {%k1} {z} = mem[0,2,3,2]2442; CHECK-NEXT: retq2443 %vec = load <4 x double>, ptr %vp2444 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 0, i32 2, i32 3, i32 2>2445 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer2446 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> zeroinitializer2447 ret <4 x double> %res2448}2449 2450define <4 x double> @test_masked_4xdouble_perm_mem_mask2(ptr %vp, <4 x double> %vec2, <4 x double> %mask) {2451; CHECK-LABEL: test_masked_4xdouble_perm_mem_mask2:2452; CHECK: # %bb.0:2453; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22454; CHECK-NEXT: vcmpeqpd %ymm2, %ymm1, %k12455; CHECK-NEXT: vpermpd {{.*#+}} ymm0 {%k1} = mem[3,1,1,1]2456; CHECK-NEXT: retq2457 %vec = load <4 x double>, ptr %vp2458 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 3, i32 1, i32 1, i32 1>2459 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer2460 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec22461 ret <4 x double> %res2462}2463 2464define <4 x double> @test_masked_z_4xdouble_perm_mem_mask2(ptr %vp, <4 x double> %mask) {2465; CHECK-LABEL: test_masked_z_4xdouble_perm_mem_mask2:2466; CHECK: # %bb.0:2467; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm12468; CHECK-NEXT: vcmpeqpd %ymm1, %ymm0, %k12469; CHECK-NEXT: vpermpd {{.*#+}} ymm0 {%k1} {z} = mem[3,1,1,1]2470; CHECK-NEXT: retq2471 %vec = load <4 x double>, ptr %vp2472 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 3, i32 1, i32 1, i32 1>2473 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer2474 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> zeroinitializer2475 ret <4 x double> %res2476}2477 2478define <4 x double> @test_4xdouble_perm_mem_mask3(ptr %vp) {2479; CHECK-LABEL: test_4xdouble_perm_mem_mask3:2480; CHECK: # %bb.0:2481; CHECK-NEXT: vpermpd {{.*#+}} ymm0 = mem[3,2,3,2]2482; CHECK-NEXT: retq2483 %vec = load <4 x double>, ptr %vp2484 %res = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 3, i32 2, i32 3, i32 2>2485 ret <4 x double> %res2486}2487define <4 x double> @test_masked_4xdouble_perm_mem_mask3(ptr %vp, <4 x double> %vec2, <4 x double> %mask) {2488; CHECK-LABEL: test_masked_4xdouble_perm_mem_mask3:2489; CHECK: # %bb.0:2490; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22491; CHECK-NEXT: vcmpeqpd %ymm2, %ymm1, %k12492; CHECK-NEXT: vpermpd {{.*#+}} ymm0 {%k1} = mem[3,2,3,2]2493; CHECK-NEXT: retq2494 %vec = load <4 x double>, ptr %vp2495 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 3, i32 2, i32 3, i32 2>2496 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer2497 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> %vec22498 ret <4 x double> %res2499}2500 2501define <4 x double> @test_masked_z_4xdouble_perm_mem_mask3(ptr %vp, <4 x double> %mask) {2502; CHECK-LABEL: test_masked_z_4xdouble_perm_mem_mask3:2503; CHECK: # %bb.0:2504; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm12505; CHECK-NEXT: vcmpeqpd %ymm1, %ymm0, %k12506; CHECK-NEXT: vpermpd {{.*#+}} ymm0 {%k1} {z} = mem[3,2,3,2]2507; CHECK-NEXT: retq2508 %vec = load <4 x double>, ptr %vp2509 %shuf = shufflevector <4 x double> %vec, <4 x double> undef, <4 x i32> <i32 3, i32 2, i32 3, i32 2>2510 %cmp = fcmp oeq <4 x double> %mask, zeroinitializer2511 %res = select <4 x i1> %cmp, <4 x double> %shuf, <4 x double> zeroinitializer2512 ret <4 x double> %res2513}2514 2515define <8 x double> @test_8xdouble_perm_mask0(<8 x double> %vec) {2516; CHECK-LABEL: test_8xdouble_perm_mask0:2517; CHECK: # %bb.0:2518; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm1 = [5,7,4,2,7,4,3,4]2519; CHECK-NEXT: vpermpd %zmm0, %zmm1, %zmm02520; CHECK-NEXT: retq2521 %res = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 5, i32 7, i32 4, i32 2, i32 7, i32 4, i32 3, i32 4>2522 ret <8 x double> %res2523}2524define <8 x double> @test_masked_8xdouble_perm_mask0(<8 x double> %vec, <8 x double> %vec2, <8 x double> %mask) {2525; CHECK-LABEL: test_masked_8xdouble_perm_mask0:2526; CHECK: # %bb.0:2527; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm3 = [5,7,4,2,7,4,3,4]2528; CHECK-NEXT: vxorpd %xmm4, %xmm4, %xmm42529; CHECK-NEXT: vcmpeqpd %zmm4, %zmm2, %k12530; CHECK-NEXT: vpermpd %zmm0, %zmm3, %zmm1 {%k1}2531; CHECK-NEXT: vmovapd %zmm1, %zmm02532; CHECK-NEXT: retq2533 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 5, i32 7, i32 4, i32 2, i32 7, i32 4, i32 3, i32 4>2534 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2535 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec22536 ret <8 x double> %res2537}2538 2539define <8 x double> @test_masked_z_8xdouble_perm_mask0(<8 x double> %vec, <8 x double> %mask) {2540; CHECK-LABEL: test_masked_z_8xdouble_perm_mask0:2541; CHECK: # %bb.0:2542; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm2 = [5,7,4,2,7,4,3,4]2543; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm32544; CHECK-NEXT: vcmpeqpd %zmm3, %zmm1, %k12545; CHECK-NEXT: vpermpd %zmm0, %zmm2, %zmm0 {%k1} {z}2546; CHECK-NEXT: retq2547 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 5, i32 7, i32 4, i32 2, i32 7, i32 4, i32 3, i32 4>2548 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2549 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer2550 ret <8 x double> %res2551}2552define <8 x double> @test_masked_8xdouble_perm_imm_mask1(<8 x double> %vec, <8 x double> %vec2, <8 x double> %mask) {2553; CHECK-LABEL: test_masked_8xdouble_perm_imm_mask1:2554; CHECK: # %bb.0:2555; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm32556; CHECK-NEXT: vcmpeqpd %zmm3, %zmm2, %k12557; CHECK-NEXT: vpermpd {{.*#+}} zmm1 {%k1} = zmm0[3,0,0,2,7,4,4,6]2558; CHECK-NEXT: vmovapd %zmm1, %zmm02559; CHECK-NEXT: retq2560 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 3, i32 0, i32 0, i32 2, i32 7, i32 4, i32 4, i32 6>2561 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2562 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec22563 ret <8 x double> %res2564}2565 2566define <8 x double> @test_masked_z_8xdouble_perm_imm_mask1(<8 x double> %vec, <8 x double> %mask) {2567; CHECK-LABEL: test_masked_z_8xdouble_perm_imm_mask1:2568; CHECK: # %bb.0:2569; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22570; CHECK-NEXT: vcmpeqpd %zmm2, %zmm1, %k12571; CHECK-NEXT: vpermpd {{.*#+}} zmm0 {%k1} {z} = zmm0[3,0,0,2,7,4,4,6]2572; CHECK-NEXT: retq2573 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 3, i32 0, i32 0, i32 2, i32 7, i32 4, i32 4, i32 6>2574 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2575 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer2576 ret <8 x double> %res2577}2578define <8 x double> @test_masked_8xdouble_perm_mask2(<8 x double> %vec, <8 x double> %vec2, <8 x double> %mask) {2579; CHECK-LABEL: test_masked_8xdouble_perm_mask2:2580; CHECK: # %bb.0:2581; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm3 = [7,5,5,5,3,5,1,7]2582; CHECK-NEXT: vxorpd %xmm4, %xmm4, %xmm42583; CHECK-NEXT: vcmpeqpd %zmm4, %zmm2, %k12584; CHECK-NEXT: vpermpd %zmm0, %zmm3, %zmm1 {%k1}2585; CHECK-NEXT: vmovapd %zmm1, %zmm02586; CHECK-NEXT: retq2587 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 7, i32 5, i32 5, i32 5, i32 3, i32 5, i32 1, i32 7>2588 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2589 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec22590 ret <8 x double> %res2591}2592 2593define <8 x double> @test_masked_z_8xdouble_perm_mask2(<8 x double> %vec, <8 x double> %mask) {2594; CHECK-LABEL: test_masked_z_8xdouble_perm_mask2:2595; CHECK: # %bb.0:2596; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm2 = [7,5,5,5,3,5,1,7]2597; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm32598; CHECK-NEXT: vcmpeqpd %zmm3, %zmm1, %k12599; CHECK-NEXT: vpermpd %zmm0, %zmm2, %zmm0 {%k1} {z}2600; CHECK-NEXT: retq2601 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 7, i32 5, i32 5, i32 5, i32 3, i32 5, i32 1, i32 7>2602 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2603 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer2604 ret <8 x double> %res2605}2606define <8 x double> @test_8xdouble_perm_imm_mask3(<8 x double> %vec) {2607; CHECK-LABEL: test_8xdouble_perm_imm_mask3:2608; CHECK: # %bb.0:2609; CHECK-NEXT: vpermpd {{.*#+}} zmm0 = zmm0[1,3,3,0,5,7,7,4]2610; CHECK-NEXT: retq2611 %res = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 1, i32 3, i32 3, i32 0, i32 5, i32 7, i32 7, i32 4>2612 ret <8 x double> %res2613}2614define <8 x double> @test_masked_8xdouble_perm_imm_mask3(<8 x double> %vec, <8 x double> %vec2, <8 x double> %mask) {2615; CHECK-LABEL: test_masked_8xdouble_perm_imm_mask3:2616; CHECK: # %bb.0:2617; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm32618; CHECK-NEXT: vcmpeqpd %zmm3, %zmm2, %k12619; CHECK-NEXT: vpermpd {{.*#+}} zmm1 {%k1} = zmm0[1,3,3,0,5,7,7,4]2620; CHECK-NEXT: vmovapd %zmm1, %zmm02621; CHECK-NEXT: retq2622 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 1, i32 3, i32 3, i32 0, i32 5, i32 7, i32 7, i32 4>2623 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2624 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec22625 ret <8 x double> %res2626}2627 2628define <8 x double> @test_masked_z_8xdouble_perm_imm_mask3(<8 x double> %vec, <8 x double> %mask) {2629; CHECK-LABEL: test_masked_z_8xdouble_perm_imm_mask3:2630; CHECK: # %bb.0:2631; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22632; CHECK-NEXT: vcmpeqpd %zmm2, %zmm1, %k12633; CHECK-NEXT: vpermpd {{.*#+}} zmm0 {%k1} {z} = zmm0[1,3,3,0,5,7,7,4]2634; CHECK-NEXT: retq2635 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 1, i32 3, i32 3, i32 0, i32 5, i32 7, i32 7, i32 4>2636 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2637 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer2638 ret <8 x double> %res2639}2640define <8 x double> @test_masked_8xdouble_perm_mask4(<8 x double> %vec, <8 x double> %vec2, <8 x double> %mask) {2641; CHECK-LABEL: test_masked_8xdouble_perm_mask4:2642; CHECK: # %bb.0:2643; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm3 = [3,5,3,4,6,5,7,1]2644; CHECK-NEXT: vxorpd %xmm4, %xmm4, %xmm42645; CHECK-NEXT: vcmpeqpd %zmm4, %zmm2, %k12646; CHECK-NEXT: vpermpd %zmm0, %zmm3, %zmm1 {%k1}2647; CHECK-NEXT: vmovapd %zmm1, %zmm02648; CHECK-NEXT: retq2649 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 3, i32 5, i32 3, i32 4, i32 6, i32 5, i32 7, i32 1>2650 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2651 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec22652 ret <8 x double> %res2653}2654 2655define <8 x double> @test_masked_z_8xdouble_perm_mask4(<8 x double> %vec, <8 x double> %mask) {2656; CHECK-LABEL: test_masked_z_8xdouble_perm_mask4:2657; CHECK: # %bb.0:2658; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm2 = [3,5,3,4,6,5,7,1]2659; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm32660; CHECK-NEXT: vcmpeqpd %zmm3, %zmm1, %k12661; CHECK-NEXT: vpermpd %zmm0, %zmm2, %zmm0 {%k1} {z}2662; CHECK-NEXT: retq2663 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 3, i32 5, i32 3, i32 4, i32 6, i32 5, i32 7, i32 1>2664 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2665 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer2666 ret <8 x double> %res2667}2668define <8 x double> @test_masked_8xdouble_perm_imm_mask5(<8 x double> %vec, <8 x double> %vec2, <8 x double> %mask) {2669; CHECK-LABEL: test_masked_8xdouble_perm_imm_mask5:2670; CHECK: # %bb.0:2671; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm32672; CHECK-NEXT: vcmpeqpd %zmm3, %zmm2, %k12673; CHECK-NEXT: vpermpd {{.*#+}} zmm1 {%k1} = zmm0[3,3,2,3,7,7,6,7]2674; CHECK-NEXT: vmovapd %zmm1, %zmm02675; CHECK-NEXT: retq2676 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 3, i32 3, i32 2, i32 3, i32 7, i32 7, i32 6, i32 7>2677 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2678 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec22679 ret <8 x double> %res2680}2681 2682define <8 x double> @test_masked_z_8xdouble_perm_imm_mask5(<8 x double> %vec, <8 x double> %mask) {2683; CHECK-LABEL: test_masked_z_8xdouble_perm_imm_mask5:2684; CHECK: # %bb.0:2685; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22686; CHECK-NEXT: vcmpeqpd %zmm2, %zmm1, %k12687; CHECK-NEXT: vpermpd {{.*#+}} zmm0 {%k1} {z} = zmm0[3,3,2,3,7,7,6,7]2688; CHECK-NEXT: retq2689 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 3, i32 3, i32 2, i32 3, i32 7, i32 7, i32 6, i32 7>2690 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2691 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer2692 ret <8 x double> %res2693}2694define <8 x double> @test_8xdouble_perm_mask6(<8 x double> %vec) {2695; CHECK-LABEL: test_8xdouble_perm_mask6:2696; CHECK: # %bb.0:2697; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm1 = [2,7,6,4,0,0,0,2]2698; CHECK-NEXT: vpermpd %zmm0, %zmm1, %zmm02699; CHECK-NEXT: retq2700 %res = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 2, i32 7, i32 6, i32 4, i32 0, i32 0, i32 0, i32 2>2701 ret <8 x double> %res2702}2703define <8 x double> @test_masked_8xdouble_perm_mask6(<8 x double> %vec, <8 x double> %vec2, <8 x double> %mask) {2704; CHECK-LABEL: test_masked_8xdouble_perm_mask6:2705; CHECK: # %bb.0:2706; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm3 = [2,7,6,4,0,0,0,2]2707; CHECK-NEXT: vxorpd %xmm4, %xmm4, %xmm42708; CHECK-NEXT: vcmpeqpd %zmm4, %zmm2, %k12709; CHECK-NEXT: vpermpd %zmm0, %zmm3, %zmm1 {%k1}2710; CHECK-NEXT: vmovapd %zmm1, %zmm02711; CHECK-NEXT: retq2712 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 2, i32 7, i32 6, i32 4, i32 0, i32 0, i32 0, i32 2>2713 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2714 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec22715 ret <8 x double> %res2716}2717 2718define <8 x double> @test_masked_z_8xdouble_perm_mask6(<8 x double> %vec, <8 x double> %mask) {2719; CHECK-LABEL: test_masked_z_8xdouble_perm_mask6:2720; CHECK: # %bb.0:2721; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm2 = [2,7,6,4,0,0,0,2]2722; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm32723; CHECK-NEXT: vcmpeqpd %zmm3, %zmm1, %k12724; CHECK-NEXT: vpermpd %zmm0, %zmm2, %zmm0 {%k1} {z}2725; CHECK-NEXT: retq2726 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 2, i32 7, i32 6, i32 4, i32 0, i32 0, i32 0, i32 2>2727 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2728 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer2729 ret <8 x double> %res2730}2731define <8 x double> @test_masked_8xdouble_perm_imm_mask7(<8 x double> %vec, <8 x double> %vec2, <8 x double> %mask) {2732; CHECK-LABEL: test_masked_8xdouble_perm_imm_mask7:2733; CHECK: # %bb.0:2734; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm32735; CHECK-NEXT: vcmpeqpd %zmm3, %zmm2, %k12736; CHECK-NEXT: vpermpd {{.*#+}} zmm1 {%k1} = zmm0[3,1,3,2,7,5,7,6]2737; CHECK-NEXT: vmovapd %zmm1, %zmm02738; CHECK-NEXT: retq2739 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 3, i32 1, i32 3, i32 2, i32 7, i32 5, i32 7, i32 6>2740 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2741 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec22742 ret <8 x double> %res2743}2744 2745define <8 x double> @test_masked_z_8xdouble_perm_imm_mask7(<8 x double> %vec, <8 x double> %mask) {2746; CHECK-LABEL: test_masked_z_8xdouble_perm_imm_mask7:2747; CHECK: # %bb.0:2748; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22749; CHECK-NEXT: vcmpeqpd %zmm2, %zmm1, %k12750; CHECK-NEXT: vpermpd {{.*#+}} zmm0 {%k1} {z} = zmm0[3,1,3,2,7,5,7,6]2751; CHECK-NEXT: retq2752 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 3, i32 1, i32 3, i32 2, i32 7, i32 5, i32 7, i32 6>2753 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2754 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer2755 ret <8 x double> %res2756}2757define <8 x double> @test_8xdouble_perm_mem_mask0(ptr %vp) {2758; CHECK-LABEL: test_8xdouble_perm_mem_mask0:2759; CHECK: # %bb.0:2760; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm0 = [0,3,4,0,4,2,0,1]2761; CHECK-NEXT: vpermpd (%rdi), %zmm0, %zmm02762; CHECK-NEXT: retq2763 %vec = load <8 x double>, ptr %vp2764 %res = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 3, i32 4, i32 0, i32 4, i32 2, i32 0, i32 1>2765 ret <8 x double> %res2766}2767define <8 x double> @test_masked_8xdouble_perm_mem_mask0(ptr %vp, <8 x double> %vec2, <8 x double> %mask) {2768; CHECK-LABEL: test_masked_8xdouble_perm_mem_mask0:2769; CHECK: # %bb.0:2770; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm2 = [0,3,4,0,4,2,0,1]2771; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm32772; CHECK-NEXT: vcmpeqpd %zmm3, %zmm1, %k12773; CHECK-NEXT: vpermpd (%rdi), %zmm2, %zmm0 {%k1}2774; CHECK-NEXT: retq2775 %vec = load <8 x double>, ptr %vp2776 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 3, i32 4, i32 0, i32 4, i32 2, i32 0, i32 1>2777 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2778 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec22779 ret <8 x double> %res2780}2781 2782define <8 x double> @test_masked_z_8xdouble_perm_mem_mask0(ptr %vp, <8 x double> %mask) {2783; CHECK-LABEL: test_masked_z_8xdouble_perm_mem_mask0:2784; CHECK: # %bb.0:2785; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm1 = [0,3,4,0,4,2,0,1]2786; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22787; CHECK-NEXT: vcmpeqpd %zmm2, %zmm0, %k12788; CHECK-NEXT: vpermpd (%rdi), %zmm1, %zmm0 {%k1} {z}2789; CHECK-NEXT: retq2790 %vec = load <8 x double>, ptr %vp2791 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 3, i32 4, i32 0, i32 4, i32 2, i32 0, i32 1>2792 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2793 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer2794 ret <8 x double> %res2795}2796 2797define <8 x double> @test_masked_8xdouble_perm_imm_mem_mask1(ptr %vp, <8 x double> %vec2, <8 x double> %mask) {2798; CHECK-LABEL: test_masked_8xdouble_perm_imm_mem_mask1:2799; CHECK: # %bb.0:2800; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22801; CHECK-NEXT: vcmpeqpd %zmm2, %zmm1, %k12802; CHECK-NEXT: vpermpd {{.*#+}} zmm0 {%k1} = mem[0,2,0,3,4,6,4,7]2803; CHECK-NEXT: retq2804 %vec = load <8 x double>, ptr %vp2805 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 2, i32 0, i32 3, i32 4, i32 6, i32 4, i32 7>2806 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2807 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec22808 ret <8 x double> %res2809}2810 2811define <8 x double> @test_masked_z_8xdouble_perm_imm_mem_mask1(ptr %vp, <8 x double> %mask) {2812; CHECK-LABEL: test_masked_z_8xdouble_perm_imm_mem_mask1:2813; CHECK: # %bb.0:2814; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm12815; CHECK-NEXT: vcmpeqpd %zmm1, %zmm0, %k12816; CHECK-NEXT: vpermpd {{.*#+}} zmm0 {%k1} {z} = mem[0,2,0,3,4,6,4,7]2817; CHECK-NEXT: retq2818 %vec = load <8 x double>, ptr %vp2819 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 2, i32 0, i32 3, i32 4, i32 6, i32 4, i32 7>2820 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2821 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer2822 ret <8 x double> %res2823}2824 2825define <8 x double> @test_masked_8xdouble_perm_mem_mask2(ptr %vp, <8 x double> %vec2, <8 x double> %mask) {2826; CHECK-LABEL: test_masked_8xdouble_perm_mem_mask2:2827; CHECK: # %bb.0:2828; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm2 = [6,7,2,7,7,6,2,5]2829; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm32830; CHECK-NEXT: vcmpeqpd %zmm3, %zmm1, %k12831; CHECK-NEXT: vpermpd (%rdi), %zmm2, %zmm0 {%k1}2832; CHECK-NEXT: retq2833 %vec = load <8 x double>, ptr %vp2834 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 6, i32 7, i32 2, i32 7, i32 7, i32 6, i32 2, i32 5>2835 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2836 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec22837 ret <8 x double> %res2838}2839 2840define <8 x double> @test_masked_z_8xdouble_perm_mem_mask2(ptr %vp, <8 x double> %mask) {2841; CHECK-LABEL: test_masked_z_8xdouble_perm_mem_mask2:2842; CHECK: # %bb.0:2843; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm1 = [6,7,2,7,7,6,2,5]2844; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22845; CHECK-NEXT: vcmpeqpd %zmm2, %zmm0, %k12846; CHECK-NEXT: vpermpd (%rdi), %zmm1, %zmm0 {%k1} {z}2847; CHECK-NEXT: retq2848 %vec = load <8 x double>, ptr %vp2849 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 6, i32 7, i32 2, i32 7, i32 7, i32 6, i32 2, i32 5>2850 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2851 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer2852 ret <8 x double> %res2853}2854 2855define <8 x double> @test_8xdouble_perm_imm_mem_mask3(ptr %vp) {2856; CHECK-LABEL: test_8xdouble_perm_imm_mem_mask3:2857; CHECK: # %bb.0:2858; CHECK-NEXT: vpermpd {{.*#+}} zmm0 = mem[2,1,1,0,6,5,5,4]2859; CHECK-NEXT: retq2860 %vec = load <8 x double>, ptr %vp2861 %res = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 2, i32 1, i32 1, i32 0, i32 6, i32 5, i32 5, i32 4>2862 ret <8 x double> %res2863}2864define <8 x double> @test_masked_8xdouble_perm_imm_mem_mask3(ptr %vp, <8 x double> %vec2, <8 x double> %mask) {2865; CHECK-LABEL: test_masked_8xdouble_perm_imm_mem_mask3:2866; CHECK: # %bb.0:2867; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22868; CHECK-NEXT: vcmpeqpd %zmm2, %zmm1, %k12869; CHECK-NEXT: vpermpd {{.*#+}} zmm0 {%k1} = mem[2,1,1,0,6,5,5,4]2870; CHECK-NEXT: retq2871 %vec = load <8 x double>, ptr %vp2872 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 2, i32 1, i32 1, i32 0, i32 6, i32 5, i32 5, i32 4>2873 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2874 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec22875 ret <8 x double> %res2876}2877 2878define <8 x double> @test_masked_z_8xdouble_perm_imm_mem_mask3(ptr %vp, <8 x double> %mask) {2879; CHECK-LABEL: test_masked_z_8xdouble_perm_imm_mem_mask3:2880; CHECK: # %bb.0:2881; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm12882; CHECK-NEXT: vcmpeqpd %zmm1, %zmm0, %k12883; CHECK-NEXT: vpermpd {{.*#+}} zmm0 {%k1} {z} = mem[2,1,1,0,6,5,5,4]2884; CHECK-NEXT: retq2885 %vec = load <8 x double>, ptr %vp2886 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 2, i32 1, i32 1, i32 0, i32 6, i32 5, i32 5, i32 4>2887 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2888 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer2889 ret <8 x double> %res2890}2891 2892define <8 x double> @test_masked_8xdouble_perm_mem_mask4(ptr %vp, <8 x double> %vec2, <8 x double> %mask) {2893; CHECK-LABEL: test_masked_8xdouble_perm_mem_mask4:2894; CHECK: # %bb.0:2895; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm2 = [1,1,3,5,6,0,6,0]2896; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm32897; CHECK-NEXT: vcmpeqpd %zmm3, %zmm1, %k12898; CHECK-NEXT: vpermpd (%rdi), %zmm2, %zmm0 {%k1}2899; CHECK-NEXT: retq2900 %vec = load <8 x double>, ptr %vp2901 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 1, i32 1, i32 3, i32 5, i32 6, i32 0, i32 6, i32 0>2902 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2903 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec22904 ret <8 x double> %res2905}2906 2907define <8 x double> @test_masked_z_8xdouble_perm_mem_mask4(ptr %vp, <8 x double> %mask) {2908; CHECK-LABEL: test_masked_z_8xdouble_perm_mem_mask4:2909; CHECK: # %bb.0:2910; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm1 = [1,1,3,5,6,0,6,0]2911; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22912; CHECK-NEXT: vcmpeqpd %zmm2, %zmm0, %k12913; CHECK-NEXT: vpermpd (%rdi), %zmm1, %zmm0 {%k1} {z}2914; CHECK-NEXT: retq2915 %vec = load <8 x double>, ptr %vp2916 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 1, i32 1, i32 3, i32 5, i32 6, i32 0, i32 6, i32 0>2917 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2918 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer2919 ret <8 x double> %res2920}2921 2922define <8 x double> @test_masked_8xdouble_perm_imm_mem_mask5(ptr %vp, <8 x double> %vec2, <8 x double> %mask) {2923; CHECK-LABEL: test_masked_8xdouble_perm_imm_mem_mask5:2924; CHECK: # %bb.0:2925; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22926; CHECK-NEXT: vcmpeqpd %zmm2, %zmm1, %k12927; CHECK-NEXT: vpermpd {{.*#+}} zmm0 {%k1} = mem[2,2,2,3,6,6,6,7]2928; CHECK-NEXT: retq2929 %vec = load <8 x double>, ptr %vp2930 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 2, i32 2, i32 2, i32 3, i32 6, i32 6, i32 6, i32 7>2931 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2932 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec22933 ret <8 x double> %res2934}2935 2936define <8 x double> @test_masked_z_8xdouble_perm_imm_mem_mask5(ptr %vp, <8 x double> %mask) {2937; CHECK-LABEL: test_masked_z_8xdouble_perm_imm_mem_mask5:2938; CHECK: # %bb.0:2939; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm12940; CHECK-NEXT: vcmpeqpd %zmm1, %zmm0, %k12941; CHECK-NEXT: vpermpd {{.*#+}} zmm0 {%k1} {z} = mem[2,2,2,3,6,6,6,7]2942; CHECK-NEXT: retq2943 %vec = load <8 x double>, ptr %vp2944 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 2, i32 2, i32 2, i32 3, i32 6, i32 6, i32 6, i32 7>2945 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2946 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer2947 ret <8 x double> %res2948}2949 2950define <8 x double> @test_8xdouble_perm_mem_mask6(ptr %vp) {2951; CHECK-LABEL: test_8xdouble_perm_mem_mask6:2952; CHECK: # %bb.0:2953; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm0 = [2,4,0,4,6,1,2,5]2954; CHECK-NEXT: vpermpd (%rdi), %zmm0, %zmm02955; CHECK-NEXT: retq2956 %vec = load <8 x double>, ptr %vp2957 %res = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 2, i32 4, i32 0, i32 4, i32 6, i32 1, i32 2, i32 5>2958 ret <8 x double> %res2959}2960define <8 x double> @test_masked_8xdouble_perm_mem_mask6(ptr %vp, <8 x double> %vec2, <8 x double> %mask) {2961; CHECK-LABEL: test_masked_8xdouble_perm_mem_mask6:2962; CHECK: # %bb.0:2963; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm2 = [2,4,0,4,6,1,2,5]2964; CHECK-NEXT: vxorpd %xmm3, %xmm3, %xmm32965; CHECK-NEXT: vcmpeqpd %zmm3, %zmm1, %k12966; CHECK-NEXT: vpermpd (%rdi), %zmm2, %zmm0 {%k1}2967; CHECK-NEXT: retq2968 %vec = load <8 x double>, ptr %vp2969 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 2, i32 4, i32 0, i32 4, i32 6, i32 1, i32 2, i32 5>2970 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2971 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec22972 ret <8 x double> %res2973}2974 2975define <8 x double> @test_masked_z_8xdouble_perm_mem_mask6(ptr %vp, <8 x double> %mask) {2976; CHECK-LABEL: test_masked_z_8xdouble_perm_mem_mask6:2977; CHECK: # %bb.0:2978; CHECK-NEXT: vpmovsxbq {{.*#+}} zmm1 = [2,4,0,4,6,1,2,5]2979; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22980; CHECK-NEXT: vcmpeqpd %zmm2, %zmm0, %k12981; CHECK-NEXT: vpermpd (%rdi), %zmm1, %zmm0 {%k1} {z}2982; CHECK-NEXT: retq2983 %vec = load <8 x double>, ptr %vp2984 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 2, i32 4, i32 0, i32 4, i32 6, i32 1, i32 2, i32 5>2985 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer2986 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer2987 ret <8 x double> %res2988}2989 2990define <8 x double> @test_masked_8xdouble_perm_imm_mem_mask7(ptr %vp, <8 x double> %vec2, <8 x double> %mask) {2991; CHECK-LABEL: test_masked_8xdouble_perm_imm_mem_mask7:2992; CHECK: # %bb.0:2993; CHECK-NEXT: vxorpd %xmm2, %xmm2, %xmm22994; CHECK-NEXT: vcmpeqpd %zmm2, %zmm1, %k12995; CHECK-NEXT: vpermpd {{.*#+}} zmm0 {%k1} = mem[0,3,2,0,4,7,6,4]2996; CHECK-NEXT: retq2997 %vec = load <8 x double>, ptr %vp2998 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 3, i32 2, i32 0, i32 4, i32 7, i32 6, i32 4>2999 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer3000 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> %vec23001 ret <8 x double> %res3002}3003 3004define <8 x double> @test_masked_z_8xdouble_perm_imm_mem_mask7(ptr %vp, <8 x double> %mask) {3005; CHECK-LABEL: test_masked_z_8xdouble_perm_imm_mem_mask7:3006; CHECK: # %bb.0:3007; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm13008; CHECK-NEXT: vcmpeqpd %zmm1, %zmm0, %k13009; CHECK-NEXT: vpermpd {{.*#+}} zmm0 {%k1} {z} = mem[0,3,2,0,4,7,6,4]3010; CHECK-NEXT: retq3011 %vec = load <8 x double>, ptr %vp3012 %shuf = shufflevector <8 x double> %vec, <8 x double> undef, <8 x i32> <i32 0, i32 3, i32 2, i32 0, i32 4, i32 7, i32 6, i32 4>3013 %cmp = fcmp oeq <8 x double> %mask, zeroinitializer3014 %res = select <8 x i1> %cmp, <8 x double> %shuf, <8 x double> zeroinitializer3015 ret <8 x double> %res3016}3017 3018