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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512bw %s -o - | FileCheck %s3 4define <16 x i8> @test_16xi8_perm_mask0(<16 x i8> %vec) {5; CHECK-LABEL: test_16xi8_perm_mask0:6; CHECK:       # %bb.0:7; CHECK-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[8,6,12,4,7,9,14,8,4,12,9,4,14,15,12,14]8; CHECK-NEXT:    retq9  %res = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 8, i32 6, i32 12, i32 4, i32 7, i32 9, i32 14, i32 8, i32 4, i32 12, i32 9, i32 4, i32 14, i32 15, i32 12, i32 14>10  ret <16 x i8> %res11}12define <16 x i8> @test_masked_16xi8_perm_mask0(<16 x i8> %vec, <16 x i8> %vec2, <16 x i8> %mask) {13; CHECK-LABEL: test_masked_16xi8_perm_mask0:14; CHECK:       # %bb.0:15; CHECK-NEXT:    vptestnmb %xmm2, %xmm2, %k116; CHECK-NEXT:    vpshufb {{.*#+}} xmm1 {%k1} = xmm0[8,6,12,4,7,9,14,8,4,12,9,4,14,15,12,14]17; CHECK-NEXT:    vmovdqa %xmm1, %xmm018; CHECK-NEXT:    retq19  %shuf = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 8, i32 6, i32 12, i32 4, i32 7, i32 9, i32 14, i32 8, i32 4, i32 12, i32 9, i32 4, i32 14, i32 15, i32 12, i32 14>20  %cmp = icmp eq <16 x i8> %mask, zeroinitializer21  %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> %vec222  ret <16 x i8> %res23}24 25define <16 x i8> @test_masked_z_16xi8_perm_mask0(<16 x i8> %vec, <16 x i8> %mask) {26; CHECK-LABEL: test_masked_z_16xi8_perm_mask0:27; CHECK:       # %bb.0:28; CHECK-NEXT:    vptestnmb %xmm1, %xmm1, %k129; CHECK-NEXT:    vpshufb {{.*#+}} xmm0 {%k1} {z} = xmm0[8,6,12,4,7,9,14,8,4,12,9,4,14,15,12,14]30; CHECK-NEXT:    retq31  %shuf = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 8, i32 6, i32 12, i32 4, i32 7, i32 9, i32 14, i32 8, i32 4, i32 12, i32 9, i32 4, i32 14, i32 15, i32 12, i32 14>32  %cmp = icmp eq <16 x i8> %mask, zeroinitializer33  %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> zeroinitializer34  ret <16 x i8> %res35}36define <16 x i8> @test_masked_16xi8_perm_mask1(<16 x i8> %vec, <16 x i8> %vec2, <16 x i8> %mask) {37; CHECK-LABEL: test_masked_16xi8_perm_mask1:38; CHECK:       # %bb.0:39; CHECK-NEXT:    vptestnmb %xmm2, %xmm2, %k140; CHECK-NEXT:    vpshufb {{.*#+}} xmm1 {%k1} = xmm0[4,11,14,10,7,1,6,9,14,15,7,13,4,12,8,0]41; CHECK-NEXT:    vmovdqa %xmm1, %xmm042; CHECK-NEXT:    retq43  %shuf = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 4, i32 11, i32 14, i32 10, i32 7, i32 1, i32 6, i32 9, i32 14, i32 15, i32 7, i32 13, i32 4, i32 12, i32 8, i32 0>44  %cmp = icmp eq <16 x i8> %mask, zeroinitializer45  %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> %vec246  ret <16 x i8> %res47}48 49define <16 x i8> @test_masked_z_16xi8_perm_mask1(<16 x i8> %vec, <16 x i8> %mask) {50; CHECK-LABEL: test_masked_z_16xi8_perm_mask1:51; CHECK:       # %bb.0:52; CHECK-NEXT:    vptestnmb %xmm1, %xmm1, %k153; CHECK-NEXT:    vpshufb {{.*#+}} xmm0 {%k1} {z} = xmm0[4,11,14,10,7,1,6,9,14,15,7,13,4,12,8,0]54; CHECK-NEXT:    retq55  %shuf = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 4, i32 11, i32 14, i32 10, i32 7, i32 1, i32 6, i32 9, i32 14, i32 15, i32 7, i32 13, i32 4, i32 12, i32 8, i32 0>56  %cmp = icmp eq <16 x i8> %mask, zeroinitializer57  %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> zeroinitializer58  ret <16 x i8> %res59}60define <16 x i8> @test_masked_16xi8_perm_mask2(<16 x i8> %vec, <16 x i8> %vec2, <16 x i8> %mask) {61; CHECK-LABEL: test_masked_16xi8_perm_mask2:62; CHECK:       # %bb.0:63; CHECK-NEXT:    vptestnmb %xmm2, %xmm2, %k164; CHECK-NEXT:    vpshufb {{.*#+}} xmm1 {%k1} = xmm0[11,6,13,10,0,7,13,3,5,13,3,9,3,15,12,7]65; CHECK-NEXT:    vmovdqa %xmm1, %xmm066; CHECK-NEXT:    retq67  %shuf = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 11, i32 6, i32 13, i32 10, i32 0, i32 7, i32 13, i32 3, i32 5, i32 13, i32 3, i32 9, i32 3, i32 15, i32 12, i32 7>68  %cmp = icmp eq <16 x i8> %mask, zeroinitializer69  %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> %vec270  ret <16 x i8> %res71}72 73define <16 x i8> @test_masked_z_16xi8_perm_mask2(<16 x i8> %vec, <16 x i8> %mask) {74; CHECK-LABEL: test_masked_z_16xi8_perm_mask2:75; CHECK:       # %bb.0:76; CHECK-NEXT:    vptestnmb %xmm1, %xmm1, %k177; CHECK-NEXT:    vpshufb {{.*#+}} xmm0 {%k1} {z} = xmm0[11,6,13,10,0,7,13,3,5,13,3,9,3,15,12,7]78; CHECK-NEXT:    retq79  %shuf = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 11, i32 6, i32 13, i32 10, i32 0, i32 7, i32 13, i32 3, i32 5, i32 13, i32 3, i32 9, i32 3, i32 15, i32 12, i32 7>80  %cmp = icmp eq <16 x i8> %mask, zeroinitializer81  %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> zeroinitializer82  ret <16 x i8> %res83}84define <16 x i8> @test_16xi8_perm_mask3(<16 x i8> %vec) {85; CHECK-LABEL: test_16xi8_perm_mask3:86; CHECK:       # %bb.0:87; CHECK-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[1,5,8,14,1,8,11,8,13,8,15,9,9,7,9,6]88; CHECK-NEXT:    retq89  %res = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 1, i32 5, i32 8, i32 14, i32 1, i32 8, i32 11, i32 8, i32 13, i32 8, i32 15, i32 9, i32 9, i32 7, i32 9, i32 6>90  ret <16 x i8> %res91}92define <16 x i8> @test_masked_16xi8_perm_mask3(<16 x i8> %vec, <16 x i8> %vec2, <16 x i8> %mask) {93; CHECK-LABEL: test_masked_16xi8_perm_mask3:94; CHECK:       # %bb.0:95; CHECK-NEXT:    vptestnmb %xmm2, %xmm2, %k196; CHECK-NEXT:    vpshufb {{.*#+}} xmm1 {%k1} = xmm0[1,5,8,14,1,8,11,8,13,8,15,9,9,7,9,6]97; CHECK-NEXT:    vmovdqa %xmm1, %xmm098; CHECK-NEXT:    retq99  %shuf = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 1, i32 5, i32 8, i32 14, i32 1, i32 8, i32 11, i32 8, i32 13, i32 8, i32 15, i32 9, i32 9, i32 7, i32 9, i32 6>100  %cmp = icmp eq <16 x i8> %mask, zeroinitializer101  %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> %vec2102  ret <16 x i8> %res103}104 105define <16 x i8> @test_masked_z_16xi8_perm_mask3(<16 x i8> %vec, <16 x i8> %mask) {106; CHECK-LABEL: test_masked_z_16xi8_perm_mask3:107; CHECK:       # %bb.0:108; CHECK-NEXT:    vptestnmb %xmm1, %xmm1, %k1109; CHECK-NEXT:    vpshufb {{.*#+}} xmm0 {%k1} {z} = xmm0[1,5,8,14,1,8,11,8,13,8,15,9,9,7,9,6]110; CHECK-NEXT:    retq111  %shuf = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 1, i32 5, i32 8, i32 14, i32 1, i32 8, i32 11, i32 8, i32 13, i32 8, i32 15, i32 9, i32 9, i32 7, i32 9, i32 6>112  %cmp = icmp eq <16 x i8> %mask, zeroinitializer113  %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> zeroinitializer114  ret <16 x i8> %res115}116define <16 x i8> @test_16xi8_perm_mem_mask0(ptr %vp) {117; CHECK-LABEL: test_16xi8_perm_mem_mask0:118; CHECK:       # %bb.0:119; CHECK-NEXT:    vmovdqa (%rdi), %xmm0120; CHECK-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[9,10,7,1,12,14,14,13,14,14,8,6,11,4,12,13]121; CHECK-NEXT:    retq122  %vec = load <16 x i8>, ptr %vp123  %res = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 9, i32 10, i32 7, i32 1, i32 12, i32 14, i32 14, i32 13, i32 14, i32 14, i32 8, i32 6, i32 11, i32 4, i32 12, i32 13>124  ret <16 x i8> %res125}126define <16 x i8> @test_masked_16xi8_perm_mem_mask0(ptr %vp, <16 x i8> %vec2, <16 x i8> %mask) {127; CHECK-LABEL: test_masked_16xi8_perm_mem_mask0:128; CHECK:       # %bb.0:129; CHECK-NEXT:    vmovdqa (%rdi), %xmm2130; CHECK-NEXT:    vptestnmb %xmm1, %xmm1, %k1131; CHECK-NEXT:    vpshufb {{.*#+}} xmm0 {%k1} = xmm2[9,10,7,1,12,14,14,13,14,14,8,6,11,4,12,13]132; CHECK-NEXT:    retq133  %vec = load <16 x i8>, ptr %vp134  %shuf = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 9, i32 10, i32 7, i32 1, i32 12, i32 14, i32 14, i32 13, i32 14, i32 14, i32 8, i32 6, i32 11, i32 4, i32 12, i32 13>135  %cmp = icmp eq <16 x i8> %mask, zeroinitializer136  %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> %vec2137  ret <16 x i8> %res138}139 140define <16 x i8> @test_masked_z_16xi8_perm_mem_mask0(ptr %vp, <16 x i8> %mask) {141; CHECK-LABEL: test_masked_z_16xi8_perm_mem_mask0:142; CHECK:       # %bb.0:143; CHECK-NEXT:    vmovdqa (%rdi), %xmm1144; CHECK-NEXT:    vptestnmb %xmm0, %xmm0, %k1145; CHECK-NEXT:    vpshufb {{.*#+}} xmm0 {%k1} {z} = xmm1[9,10,7,1,12,14,14,13,14,14,8,6,11,4,12,13]146; CHECK-NEXT:    retq147  %vec = load <16 x i8>, ptr %vp148  %shuf = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 9, i32 10, i32 7, i32 1, i32 12, i32 14, i32 14, i32 13, i32 14, i32 14, i32 8, i32 6, i32 11, i32 4, i32 12, i32 13>149  %cmp = icmp eq <16 x i8> %mask, zeroinitializer150  %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> zeroinitializer151  ret <16 x i8> %res152}153 154define <16 x i8> @test_masked_16xi8_perm_mem_mask1(ptr %vp, <16 x i8> %vec2, <16 x i8> %mask) {155; CHECK-LABEL: test_masked_16xi8_perm_mem_mask1:156; CHECK:       # %bb.0:157; CHECK-NEXT:    vmovdqa (%rdi), %xmm2158; CHECK-NEXT:    vptestnmb %xmm1, %xmm1, %k1159; CHECK-NEXT:    vpshufb {{.*#+}} xmm0 {%k1} = xmm2[14,9,15,9,7,10,15,14,12,1,9,7,10,13,3,11]160; CHECK-NEXT:    retq161  %vec = load <16 x i8>, ptr %vp162  %shuf = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 14, i32 9, i32 15, i32 9, i32 7, i32 10, i32 15, i32 14, i32 12, i32 1, i32 9, i32 7, i32 10, i32 13, i32 3, i32 11>163  %cmp = icmp eq <16 x i8> %mask, zeroinitializer164  %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> %vec2165  ret <16 x i8> %res166}167 168define <16 x i8> @test_masked_z_16xi8_perm_mem_mask1(ptr %vp, <16 x i8> %mask) {169; CHECK-LABEL: test_masked_z_16xi8_perm_mem_mask1:170; CHECK:       # %bb.0:171; CHECK-NEXT:    vmovdqa (%rdi), %xmm1172; CHECK-NEXT:    vptestnmb %xmm0, %xmm0, %k1173; CHECK-NEXT:    vpshufb {{.*#+}} xmm0 {%k1} {z} = xmm1[14,9,15,9,7,10,15,14,12,1,9,7,10,13,3,11]174; CHECK-NEXT:    retq175  %vec = load <16 x i8>, ptr %vp176  %shuf = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 14, i32 9, i32 15, i32 9, i32 7, i32 10, i32 15, i32 14, i32 12, i32 1, i32 9, i32 7, i32 10, i32 13, i32 3, i32 11>177  %cmp = icmp eq <16 x i8> %mask, zeroinitializer178  %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> zeroinitializer179  ret <16 x i8> %res180}181 182define <16 x i8> @test_masked_16xi8_perm_mem_mask2(ptr %vp, <16 x i8> %vec2, <16 x i8> %mask) {183; CHECK-LABEL: test_masked_16xi8_perm_mem_mask2:184; CHECK:       # %bb.0:185; CHECK-NEXT:    vmovdqa (%rdi), %xmm2186; CHECK-NEXT:    vptestnmb %xmm1, %xmm1, %k1187; CHECK-NEXT:    vpshufb {{.*#+}} xmm0 {%k1} = xmm2[1,3,12,5,13,1,2,11,0,9,14,8,10,0,10,9]188; CHECK-NEXT:    retq189  %vec = load <16 x i8>, ptr %vp190  %shuf = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 12, i32 5, i32 13, i32 1, i32 2, i32 11, i32 0, i32 9, i32 14, i32 8, i32 10, i32 0, i32 10, i32 9>191  %cmp = icmp eq <16 x i8> %mask, zeroinitializer192  %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> %vec2193  ret <16 x i8> %res194}195 196define <16 x i8> @test_masked_z_16xi8_perm_mem_mask2(ptr %vp, <16 x i8> %mask) {197; CHECK-LABEL: test_masked_z_16xi8_perm_mem_mask2:198; CHECK:       # %bb.0:199; CHECK-NEXT:    vmovdqa (%rdi), %xmm1200; CHECK-NEXT:    vptestnmb %xmm0, %xmm0, %k1201; CHECK-NEXT:    vpshufb {{.*#+}} xmm0 {%k1} {z} = xmm1[1,3,12,5,13,1,2,11,0,9,14,8,10,0,10,9]202; CHECK-NEXT:    retq203  %vec = load <16 x i8>, ptr %vp204  %shuf = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 12, i32 5, i32 13, i32 1, i32 2, i32 11, i32 0, i32 9, i32 14, i32 8, i32 10, i32 0, i32 10, i32 9>205  %cmp = icmp eq <16 x i8> %mask, zeroinitializer206  %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> zeroinitializer207  ret <16 x i8> %res208}209 210define <16 x i8> @test_16xi8_perm_mem_mask3(ptr %vp) {211; CHECK-LABEL: test_16xi8_perm_mem_mask3:212; CHECK:       # %bb.0:213; CHECK-NEXT:    vmovdqa (%rdi), %xmm0214; CHECK-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[9,6,5,15,0,0,15,2,1,3,12,14,0,6,1,4]215; CHECK-NEXT:    retq216  %vec = load <16 x i8>, ptr %vp217  %res = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 9, i32 6, i32 5, i32 15, i32 0, i32 0, i32 15, i32 2, i32 1, i32 3, i32 12, i32 14, i32 0, i32 6, i32 1, i32 4>218  ret <16 x i8> %res219}220define <16 x i8> @test_masked_16xi8_perm_mem_mask3(ptr %vp, <16 x i8> %vec2, <16 x i8> %mask) {221; CHECK-LABEL: test_masked_16xi8_perm_mem_mask3:222; CHECK:       # %bb.0:223; CHECK-NEXT:    vmovdqa (%rdi), %xmm2224; CHECK-NEXT:    vptestnmb %xmm1, %xmm1, %k1225; CHECK-NEXT:    vpshufb {{.*#+}} xmm0 {%k1} = xmm2[9,6,5,15,0,0,15,2,1,3,12,14,0,6,1,4]226; CHECK-NEXT:    retq227  %vec = load <16 x i8>, ptr %vp228  %shuf = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 9, i32 6, i32 5, i32 15, i32 0, i32 0, i32 15, i32 2, i32 1, i32 3, i32 12, i32 14, i32 0, i32 6, i32 1, i32 4>229  %cmp = icmp eq <16 x i8> %mask, zeroinitializer230  %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> %vec2231  ret <16 x i8> %res232}233 234define <16 x i8> @test_masked_z_16xi8_perm_mem_mask3(ptr %vp, <16 x i8> %mask) {235; CHECK-LABEL: test_masked_z_16xi8_perm_mem_mask3:236; CHECK:       # %bb.0:237; CHECK-NEXT:    vmovdqa (%rdi), %xmm1238; CHECK-NEXT:    vptestnmb %xmm0, %xmm0, %k1239; CHECK-NEXT:    vpshufb {{.*#+}} xmm0 {%k1} {z} = xmm1[9,6,5,15,0,0,15,2,1,3,12,14,0,6,1,4]240; CHECK-NEXT:    retq241  %vec = load <16 x i8>, ptr %vp242  %shuf = shufflevector <16 x i8> %vec, <16 x i8> undef, <16 x i32> <i32 9, i32 6, i32 5, i32 15, i32 0, i32 0, i32 15, i32 2, i32 1, i32 3, i32 12, i32 14, i32 0, i32 6, i32 1, i32 4>243  %cmp = icmp eq <16 x i8> %mask, zeroinitializer244  %res = select <16 x i1> %cmp, <16 x i8> %shuf, <16 x i8> zeroinitializer245  ret <16 x i8> %res246}247 248define <32 x i8> @test_32xi8_perm_mask0(<32 x i8> %vec) {249; CHECK-LABEL: test_32xi8_perm_mask0:250; CHECK:       # %bb.0:251; CHECK-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[8,0,1,15,3,5,11,13,14,2,10,15,0,10,13,5,20,25,23,18,23,22,25,24,20,21,29,20,24,16,27,21]252; CHECK-NEXT:    retq253  %res = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 8, i32 0, i32 1, i32 15, i32 3, i32 5, i32 11, i32 13, i32 14, i32 2, i32 10, i32 15, i32 0, i32 10, i32 13, i32 5, i32 20, i32 25, i32 23, i32 18, i32 23, i32 22, i32 25, i32 24, i32 20, i32 21, i32 29, i32 20, i32 24, i32 16, i32 27, i32 21>254  ret <32 x i8> %res255}256define <32 x i8> @test_masked_32xi8_perm_mask0(<32 x i8> %vec, <32 x i8> %vec2, <32 x i8> %mask) {257; CHECK-LABEL: test_masked_32xi8_perm_mask0:258; CHECK:       # %bb.0:259; CHECK-NEXT:    vptestnmb %ymm2, %ymm2, %k1260; CHECK-NEXT:    vpshufb {{.*#+}} ymm1 {%k1} = ymm0[8,0,1,15,3,5,11,13,14,2,10,15,0,10,13,5,20,25,23,18,23,22,25,24,20,21,29,20,24,16,27,21]261; CHECK-NEXT:    vmovdqa %ymm1, %ymm0262; CHECK-NEXT:    retq263  %shuf = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 8, i32 0, i32 1, i32 15, i32 3, i32 5, i32 11, i32 13, i32 14, i32 2, i32 10, i32 15, i32 0, i32 10, i32 13, i32 5, i32 20, i32 25, i32 23, i32 18, i32 23, i32 22, i32 25, i32 24, i32 20, i32 21, i32 29, i32 20, i32 24, i32 16, i32 27, i32 21>264  %cmp = icmp eq <32 x i8> %mask, zeroinitializer265  %res = select <32 x i1> %cmp, <32 x i8> %shuf, <32 x i8> %vec2266  ret <32 x i8> %res267}268 269define <32 x i8> @test_masked_z_32xi8_perm_mask0(<32 x i8> %vec, <32 x i8> %mask) {270; CHECK-LABEL: test_masked_z_32xi8_perm_mask0:271; CHECK:       # %bb.0:272; CHECK-NEXT:    vptestnmb %ymm1, %ymm1, %k1273; CHECK-NEXT:    vpshufb {{.*#+}} ymm0 {%k1} {z} = ymm0[8,0,1,15,3,5,11,13,14,2,10,15,0,10,13,5,20,25,23,18,23,22,25,24,20,21,29,20,24,16,27,21]274; CHECK-NEXT:    retq275  %shuf = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 8, i32 0, i32 1, i32 15, i32 3, i32 5, i32 11, i32 13, i32 14, i32 2, i32 10, i32 15, i32 0, i32 10, i32 13, i32 5, i32 20, i32 25, i32 23, i32 18, i32 23, i32 22, i32 25, i32 24, i32 20, i32 21, i32 29, i32 20, i32 24, i32 16, i32 27, i32 21>276  %cmp = icmp eq <32 x i8> %mask, zeroinitializer277  %res = select <32 x i1> %cmp, <32 x i8> %shuf, <32 x i8> zeroinitializer278  ret <32 x i8> %res279}280define <32 x i8> @test_masked_32xi8_perm_mask1(<32 x i8> %vec, <32 x i8> %vec2, <32 x i8> %mask) {281; CHECK-LABEL: test_masked_32xi8_perm_mask1:282; CHECK:       # %bb.0:283; CHECK-NEXT:    vptestnmb %ymm2, %ymm2, %k1284; CHECK-NEXT:    vpshufb {{.*#+}} ymm1 {%k1} = ymm0[0,4,3,15,5,4,5,15,10,9,11,6,6,10,0,3,21,19,26,22,30,25,22,22,27,22,26,16,23,20,18,24]285; CHECK-NEXT:    vmovdqa %ymm1, %ymm0286; CHECK-NEXT:    retq287  %shuf = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 0, i32 4, i32 3, i32 15, i32 5, i32 4, i32 5, i32 15, i32 10, i32 9, i32 11, i32 6, i32 6, i32 10, i32 0, i32 3, i32 21, i32 19, i32 26, i32 22, i32 30, i32 25, i32 22, i32 22, i32 27, i32 22, i32 26, i32 16, i32 23, i32 20, i32 18, i32 24>288  %cmp = icmp eq <32 x i8> %mask, zeroinitializer289  %res = select <32 x i1> %cmp, <32 x i8> %shuf, <32 x i8> %vec2290  ret <32 x i8> %res291}292 293define <32 x i8> @test_masked_z_32xi8_perm_mask1(<32 x i8> %vec, <32 x i8> %mask) {294; CHECK-LABEL: test_masked_z_32xi8_perm_mask1:295; CHECK:       # %bb.0:296; CHECK-NEXT:    vptestnmb %ymm1, %ymm1, %k1297; CHECK-NEXT:    vpshufb {{.*#+}} ymm0 {%k1} {z} = ymm0[0,4,3,15,5,4,5,15,10,9,11,6,6,10,0,3,21,19,26,22,30,25,22,22,27,22,26,16,23,20,18,24]298; CHECK-NEXT:    retq299  %shuf = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 0, i32 4, i32 3, i32 15, i32 5, i32 4, i32 5, i32 15, i32 10, i32 9, i32 11, i32 6, i32 6, i32 10, i32 0, i32 3, i32 21, i32 19, i32 26, i32 22, i32 30, i32 25, i32 22, i32 22, i32 27, i32 22, i32 26, i32 16, i32 23, i32 20, i32 18, i32 24>300  %cmp = icmp eq <32 x i8> %mask, zeroinitializer301  %res = select <32 x i1> %cmp, <32 x i8> %shuf, <32 x i8> zeroinitializer302  ret <32 x i8> %res303}304define <32 x i8> @test_masked_32xi8_perm_mask2(<32 x i8> %vec, <32 x i8> %vec2, <32 x i8> %mask) {305; CHECK-LABEL: test_masked_32xi8_perm_mask2:306; CHECK:       # %bb.0:307; CHECK-NEXT:    vptestnmb %ymm2, %ymm2, %k1308; CHECK-NEXT:    vpshufb {{.*#+}} ymm1 {%k1} = ymm0[7,8,12,14,7,4,7,12,14,12,3,15,10,1,11,15,22,26,21,19,27,16,29,24,17,17,26,29,20,31,17,29]309; CHECK-NEXT:    vmovdqa %ymm1, %ymm0310; CHECK-NEXT:    retq311  %shuf = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 7, i32 8, i32 12, i32 14, i32 7, i32 4, i32 7, i32 12, i32 14, i32 12, i32 3, i32 15, i32 10, i32 1, i32 11, i32 15, i32 22, i32 26, i32 21, i32 19, i32 27, i32 16, i32 29, i32 24, i32 17, i32 17, i32 26, i32 29, i32 20, i32 31, i32 17, i32 29>312  %cmp = icmp eq <32 x i8> %mask, zeroinitializer313  %res = select <32 x i1> %cmp, <32 x i8> %shuf, <32 x i8> %vec2314  ret <32 x i8> %res315}316 317define <32 x i8> @test_masked_z_32xi8_perm_mask2(<32 x i8> %vec, <32 x i8> %mask) {318; CHECK-LABEL: test_masked_z_32xi8_perm_mask2:319; CHECK:       # %bb.0:320; CHECK-NEXT:    vptestnmb %ymm1, %ymm1, %k1321; CHECK-NEXT:    vpshufb {{.*#+}} ymm0 {%k1} {z} = ymm0[7,8,12,14,7,4,7,12,14,12,3,15,10,1,11,15,22,26,21,19,27,16,29,24,17,17,26,29,20,31,17,29]322; CHECK-NEXT:    retq323  %shuf = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 7, i32 8, i32 12, i32 14, i32 7, i32 4, i32 7, i32 12, i32 14, i32 12, i32 3, i32 15, i32 10, i32 1, i32 11, i32 15, i32 22, i32 26, i32 21, i32 19, i32 27, i32 16, i32 29, i32 24, i32 17, i32 17, i32 26, i32 29, i32 20, i32 31, i32 17, i32 29>324  %cmp = icmp eq <32 x i8> %mask, zeroinitializer325  %res = select <32 x i1> %cmp, <32 x i8> %shuf, <32 x i8> zeroinitializer326  ret <32 x i8> %res327}328define <32 x i8> @test_32xi8_perm_mask3(<32 x i8> %vec) {329; CHECK-LABEL: test_32xi8_perm_mask3:330; CHECK:       # %bb.0:331; CHECK-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[6,1,4,7,12,13,2,8,10,5,13,4,0,0,10,8,31,31,30,16,27,27,26,27,30,26,21,24,19,25,16,18]332; CHECK-NEXT:    retq333  %res = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 6, i32 1, i32 4, i32 7, i32 12, i32 13, i32 2, i32 8, i32 10, i32 5, i32 13, i32 4, i32 0, i32 0, i32 10, i32 8, i32 31, i32 31, i32 30, i32 16, i32 27, i32 27, i32 26, i32 27, i32 30, i32 26, i32 21, i32 24, i32 19, i32 25, i32 16, i32 18>334  ret <32 x i8> %res335}336define <32 x i8> @test_masked_32xi8_perm_mask3(<32 x i8> %vec, <32 x i8> %vec2, <32 x i8> %mask) {337; CHECK-LABEL: test_masked_32xi8_perm_mask3:338; CHECK:       # %bb.0:339; CHECK-NEXT:    vptestnmb %ymm2, %ymm2, %k1340; CHECK-NEXT:    vpshufb {{.*#+}} ymm1 {%k1} = ymm0[6,1,4,7,12,13,2,8,10,5,13,4,0,0,10,8,31,31,30,16,27,27,26,27,30,26,21,24,19,25,16,18]341; CHECK-NEXT:    vmovdqa %ymm1, %ymm0342; CHECK-NEXT:    retq343  %shuf = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 6, i32 1, i32 4, i32 7, i32 12, i32 13, i32 2, i32 8, i32 10, i32 5, i32 13, i32 4, i32 0, i32 0, i32 10, i32 8, i32 31, i32 31, i32 30, i32 16, i32 27, i32 27, i32 26, i32 27, i32 30, i32 26, i32 21, i32 24, i32 19, i32 25, i32 16, i32 18>344  %cmp = icmp eq <32 x i8> %mask, zeroinitializer345  %res = select <32 x i1> %cmp, <32 x i8> %shuf, <32 x i8> %vec2346  ret <32 x i8> %res347}348 349define <32 x i8> @test_masked_z_32xi8_perm_mask3(<32 x i8> %vec, <32 x i8> %mask) {350; CHECK-LABEL: test_masked_z_32xi8_perm_mask3:351; CHECK:       # %bb.0:352; CHECK-NEXT:    vptestnmb %ymm1, %ymm1, %k1353; CHECK-NEXT:    vpshufb {{.*#+}} ymm0 {%k1} {z} = ymm0[6,1,4,7,12,13,2,8,10,5,13,4,0,0,10,8,31,31,30,16,27,27,26,27,30,26,21,24,19,25,16,18]354; CHECK-NEXT:    retq355  %shuf = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 6, i32 1, i32 4, i32 7, i32 12, i32 13, i32 2, i32 8, i32 10, i32 5, i32 13, i32 4, i32 0, i32 0, i32 10, i32 8, i32 31, i32 31, i32 30, i32 16, i32 27, i32 27, i32 26, i32 27, i32 30, i32 26, i32 21, i32 24, i32 19, i32 25, i32 16, i32 18>356  %cmp = icmp eq <32 x i8> %mask, zeroinitializer357  %res = select <32 x i1> %cmp, <32 x i8> %shuf, <32 x i8> zeroinitializer358  ret <32 x i8> %res359}360define <32 x i8> @test_32xi8_perm_mem_mask0(ptr %vp) {361; CHECK-LABEL: test_32xi8_perm_mem_mask0:362; CHECK:       # %bb.0:363; CHECK-NEXT:    vmovdqa (%rdi), %ymm0364; CHECK-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[9,0,2,15,4,6,8,4,7,3,0,2,8,1,6,5,22,17,30,23,29,31,21,23,27,22,20,27,30,30,26,22]365; CHECK-NEXT:    retq366  %vec = load <32 x i8>, ptr %vp367  %res = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 9, i32 0, i32 2, i32 15, i32 4, i32 6, i32 8, i32 4, i32 7, i32 3, i32 0, i32 2, i32 8, i32 1, i32 6, i32 5, i32 22, i32 17, i32 30, i32 23, i32 29, i32 31, i32 21, i32 23, i32 27, i32 22, i32 20, i32 27, i32 30, i32 30, i32 26, i32 22>368  ret <32 x i8> %res369}370define <32 x i8> @test_masked_32xi8_perm_mem_mask0(ptr %vp, <32 x i8> %vec2, <32 x i8> %mask) {371; CHECK-LABEL: test_masked_32xi8_perm_mem_mask0:372; CHECK:       # %bb.0:373; CHECK-NEXT:    vmovdqa (%rdi), %ymm2374; CHECK-NEXT:    vptestnmb %ymm1, %ymm1, %k1375; CHECK-NEXT:    vpshufb {{.*#+}} ymm0 {%k1} = ymm2[9,0,2,15,4,6,8,4,7,3,0,2,8,1,6,5,22,17,30,23,29,31,21,23,27,22,20,27,30,30,26,22]376; CHECK-NEXT:    retq377  %vec = load <32 x i8>, ptr %vp378  %shuf = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 9, i32 0, i32 2, i32 15, i32 4, i32 6, i32 8, i32 4, i32 7, i32 3, i32 0, i32 2, i32 8, i32 1, i32 6, i32 5, i32 22, i32 17, i32 30, i32 23, i32 29, i32 31, i32 21, i32 23, i32 27, i32 22, i32 20, i32 27, i32 30, i32 30, i32 26, i32 22>379  %cmp = icmp eq <32 x i8> %mask, zeroinitializer380  %res = select <32 x i1> %cmp, <32 x i8> %shuf, <32 x i8> %vec2381  ret <32 x i8> %res382}383 384define <32 x i8> @test_masked_z_32xi8_perm_mem_mask0(ptr %vp, <32 x i8> %mask) {385; CHECK-LABEL: test_masked_z_32xi8_perm_mem_mask0:386; CHECK:       # %bb.0:387; CHECK-NEXT:    vmovdqa (%rdi), %ymm1388; CHECK-NEXT:    vptestnmb %ymm0, %ymm0, %k1389; CHECK-NEXT:    vpshufb {{.*#+}} ymm0 {%k1} {z} = ymm1[9,0,2,15,4,6,8,4,7,3,0,2,8,1,6,5,22,17,30,23,29,31,21,23,27,22,20,27,30,30,26,22]390; CHECK-NEXT:    retq391  %vec = load <32 x i8>, ptr %vp392  %shuf = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 9, i32 0, i32 2, i32 15, i32 4, i32 6, i32 8, i32 4, i32 7, i32 3, i32 0, i32 2, i32 8, i32 1, i32 6, i32 5, i32 22, i32 17, i32 30, i32 23, i32 29, i32 31, i32 21, i32 23, i32 27, i32 22, i32 20, i32 27, i32 30, i32 30, i32 26, i32 22>393  %cmp = icmp eq <32 x i8> %mask, zeroinitializer394  %res = select <32 x i1> %cmp, <32 x i8> %shuf, <32 x i8> zeroinitializer395  ret <32 x i8> %res396}397 398define <32 x i8> @test_masked_32xi8_perm_mem_mask1(ptr %vp, <32 x i8> %vec2, <32 x i8> %mask) {399; CHECK-LABEL: test_masked_32xi8_perm_mem_mask1:400; CHECK:       # %bb.0:401; CHECK-NEXT:    vmovdqa (%rdi), %ymm2402; CHECK-NEXT:    vptestnmb %ymm1, %ymm1, %k1403; CHECK-NEXT:    vpshufb {{.*#+}} ymm0 {%k1} = ymm2[15,10,1,1,11,0,0,6,8,7,7,9,10,6,5,15,20,28,22,21,17,29,27,30,23,26,17,22,19,16,31,19]404; CHECK-NEXT:    retq405  %vec = load <32 x i8>, ptr %vp406  %shuf = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 15, i32 10, i32 1, i32 1, i32 11, i32 0, i32 0, i32 6, i32 8, i32 7, i32 7, i32 9, i32 10, i32 6, i32 5, i32 15, i32 20, i32 28, i32 22, i32 21, i32 17, i32 29, i32 27, i32 30, i32 23, i32 26, i32 17, i32 22, i32 19, i32 16, i32 31, i32 19>407  %cmp = icmp eq <32 x i8> %mask, zeroinitializer408  %res = select <32 x i1> %cmp, <32 x i8> %shuf, <32 x i8> %vec2409  ret <32 x i8> %res410}411 412define <32 x i8> @test_masked_z_32xi8_perm_mem_mask1(ptr %vp, <32 x i8> %mask) {413; CHECK-LABEL: test_masked_z_32xi8_perm_mem_mask1:414; CHECK:       # %bb.0:415; CHECK-NEXT:    vmovdqa (%rdi), %ymm1416; CHECK-NEXT:    vptestnmb %ymm0, %ymm0, %k1417; CHECK-NEXT:    vpshufb {{.*#+}} ymm0 {%k1} {z} = ymm1[15,10,1,1,11,0,0,6,8,7,7,9,10,6,5,15,20,28,22,21,17,29,27,30,23,26,17,22,19,16,31,19]418; CHECK-NEXT:    retq419  %vec = load <32 x i8>, ptr %vp420  %shuf = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 15, i32 10, i32 1, i32 1, i32 11, i32 0, i32 0, i32 6, i32 8, i32 7, i32 7, i32 9, i32 10, i32 6, i32 5, i32 15, i32 20, i32 28, i32 22, i32 21, i32 17, i32 29, i32 27, i32 30, i32 23, i32 26, i32 17, i32 22, i32 19, i32 16, i32 31, i32 19>421  %cmp = icmp eq <32 x i8> %mask, zeroinitializer422  %res = select <32 x i1> %cmp, <32 x i8> %shuf, <32 x i8> zeroinitializer423  ret <32 x i8> %res424}425 426define <32 x i8> @test_masked_32xi8_perm_mem_mask2(ptr %vp, <32 x i8> %vec2, <32 x i8> %mask) {427; CHECK-LABEL: test_masked_32xi8_perm_mem_mask2:428; CHECK:       # %bb.0:429; CHECK-NEXT:    vmovdqa (%rdi), %ymm2430; CHECK-NEXT:    vptestnmb %ymm1, %ymm1, %k1431; CHECK-NEXT:    vpshufb {{.*#+}} ymm0 {%k1} = ymm2[2,3,6,8,2,15,15,2,6,10,14,7,14,5,7,7,26,19,25,19,21,31,30,29,16,18,20,28,29,25,27,28]432; CHECK-NEXT:    retq433  %vec = load <32 x i8>, ptr %vp434  %shuf = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 2, i32 3, i32 6, i32 8, i32 2, i32 15, i32 15, i32 2, i32 6, i32 10, i32 14, i32 7, i32 14, i32 5, i32 7, i32 7, i32 26, i32 19, i32 25, i32 19, i32 21, i32 31, i32 30, i32 29, i32 16, i32 18, i32 20, i32 28, i32 29, i32 25, i32 27, i32 28>435  %cmp = icmp eq <32 x i8> %mask, zeroinitializer436  %res = select <32 x i1> %cmp, <32 x i8> %shuf, <32 x i8> %vec2437  ret <32 x i8> %res438}439 440define <32 x i8> @test_masked_z_32xi8_perm_mem_mask2(ptr %vp, <32 x i8> %mask) {441; CHECK-LABEL: test_masked_z_32xi8_perm_mem_mask2:442; CHECK:       # %bb.0:443; CHECK-NEXT:    vmovdqa (%rdi), %ymm1444; CHECK-NEXT:    vptestnmb %ymm0, %ymm0, %k1445; CHECK-NEXT:    vpshufb {{.*#+}} ymm0 {%k1} {z} = ymm1[2,3,6,8,2,15,15,2,6,10,14,7,14,5,7,7,26,19,25,19,21,31,30,29,16,18,20,28,29,25,27,28]446; CHECK-NEXT:    retq447  %vec = load <32 x i8>, ptr %vp448  %shuf = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 2, i32 3, i32 6, i32 8, i32 2, i32 15, i32 15, i32 2, i32 6, i32 10, i32 14, i32 7, i32 14, i32 5, i32 7, i32 7, i32 26, i32 19, i32 25, i32 19, i32 21, i32 31, i32 30, i32 29, i32 16, i32 18, i32 20, i32 28, i32 29, i32 25, i32 27, i32 28>449  %cmp = icmp eq <32 x i8> %mask, zeroinitializer450  %res = select <32 x i1> %cmp, <32 x i8> %shuf, <32 x i8> zeroinitializer451  ret <32 x i8> %res452}453 454define <32 x i8> @test_32xi8_perm_mem_mask3(ptr %vp) {455; CHECK-LABEL: test_32xi8_perm_mem_mask3:456; CHECK:       # %bb.0:457; CHECK-NEXT:    vmovdqa (%rdi), %ymm0458; CHECK-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[1,1,13,0,3,0,0,13,5,2,2,10,15,8,14,8,25,26,28,28,31,27,30,19,24,25,29,23,28,22,25,29]459; CHECK-NEXT:    retq460  %vec = load <32 x i8>, ptr %vp461  %res = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 1, i32 1, i32 13, i32 0, i32 3, i32 0, i32 0, i32 13, i32 5, i32 2, i32 2, i32 10, i32 15, i32 8, i32 14, i32 8, i32 25, i32 26, i32 28, i32 28, i32 31, i32 27, i32 30, i32 19, i32 24, i32 25, i32 29, i32 23, i32 28, i32 22, i32 25, i32 29>462  ret <32 x i8> %res463}464define <32 x i8> @test_masked_32xi8_perm_mem_mask3(ptr %vp, <32 x i8> %vec2, <32 x i8> %mask) {465; CHECK-LABEL: test_masked_32xi8_perm_mem_mask3:466; CHECK:       # %bb.0:467; CHECK-NEXT:    vmovdqa (%rdi), %ymm2468; CHECK-NEXT:    vptestnmb %ymm1, %ymm1, %k1469; CHECK-NEXT:    vpshufb {{.*#+}} ymm0 {%k1} = ymm2[1,1,13,0,3,0,0,13,5,2,2,10,15,8,14,8,25,26,28,28,31,27,30,19,24,25,29,23,28,22,25,29]470; CHECK-NEXT:    retq471  %vec = load <32 x i8>, ptr %vp472  %shuf = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 1, i32 1, i32 13, i32 0, i32 3, i32 0, i32 0, i32 13, i32 5, i32 2, i32 2, i32 10, i32 15, i32 8, i32 14, i32 8, i32 25, i32 26, i32 28, i32 28, i32 31, i32 27, i32 30, i32 19, i32 24, i32 25, i32 29, i32 23, i32 28, i32 22, i32 25, i32 29>473  %cmp = icmp eq <32 x i8> %mask, zeroinitializer474  %res = select <32 x i1> %cmp, <32 x i8> %shuf, <32 x i8> %vec2475  ret <32 x i8> %res476}477 478define <32 x i8> @test_masked_z_32xi8_perm_mem_mask3(ptr %vp, <32 x i8> %mask) {479; CHECK-LABEL: test_masked_z_32xi8_perm_mem_mask3:480; CHECK:       # %bb.0:481; CHECK-NEXT:    vmovdqa (%rdi), %ymm1482; CHECK-NEXT:    vptestnmb %ymm0, %ymm0, %k1483; CHECK-NEXT:    vpshufb {{.*#+}} ymm0 {%k1} {z} = ymm1[1,1,13,0,3,0,0,13,5,2,2,10,15,8,14,8,25,26,28,28,31,27,30,19,24,25,29,23,28,22,25,29]484; CHECK-NEXT:    retq485  %vec = load <32 x i8>, ptr %vp486  %shuf = shufflevector <32 x i8> %vec, <32 x i8> undef, <32 x i32> <i32 1, i32 1, i32 13, i32 0, i32 3, i32 0, i32 0, i32 13, i32 5, i32 2, i32 2, i32 10, i32 15, i32 8, i32 14, i32 8, i32 25, i32 26, i32 28, i32 28, i32 31, i32 27, i32 30, i32 19, i32 24, i32 25, i32 29, i32 23, i32 28, i32 22, i32 25, i32 29>487  %cmp = icmp eq <32 x i8> %mask, zeroinitializer488  %res = select <32 x i1> %cmp, <32 x i8> %shuf, <32 x i8> zeroinitializer489  ret <32 x i8> %res490}491 492define <64 x i8> @test_64xi8_perm_mask0(<64 x i8> %vec) {493; CHECK-LABEL: test_64xi8_perm_mask0:494; CHECK:       # %bb.0:495; CHECK-NEXT:    vpshufb {{.*#+}} zmm0 = zmm0[8,4,1,13,15,4,6,12,0,10,2,4,13,0,0,6,23,29,27,26,18,31,22,25,22,16,23,18,16,25,26,17,40,37,38,44,39,46,41,39,42,37,33,42,41,44,34,46,60,62,61,58,60,56,60,51,60,55,60,55,60,49,48,62]496; CHECK-NEXT:    retq497  %res = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 8, i32 4, i32 1, i32 13, i32 15, i32 4, i32 6, i32 12, i32 0, i32 10, i32 2, i32 4, i32 13, i32 0, i32 0, i32 6, i32 23, i32 29, i32 27, i32 26, i32 18, i32 31, i32 22, i32 25, i32 22, i32 16, i32 23, i32 18, i32 16, i32 25, i32 26, i32 17, i32 40, i32 37, i32 38, i32 44, i32 39, i32 46, i32 41, i32 39, i32 42, i32 37, i32 33, i32 42, i32 41, i32 44, i32 34, i32 46, i32 60, i32 62, i32 61, i32 58, i32 60, i32 56, i32 60, i32 51, i32 60, i32 55, i32 60, i32 55, i32 60, i32 49, i32 48, i32 62>498  ret <64 x i8> %res499}500define <64 x i8> @test_masked_64xi8_perm_mask0(<64 x i8> %vec, <64 x i8> %vec2, <64 x i8> %mask) {501; CHECK-LABEL: test_masked_64xi8_perm_mask0:502; CHECK:       # %bb.0:503; CHECK-NEXT:    vptestnmb %zmm2, %zmm2, %k1504; CHECK-NEXT:    vpshufb {{.*#+}} zmm1 {%k1} = zmm0[8,4,1,13,15,4,6,12,0,10,2,4,13,0,0,6,23,29,27,26,18,31,22,25,22,16,23,18,16,25,26,17,40,37,38,44,39,46,41,39,42,37,33,42,41,44,34,46,60,62,61,58,60,56,60,51,60,55,60,55,60,49,48,62]505; CHECK-NEXT:    vmovdqa64 %zmm1, %zmm0506; CHECK-NEXT:    retq507  %shuf = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 8, i32 4, i32 1, i32 13, i32 15, i32 4, i32 6, i32 12, i32 0, i32 10, i32 2, i32 4, i32 13, i32 0, i32 0, i32 6, i32 23, i32 29, i32 27, i32 26, i32 18, i32 31, i32 22, i32 25, i32 22, i32 16, i32 23, i32 18, i32 16, i32 25, i32 26, i32 17, i32 40, i32 37, i32 38, i32 44, i32 39, i32 46, i32 41, i32 39, i32 42, i32 37, i32 33, i32 42, i32 41, i32 44, i32 34, i32 46, i32 60, i32 62, i32 61, i32 58, i32 60, i32 56, i32 60, i32 51, i32 60, i32 55, i32 60, i32 55, i32 60, i32 49, i32 48, i32 62>508  %cmp = icmp eq <64 x i8> %mask, zeroinitializer509  %res = select <64 x i1> %cmp, <64 x i8> %shuf, <64 x i8> %vec2510  ret <64 x i8> %res511}512 513define <64 x i8> @test_masked_z_64xi8_perm_mask0(<64 x i8> %vec, <64 x i8> %mask) {514; CHECK-LABEL: test_masked_z_64xi8_perm_mask0:515; CHECK:       # %bb.0:516; CHECK-NEXT:    vptestnmb %zmm1, %zmm1, %k1517; CHECK-NEXT:    vpshufb {{.*#+}} zmm0 {%k1} {z} = zmm0[8,4,1,13,15,4,6,12,0,10,2,4,13,0,0,6,23,29,27,26,18,31,22,25,22,16,23,18,16,25,26,17,40,37,38,44,39,46,41,39,42,37,33,42,41,44,34,46,60,62,61,58,60,56,60,51,60,55,60,55,60,49,48,62]518; CHECK-NEXT:    retq519  %shuf = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 8, i32 4, i32 1, i32 13, i32 15, i32 4, i32 6, i32 12, i32 0, i32 10, i32 2, i32 4, i32 13, i32 0, i32 0, i32 6, i32 23, i32 29, i32 27, i32 26, i32 18, i32 31, i32 22, i32 25, i32 22, i32 16, i32 23, i32 18, i32 16, i32 25, i32 26, i32 17, i32 40, i32 37, i32 38, i32 44, i32 39, i32 46, i32 41, i32 39, i32 42, i32 37, i32 33, i32 42, i32 41, i32 44, i32 34, i32 46, i32 60, i32 62, i32 61, i32 58, i32 60, i32 56, i32 60, i32 51, i32 60, i32 55, i32 60, i32 55, i32 60, i32 49, i32 48, i32 62>520  %cmp = icmp eq <64 x i8> %mask, zeroinitializer521  %res = select <64 x i1> %cmp, <64 x i8> %shuf, <64 x i8> zeroinitializer522  ret <64 x i8> %res523}524define <64 x i8> @test_masked_64xi8_perm_mask1(<64 x i8> %vec, <64 x i8> %vec2, <64 x i8> %mask) {525; CHECK-LABEL: test_masked_64xi8_perm_mask1:526; CHECK:       # %bb.0:527; CHECK-NEXT:    vptestnmb %zmm2, %zmm2, %k1528; CHECK-NEXT:    vpshufb {{.*#+}} zmm1 {%k1} = zmm0[7,14,15,10,9,3,1,13,14,12,11,6,4,1,6,9,30,30,22,17,28,27,16,23,26,16,30,31,27,17,17,21,32,37,32,47,45,33,46,35,35,42,47,33,32,37,32,41,61,50,49,53,63,50,63,53,55,52,62,63,58,50,63,49]529; CHECK-NEXT:    vmovdqa64 %zmm1, %zmm0530; CHECK-NEXT:    retq531  %shuf = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 7, i32 14, i32 15, i32 10, i32 9, i32 3, i32 1, i32 13, i32 14, i32 12, i32 11, i32 6, i32 4, i32 1, i32 6, i32 9, i32 30, i32 30, i32 22, i32 17, i32 28, i32 27, i32 16, i32 23, i32 26, i32 16, i32 30, i32 31, i32 27, i32 17, i32 17, i32 21, i32 32, i32 37, i32 32, i32 47, i32 45, i32 33, i32 46, i32 35, i32 35, i32 42, i32 47, i32 33, i32 32, i32 37, i32 32, i32 41, i32 61, i32 50, i32 49, i32 53, i32 63, i32 50, i32 63, i32 53, i32 55, i32 52, i32 62, i32 63, i32 58, i32 50, i32 63, i32 49>532  %cmp = icmp eq <64 x i8> %mask, zeroinitializer533  %res = select <64 x i1> %cmp, <64 x i8> %shuf, <64 x i8> %vec2534  ret <64 x i8> %res535}536 537define <64 x i8> @test_masked_z_64xi8_perm_mask1(<64 x i8> %vec, <64 x i8> %mask) {538; CHECK-LABEL: test_masked_z_64xi8_perm_mask1:539; CHECK:       # %bb.0:540; CHECK-NEXT:    vptestnmb %zmm1, %zmm1, %k1541; CHECK-NEXT:    vpshufb {{.*#+}} zmm0 {%k1} {z} = zmm0[7,14,15,10,9,3,1,13,14,12,11,6,4,1,6,9,30,30,22,17,28,27,16,23,26,16,30,31,27,17,17,21,32,37,32,47,45,33,46,35,35,42,47,33,32,37,32,41,61,50,49,53,63,50,63,53,55,52,62,63,58,50,63,49]542; CHECK-NEXT:    retq543  %shuf = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 7, i32 14, i32 15, i32 10, i32 9, i32 3, i32 1, i32 13, i32 14, i32 12, i32 11, i32 6, i32 4, i32 1, i32 6, i32 9, i32 30, i32 30, i32 22, i32 17, i32 28, i32 27, i32 16, i32 23, i32 26, i32 16, i32 30, i32 31, i32 27, i32 17, i32 17, i32 21, i32 32, i32 37, i32 32, i32 47, i32 45, i32 33, i32 46, i32 35, i32 35, i32 42, i32 47, i32 33, i32 32, i32 37, i32 32, i32 41, i32 61, i32 50, i32 49, i32 53, i32 63, i32 50, i32 63, i32 53, i32 55, i32 52, i32 62, i32 63, i32 58, i32 50, i32 63, i32 49>544  %cmp = icmp eq <64 x i8> %mask, zeroinitializer545  %res = select <64 x i1> %cmp, <64 x i8> %shuf, <64 x i8> zeroinitializer546  ret <64 x i8> %res547}548define <64 x i8> @test_masked_64xi8_perm_mask2(<64 x i8> %vec, <64 x i8> %vec2, <64 x i8> %mask) {549; CHECK-LABEL: test_masked_64xi8_perm_mask2:550; CHECK:       # %bb.0:551; CHECK-NEXT:    vptestnmb %zmm2, %zmm2, %k1552; CHECK-NEXT:    vpshufb {{.*#+}} zmm1 {%k1} = zmm0[9,2,14,15,12,5,3,12,4,6,0,2,0,1,1,6,24,27,18,22,26,17,23,21,31,16,22,22,27,21,19,20,39,47,44,36,40,43,44,39,38,44,38,35,39,46,34,39,58,55,51,48,59,57,48,52,60,58,56,50,59,55,58,60]553; CHECK-NEXT:    vmovdqa64 %zmm1, %zmm0554; CHECK-NEXT:    retq555  %shuf = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 9, i32 2, i32 14, i32 15, i32 12, i32 5, i32 3, i32 12, i32 4, i32 6, i32 0, i32 2, i32 0, i32 1, i32 1, i32 6, i32 24, i32 27, i32 18, i32 22, i32 26, i32 17, i32 23, i32 21, i32 31, i32 16, i32 22, i32 22, i32 27, i32 21, i32 19, i32 20, i32 39, i32 47, i32 44, i32 36, i32 40, i32 43, i32 44, i32 39, i32 38, i32 44, i32 38, i32 35, i32 39, i32 46, i32 34, i32 39, i32 58, i32 55, i32 51, i32 48, i32 59, i32 57, i32 48, i32 52, i32 60, i32 58, i32 56, i32 50, i32 59, i32 55, i32 58, i32 60>556  %cmp = icmp eq <64 x i8> %mask, zeroinitializer557  %res = select <64 x i1> %cmp, <64 x i8> %shuf, <64 x i8> %vec2558  ret <64 x i8> %res559}560 561define <64 x i8> @test_masked_z_64xi8_perm_mask2(<64 x i8> %vec, <64 x i8> %mask) {562; CHECK-LABEL: test_masked_z_64xi8_perm_mask2:563; CHECK:       # %bb.0:564; CHECK-NEXT:    vptestnmb %zmm1, %zmm1, %k1565; CHECK-NEXT:    vpshufb {{.*#+}} zmm0 {%k1} {z} = zmm0[9,2,14,15,12,5,3,12,4,6,0,2,0,1,1,6,24,27,18,22,26,17,23,21,31,16,22,22,27,21,19,20,39,47,44,36,40,43,44,39,38,44,38,35,39,46,34,39,58,55,51,48,59,57,48,52,60,58,56,50,59,55,58,60]566; CHECK-NEXT:    retq567  %shuf = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 9, i32 2, i32 14, i32 15, i32 12, i32 5, i32 3, i32 12, i32 4, i32 6, i32 0, i32 2, i32 0, i32 1, i32 1, i32 6, i32 24, i32 27, i32 18, i32 22, i32 26, i32 17, i32 23, i32 21, i32 31, i32 16, i32 22, i32 22, i32 27, i32 21, i32 19, i32 20, i32 39, i32 47, i32 44, i32 36, i32 40, i32 43, i32 44, i32 39, i32 38, i32 44, i32 38, i32 35, i32 39, i32 46, i32 34, i32 39, i32 58, i32 55, i32 51, i32 48, i32 59, i32 57, i32 48, i32 52, i32 60, i32 58, i32 56, i32 50, i32 59, i32 55, i32 58, i32 60>568  %cmp = icmp eq <64 x i8> %mask, zeroinitializer569  %res = select <64 x i1> %cmp, <64 x i8> %shuf, <64 x i8> zeroinitializer570  ret <64 x i8> %res571}572define <64 x i8> @test_64xi8_perm_mask3(<64 x i8> %vec) {573; CHECK-LABEL: test_64xi8_perm_mask3:574; CHECK:       # %bb.0:575; CHECK-NEXT:    vpshufb {{.*#+}} zmm0 = zmm0[3,12,4,15,1,14,0,4,8,9,6,1,4,4,12,14,25,16,28,20,21,24,19,30,18,22,20,24,25,26,24,22,42,38,44,44,36,37,42,34,43,38,41,34,42,37,39,38,55,59,53,58,48,52,59,48,57,48,55,62,48,56,49,61]576; CHECK-NEXT:    retq577  %res = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 3, i32 12, i32 4, i32 15, i32 1, i32 14, i32 0, i32 4, i32 8, i32 9, i32 6, i32 1, i32 4, i32 4, i32 12, i32 14, i32 25, i32 16, i32 28, i32 20, i32 21, i32 24, i32 19, i32 30, i32 18, i32 22, i32 20, i32 24, i32 25, i32 26, i32 24, i32 22, i32 42, i32 38, i32 44, i32 44, i32 36, i32 37, i32 42, i32 34, i32 43, i32 38, i32 41, i32 34, i32 42, i32 37, i32 39, i32 38, i32 55, i32 59, i32 53, i32 58, i32 48, i32 52, i32 59, i32 48, i32 57, i32 48, i32 55, i32 62, i32 48, i32 56, i32 49, i32 61>578  ret <64 x i8> %res579}580define <64 x i8> @test_masked_64xi8_perm_mask3(<64 x i8> %vec, <64 x i8> %vec2, <64 x i8> %mask) {581; CHECK-LABEL: test_masked_64xi8_perm_mask3:582; CHECK:       # %bb.0:583; CHECK-NEXT:    vptestnmb %zmm2, %zmm2, %k1584; CHECK-NEXT:    vpshufb {{.*#+}} zmm1 {%k1} = zmm0[3,12,4,15,1,14,0,4,8,9,6,1,4,4,12,14,25,16,28,20,21,24,19,30,18,22,20,24,25,26,24,22,42,38,44,44,36,37,42,34,43,38,41,34,42,37,39,38,55,59,53,58,48,52,59,48,57,48,55,62,48,56,49,61]585; CHECK-NEXT:    vmovdqa64 %zmm1, %zmm0586; CHECK-NEXT:    retq587  %shuf = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 3, i32 12, i32 4, i32 15, i32 1, i32 14, i32 0, i32 4, i32 8, i32 9, i32 6, i32 1, i32 4, i32 4, i32 12, i32 14, i32 25, i32 16, i32 28, i32 20, i32 21, i32 24, i32 19, i32 30, i32 18, i32 22, i32 20, i32 24, i32 25, i32 26, i32 24, i32 22, i32 42, i32 38, i32 44, i32 44, i32 36, i32 37, i32 42, i32 34, i32 43, i32 38, i32 41, i32 34, i32 42, i32 37, i32 39, i32 38, i32 55, i32 59, i32 53, i32 58, i32 48, i32 52, i32 59, i32 48, i32 57, i32 48, i32 55, i32 62, i32 48, i32 56, i32 49, i32 61>588  %cmp = icmp eq <64 x i8> %mask, zeroinitializer589  %res = select <64 x i1> %cmp, <64 x i8> %shuf, <64 x i8> %vec2590  ret <64 x i8> %res591}592 593define <64 x i8> @test_masked_z_64xi8_perm_mask3(<64 x i8> %vec, <64 x i8> %mask) {594; CHECK-LABEL: test_masked_z_64xi8_perm_mask3:595; CHECK:       # %bb.0:596; CHECK-NEXT:    vptestnmb %zmm1, %zmm1, %k1597; CHECK-NEXT:    vpshufb {{.*#+}} zmm0 {%k1} {z} = zmm0[3,12,4,15,1,14,0,4,8,9,6,1,4,4,12,14,25,16,28,20,21,24,19,30,18,22,20,24,25,26,24,22,42,38,44,44,36,37,42,34,43,38,41,34,42,37,39,38,55,59,53,58,48,52,59,48,57,48,55,62,48,56,49,61]598; CHECK-NEXT:    retq599  %shuf = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 3, i32 12, i32 4, i32 15, i32 1, i32 14, i32 0, i32 4, i32 8, i32 9, i32 6, i32 1, i32 4, i32 4, i32 12, i32 14, i32 25, i32 16, i32 28, i32 20, i32 21, i32 24, i32 19, i32 30, i32 18, i32 22, i32 20, i32 24, i32 25, i32 26, i32 24, i32 22, i32 42, i32 38, i32 44, i32 44, i32 36, i32 37, i32 42, i32 34, i32 43, i32 38, i32 41, i32 34, i32 42, i32 37, i32 39, i32 38, i32 55, i32 59, i32 53, i32 58, i32 48, i32 52, i32 59, i32 48, i32 57, i32 48, i32 55, i32 62, i32 48, i32 56, i32 49, i32 61>600  %cmp = icmp eq <64 x i8> %mask, zeroinitializer601  %res = select <64 x i1> %cmp, <64 x i8> %shuf, <64 x i8> zeroinitializer602  ret <64 x i8> %res603}604define <64 x i8> @test_64xi8_perm_mem_mask0(ptr %vp) {605; CHECK-LABEL: test_64xi8_perm_mem_mask0:606; CHECK:       # %bb.0:607; CHECK-NEXT:    vmovdqa64 (%rdi), %zmm0608; CHECK-NEXT:    vpshufb {{.*#+}} zmm0 = zmm0[0,9,15,13,11,11,3,12,4,1,7,5,2,6,14,6,23,27,24,18,30,23,28,22,28,22,19,19,31,25,16,22,35,33,34,32,42,34,41,41,43,40,36,46,37,39,42,40,63,63,62,62,57,55,59,51,52,48,50,48,58,50,60,58]609; CHECK-NEXT:    retq610  %vec = load <64 x i8>, ptr %vp611  %res = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 0, i32 9, i32 15, i32 13, i32 11, i32 11, i32 3, i32 12, i32 4, i32 1, i32 7, i32 5, i32 2, i32 6, i32 14, i32 6, i32 23, i32 27, i32 24, i32 18, i32 30, i32 23, i32 28, i32 22, i32 28, i32 22, i32 19, i32 19, i32 31, i32 25, i32 16, i32 22, i32 35, i32 33, i32 34, i32 32, i32 42, i32 34, i32 41, i32 41, i32 43, i32 40, i32 36, i32 46, i32 37, i32 39, i32 42, i32 40, i32 63, i32 63, i32 62, i32 62, i32 57, i32 55, i32 59, i32 51, i32 52, i32 48, i32 50, i32 48, i32 58, i32 50, i32 60, i32 58>612  ret <64 x i8> %res613}614define <64 x i8> @test_masked_64xi8_perm_mem_mask0(ptr %vp, <64 x i8> %vec2, <64 x i8> %mask) {615; CHECK-LABEL: test_masked_64xi8_perm_mem_mask0:616; CHECK:       # %bb.0:617; CHECK-NEXT:    vmovdqa64 (%rdi), %zmm2618; CHECK-NEXT:    vptestnmb %zmm1, %zmm1, %k1619; CHECK-NEXT:    vpshufb {{.*#+}} zmm0 {%k1} = zmm2[0,9,15,13,11,11,3,12,4,1,7,5,2,6,14,6,23,27,24,18,30,23,28,22,28,22,19,19,31,25,16,22,35,33,34,32,42,34,41,41,43,40,36,46,37,39,42,40,63,63,62,62,57,55,59,51,52,48,50,48,58,50,60,58]620; CHECK-NEXT:    retq621  %vec = load <64 x i8>, ptr %vp622  %shuf = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 0, i32 9, i32 15, i32 13, i32 11, i32 11, i32 3, i32 12, i32 4, i32 1, i32 7, i32 5, i32 2, i32 6, i32 14, i32 6, i32 23, i32 27, i32 24, i32 18, i32 30, i32 23, i32 28, i32 22, i32 28, i32 22, i32 19, i32 19, i32 31, i32 25, i32 16, i32 22, i32 35, i32 33, i32 34, i32 32, i32 42, i32 34, i32 41, i32 41, i32 43, i32 40, i32 36, i32 46, i32 37, i32 39, i32 42, i32 40, i32 63, i32 63, i32 62, i32 62, i32 57, i32 55, i32 59, i32 51, i32 52, i32 48, i32 50, i32 48, i32 58, i32 50, i32 60, i32 58>623  %cmp = icmp eq <64 x i8> %mask, zeroinitializer624  %res = select <64 x i1> %cmp, <64 x i8> %shuf, <64 x i8> %vec2625  ret <64 x i8> %res626}627 628define <64 x i8> @test_masked_z_64xi8_perm_mem_mask0(ptr %vp, <64 x i8> %mask) {629; CHECK-LABEL: test_masked_z_64xi8_perm_mem_mask0:630; CHECK:       # %bb.0:631; CHECK-NEXT:    vmovdqa64 (%rdi), %zmm1632; CHECK-NEXT:    vptestnmb %zmm0, %zmm0, %k1633; CHECK-NEXT:    vpshufb {{.*#+}} zmm0 {%k1} {z} = zmm1[0,9,15,13,11,11,3,12,4,1,7,5,2,6,14,6,23,27,24,18,30,23,28,22,28,22,19,19,31,25,16,22,35,33,34,32,42,34,41,41,43,40,36,46,37,39,42,40,63,63,62,62,57,55,59,51,52,48,50,48,58,50,60,58]634; CHECK-NEXT:    retq635  %vec = load <64 x i8>, ptr %vp636  %shuf = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 0, i32 9, i32 15, i32 13, i32 11, i32 11, i32 3, i32 12, i32 4, i32 1, i32 7, i32 5, i32 2, i32 6, i32 14, i32 6, i32 23, i32 27, i32 24, i32 18, i32 30, i32 23, i32 28, i32 22, i32 28, i32 22, i32 19, i32 19, i32 31, i32 25, i32 16, i32 22, i32 35, i32 33, i32 34, i32 32, i32 42, i32 34, i32 41, i32 41, i32 43, i32 40, i32 36, i32 46, i32 37, i32 39, i32 42, i32 40, i32 63, i32 63, i32 62, i32 62, i32 57, i32 55, i32 59, i32 51, i32 52, i32 48, i32 50, i32 48, i32 58, i32 50, i32 60, i32 58>637  %cmp = icmp eq <64 x i8> %mask, zeroinitializer638  %res = select <64 x i1> %cmp, <64 x i8> %shuf, <64 x i8> zeroinitializer639  ret <64 x i8> %res640}641 642define <64 x i8> @test_masked_64xi8_perm_mem_mask1(ptr %vp, <64 x i8> %vec2, <64 x i8> %mask) {643; CHECK-LABEL: test_masked_64xi8_perm_mem_mask1:644; CHECK:       # %bb.0:645; CHECK-NEXT:    vmovdqa64 (%rdi), %zmm2646; CHECK-NEXT:    vptestnmb %zmm1, %zmm1, %k1647; CHECK-NEXT:    vpshufb {{.*#+}} zmm0 {%k1} = zmm2[15,6,14,7,5,1,14,12,5,7,5,0,0,5,3,8,19,19,26,27,20,29,20,21,27,16,30,17,23,27,16,28,47,39,33,33,33,44,38,46,39,33,38,44,45,32,34,39,50,61,62,53,54,56,52,56,51,52,55,57,56,52,51,49]648; CHECK-NEXT:    retq649  %vec = load <64 x i8>, ptr %vp650  %shuf = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 15, i32 6, i32 14, i32 7, i32 5, i32 1, i32 14, i32 12, i32 5, i32 7, i32 5, i32 0, i32 0, i32 5, i32 3, i32 8, i32 19, i32 19, i32 26, i32 27, i32 20, i32 29, i32 20, i32 21, i32 27, i32 16, i32 30, i32 17, i32 23, i32 27, i32 16, i32 28, i32 47, i32 39, i32 33, i32 33, i32 33, i32 44, i32 38, i32 46, i32 39, i32 33, i32 38, i32 44, i32 45, i32 32, i32 34, i32 39, i32 50, i32 61, i32 62, i32 53, i32 54, i32 56, i32 52, i32 56, i32 51, i32 52, i32 55, i32 57, i32 56, i32 52, i32 51, i32 49>651  %cmp = icmp eq <64 x i8> %mask, zeroinitializer652  %res = select <64 x i1> %cmp, <64 x i8> %shuf, <64 x i8> %vec2653  ret <64 x i8> %res654}655 656define <64 x i8> @test_masked_z_64xi8_perm_mem_mask1(ptr %vp, <64 x i8> %mask) {657; CHECK-LABEL: test_masked_z_64xi8_perm_mem_mask1:658; CHECK:       # %bb.0:659; CHECK-NEXT:    vmovdqa64 (%rdi), %zmm1660; CHECK-NEXT:    vptestnmb %zmm0, %zmm0, %k1661; CHECK-NEXT:    vpshufb {{.*#+}} zmm0 {%k1} {z} = zmm1[15,6,14,7,5,1,14,12,5,7,5,0,0,5,3,8,19,19,26,27,20,29,20,21,27,16,30,17,23,27,16,28,47,39,33,33,33,44,38,46,39,33,38,44,45,32,34,39,50,61,62,53,54,56,52,56,51,52,55,57,56,52,51,49]662; CHECK-NEXT:    retq663  %vec = load <64 x i8>, ptr %vp664  %shuf = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 15, i32 6, i32 14, i32 7, i32 5, i32 1, i32 14, i32 12, i32 5, i32 7, i32 5, i32 0, i32 0, i32 5, i32 3, i32 8, i32 19, i32 19, i32 26, i32 27, i32 20, i32 29, i32 20, i32 21, i32 27, i32 16, i32 30, i32 17, i32 23, i32 27, i32 16, i32 28, i32 47, i32 39, i32 33, i32 33, i32 33, i32 44, i32 38, i32 46, i32 39, i32 33, i32 38, i32 44, i32 45, i32 32, i32 34, i32 39, i32 50, i32 61, i32 62, i32 53, i32 54, i32 56, i32 52, i32 56, i32 51, i32 52, i32 55, i32 57, i32 56, i32 52, i32 51, i32 49>665  %cmp = icmp eq <64 x i8> %mask, zeroinitializer666  %res = select <64 x i1> %cmp, <64 x i8> %shuf, <64 x i8> zeroinitializer667  ret <64 x i8> %res668}669 670define <64 x i8> @test_masked_64xi8_perm_mem_mask2(ptr %vp, <64 x i8> %vec2, <64 x i8> %mask) {671; CHECK-LABEL: test_masked_64xi8_perm_mem_mask2:672; CHECK:       # %bb.0:673; CHECK-NEXT:    vmovdqa64 (%rdi), %zmm2674; CHECK-NEXT:    vptestnmb %zmm1, %zmm1, %k1675; CHECK-NEXT:    vpshufb {{.*#+}} zmm0 {%k1} = zmm2[12,1,11,3,4,11,10,11,8,13,1,10,1,11,5,10,27,26,19,29,19,24,26,19,26,20,18,28,24,21,25,16,34,38,47,40,33,44,44,44,41,43,35,43,45,44,37,41,58,62,49,61,56,53,55,48,51,58,58,55,63,55,53,61]676; CHECK-NEXT:    retq677  %vec = load <64 x i8>, ptr %vp678  %shuf = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 12, i32 1, i32 11, i32 3, i32 4, i32 11, i32 10, i32 11, i32 8, i32 13, i32 1, i32 10, i32 1, i32 11, i32 5, i32 10, i32 27, i32 26, i32 19, i32 29, i32 19, i32 24, i32 26, i32 19, i32 26, i32 20, i32 18, i32 28, i32 24, i32 21, i32 25, i32 16, i32 34, i32 38, i32 47, i32 40, i32 33, i32 44, i32 44, i32 44, i32 41, i32 43, i32 35, i32 43, i32 45, i32 44, i32 37, i32 41, i32 58, i32 62, i32 49, i32 61, i32 56, i32 53, i32 55, i32 48, i32 51, i32 58, i32 58, i32 55, i32 63, i32 55, i32 53, i32 61>679  %cmp = icmp eq <64 x i8> %mask, zeroinitializer680  %res = select <64 x i1> %cmp, <64 x i8> %shuf, <64 x i8> %vec2681  ret <64 x i8> %res682}683 684define <64 x i8> @test_masked_z_64xi8_perm_mem_mask2(ptr %vp, <64 x i8> %mask) {685; CHECK-LABEL: test_masked_z_64xi8_perm_mem_mask2:686; CHECK:       # %bb.0:687; CHECK-NEXT:    vmovdqa64 (%rdi), %zmm1688; CHECK-NEXT:    vptestnmb %zmm0, %zmm0, %k1689; CHECK-NEXT:    vpshufb {{.*#+}} zmm0 {%k1} {z} = zmm1[12,1,11,3,4,11,10,11,8,13,1,10,1,11,5,10,27,26,19,29,19,24,26,19,26,20,18,28,24,21,25,16,34,38,47,40,33,44,44,44,41,43,35,43,45,44,37,41,58,62,49,61,56,53,55,48,51,58,58,55,63,55,53,61]690; CHECK-NEXT:    retq691  %vec = load <64 x i8>, ptr %vp692  %shuf = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 12, i32 1, i32 11, i32 3, i32 4, i32 11, i32 10, i32 11, i32 8, i32 13, i32 1, i32 10, i32 1, i32 11, i32 5, i32 10, i32 27, i32 26, i32 19, i32 29, i32 19, i32 24, i32 26, i32 19, i32 26, i32 20, i32 18, i32 28, i32 24, i32 21, i32 25, i32 16, i32 34, i32 38, i32 47, i32 40, i32 33, i32 44, i32 44, i32 44, i32 41, i32 43, i32 35, i32 43, i32 45, i32 44, i32 37, i32 41, i32 58, i32 62, i32 49, i32 61, i32 56, i32 53, i32 55, i32 48, i32 51, i32 58, i32 58, i32 55, i32 63, i32 55, i32 53, i32 61>693  %cmp = icmp eq <64 x i8> %mask, zeroinitializer694  %res = select <64 x i1> %cmp, <64 x i8> %shuf, <64 x i8> zeroinitializer695  ret <64 x i8> %res696}697 698define <64 x i8> @test_64xi8_perm_mem_mask3(ptr %vp) {699; CHECK-LABEL: test_64xi8_perm_mem_mask3:700; CHECK:       # %bb.0:701; CHECK-NEXT:    vmovdqa64 (%rdi), %zmm0702; CHECK-NEXT:    vpshufb {{.*#+}} zmm0 = zmm0[4,9,11,13,12,6,0,0,11,15,5,7,11,10,4,10,20,21,24,27,18,16,26,16,16,19,26,17,16,31,22,30,35,38,37,34,37,47,43,38,38,36,40,43,42,39,32,46,54,54,48,50,61,56,59,50,53,61,61,51,48,60,50,60]703; CHECK-NEXT:    retq704  %vec = load <64 x i8>, ptr %vp705  %res = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 4, i32 9, i32 11, i32 13, i32 12, i32 6, i32 0, i32 0, i32 11, i32 15, i32 5, i32 7, i32 11, i32 10, i32 4, i32 10, i32 20, i32 21, i32 24, i32 27, i32 18, i32 16, i32 26, i32 16, i32 16, i32 19, i32 26, i32 17, i32 16, i32 31, i32 22, i32 30, i32 35, i32 38, i32 37, i32 34, i32 37, i32 47, i32 43, i32 38, i32 38, i32 36, i32 40, i32 43, i32 42, i32 39, i32 32, i32 46, i32 54, i32 54, i32 48, i32 50, i32 61, i32 56, i32 59, i32 50, i32 53, i32 61, i32 61, i32 51, i32 48, i32 60, i32 50, i32 60>706  ret <64 x i8> %res707}708define <64 x i8> @test_masked_64xi8_perm_mem_mask3(ptr %vp, <64 x i8> %vec2, <64 x i8> %mask) {709; CHECK-LABEL: test_masked_64xi8_perm_mem_mask3:710; CHECK:       # %bb.0:711; CHECK-NEXT:    vmovdqa64 (%rdi), %zmm2712; CHECK-NEXT:    vptestnmb %zmm1, %zmm1, %k1713; CHECK-NEXT:    vpshufb {{.*#+}} zmm0 {%k1} = zmm2[4,9,11,13,12,6,0,0,11,15,5,7,11,10,4,10,20,21,24,27,18,16,26,16,16,19,26,17,16,31,22,30,35,38,37,34,37,47,43,38,38,36,40,43,42,39,32,46,54,54,48,50,61,56,59,50,53,61,61,51,48,60,50,60]714; CHECK-NEXT:    retq715  %vec = load <64 x i8>, ptr %vp716  %shuf = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 4, i32 9, i32 11, i32 13, i32 12, i32 6, i32 0, i32 0, i32 11, i32 15, i32 5, i32 7, i32 11, i32 10, i32 4, i32 10, i32 20, i32 21, i32 24, i32 27, i32 18, i32 16, i32 26, i32 16, i32 16, i32 19, i32 26, i32 17, i32 16, i32 31, i32 22, i32 30, i32 35, i32 38, i32 37, i32 34, i32 37, i32 47, i32 43, i32 38, i32 38, i32 36, i32 40, i32 43, i32 42, i32 39, i32 32, i32 46, i32 54, i32 54, i32 48, i32 50, i32 61, i32 56, i32 59, i32 50, i32 53, i32 61, i32 61, i32 51, i32 48, i32 60, i32 50, i32 60>717  %cmp = icmp eq <64 x i8> %mask, zeroinitializer718  %res = select <64 x i1> %cmp, <64 x i8> %shuf, <64 x i8> %vec2719  ret <64 x i8> %res720}721 722define <64 x i8> @test_masked_z_64xi8_perm_mem_mask3(ptr %vp, <64 x i8> %mask) {723; CHECK-LABEL: test_masked_z_64xi8_perm_mem_mask3:724; CHECK:       # %bb.0:725; CHECK-NEXT:    vmovdqa64 (%rdi), %zmm1726; CHECK-NEXT:    vptestnmb %zmm0, %zmm0, %k1727; CHECK-NEXT:    vpshufb {{.*#+}} zmm0 {%k1} {z} = zmm1[4,9,11,13,12,6,0,0,11,15,5,7,11,10,4,10,20,21,24,27,18,16,26,16,16,19,26,17,16,31,22,30,35,38,37,34,37,47,43,38,38,36,40,43,42,39,32,46,54,54,48,50,61,56,59,50,53,61,61,51,48,60,50,60]728; CHECK-NEXT:    retq729  %vec = load <64 x i8>, ptr %vp730  %shuf = shufflevector <64 x i8> %vec, <64 x i8> undef, <64 x i32> <i32 4, i32 9, i32 11, i32 13, i32 12, i32 6, i32 0, i32 0, i32 11, i32 15, i32 5, i32 7, i32 11, i32 10, i32 4, i32 10, i32 20, i32 21, i32 24, i32 27, i32 18, i32 16, i32 26, i32 16, i32 16, i32 19, i32 26, i32 17, i32 16, i32 31, i32 22, i32 30, i32 35, i32 38, i32 37, i32 34, i32 37, i32 47, i32 43, i32 38, i32 38, i32 36, i32 40, i32 43, i32 42, i32 39, i32 32, i32 46, i32 54, i32 54, i32 48, i32 50, i32 61, i32 56, i32 59, i32 50, i32 53, i32 61, i32 61, i32 51, i32 48, i32 60, i32 50, i32 60>731  %cmp = icmp eq <64 x i8> %mask, zeroinitializer732  %res = select <64 x i1> %cmp, <64 x i8> %shuf, <64 x i8> zeroinitializer733  ret <64 x i8> %res734}735 736define <8 x i16> @test_8xi16_perm_high_mask0(<8 x i16> %vec) {737; CHECK-LABEL: test_8xi16_perm_high_mask0:738; CHECK:       # %bb.0:739; CHECK-NEXT:    vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,6,5,7,6]740; CHECK-NEXT:    retq741  %res = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 7, i32 6>742  ret <8 x i16> %res743}744define <8 x i16> @test_masked_8xi16_perm_high_mask0(<8 x i16> %vec, <8 x i16> %vec2, <8 x i16> %mask) {745; CHECK-LABEL: test_masked_8xi16_perm_high_mask0:746; CHECK:       # %bb.0:747; CHECK-NEXT:    vptestnmw %xmm2, %xmm2, %k1748; CHECK-NEXT:    vpshufhw {{.*#+}} xmm1 {%k1} = xmm0[0,1,2,3,6,5,7,6]749; CHECK-NEXT:    vmovdqa %xmm1, %xmm0750; CHECK-NEXT:    retq751  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 7, i32 6>752  %cmp = icmp eq <8 x i16> %mask, zeroinitializer753  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2754  ret <8 x i16> %res755}756 757define <8 x i16> @test_masked_z_8xi16_perm_high_mask0(<8 x i16> %vec, <8 x i16> %mask) {758; CHECK-LABEL: test_masked_z_8xi16_perm_high_mask0:759; CHECK:       # %bb.0:760; CHECK-NEXT:    vptestnmw %xmm1, %xmm1, %k1761; CHECK-NEXT:    vpshufhw {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1,2,3,6,5,7,6]762; CHECK-NEXT:    retq763  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 7, i32 6>764  %cmp = icmp eq <8 x i16> %mask, zeroinitializer765  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> zeroinitializer766  ret <8 x i16> %res767}768define <8 x i16> @test_masked_8xi16_perm_low_mask1(<8 x i16> %vec, <8 x i16> %vec2, <8 x i16> %mask) {769; CHECK-LABEL: test_masked_8xi16_perm_low_mask1:770; CHECK:       # %bb.0:771; CHECK-NEXT:    vptestnmw %xmm2, %xmm2, %k1772; CHECK-NEXT:    vpshuflw {{.*#+}} xmm1 {%k1} = xmm0[0,3,0,0,4,5,6,7]773; CHECK-NEXT:    vmovdqa %xmm1, %xmm0774; CHECK-NEXT:    retq775  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 3, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7>776  %cmp = icmp eq <8 x i16> %mask, zeroinitializer777  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2778  ret <8 x i16> %res779}780 781define <8 x i16> @test_masked_z_8xi16_perm_low_mask1(<8 x i16> %vec, <8 x i16> %mask) {782; CHECK-LABEL: test_masked_z_8xi16_perm_low_mask1:783; CHECK:       # %bb.0:784; CHECK-NEXT:    vptestnmw %xmm1, %xmm1, %k1785; CHECK-NEXT:    vpshuflw {{.*#+}} xmm0 {%k1} {z} = xmm0[0,3,0,0,4,5,6,7]786; CHECK-NEXT:    retq787  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 3, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7>788  %cmp = icmp eq <8 x i16> %mask, zeroinitializer789  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> zeroinitializer790  ret <8 x i16> %res791}792define <8 x i16> @test_masked_8xi16_perm_high_mask2(<8 x i16> %vec, <8 x i16> %vec2, <8 x i16> %mask) {793; CHECK-LABEL: test_masked_8xi16_perm_high_mask2:794; CHECK:       # %bb.0:795; CHECK-NEXT:    vptestnmw %xmm2, %xmm2, %k1796; CHECK-NEXT:    vpshufhw {{.*#+}} xmm1 {%k1} = xmm0[0,1,2,3,5,4,4,5]797; CHECK-NEXT:    vmovdqa %xmm1, %xmm0798; CHECK-NEXT:    retq799  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 4, i32 4, i32 5>800  %cmp = icmp eq <8 x i16> %mask, zeroinitializer801  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2802  ret <8 x i16> %res803}804 805define <8 x i16> @test_masked_z_8xi16_perm_high_mask2(<8 x i16> %vec, <8 x i16> %mask) {806; CHECK-LABEL: test_masked_z_8xi16_perm_high_mask2:807; CHECK:       # %bb.0:808; CHECK-NEXT:    vptestnmw %xmm1, %xmm1, %k1809; CHECK-NEXT:    vpshufhw {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1,2,3,5,4,4,5]810; CHECK-NEXT:    retq811  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 4, i32 4, i32 5>812  %cmp = icmp eq <8 x i16> %mask, zeroinitializer813  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> zeroinitializer814  ret <8 x i16> %res815}816define <8 x i16> @test_8xi16_perm_low_mask3(<8 x i16> %vec) {817; CHECK-LABEL: test_8xi16_perm_low_mask3:818; CHECK:       # %bb.0:819; CHECK-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[2,1,1,1,4,5,6,7]820; CHECK-NEXT:    retq821  %res = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 2, i32 1, i32 1, i32 1, i32 4, i32 5, i32 6, i32 7>822  ret <8 x i16> %res823}824define <8 x i16> @test_masked_8xi16_perm_low_mask3(<8 x i16> %vec, <8 x i16> %vec2, <8 x i16> %mask) {825; CHECK-LABEL: test_masked_8xi16_perm_low_mask3:826; CHECK:       # %bb.0:827; CHECK-NEXT:    vptestnmw %xmm2, %xmm2, %k1828; CHECK-NEXT:    vpshuflw {{.*#+}} xmm1 {%k1} = xmm0[2,1,1,1,4,5,6,7]829; CHECK-NEXT:    vmovdqa %xmm1, %xmm0830; CHECK-NEXT:    retq831  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 2, i32 1, i32 1, i32 1, i32 4, i32 5, i32 6, i32 7>832  %cmp = icmp eq <8 x i16> %mask, zeroinitializer833  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2834  ret <8 x i16> %res835}836 837define <8 x i16> @test_masked_z_8xi16_perm_low_mask3(<8 x i16> %vec, <8 x i16> %mask) {838; CHECK-LABEL: test_masked_z_8xi16_perm_low_mask3:839; CHECK:       # %bb.0:840; CHECK-NEXT:    vptestnmw %xmm1, %xmm1, %k1841; CHECK-NEXT:    vpshuflw {{.*#+}} xmm0 {%k1} {z} = xmm0[2,1,1,1,4,5,6,7]842; CHECK-NEXT:    retq843  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 2, i32 1, i32 1, i32 1, i32 4, i32 5, i32 6, i32 7>844  %cmp = icmp eq <8 x i16> %mask, zeroinitializer845  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> zeroinitializer846  ret <8 x i16> %res847}848define <8 x i16> @test_masked_8xi16_perm_high_mask4(<8 x i16> %vec, <8 x i16> %vec2, <8 x i16> %mask) {849; CHECK-LABEL: test_masked_8xi16_perm_high_mask4:850; CHECK:       # %bb.0:851; CHECK-NEXT:    vptestnmw %xmm2, %xmm2, %k1852; CHECK-NEXT:    vpshufhw {{.*#+}} xmm1 {%k1} = xmm0[0,1,2,3,5,5,7,6]853; CHECK-NEXT:    vmovdqa %xmm1, %xmm0854; CHECK-NEXT:    retq855  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 5, i32 7, i32 6>856  %cmp = icmp eq <8 x i16> %mask, zeroinitializer857  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2858  ret <8 x i16> %res859}860 861define <8 x i16> @test_masked_z_8xi16_perm_high_mask4(<8 x i16> %vec, <8 x i16> %mask) {862; CHECK-LABEL: test_masked_z_8xi16_perm_high_mask4:863; CHECK:       # %bb.0:864; CHECK-NEXT:    vptestnmw %xmm1, %xmm1, %k1865; CHECK-NEXT:    vpshufhw {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1,2,3,5,5,7,6]866; CHECK-NEXT:    retq867  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 5, i32 7, i32 6>868  %cmp = icmp eq <8 x i16> %mask, zeroinitializer869  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> zeroinitializer870  ret <8 x i16> %res871}872define <8 x i16> @test_masked_8xi16_perm_low_mask5(<8 x i16> %vec, <8 x i16> %vec2, <8 x i16> %mask) {873; CHECK-LABEL: test_masked_8xi16_perm_low_mask5:874; CHECK:       # %bb.0:875; CHECK-NEXT:    vptestnmw %xmm2, %xmm2, %k1876; CHECK-NEXT:    vpshuflw {{.*#+}} xmm1 {%k1} = xmm0[3,3,2,1,4,5,6,7]877; CHECK-NEXT:    vmovdqa %xmm1, %xmm0878; CHECK-NEXT:    retq879  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 3, i32 3, i32 2, i32 1, i32 4, i32 5, i32 6, i32 7>880  %cmp = icmp eq <8 x i16> %mask, zeroinitializer881  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2882  ret <8 x i16> %res883}884 885define <8 x i16> @test_masked_z_8xi16_perm_low_mask5(<8 x i16> %vec, <8 x i16> %mask) {886; CHECK-LABEL: test_masked_z_8xi16_perm_low_mask5:887; CHECK:       # %bb.0:888; CHECK-NEXT:    vptestnmw %xmm1, %xmm1, %k1889; CHECK-NEXT:    vpshuflw {{.*#+}} xmm0 {%k1} {z} = xmm0[3,3,2,1,4,5,6,7]890; CHECK-NEXT:    retq891  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 3, i32 3, i32 2, i32 1, i32 4, i32 5, i32 6, i32 7>892  %cmp = icmp eq <8 x i16> %mask, zeroinitializer893  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> zeroinitializer894  ret <8 x i16> %res895}896define <8 x i16> @test_8xi16_perm_high_mask6(<8 x i16> %vec) {897; CHECK-LABEL: test_8xi16_perm_high_mask6:898; CHECK:       # %bb.0:899; CHECK-NEXT:    vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,6,5,6,5]900; CHECK-NEXT:    retq901  %res = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 6, i32 5>902  ret <8 x i16> %res903}904define <8 x i16> @test_masked_8xi16_perm_high_mask6(<8 x i16> %vec, <8 x i16> %vec2, <8 x i16> %mask) {905; CHECK-LABEL: test_masked_8xi16_perm_high_mask6:906; CHECK:       # %bb.0:907; CHECK-NEXT:    vptestnmw %xmm2, %xmm2, %k1908; CHECK-NEXT:    vpshufhw {{.*#+}} xmm1 {%k1} = xmm0[0,1,2,3,6,5,6,5]909; CHECK-NEXT:    vmovdqa %xmm1, %xmm0910; CHECK-NEXT:    retq911  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 6, i32 5>912  %cmp = icmp eq <8 x i16> %mask, zeroinitializer913  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2914  ret <8 x i16> %res915}916 917define <8 x i16> @test_masked_z_8xi16_perm_high_mask6(<8 x i16> %vec, <8 x i16> %mask) {918; CHECK-LABEL: test_masked_z_8xi16_perm_high_mask6:919; CHECK:       # %bb.0:920; CHECK-NEXT:    vptestnmw %xmm1, %xmm1, %k1921; CHECK-NEXT:    vpshufhw {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1,2,3,6,5,6,5]922; CHECK-NEXT:    retq923  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 6, i32 5>924  %cmp = icmp eq <8 x i16> %mask, zeroinitializer925  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> zeroinitializer926  ret <8 x i16> %res927}928define <8 x i16> @test_masked_8xi16_perm_low_mask7(<8 x i16> %vec, <8 x i16> %vec2, <8 x i16> %mask) {929; CHECK-LABEL: test_masked_8xi16_perm_low_mask7:930; CHECK:       # %bb.0:931; CHECK-NEXT:    vptestnmw %xmm2, %xmm2, %k1932; CHECK-NEXT:    vpshuflw {{.*#+}} xmm1 {%k1} = xmm0[1,0,2,0,4,5,6,7]933; CHECK-NEXT:    vmovdqa %xmm1, %xmm0934; CHECK-NEXT:    retq935  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 1, i32 0, i32 2, i32 0, i32 4, i32 5, i32 6, i32 7>936  %cmp = icmp eq <8 x i16> %mask, zeroinitializer937  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2938  ret <8 x i16> %res939}940 941define <8 x i16> @test_masked_z_8xi16_perm_low_mask7(<8 x i16> %vec, <8 x i16> %mask) {942; CHECK-LABEL: test_masked_z_8xi16_perm_low_mask7:943; CHECK:       # %bb.0:944; CHECK-NEXT:    vptestnmw %xmm1, %xmm1, %k1945; CHECK-NEXT:    vpshuflw {{.*#+}} xmm0 {%k1} {z} = xmm0[1,0,2,0,4,5,6,7]946; CHECK-NEXT:    retq947  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 1, i32 0, i32 2, i32 0, i32 4, i32 5, i32 6, i32 7>948  %cmp = icmp eq <8 x i16> %mask, zeroinitializer949  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> zeroinitializer950  ret <8 x i16> %res951}952define <8 x i16> @test_8xi16_perm_high_mem_mask0(ptr %vp) {953; CHECK-LABEL: test_8xi16_perm_high_mem_mask0:954; CHECK:       # %bb.0:955; CHECK-NEXT:    vpshufhw {{.*#+}} xmm0 = mem[0,1,2,3,7,7,4,6]956; CHECK-NEXT:    retq957  %vec = load <8 x i16>, ptr %vp958  %res = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 7, i32 4, i32 6>959  ret <8 x i16> %res960}961define <8 x i16> @test_masked_8xi16_perm_high_mem_mask0(ptr %vp, <8 x i16> %vec2, <8 x i16> %mask) {962; CHECK-LABEL: test_masked_8xi16_perm_high_mem_mask0:963; CHECK:       # %bb.0:964; CHECK-NEXT:    vptestnmw %xmm1, %xmm1, %k1965; CHECK-NEXT:    vpshufhw {{.*#+}} xmm0 {%k1} = mem[0,1,2,3,7,7,4,6]966; CHECK-NEXT:    retq967  %vec = load <8 x i16>, ptr %vp968  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 7, i32 4, i32 6>969  %cmp = icmp eq <8 x i16> %mask, zeroinitializer970  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2971  ret <8 x i16> %res972}973 974define <8 x i16> @test_masked_z_8xi16_perm_high_mem_mask0(ptr %vp, <8 x i16> %mask) {975; CHECK-LABEL: test_masked_z_8xi16_perm_high_mem_mask0:976; CHECK:       # %bb.0:977; CHECK-NEXT:    vptestnmw %xmm0, %xmm0, %k1978; CHECK-NEXT:    vpshufhw {{.*#+}} xmm0 {%k1} {z} = mem[0,1,2,3,7,7,4,6]979; CHECK-NEXT:    retq980  %vec = load <8 x i16>, ptr %vp981  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 7, i32 4, i32 6>982  %cmp = icmp eq <8 x i16> %mask, zeroinitializer983  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> zeroinitializer984  ret <8 x i16> %res985}986 987define <8 x i16> @test_masked_8xi16_perm_low_mem_mask1(ptr %vp, <8 x i16> %vec2, <8 x i16> %mask) {988; CHECK-LABEL: test_masked_8xi16_perm_low_mem_mask1:989; CHECK:       # %bb.0:990; CHECK-NEXT:    vptestnmw %xmm1, %xmm1, %k1991; CHECK-NEXT:    vpshuflw {{.*#+}} xmm0 {%k1} = mem[1,3,3,2,4,5,6,7]992; CHECK-NEXT:    retq993  %vec = load <8 x i16>, ptr %vp994  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7>995  %cmp = icmp eq <8 x i16> %mask, zeroinitializer996  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec2997  ret <8 x i16> %res998}999 1000define <8 x i16> @test_masked_z_8xi16_perm_low_mem_mask1(ptr %vp, <8 x i16> %mask) {1001; CHECK-LABEL: test_masked_z_8xi16_perm_low_mem_mask1:1002; CHECK:       # %bb.0:1003; CHECK-NEXT:    vptestnmw %xmm0, %xmm0, %k11004; CHECK-NEXT:    vpshuflw {{.*#+}} xmm0 {%k1} {z} = mem[1,3,3,2,4,5,6,7]1005; CHECK-NEXT:    retq1006  %vec = load <8 x i16>, ptr %vp1007  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7>1008  %cmp = icmp eq <8 x i16> %mask, zeroinitializer1009  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> zeroinitializer1010  ret <8 x i16> %res1011}1012 1013define <8 x i16> @test_masked_8xi16_perm_high_mem_mask2(ptr %vp, <8 x i16> %vec2, <8 x i16> %mask) {1014; CHECK-LABEL: test_masked_8xi16_perm_high_mem_mask2:1015; CHECK:       # %bb.0:1016; CHECK-NEXT:    vptestnmw %xmm1, %xmm1, %k11017; CHECK-NEXT:    vpshufhw {{.*#+}} xmm0 {%k1} = mem[0,1,2,3,6,6,5,7]1018; CHECK-NEXT:    retq1019  %vec = load <8 x i16>, ptr %vp1020  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 6, i32 6, i32 5, i32 7>1021  %cmp = icmp eq <8 x i16> %mask, zeroinitializer1022  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec21023  ret <8 x i16> %res1024}1025 1026define <8 x i16> @test_masked_z_8xi16_perm_high_mem_mask2(ptr %vp, <8 x i16> %mask) {1027; CHECK-LABEL: test_masked_z_8xi16_perm_high_mem_mask2:1028; CHECK:       # %bb.0:1029; CHECK-NEXT:    vptestnmw %xmm0, %xmm0, %k11030; CHECK-NEXT:    vpshufhw {{.*#+}} xmm0 {%k1} {z} = mem[0,1,2,3,6,6,5,7]1031; CHECK-NEXT:    retq1032  %vec = load <8 x i16>, ptr %vp1033  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 6, i32 6, i32 5, i32 7>1034  %cmp = icmp eq <8 x i16> %mask, zeroinitializer1035  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> zeroinitializer1036  ret <8 x i16> %res1037}1038 1039define <8 x i16> @test_8xi16_perm_low_mem_mask3(ptr %vp) {1040; CHECK-LABEL: test_8xi16_perm_low_mem_mask3:1041; CHECK:       # %bb.0:1042; CHECK-NEXT:    vpshuflw {{.*#+}} xmm0 = mem[3,1,2,0,4,5,6,7]1043; CHECK-NEXT:    retq1044  %vec = load <8 x i16>, ptr %vp1045  %res = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 3, i32 1, i32 2, i32 0, i32 4, i32 5, i32 6, i32 7>1046  ret <8 x i16> %res1047}1048define <8 x i16> @test_masked_8xi16_perm_low_mem_mask3(ptr %vp, <8 x i16> %vec2, <8 x i16> %mask) {1049; CHECK-LABEL: test_masked_8xi16_perm_low_mem_mask3:1050; CHECK:       # %bb.0:1051; CHECK-NEXT:    vptestnmw %xmm1, %xmm1, %k11052; CHECK-NEXT:    vpshuflw {{.*#+}} xmm0 {%k1} = mem[3,1,2,0,4,5,6,7]1053; CHECK-NEXT:    retq1054  %vec = load <8 x i16>, ptr %vp1055  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 3, i32 1, i32 2, i32 0, i32 4, i32 5, i32 6, i32 7>1056  %cmp = icmp eq <8 x i16> %mask, zeroinitializer1057  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec21058  ret <8 x i16> %res1059}1060 1061define <8 x i16> @test_masked_z_8xi16_perm_low_mem_mask3(ptr %vp, <8 x i16> %mask) {1062; CHECK-LABEL: test_masked_z_8xi16_perm_low_mem_mask3:1063; CHECK:       # %bb.0:1064; CHECK-NEXT:    vptestnmw %xmm0, %xmm0, %k11065; CHECK-NEXT:    vpshuflw {{.*#+}} xmm0 {%k1} {z} = mem[3,1,2,0,4,5,6,7]1066; CHECK-NEXT:    retq1067  %vec = load <8 x i16>, ptr %vp1068  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 3, i32 1, i32 2, i32 0, i32 4, i32 5, i32 6, i32 7>1069  %cmp = icmp eq <8 x i16> %mask, zeroinitializer1070  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> zeroinitializer1071  ret <8 x i16> %res1072}1073 1074define <8 x i16> @test_masked_8xi16_perm_high_mem_mask4(ptr %vp, <8 x i16> %vec2, <8 x i16> %mask) {1075; CHECK-LABEL: test_masked_8xi16_perm_high_mem_mask4:1076; CHECK:       # %bb.0:1077; CHECK-NEXT:    vptestnmw %xmm1, %xmm1, %k11078; CHECK-NEXT:    vpshufhw {{.*#+}} xmm0 {%k1} = mem[0,1,2,3,7,6,7,5]1079; CHECK-NEXT:    retq1080  %vec = load <8 x i16>, ptr %vp1081  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 6, i32 7, i32 5>1082  %cmp = icmp eq <8 x i16> %mask, zeroinitializer1083  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec21084  ret <8 x i16> %res1085}1086 1087define <8 x i16> @test_masked_z_8xi16_perm_high_mem_mask4(ptr %vp, <8 x i16> %mask) {1088; CHECK-LABEL: test_masked_z_8xi16_perm_high_mem_mask4:1089; CHECK:       # %bb.0:1090; CHECK-NEXT:    vptestnmw %xmm0, %xmm0, %k11091; CHECK-NEXT:    vpshufhw {{.*#+}} xmm0 {%k1} {z} = mem[0,1,2,3,7,6,7,5]1092; CHECK-NEXT:    retq1093  %vec = load <8 x i16>, ptr %vp1094  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 6, i32 7, i32 5>1095  %cmp = icmp eq <8 x i16> %mask, zeroinitializer1096  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> zeroinitializer1097  ret <8 x i16> %res1098}1099 1100define <8 x i16> @test_masked_8xi16_perm_low_mem_mask5(ptr %vp, <8 x i16> %vec2, <8 x i16> %mask) {1101; CHECK-LABEL: test_masked_8xi16_perm_low_mem_mask5:1102; CHECK:       # %bb.0:1103; CHECK-NEXT:    vptestnmw %xmm1, %xmm1, %k11104; CHECK-NEXT:    vpshuflw {{.*#+}} xmm0 {%k1} = mem[2,1,3,2,4,5,6,7]1105; CHECK-NEXT:    retq1106  %vec = load <8 x i16>, ptr %vp1107  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 2, i32 1, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7>1108  %cmp = icmp eq <8 x i16> %mask, zeroinitializer1109  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec21110  ret <8 x i16> %res1111}1112 1113define <8 x i16> @test_masked_z_8xi16_perm_low_mem_mask5(ptr %vp, <8 x i16> %mask) {1114; CHECK-LABEL: test_masked_z_8xi16_perm_low_mem_mask5:1115; CHECK:       # %bb.0:1116; CHECK-NEXT:    vptestnmw %xmm0, %xmm0, %k11117; CHECK-NEXT:    vpshuflw {{.*#+}} xmm0 {%k1} {z} = mem[2,1,3,2,4,5,6,7]1118; CHECK-NEXT:    retq1119  %vec = load <8 x i16>, ptr %vp1120  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 2, i32 1, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7>1121  %cmp = icmp eq <8 x i16> %mask, zeroinitializer1122  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> zeroinitializer1123  ret <8 x i16> %res1124}1125 1126define <8 x i16> @test_8xi16_perm_high_mem_mask6(ptr %vp) {1127; CHECK-LABEL: test_8xi16_perm_high_mem_mask6:1128; CHECK:       # %bb.0:1129; CHECK-NEXT:    vpshufhw {{.*#+}} xmm0 = mem[0,1,2,3,7,4,4,4]1130; CHECK-NEXT:    retq1131  %vec = load <8 x i16>, ptr %vp1132  %res = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 4, i32 4, i32 4>1133  ret <8 x i16> %res1134}1135define <8 x i16> @test_masked_8xi16_perm_high_mem_mask6(ptr %vp, <8 x i16> %vec2, <8 x i16> %mask) {1136; CHECK-LABEL: test_masked_8xi16_perm_high_mem_mask6:1137; CHECK:       # %bb.0:1138; CHECK-NEXT:    vptestnmw %xmm1, %xmm1, %k11139; CHECK-NEXT:    vpshufhw {{.*#+}} xmm0 {%k1} = mem[0,1,2,3,7,4,4,4]1140; CHECK-NEXT:    retq1141  %vec = load <8 x i16>, ptr %vp1142  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 4, i32 4, i32 4>1143  %cmp = icmp eq <8 x i16> %mask, zeroinitializer1144  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec21145  ret <8 x i16> %res1146}1147 1148define <8 x i16> @test_masked_z_8xi16_perm_high_mem_mask6(ptr %vp, <8 x i16> %mask) {1149; CHECK-LABEL: test_masked_z_8xi16_perm_high_mem_mask6:1150; CHECK:       # %bb.0:1151; CHECK-NEXT:    vptestnmw %xmm0, %xmm0, %k11152; CHECK-NEXT:    vpshufhw {{.*#+}} xmm0 {%k1} {z} = mem[0,1,2,3,7,4,4,4]1153; CHECK-NEXT:    retq1154  %vec = load <8 x i16>, ptr %vp1155  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 4, i32 4, i32 4>1156  %cmp = icmp eq <8 x i16> %mask, zeroinitializer1157  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> zeroinitializer1158  ret <8 x i16> %res1159}1160 1161define <8 x i16> @test_masked_8xi16_perm_low_mem_mask7(ptr %vp, <8 x i16> %vec2, <8 x i16> %mask) {1162; CHECK-LABEL: test_masked_8xi16_perm_low_mem_mask7:1163; CHECK:       # %bb.0:1164; CHECK-NEXT:    vptestnmw %xmm1, %xmm1, %k11165; CHECK-NEXT:    vpshuflw {{.*#+}} xmm0 {%k1} = mem[0,3,3,1,4,5,6,7]1166; CHECK-NEXT:    retq1167  %vec = load <8 x i16>, ptr %vp1168  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 3, i32 3, i32 1, i32 4, i32 5, i32 6, i32 7>1169  %cmp = icmp eq <8 x i16> %mask, zeroinitializer1170  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> %vec21171  ret <8 x i16> %res1172}1173 1174define <8 x i16> @test_masked_z_8xi16_perm_low_mem_mask7(ptr %vp, <8 x i16> %mask) {1175; CHECK-LABEL: test_masked_z_8xi16_perm_low_mem_mask7:1176; CHECK:       # %bb.0:1177; CHECK-NEXT:    vptestnmw %xmm0, %xmm0, %k11178; CHECK-NEXT:    vpshuflw {{.*#+}} xmm0 {%k1} {z} = mem[0,3,3,1,4,5,6,7]1179; CHECK-NEXT:    retq1180  %vec = load <8 x i16>, ptr %vp1181  %shuf = shufflevector <8 x i16> %vec, <8 x i16> undef, <8 x i32> <i32 0, i32 3, i32 3, i32 1, i32 4, i32 5, i32 6, i32 7>1182  %cmp = icmp eq <8 x i16> %mask, zeroinitializer1183  %res = select <8 x i1> %cmp, <8 x i16> %shuf, <8 x i16> zeroinitializer1184  ret <8 x i16> %res1185}1186 1187define <16 x i16> @test_16xi16_perm_high_mask0(<16 x i16> %vec) {1188; CHECK-LABEL: test_16xi16_perm_high_mask0:1189; CHECK:       # %bb.0:1190; CHECK-NEXT:    vpshufhw {{.*#+}} ymm0 = ymm0[0,1,2,3,4,4,6,4,8,9,10,11,12,12,14,12]1191; CHECK-NEXT:    retq1192  %res = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 6, i32 4, i32 8, i32 9, i32 10, i32 11, i32 12, i32 12, i32 14, i32 12>1193  ret <16 x i16> %res1194}1195define <16 x i16> @test_masked_16xi16_perm_high_mask0(<16 x i16> %vec, <16 x i16> %vec2, <16 x i16> %mask) {1196; CHECK-LABEL: test_masked_16xi16_perm_high_mask0:1197; CHECK:       # %bb.0:1198; CHECK-NEXT:    vptestnmw %ymm2, %ymm2, %k11199; CHECK-NEXT:    vpshufhw {{.*#+}} ymm1 {%k1} = ymm0[0,1,2,3,4,4,6,4,8,9,10,11,12,12,14,12]1200; CHECK-NEXT:    vmovdqa %ymm1, %ymm01201; CHECK-NEXT:    retq1202  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 6, i32 4, i32 8, i32 9, i32 10, i32 11, i32 12, i32 12, i32 14, i32 12>1203  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1204  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec21205  ret <16 x i16> %res1206}1207 1208define <16 x i16> @test_masked_z_16xi16_perm_high_mask0(<16 x i16> %vec, <16 x i16> %mask) {1209; CHECK-LABEL: test_masked_z_16xi16_perm_high_mask0:1210; CHECK:       # %bb.0:1211; CHECK-NEXT:    vptestnmw %ymm1, %ymm1, %k11212; CHECK-NEXT:    vpshufhw {{.*#+}} ymm0 {%k1} {z} = ymm0[0,1,2,3,4,4,6,4,8,9,10,11,12,12,14,12]1213; CHECK-NEXT:    retq1214  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 6, i32 4, i32 8, i32 9, i32 10, i32 11, i32 12, i32 12, i32 14, i32 12>1215  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1216  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer1217  ret <16 x i16> %res1218}1219define <16 x i16> @test_masked_16xi16_perm_low_mask1(<16 x i16> %vec, <16 x i16> %vec2, <16 x i16> %mask) {1220; CHECK-LABEL: test_masked_16xi16_perm_low_mask1:1221; CHECK:       # %bb.0:1222; CHECK-NEXT:    vptestnmw %ymm2, %ymm2, %k11223; CHECK-NEXT:    vpshuflw {{.*#+}} ymm1 {%k1} = ymm0[0,2,3,2,4,5,6,7,8,10,11,10,12,13,14,15]1224; CHECK-NEXT:    vmovdqa %ymm1, %ymm01225; CHECK-NEXT:    retq1226  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 2, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7, i32 8, i32 10, i32 11, i32 10, i32 12, i32 13, i32 14, i32 15>1227  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1228  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec21229  ret <16 x i16> %res1230}1231 1232define <16 x i16> @test_masked_z_16xi16_perm_low_mask1(<16 x i16> %vec, <16 x i16> %mask) {1233; CHECK-LABEL: test_masked_z_16xi16_perm_low_mask1:1234; CHECK:       # %bb.0:1235; CHECK-NEXT:    vptestnmw %ymm1, %ymm1, %k11236; CHECK-NEXT:    vpshuflw {{.*#+}} ymm0 {%k1} {z} = ymm0[0,2,3,2,4,5,6,7,8,10,11,10,12,13,14,15]1237; CHECK-NEXT:    retq1238  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 2, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7, i32 8, i32 10, i32 11, i32 10, i32 12, i32 13, i32 14, i32 15>1239  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1240  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer1241  ret <16 x i16> %res1242}1243define <16 x i16> @test_masked_16xi16_perm_high_mask2(<16 x i16> %vec, <16 x i16> %vec2, <16 x i16> %mask) {1244; CHECK-LABEL: test_masked_16xi16_perm_high_mask2:1245; CHECK:       # %bb.0:1246; CHECK-NEXT:    vptestnmw %ymm2, %ymm2, %k11247; CHECK-NEXT:    vpshufhw {{.*#+}} ymm1 {%k1} = ymm0[0,1,2,3,7,5,5,5,8,9,10,11,15,13,13,13]1248; CHECK-NEXT:    vmovdqa %ymm1, %ymm01249; CHECK-NEXT:    retq1250  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 5, i32 5, i32 5, i32 8, i32 9, i32 10, i32 11, i32 15, i32 13, i32 13, i32 13>1251  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1252  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec21253  ret <16 x i16> %res1254}1255 1256define <16 x i16> @test_masked_z_16xi16_perm_high_mask2(<16 x i16> %vec, <16 x i16> %mask) {1257; CHECK-LABEL: test_masked_z_16xi16_perm_high_mask2:1258; CHECK:       # %bb.0:1259; CHECK-NEXT:    vptestnmw %ymm1, %ymm1, %k11260; CHECK-NEXT:    vpshufhw {{.*#+}} ymm0 {%k1} {z} = ymm0[0,1,2,3,7,5,5,5,8,9,10,11,15,13,13,13]1261; CHECK-NEXT:    retq1262  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 5, i32 5, i32 5, i32 8, i32 9, i32 10, i32 11, i32 15, i32 13, i32 13, i32 13>1263  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1264  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer1265  ret <16 x i16> %res1266}1267define <16 x i16> @test_16xi16_perm_low_mask3(<16 x i16> %vec) {1268; CHECK-LABEL: test_16xi16_perm_low_mask3:1269; CHECK:       # %bb.0:1270; CHECK-NEXT:    vpshuflw {{.*#+}} ymm0 = ymm0[3,2,3,2,4,5,6,7,11,10,11,10,12,13,14,15]1271; CHECK-NEXT:    retq1272  %res = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 3, i32 2, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7, i32 11, i32 10, i32 11, i32 10, i32 12, i32 13, i32 14, i32 15>1273  ret <16 x i16> %res1274}1275define <16 x i16> @test_masked_16xi16_perm_low_mask3(<16 x i16> %vec, <16 x i16> %vec2, <16 x i16> %mask) {1276; CHECK-LABEL: test_masked_16xi16_perm_low_mask3:1277; CHECK:       # %bb.0:1278; CHECK-NEXT:    vptestnmw %ymm2, %ymm2, %k11279; CHECK-NEXT:    vpshuflw {{.*#+}} ymm1 {%k1} = ymm0[3,2,3,2,4,5,6,7,11,10,11,10,12,13,14,15]1280; CHECK-NEXT:    vmovdqa %ymm1, %ymm01281; CHECK-NEXT:    retq1282  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 3, i32 2, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7, i32 11, i32 10, i32 11, i32 10, i32 12, i32 13, i32 14, i32 15>1283  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1284  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec21285  ret <16 x i16> %res1286}1287 1288define <16 x i16> @test_masked_z_16xi16_perm_low_mask3(<16 x i16> %vec, <16 x i16> %mask) {1289; CHECK-LABEL: test_masked_z_16xi16_perm_low_mask3:1290; CHECK:       # %bb.0:1291; CHECK-NEXT:    vptestnmw %ymm1, %ymm1, %k11292; CHECK-NEXT:    vpshuflw {{.*#+}} ymm0 {%k1} {z} = ymm0[3,2,3,2,4,5,6,7,11,10,11,10,12,13,14,15]1293; CHECK-NEXT:    retq1294  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 3, i32 2, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7, i32 11, i32 10, i32 11, i32 10, i32 12, i32 13, i32 14, i32 15>1295  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1296  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer1297  ret <16 x i16> %res1298}1299define <16 x i16> @test_masked_16xi16_perm_high_mask4(<16 x i16> %vec, <16 x i16> %vec2, <16 x i16> %mask) {1300; CHECK-LABEL: test_masked_16xi16_perm_high_mask4:1301; CHECK:       # %bb.0:1302; CHECK-NEXT:    vptestnmw %ymm2, %ymm2, %k11303; CHECK-NEXT:    vpshufhw {{.*#+}} ymm1 {%k1} = ymm0[0,1,2,3,6,7,4,7,8,9,10,11,14,15,12,15]1304; CHECK-NEXT:    vmovdqa %ymm1, %ymm01305; CHECK-NEXT:    retq1306  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 6, i32 7, i32 4, i32 7, i32 8, i32 9, i32 10, i32 11, i32 14, i32 15, i32 12, i32 15>1307  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1308  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec21309  ret <16 x i16> %res1310}1311 1312define <16 x i16> @test_masked_z_16xi16_perm_high_mask4(<16 x i16> %vec, <16 x i16> %mask) {1313; CHECK-LABEL: test_masked_z_16xi16_perm_high_mask4:1314; CHECK:       # %bb.0:1315; CHECK-NEXT:    vptestnmw %ymm1, %ymm1, %k11316; CHECK-NEXT:    vpshufhw {{.*#+}} ymm0 {%k1} {z} = ymm0[0,1,2,3,6,7,4,7,8,9,10,11,14,15,12,15]1317; CHECK-NEXT:    retq1318  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 6, i32 7, i32 4, i32 7, i32 8, i32 9, i32 10, i32 11, i32 14, i32 15, i32 12, i32 15>1319  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1320  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer1321  ret <16 x i16> %res1322}1323define <16 x i16> @test_masked_16xi16_perm_low_mask5(<16 x i16> %vec, <16 x i16> %vec2, <16 x i16> %mask) {1324; CHECK-LABEL: test_masked_16xi16_perm_low_mask5:1325; CHECK:       # %bb.0:1326; CHECK-NEXT:    vptestnmw %ymm2, %ymm2, %k11327; CHECK-NEXT:    vpshuflw {{.*#+}} ymm1 {%k1} = ymm0[3,3,3,0,4,5,6,7,11,11,11,8,12,13,14,15]1328; CHECK-NEXT:    vmovdqa %ymm1, %ymm01329; CHECK-NEXT:    retq1330  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 3, i32 3, i32 3, i32 0, i32 4, i32 5, i32 6, i32 7, i32 11, i32 11, i32 11, i32 8, i32 12, i32 13, i32 14, i32 15>1331  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1332  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec21333  ret <16 x i16> %res1334}1335 1336define <16 x i16> @test_masked_z_16xi16_perm_low_mask5(<16 x i16> %vec, <16 x i16> %mask) {1337; CHECK-LABEL: test_masked_z_16xi16_perm_low_mask5:1338; CHECK:       # %bb.0:1339; CHECK-NEXT:    vptestnmw %ymm1, %ymm1, %k11340; CHECK-NEXT:    vpshuflw {{.*#+}} ymm0 {%k1} {z} = ymm0[3,3,3,0,4,5,6,7,11,11,11,8,12,13,14,15]1341; CHECK-NEXT:    retq1342  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 3, i32 3, i32 3, i32 0, i32 4, i32 5, i32 6, i32 7, i32 11, i32 11, i32 11, i32 8, i32 12, i32 13, i32 14, i32 15>1343  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1344  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer1345  ret <16 x i16> %res1346}1347define <16 x i16> @test_16xi16_perm_high_mask6(<16 x i16> %vec) {1348; CHECK-LABEL: test_16xi16_perm_high_mask6:1349; CHECK:       # %bb.0:1350; CHECK-NEXT:    vpshufhw {{.*#+}} ymm0 = ymm0[0,1,2,3,6,7,6,5,8,9,10,11,14,15,14,13]1351; CHECK-NEXT:    retq1352  %res = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 6, i32 7, i32 6, i32 5, i32 8, i32 9, i32 10, i32 11, i32 14, i32 15, i32 14, i32 13>1353  ret <16 x i16> %res1354}1355define <16 x i16> @test_masked_16xi16_perm_high_mask6(<16 x i16> %vec, <16 x i16> %vec2, <16 x i16> %mask) {1356; CHECK-LABEL: test_masked_16xi16_perm_high_mask6:1357; CHECK:       # %bb.0:1358; CHECK-NEXT:    vptestnmw %ymm2, %ymm2, %k11359; CHECK-NEXT:    vpshufhw {{.*#+}} ymm1 {%k1} = ymm0[0,1,2,3,6,7,6,5,8,9,10,11,14,15,14,13]1360; CHECK-NEXT:    vmovdqa %ymm1, %ymm01361; CHECK-NEXT:    retq1362  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 6, i32 7, i32 6, i32 5, i32 8, i32 9, i32 10, i32 11, i32 14, i32 15, i32 14, i32 13>1363  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1364  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec21365  ret <16 x i16> %res1366}1367 1368define <16 x i16> @test_masked_z_16xi16_perm_high_mask6(<16 x i16> %vec, <16 x i16> %mask) {1369; CHECK-LABEL: test_masked_z_16xi16_perm_high_mask6:1370; CHECK:       # %bb.0:1371; CHECK-NEXT:    vptestnmw %ymm1, %ymm1, %k11372; CHECK-NEXT:    vpshufhw {{.*#+}} ymm0 {%k1} {z} = ymm0[0,1,2,3,6,7,6,5,8,9,10,11,14,15,14,13]1373; CHECK-NEXT:    retq1374  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 6, i32 7, i32 6, i32 5, i32 8, i32 9, i32 10, i32 11, i32 14, i32 15, i32 14, i32 13>1375  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1376  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer1377  ret <16 x i16> %res1378}1379define <16 x i16> @test_masked_16xi16_perm_low_mask7(<16 x i16> %vec, <16 x i16> %vec2, <16 x i16> %mask) {1380; CHECK-LABEL: test_masked_16xi16_perm_low_mask7:1381; CHECK:       # %bb.0:1382; CHECK-NEXT:    vptestnmw %ymm2, %ymm2, %k11383; CHECK-NEXT:    vpshuflw {{.*#+}} ymm1 {%k1} = ymm0[3,2,1,2,4,5,6,7,11,10,9,10,12,13,14,15]1384; CHECK-NEXT:    vmovdqa %ymm1, %ymm01385; CHECK-NEXT:    retq1386  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 3, i32 2, i32 1, i32 2, i32 4, i32 5, i32 6, i32 7, i32 11, i32 10, i32 9, i32 10, i32 12, i32 13, i32 14, i32 15>1387  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1388  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec21389  ret <16 x i16> %res1390}1391 1392define <16 x i16> @test_masked_z_16xi16_perm_low_mask7(<16 x i16> %vec, <16 x i16> %mask) {1393; CHECK-LABEL: test_masked_z_16xi16_perm_low_mask7:1394; CHECK:       # %bb.0:1395; CHECK-NEXT:    vptestnmw %ymm1, %ymm1, %k11396; CHECK-NEXT:    vpshuflw {{.*#+}} ymm0 {%k1} {z} = ymm0[3,2,1,2,4,5,6,7,11,10,9,10,12,13,14,15]1397; CHECK-NEXT:    retq1398  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 3, i32 2, i32 1, i32 2, i32 4, i32 5, i32 6, i32 7, i32 11, i32 10, i32 9, i32 10, i32 12, i32 13, i32 14, i32 15>1399  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1400  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer1401  ret <16 x i16> %res1402}1403define <16 x i16> @test_16xi16_perm_high_mem_mask0(ptr %vp) {1404; CHECK-LABEL: test_16xi16_perm_high_mem_mask0:1405; CHECK:       # %bb.0:1406; CHECK-NEXT:    vpshufhw {{.*#+}} ymm0 = mem[0,1,2,3,5,6,4,7,8,9,10,11,13,14,12,15]1407; CHECK-NEXT:    retq1408  %vec = load <16 x i16>, ptr %vp1409  %res = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 6, i32 4, i32 7, i32 8, i32 9, i32 10, i32 11, i32 13, i32 14, i32 12, i32 15>1410  ret <16 x i16> %res1411}1412define <16 x i16> @test_masked_16xi16_perm_high_mem_mask0(ptr %vp, <16 x i16> %vec2, <16 x i16> %mask) {1413; CHECK-LABEL: test_masked_16xi16_perm_high_mem_mask0:1414; CHECK:       # %bb.0:1415; CHECK-NEXT:    vptestnmw %ymm1, %ymm1, %k11416; CHECK-NEXT:    vpshufhw {{.*#+}} ymm0 {%k1} = mem[0,1,2,3,5,6,4,7,8,9,10,11,13,14,12,15]1417; CHECK-NEXT:    retq1418  %vec = load <16 x i16>, ptr %vp1419  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 6, i32 4, i32 7, i32 8, i32 9, i32 10, i32 11, i32 13, i32 14, i32 12, i32 15>1420  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1421  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec21422  ret <16 x i16> %res1423}1424 1425define <16 x i16> @test_masked_z_16xi16_perm_high_mem_mask0(ptr %vp, <16 x i16> %mask) {1426; CHECK-LABEL: test_masked_z_16xi16_perm_high_mem_mask0:1427; CHECK:       # %bb.0:1428; CHECK-NEXT:    vptestnmw %ymm0, %ymm0, %k11429; CHECK-NEXT:    vpshufhw {{.*#+}} ymm0 {%k1} {z} = mem[0,1,2,3,5,6,4,7,8,9,10,11,13,14,12,15]1430; CHECK-NEXT:    retq1431  %vec = load <16 x i16>, ptr %vp1432  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 6, i32 4, i32 7, i32 8, i32 9, i32 10, i32 11, i32 13, i32 14, i32 12, i32 15>1433  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1434  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer1435  ret <16 x i16> %res1436}1437 1438define <16 x i16> @test_masked_16xi16_perm_low_mem_mask1(ptr %vp, <16 x i16> %vec2, <16 x i16> %mask) {1439; CHECK-LABEL: test_masked_16xi16_perm_low_mem_mask1:1440; CHECK:       # %bb.0:1441; CHECK-NEXT:    vptestnmw %ymm1, %ymm1, %k11442; CHECK-NEXT:    vpshuflw {{.*#+}} ymm0 {%k1} = mem[1,3,3,0,4,5,6,7,9,11,11,8,12,13,14,15]1443; CHECK-NEXT:    retq1444  %vec = load <16 x i16>, ptr %vp1445  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 1, i32 3, i32 3, i32 0, i32 4, i32 5, i32 6, i32 7, i32 9, i32 11, i32 11, i32 8, i32 12, i32 13, i32 14, i32 15>1446  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1447  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec21448  ret <16 x i16> %res1449}1450 1451define <16 x i16> @test_masked_z_16xi16_perm_low_mem_mask1(ptr %vp, <16 x i16> %mask) {1452; CHECK-LABEL: test_masked_z_16xi16_perm_low_mem_mask1:1453; CHECK:       # %bb.0:1454; CHECK-NEXT:    vptestnmw %ymm0, %ymm0, %k11455; CHECK-NEXT:    vpshuflw {{.*#+}} ymm0 {%k1} {z} = mem[1,3,3,0,4,5,6,7,9,11,11,8,12,13,14,15]1456; CHECK-NEXT:    retq1457  %vec = load <16 x i16>, ptr %vp1458  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 1, i32 3, i32 3, i32 0, i32 4, i32 5, i32 6, i32 7, i32 9, i32 11, i32 11, i32 8, i32 12, i32 13, i32 14, i32 15>1459  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1460  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer1461  ret <16 x i16> %res1462}1463 1464define <16 x i16> @test_masked_16xi16_perm_high_mem_mask2(ptr %vp, <16 x i16> %vec2, <16 x i16> %mask) {1465; CHECK-LABEL: test_masked_16xi16_perm_high_mem_mask2:1466; CHECK:       # %bb.0:1467; CHECK-NEXT:    vptestnmw %ymm1, %ymm1, %k11468; CHECK-NEXT:    vpshufhw {{.*#+}} ymm0 {%k1} = mem[0,1,2,3,5,6,5,6,8,9,10,11,13,14,13,14]1469; CHECK-NEXT:    retq1470  %vec = load <16 x i16>, ptr %vp1471  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 6, i32 5, i32 6, i32 8, i32 9, i32 10, i32 11, i32 13, i32 14, i32 13, i32 14>1472  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1473  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec21474  ret <16 x i16> %res1475}1476 1477define <16 x i16> @test_masked_z_16xi16_perm_high_mem_mask2(ptr %vp, <16 x i16> %mask) {1478; CHECK-LABEL: test_masked_z_16xi16_perm_high_mem_mask2:1479; CHECK:       # %bb.0:1480; CHECK-NEXT:    vptestnmw %ymm0, %ymm0, %k11481; CHECK-NEXT:    vpshufhw {{.*#+}} ymm0 {%k1} {z} = mem[0,1,2,3,5,6,5,6,8,9,10,11,13,14,13,14]1482; CHECK-NEXT:    retq1483  %vec = load <16 x i16>, ptr %vp1484  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 6, i32 5, i32 6, i32 8, i32 9, i32 10, i32 11, i32 13, i32 14, i32 13, i32 14>1485  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1486  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer1487  ret <16 x i16> %res1488}1489 1490define <16 x i16> @test_16xi16_perm_low_mem_mask3(ptr %vp) {1491; CHECK-LABEL: test_16xi16_perm_low_mem_mask3:1492; CHECK:       # %bb.0:1493; CHECK-NEXT:    vpshuflw {{.*#+}} ymm0 = mem[3,2,3,0,4,5,6,7,11,10,11,8,12,13,14,15]1494; CHECK-NEXT:    retq1495  %vec = load <16 x i16>, ptr %vp1496  %res = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 3, i32 2, i32 3, i32 0, i32 4, i32 5, i32 6, i32 7, i32 11, i32 10, i32 11, i32 8, i32 12, i32 13, i32 14, i32 15>1497  ret <16 x i16> %res1498}1499define <16 x i16> @test_masked_16xi16_perm_low_mem_mask3(ptr %vp, <16 x i16> %vec2, <16 x i16> %mask) {1500; CHECK-LABEL: test_masked_16xi16_perm_low_mem_mask3:1501; CHECK:       # %bb.0:1502; CHECK-NEXT:    vptestnmw %ymm1, %ymm1, %k11503; CHECK-NEXT:    vpshuflw {{.*#+}} ymm0 {%k1} = mem[3,2,3,0,4,5,6,7,11,10,11,8,12,13,14,15]1504; CHECK-NEXT:    retq1505  %vec = load <16 x i16>, ptr %vp1506  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 3, i32 2, i32 3, i32 0, i32 4, i32 5, i32 6, i32 7, i32 11, i32 10, i32 11, i32 8, i32 12, i32 13, i32 14, i32 15>1507  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1508  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec21509  ret <16 x i16> %res1510}1511 1512define <16 x i16> @test_masked_z_16xi16_perm_low_mem_mask3(ptr %vp, <16 x i16> %mask) {1513; CHECK-LABEL: test_masked_z_16xi16_perm_low_mem_mask3:1514; CHECK:       # %bb.0:1515; CHECK-NEXT:    vptestnmw %ymm0, %ymm0, %k11516; CHECK-NEXT:    vpshuflw {{.*#+}} ymm0 {%k1} {z} = mem[3,2,3,0,4,5,6,7,11,10,11,8,12,13,14,15]1517; CHECK-NEXT:    retq1518  %vec = load <16 x i16>, ptr %vp1519  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 3, i32 2, i32 3, i32 0, i32 4, i32 5, i32 6, i32 7, i32 11, i32 10, i32 11, i32 8, i32 12, i32 13, i32 14, i32 15>1520  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1521  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer1522  ret <16 x i16> %res1523}1524 1525define <16 x i16> @test_masked_16xi16_perm_high_mem_mask4(ptr %vp, <16 x i16> %vec2, <16 x i16> %mask) {1526; CHECK-LABEL: test_masked_16xi16_perm_high_mem_mask4:1527; CHECK:       # %bb.0:1528; CHECK-NEXT:    vptestnmw %ymm1, %ymm1, %k11529; CHECK-NEXT:    vpshufhw {{.*#+}} ymm0 {%k1} = mem[0,1,2,3,7,7,6,7,8,9,10,11,15,15,14,15]1530; CHECK-NEXT:    retq1531  %vec = load <16 x i16>, ptr %vp1532  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 7, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 15, i32 15, i32 14, i32 15>1533  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1534  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec21535  ret <16 x i16> %res1536}1537 1538define <16 x i16> @test_masked_z_16xi16_perm_high_mem_mask4(ptr %vp, <16 x i16> %mask) {1539; CHECK-LABEL: test_masked_z_16xi16_perm_high_mem_mask4:1540; CHECK:       # %bb.0:1541; CHECK-NEXT:    vptestnmw %ymm0, %ymm0, %k11542; CHECK-NEXT:    vpshufhw {{.*#+}} ymm0 {%k1} {z} = mem[0,1,2,3,7,7,6,7,8,9,10,11,15,15,14,15]1543; CHECK-NEXT:    retq1544  %vec = load <16 x i16>, ptr %vp1545  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 7, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 15, i32 15, i32 14, i32 15>1546  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1547  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer1548  ret <16 x i16> %res1549}1550 1551define <16 x i16> @test_masked_16xi16_perm_low_mem_mask5(ptr %vp, <16 x i16> %vec2, <16 x i16> %mask) {1552; CHECK-LABEL: test_masked_16xi16_perm_low_mem_mask5:1553; CHECK:       # %bb.0:1554; CHECK-NEXT:    vptestnmw %ymm1, %ymm1, %k11555; CHECK-NEXT:    vpshuflw {{.*#+}} ymm0 {%k1} = mem[1,3,3,2,4,5,6,7,9,11,11,10,12,13,14,15]1556; CHECK-NEXT:    retq1557  %vec = load <16 x i16>, ptr %vp1558  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 1, i32 3, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7, i32 9, i32 11, i32 11, i32 10, i32 12, i32 13, i32 14, i32 15>1559  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1560  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec21561  ret <16 x i16> %res1562}1563 1564define <16 x i16> @test_masked_z_16xi16_perm_low_mem_mask5(ptr %vp, <16 x i16> %mask) {1565; CHECK-LABEL: test_masked_z_16xi16_perm_low_mem_mask5:1566; CHECK:       # %bb.0:1567; CHECK-NEXT:    vptestnmw %ymm0, %ymm0, %k11568; CHECK-NEXT:    vpshuflw {{.*#+}} ymm0 {%k1} {z} = mem[1,3,3,2,4,5,6,7,9,11,11,10,12,13,14,15]1569; CHECK-NEXT:    retq1570  %vec = load <16 x i16>, ptr %vp1571  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 1, i32 3, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7, i32 9, i32 11, i32 11, i32 10, i32 12, i32 13, i32 14, i32 15>1572  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1573  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer1574  ret <16 x i16> %res1575}1576 1577define <16 x i16> @test_16xi16_perm_high_mem_mask6(ptr %vp) {1578; CHECK-LABEL: test_16xi16_perm_high_mem_mask6:1579; CHECK:       # %bb.0:1580; CHECK-NEXT:    vpshufhw {{.*#+}} ymm0 = mem[0,1,2,3,4,4,4,5,8,9,10,11,12,12,12,13]1581; CHECK-NEXT:    retq1582  %vec = load <16 x i16>, ptr %vp1583  %res = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 5, i32 8, i32 9, i32 10, i32 11, i32 12, i32 12, i32 12, i32 13>1584  ret <16 x i16> %res1585}1586define <16 x i16> @test_masked_16xi16_perm_high_mem_mask6(ptr %vp, <16 x i16> %vec2, <16 x i16> %mask) {1587; CHECK-LABEL: test_masked_16xi16_perm_high_mem_mask6:1588; CHECK:       # %bb.0:1589; CHECK-NEXT:    vptestnmw %ymm1, %ymm1, %k11590; CHECK-NEXT:    vpshufhw {{.*#+}} ymm0 {%k1} = mem[0,1,2,3,4,4,4,5,8,9,10,11,12,12,12,13]1591; CHECK-NEXT:    retq1592  %vec = load <16 x i16>, ptr %vp1593  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 5, i32 8, i32 9, i32 10, i32 11, i32 12, i32 12, i32 12, i32 13>1594  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1595  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec21596  ret <16 x i16> %res1597}1598 1599define <16 x i16> @test_masked_z_16xi16_perm_high_mem_mask6(ptr %vp, <16 x i16> %mask) {1600; CHECK-LABEL: test_masked_z_16xi16_perm_high_mem_mask6:1601; CHECK:       # %bb.0:1602; CHECK-NEXT:    vptestnmw %ymm0, %ymm0, %k11603; CHECK-NEXT:    vpshufhw {{.*#+}} ymm0 {%k1} {z} = mem[0,1,2,3,4,4,4,5,8,9,10,11,12,12,12,13]1604; CHECK-NEXT:    retq1605  %vec = load <16 x i16>, ptr %vp1606  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 5, i32 8, i32 9, i32 10, i32 11, i32 12, i32 12, i32 12, i32 13>1607  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1608  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer1609  ret <16 x i16> %res1610}1611 1612define <16 x i16> @test_masked_16xi16_perm_low_mem_mask7(ptr %vp, <16 x i16> %vec2, <16 x i16> %mask) {1613; CHECK-LABEL: test_masked_16xi16_perm_low_mem_mask7:1614; CHECK:       # %bb.0:1615; CHECK-NEXT:    vptestnmw %ymm1, %ymm1, %k11616; CHECK-NEXT:    vpshuflw {{.*#+}} ymm0 {%k1} = mem[3,1,3,2,4,5,6,7,11,9,11,10,12,13,14,15]1617; CHECK-NEXT:    retq1618  %vec = load <16 x i16>, ptr %vp1619  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 3, i32 1, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7, i32 11, i32 9, i32 11, i32 10, i32 12, i32 13, i32 14, i32 15>1620  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1621  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> %vec21622  ret <16 x i16> %res1623}1624 1625define <16 x i16> @test_masked_z_16xi16_perm_low_mem_mask7(ptr %vp, <16 x i16> %mask) {1626; CHECK-LABEL: test_masked_z_16xi16_perm_low_mem_mask7:1627; CHECK:       # %bb.0:1628; CHECK-NEXT:    vptestnmw %ymm0, %ymm0, %k11629; CHECK-NEXT:    vpshuflw {{.*#+}} ymm0 {%k1} {z} = mem[3,1,3,2,4,5,6,7,11,9,11,10,12,13,14,15]1630; CHECK-NEXT:    retq1631  %vec = load <16 x i16>, ptr %vp1632  %shuf = shufflevector <16 x i16> %vec, <16 x i16> undef, <16 x i32> <i32 3, i32 1, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7, i32 11, i32 9, i32 11, i32 10, i32 12, i32 13, i32 14, i32 15>1633  %cmp = icmp eq <16 x i16> %mask, zeroinitializer1634  %res = select <16 x i1> %cmp, <16 x i16> %shuf, <16 x i16> zeroinitializer1635  ret <16 x i16> %res1636}1637 1638define <32 x i16> @test_32xi16_perm_high_mask0(<32 x i16> %vec) {1639; CHECK-LABEL: test_32xi16_perm_high_mask0:1640; CHECK:       # %bb.0:1641; CHECK-NEXT:    vpshufhw {{.*#+}} zmm0 = zmm0[0,1,2,3,4,5,6,4,8,9,10,11,12,13,14,12,16,17,18,19,20,21,22,20,24,25,26,27,28,29,30,28]1642; CHECK-NEXT:    retq1643  %res = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 4, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 12, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 20, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 28>1644  ret <32 x i16> %res1645}1646define <32 x i16> @test_masked_32xi16_perm_high_mask0(<32 x i16> %vec, <32 x i16> %vec2, <32 x i16> %mask) {1647; CHECK-LABEL: test_masked_32xi16_perm_high_mask0:1648; CHECK:       # %bb.0:1649; CHECK-NEXT:    vptestnmw %zmm2, %zmm2, %k11650; CHECK-NEXT:    vpshufhw {{.*#+}} zmm1 {%k1} = zmm0[0,1,2,3,4,5,6,4,8,9,10,11,12,13,14,12,16,17,18,19,20,21,22,20,24,25,26,27,28,29,30,28]1651; CHECK-NEXT:    vmovdqa64 %zmm1, %zmm01652; CHECK-NEXT:    retq1653  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 4, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 12, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 20, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 28>1654  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1655  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec21656  ret <32 x i16> %res1657}1658 1659define <32 x i16> @test_masked_z_32xi16_perm_high_mask0(<32 x i16> %vec, <32 x i16> %mask) {1660; CHECK-LABEL: test_masked_z_32xi16_perm_high_mask0:1661; CHECK:       # %bb.0:1662; CHECK-NEXT:    vptestnmw %zmm1, %zmm1, %k11663; CHECK-NEXT:    vpshufhw {{.*#+}} zmm0 {%k1} {z} = zmm0[0,1,2,3,4,5,6,4,8,9,10,11,12,13,14,12,16,17,18,19,20,21,22,20,24,25,26,27,28,29,30,28]1664; CHECK-NEXT:    retq1665  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 4, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 12, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 20, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 28>1666  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1667  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer1668  ret <32 x i16> %res1669}1670define <32 x i16> @test_masked_32xi16_perm_low_mask1(<32 x i16> %vec, <32 x i16> %vec2, <32 x i16> %mask) {1671; CHECK-LABEL: test_masked_32xi16_perm_low_mask1:1672; CHECK:       # %bb.0:1673; CHECK-NEXT:    vptestnmw %zmm2, %zmm2, %k11674; CHECK-NEXT:    vpshuflw {{.*#+}} zmm1 {%k1} = zmm0[2,1,0,0,4,5,6,7,10,9,8,8,12,13,14,15,18,17,16,16,20,21,22,23,26,25,24,24,28,29,30,31]1675; CHECK-NEXT:    vmovdqa64 %zmm1, %zmm01676; CHECK-NEXT:    retq1677  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 2, i32 1, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7, i32 10, i32 9, i32 8, i32 8, i32 12, i32 13, i32 14, i32 15, i32 18, i32 17, i32 16, i32 16, i32 20, i32 21, i32 22, i32 23, i32 26, i32 25, i32 24, i32 24, i32 28, i32 29, i32 30, i32 31>1678  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1679  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec21680  ret <32 x i16> %res1681}1682 1683define <32 x i16> @test_masked_z_32xi16_perm_low_mask1(<32 x i16> %vec, <32 x i16> %mask) {1684; CHECK-LABEL: test_masked_z_32xi16_perm_low_mask1:1685; CHECK:       # %bb.0:1686; CHECK-NEXT:    vptestnmw %zmm1, %zmm1, %k11687; CHECK-NEXT:    vpshuflw {{.*#+}} zmm0 {%k1} {z} = zmm0[2,1,0,0,4,5,6,7,10,9,8,8,12,13,14,15,18,17,16,16,20,21,22,23,26,25,24,24,28,29,30,31]1688; CHECK-NEXT:    retq1689  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 2, i32 1, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7, i32 10, i32 9, i32 8, i32 8, i32 12, i32 13, i32 14, i32 15, i32 18, i32 17, i32 16, i32 16, i32 20, i32 21, i32 22, i32 23, i32 26, i32 25, i32 24, i32 24, i32 28, i32 29, i32 30, i32 31>1690  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1691  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer1692  ret <32 x i16> %res1693}1694define <32 x i16> @test_masked_32xi16_perm_high_mask2(<32 x i16> %vec, <32 x i16> %vec2, <32 x i16> %mask) {1695; CHECK-LABEL: test_masked_32xi16_perm_high_mask2:1696; CHECK:       # %bb.0:1697; CHECK-NEXT:    vptestnmw %zmm2, %zmm2, %k11698; CHECK-NEXT:    vpshufhw {{.*#+}} zmm1 {%k1} = zmm0[0,1,2,3,4,6,4,7,8,9,10,11,12,14,12,15,16,17,18,19,20,22,20,23,24,25,26,27,28,30,28,31]1699; CHECK-NEXT:    vmovdqa64 %zmm1, %zmm01700; CHECK-NEXT:    retq1701  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 6, i32 4, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 14, i32 12, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 22, i32 20, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 30, i32 28, i32 31>1702  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1703  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec21704  ret <32 x i16> %res1705}1706 1707define <32 x i16> @test_masked_z_32xi16_perm_high_mask2(<32 x i16> %vec, <32 x i16> %mask) {1708; CHECK-LABEL: test_masked_z_32xi16_perm_high_mask2:1709; CHECK:       # %bb.0:1710; CHECK-NEXT:    vptestnmw %zmm1, %zmm1, %k11711; CHECK-NEXT:    vpshufhw {{.*#+}} zmm0 {%k1} {z} = zmm0[0,1,2,3,4,6,4,7,8,9,10,11,12,14,12,15,16,17,18,19,20,22,20,23,24,25,26,27,28,30,28,31]1712; CHECK-NEXT:    retq1713  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 6, i32 4, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 14, i32 12, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 22, i32 20, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 30, i32 28, i32 31>1714  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1715  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer1716  ret <32 x i16> %res1717}1718define <32 x i16> @test_32xi16_perm_low_mask3(<32 x i16> %vec) {1719; CHECK-LABEL: test_32xi16_perm_low_mask3:1720; CHECK:       # %bb.0:1721; CHECK-NEXT:    vpshuflw {{.*#+}} zmm0 = zmm0[3,3,1,3,4,5,6,7,11,11,9,11,12,13,14,15,19,19,17,19,20,21,22,23,27,27,25,27,28,29,30,31]1722; CHECK-NEXT:    retq1723  %res = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 3, i32 3, i32 1, i32 3, i32 4, i32 5, i32 6, i32 7, i32 11, i32 11, i32 9, i32 11, i32 12, i32 13, i32 14, i32 15, i32 19, i32 19, i32 17, i32 19, i32 20, i32 21, i32 22, i32 23, i32 27, i32 27, i32 25, i32 27, i32 28, i32 29, i32 30, i32 31>1724  ret <32 x i16> %res1725}1726define <32 x i16> @test_masked_32xi16_perm_low_mask3(<32 x i16> %vec, <32 x i16> %vec2, <32 x i16> %mask) {1727; CHECK-LABEL: test_masked_32xi16_perm_low_mask3:1728; CHECK:       # %bb.0:1729; CHECK-NEXT:    vptestnmw %zmm2, %zmm2, %k11730; CHECK-NEXT:    vpshuflw {{.*#+}} zmm1 {%k1} = zmm0[3,3,1,3,4,5,6,7,11,11,9,11,12,13,14,15,19,19,17,19,20,21,22,23,27,27,25,27,28,29,30,31]1731; CHECK-NEXT:    vmovdqa64 %zmm1, %zmm01732; CHECK-NEXT:    retq1733  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 3, i32 3, i32 1, i32 3, i32 4, i32 5, i32 6, i32 7, i32 11, i32 11, i32 9, i32 11, i32 12, i32 13, i32 14, i32 15, i32 19, i32 19, i32 17, i32 19, i32 20, i32 21, i32 22, i32 23, i32 27, i32 27, i32 25, i32 27, i32 28, i32 29, i32 30, i32 31>1734  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1735  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec21736  ret <32 x i16> %res1737}1738 1739define <32 x i16> @test_masked_z_32xi16_perm_low_mask3(<32 x i16> %vec, <32 x i16> %mask) {1740; CHECK-LABEL: test_masked_z_32xi16_perm_low_mask3:1741; CHECK:       # %bb.0:1742; CHECK-NEXT:    vptestnmw %zmm1, %zmm1, %k11743; CHECK-NEXT:    vpshuflw {{.*#+}} zmm0 {%k1} {z} = zmm0[3,3,1,3,4,5,6,7,11,11,9,11,12,13,14,15,19,19,17,19,20,21,22,23,27,27,25,27,28,29,30,31]1744; CHECK-NEXT:    retq1745  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 3, i32 3, i32 1, i32 3, i32 4, i32 5, i32 6, i32 7, i32 11, i32 11, i32 9, i32 11, i32 12, i32 13, i32 14, i32 15, i32 19, i32 19, i32 17, i32 19, i32 20, i32 21, i32 22, i32 23, i32 27, i32 27, i32 25, i32 27, i32 28, i32 29, i32 30, i32 31>1746  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1747  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer1748  ret <32 x i16> %res1749}1750define <32 x i16> @test_masked_32xi16_perm_high_mask4(<32 x i16> %vec, <32 x i16> %vec2, <32 x i16> %mask) {1751; CHECK-LABEL: test_masked_32xi16_perm_high_mask4:1752; CHECK:       # %bb.0:1753; CHECK-NEXT:    vptestnmw %zmm2, %zmm2, %k11754; CHECK-NEXT:    vpshufhw {{.*#+}} zmm1 {%k1} = zmm0[0,1,2,3,7,7,5,6,8,9,10,11,15,15,13,14,16,17,18,19,23,23,21,22,24,25,26,27,31,31,29,30]1755; CHECK-NEXT:    vmovdqa64 %zmm1, %zmm01756; CHECK-NEXT:    retq1757  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 7, i32 5, i32 6, i32 8, i32 9, i32 10, i32 11, i32 15, i32 15, i32 13, i32 14, i32 16, i32 17, i32 18, i32 19, i32 23, i32 23, i32 21, i32 22, i32 24, i32 25, i32 26, i32 27, i32 31, i32 31, i32 29, i32 30>1758  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1759  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec21760  ret <32 x i16> %res1761}1762 1763define <32 x i16> @test_masked_z_32xi16_perm_high_mask4(<32 x i16> %vec, <32 x i16> %mask) {1764; CHECK-LABEL: test_masked_z_32xi16_perm_high_mask4:1765; CHECK:       # %bb.0:1766; CHECK-NEXT:    vptestnmw %zmm1, %zmm1, %k11767; CHECK-NEXT:    vpshufhw {{.*#+}} zmm0 {%k1} {z} = zmm0[0,1,2,3,7,7,5,6,8,9,10,11,15,15,13,14,16,17,18,19,23,23,21,22,24,25,26,27,31,31,29,30]1768; CHECK-NEXT:    retq1769  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 7, i32 5, i32 6, i32 8, i32 9, i32 10, i32 11, i32 15, i32 15, i32 13, i32 14, i32 16, i32 17, i32 18, i32 19, i32 23, i32 23, i32 21, i32 22, i32 24, i32 25, i32 26, i32 27, i32 31, i32 31, i32 29, i32 30>1770  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1771  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer1772  ret <32 x i16> %res1773}1774define <32 x i16> @test_masked_32xi16_perm_low_mask5(<32 x i16> %vec, <32 x i16> %vec2, <32 x i16> %mask) {1775; CHECK-LABEL: test_masked_32xi16_perm_low_mask5:1776; CHECK:       # %bb.0:1777; CHECK-NEXT:    vptestnmw %zmm2, %zmm2, %k11778; CHECK-NEXT:    vpshuflw {{.*#+}} zmm1 {%k1} = zmm0[2,1,1,0,4,5,6,7,10,9,9,8,12,13,14,15,18,17,17,16,20,21,22,23,26,25,25,24,28,29,30,31]1779; CHECK-NEXT:    vmovdqa64 %zmm1, %zmm01780; CHECK-NEXT:    retq1781  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 2, i32 1, i32 1, i32 0, i32 4, i32 5, i32 6, i32 7, i32 10, i32 9, i32 9, i32 8, i32 12, i32 13, i32 14, i32 15, i32 18, i32 17, i32 17, i32 16, i32 20, i32 21, i32 22, i32 23, i32 26, i32 25, i32 25, i32 24, i32 28, i32 29, i32 30, i32 31>1782  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1783  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec21784  ret <32 x i16> %res1785}1786 1787define <32 x i16> @test_masked_z_32xi16_perm_low_mask5(<32 x i16> %vec, <32 x i16> %mask) {1788; CHECK-LABEL: test_masked_z_32xi16_perm_low_mask5:1789; CHECK:       # %bb.0:1790; CHECK-NEXT:    vptestnmw %zmm1, %zmm1, %k11791; CHECK-NEXT:    vpshuflw {{.*#+}} zmm0 {%k1} {z} = zmm0[2,1,1,0,4,5,6,7,10,9,9,8,12,13,14,15,18,17,17,16,20,21,22,23,26,25,25,24,28,29,30,31]1792; CHECK-NEXT:    retq1793  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 2, i32 1, i32 1, i32 0, i32 4, i32 5, i32 6, i32 7, i32 10, i32 9, i32 9, i32 8, i32 12, i32 13, i32 14, i32 15, i32 18, i32 17, i32 17, i32 16, i32 20, i32 21, i32 22, i32 23, i32 26, i32 25, i32 25, i32 24, i32 28, i32 29, i32 30, i32 31>1794  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1795  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer1796  ret <32 x i16> %res1797}1798define <32 x i16> @test_32xi16_perm_high_mask6(<32 x i16> %vec) {1799; CHECK-LABEL: test_32xi16_perm_high_mask6:1800; CHECK:       # %bb.0:1801; CHECK-NEXT:    vpshufhw {{.*#+}} zmm0 = zmm0[0,1,2,3,4,4,5,6,8,9,10,11,12,12,13,14,16,17,18,19,20,20,21,22,24,25,26,27,28,28,29,30]1802; CHECK-NEXT:    retq1803  %res = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 5, i32 6, i32 8, i32 9, i32 10, i32 11, i32 12, i32 12, i32 13, i32 14, i32 16, i32 17, i32 18, i32 19, i32 20, i32 20, i32 21, i32 22, i32 24, i32 25, i32 26, i32 27, i32 28, i32 28, i32 29, i32 30>1804  ret <32 x i16> %res1805}1806define <32 x i16> @test_masked_32xi16_perm_high_mask6(<32 x i16> %vec, <32 x i16> %vec2, <32 x i16> %mask) {1807; CHECK-LABEL: test_masked_32xi16_perm_high_mask6:1808; CHECK:       # %bb.0:1809; CHECK-NEXT:    vptestnmw %zmm2, %zmm2, %k11810; CHECK-NEXT:    vpshufhw {{.*#+}} zmm1 {%k1} = zmm0[0,1,2,3,4,4,5,6,8,9,10,11,12,12,13,14,16,17,18,19,20,20,21,22,24,25,26,27,28,28,29,30]1811; CHECK-NEXT:    vmovdqa64 %zmm1, %zmm01812; CHECK-NEXT:    retq1813  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 5, i32 6, i32 8, i32 9, i32 10, i32 11, i32 12, i32 12, i32 13, i32 14, i32 16, i32 17, i32 18, i32 19, i32 20, i32 20, i32 21, i32 22, i32 24, i32 25, i32 26, i32 27, i32 28, i32 28, i32 29, i32 30>1814  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1815  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec21816  ret <32 x i16> %res1817}1818 1819define <32 x i16> @test_masked_z_32xi16_perm_high_mask6(<32 x i16> %vec, <32 x i16> %mask) {1820; CHECK-LABEL: test_masked_z_32xi16_perm_high_mask6:1821; CHECK:       # %bb.0:1822; CHECK-NEXT:    vptestnmw %zmm1, %zmm1, %k11823; CHECK-NEXT:    vpshufhw {{.*#+}} zmm0 {%k1} {z} = zmm0[0,1,2,3,4,4,5,6,8,9,10,11,12,12,13,14,16,17,18,19,20,20,21,22,24,25,26,27,28,28,29,30]1824; CHECK-NEXT:    retq1825  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 5, i32 6, i32 8, i32 9, i32 10, i32 11, i32 12, i32 12, i32 13, i32 14, i32 16, i32 17, i32 18, i32 19, i32 20, i32 20, i32 21, i32 22, i32 24, i32 25, i32 26, i32 27, i32 28, i32 28, i32 29, i32 30>1826  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1827  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer1828  ret <32 x i16> %res1829}1830define <32 x i16> @test_masked_32xi16_perm_low_mask7(<32 x i16> %vec, <32 x i16> %vec2, <32 x i16> %mask) {1831; CHECK-LABEL: test_masked_32xi16_perm_low_mask7:1832; CHECK:       # %bb.0:1833; CHECK-NEXT:    vptestnmw %zmm2, %zmm2, %k11834; CHECK-NEXT:    vpshuflw {{.*#+}} zmm1 {%k1} = zmm0[3,0,3,0,4,5,6,7,11,8,11,8,12,13,14,15,19,16,19,16,20,21,22,23,27,24,27,24,28,29,30,31]1835; CHECK-NEXT:    vmovdqa64 %zmm1, %zmm01836; CHECK-NEXT:    retq1837  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 3, i32 0, i32 3, i32 0, i32 4, i32 5, i32 6, i32 7, i32 11, i32 8, i32 11, i32 8, i32 12, i32 13, i32 14, i32 15, i32 19, i32 16, i32 19, i32 16, i32 20, i32 21, i32 22, i32 23, i32 27, i32 24, i32 27, i32 24, i32 28, i32 29, i32 30, i32 31>1838  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1839  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec21840  ret <32 x i16> %res1841}1842 1843define <32 x i16> @test_masked_z_32xi16_perm_low_mask7(<32 x i16> %vec, <32 x i16> %mask) {1844; CHECK-LABEL: test_masked_z_32xi16_perm_low_mask7:1845; CHECK:       # %bb.0:1846; CHECK-NEXT:    vptestnmw %zmm1, %zmm1, %k11847; CHECK-NEXT:    vpshuflw {{.*#+}} zmm0 {%k1} {z} = zmm0[3,0,3,0,4,5,6,7,11,8,11,8,12,13,14,15,19,16,19,16,20,21,22,23,27,24,27,24,28,29,30,31]1848; CHECK-NEXT:    retq1849  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 3, i32 0, i32 3, i32 0, i32 4, i32 5, i32 6, i32 7, i32 11, i32 8, i32 11, i32 8, i32 12, i32 13, i32 14, i32 15, i32 19, i32 16, i32 19, i32 16, i32 20, i32 21, i32 22, i32 23, i32 27, i32 24, i32 27, i32 24, i32 28, i32 29, i32 30, i32 31>1850  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1851  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer1852  ret <32 x i16> %res1853}1854define <32 x i16> @test_32xi16_perm_high_mem_mask0(ptr %vp) {1855; CHECK-LABEL: test_32xi16_perm_high_mem_mask0:1856; CHECK:       # %bb.0:1857; CHECK-NEXT:    vpshufhw {{.*#+}} zmm0 = mem[0,1,2,3,7,4,5,6,8,9,10,11,15,12,13,14,16,17,18,19,23,20,21,22,24,25,26,27,31,28,29,30]1858; CHECK-NEXT:    retq1859  %vec = load <32 x i16>, ptr %vp1860  %res = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 4, i32 5, i32 6, i32 8, i32 9, i32 10, i32 11, i32 15, i32 12, i32 13, i32 14, i32 16, i32 17, i32 18, i32 19, i32 23, i32 20, i32 21, i32 22, i32 24, i32 25, i32 26, i32 27, i32 31, i32 28, i32 29, i32 30>1861  ret <32 x i16> %res1862}1863define <32 x i16> @test_masked_32xi16_perm_high_mem_mask0(ptr %vp, <32 x i16> %vec2, <32 x i16> %mask) {1864; CHECK-LABEL: test_masked_32xi16_perm_high_mem_mask0:1865; CHECK:       # %bb.0:1866; CHECK-NEXT:    vptestnmw %zmm1, %zmm1, %k11867; CHECK-NEXT:    vpshufhw {{.*#+}} zmm0 {%k1} = mem[0,1,2,3,7,4,5,6,8,9,10,11,15,12,13,14,16,17,18,19,23,20,21,22,24,25,26,27,31,28,29,30]1868; CHECK-NEXT:    retq1869  %vec = load <32 x i16>, ptr %vp1870  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 4, i32 5, i32 6, i32 8, i32 9, i32 10, i32 11, i32 15, i32 12, i32 13, i32 14, i32 16, i32 17, i32 18, i32 19, i32 23, i32 20, i32 21, i32 22, i32 24, i32 25, i32 26, i32 27, i32 31, i32 28, i32 29, i32 30>1871  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1872  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec21873  ret <32 x i16> %res1874}1875 1876define <32 x i16> @test_masked_z_32xi16_perm_high_mem_mask0(ptr %vp, <32 x i16> %mask) {1877; CHECK-LABEL: test_masked_z_32xi16_perm_high_mem_mask0:1878; CHECK:       # %bb.0:1879; CHECK-NEXT:    vptestnmw %zmm0, %zmm0, %k11880; CHECK-NEXT:    vpshufhw {{.*#+}} zmm0 {%k1} {z} = mem[0,1,2,3,7,4,5,6,8,9,10,11,15,12,13,14,16,17,18,19,23,20,21,22,24,25,26,27,31,28,29,30]1881; CHECK-NEXT:    retq1882  %vec = load <32 x i16>, ptr %vp1883  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 4, i32 5, i32 6, i32 8, i32 9, i32 10, i32 11, i32 15, i32 12, i32 13, i32 14, i32 16, i32 17, i32 18, i32 19, i32 23, i32 20, i32 21, i32 22, i32 24, i32 25, i32 26, i32 27, i32 31, i32 28, i32 29, i32 30>1884  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1885  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer1886  ret <32 x i16> %res1887}1888 1889define <32 x i16> @test_masked_32xi16_perm_low_mem_mask1(ptr %vp, <32 x i16> %vec2, <32 x i16> %mask) {1890; CHECK-LABEL: test_masked_32xi16_perm_low_mem_mask1:1891; CHECK:       # %bb.0:1892; CHECK-NEXT:    vptestnmw %zmm1, %zmm1, %k11893; CHECK-NEXT:    vpshuflw {{.*#+}} zmm0 {%k1} = mem[1,1,3,3,4,5,6,7,9,9,11,11,12,13,14,15,17,17,19,19,20,21,22,23,25,25,27,27,28,29,30,31]1894; CHECK-NEXT:    retq1895  %vec = load <32 x i16>, ptr %vp1896  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 1, i32 1, i32 3, i32 3, i32 4, i32 5, i32 6, i32 7, i32 9, i32 9, i32 11, i32 11, i32 12, i32 13, i32 14, i32 15, i32 17, i32 17, i32 19, i32 19, i32 20, i32 21, i32 22, i32 23, i32 25, i32 25, i32 27, i32 27, i32 28, i32 29, i32 30, i32 31>1897  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1898  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec21899  ret <32 x i16> %res1900}1901 1902define <32 x i16> @test_masked_z_32xi16_perm_low_mem_mask1(ptr %vp, <32 x i16> %mask) {1903; CHECK-LABEL: test_masked_z_32xi16_perm_low_mem_mask1:1904; CHECK:       # %bb.0:1905; CHECK-NEXT:    vptestnmw %zmm0, %zmm0, %k11906; CHECK-NEXT:    vpshuflw {{.*#+}} zmm0 {%k1} {z} = mem[1,1,3,3,4,5,6,7,9,9,11,11,12,13,14,15,17,17,19,19,20,21,22,23,25,25,27,27,28,29,30,31]1907; CHECK-NEXT:    retq1908  %vec = load <32 x i16>, ptr %vp1909  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 1, i32 1, i32 3, i32 3, i32 4, i32 5, i32 6, i32 7, i32 9, i32 9, i32 11, i32 11, i32 12, i32 13, i32 14, i32 15, i32 17, i32 17, i32 19, i32 19, i32 20, i32 21, i32 22, i32 23, i32 25, i32 25, i32 27, i32 27, i32 28, i32 29, i32 30, i32 31>1910  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1911  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer1912  ret <32 x i16> %res1913}1914 1915define <32 x i16> @test_masked_32xi16_perm_high_mem_mask2(ptr %vp, <32 x i16> %vec2, <32 x i16> %mask) {1916; CHECK-LABEL: test_masked_32xi16_perm_high_mem_mask2:1917; CHECK:       # %bb.0:1918; CHECK-NEXT:    vptestnmw %zmm1, %zmm1, %k11919; CHECK-NEXT:    vpshufhw {{.*#+}} zmm0 {%k1} = mem[0,1,2,3,4,7,6,4,8,9,10,11,12,15,14,12,16,17,18,19,20,23,22,20,24,25,26,27,28,31,30,28]1920; CHECK-NEXT:    retq1921  %vec = load <32 x i16>, ptr %vp1922  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 7, i32 6, i32 4, i32 8, i32 9, i32 10, i32 11, i32 12, i32 15, i32 14, i32 12, i32 16, i32 17, i32 18, i32 19, i32 20, i32 23, i32 22, i32 20, i32 24, i32 25, i32 26, i32 27, i32 28, i32 31, i32 30, i32 28>1923  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1924  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec21925  ret <32 x i16> %res1926}1927 1928define <32 x i16> @test_masked_z_32xi16_perm_high_mem_mask2(ptr %vp, <32 x i16> %mask) {1929; CHECK-LABEL: test_masked_z_32xi16_perm_high_mem_mask2:1930; CHECK:       # %bb.0:1931; CHECK-NEXT:    vptestnmw %zmm0, %zmm0, %k11932; CHECK-NEXT:    vpshufhw {{.*#+}} zmm0 {%k1} {z} = mem[0,1,2,3,4,7,6,4,8,9,10,11,12,15,14,12,16,17,18,19,20,23,22,20,24,25,26,27,28,31,30,28]1933; CHECK-NEXT:    retq1934  %vec = load <32 x i16>, ptr %vp1935  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 7, i32 6, i32 4, i32 8, i32 9, i32 10, i32 11, i32 12, i32 15, i32 14, i32 12, i32 16, i32 17, i32 18, i32 19, i32 20, i32 23, i32 22, i32 20, i32 24, i32 25, i32 26, i32 27, i32 28, i32 31, i32 30, i32 28>1936  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1937  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer1938  ret <32 x i16> %res1939}1940 1941define <32 x i16> @test_32xi16_perm_low_mem_mask3(ptr %vp) {1942; CHECK-LABEL: test_32xi16_perm_low_mem_mask3:1943; CHECK:       # %bb.0:1944; CHECK-NEXT:    vpshuflw {{.*#+}} zmm0 = mem[2,2,0,3,4,5,6,7,10,10,8,11,12,13,14,15,18,18,16,19,20,21,22,23,26,26,24,27,28,29,30,31]1945; CHECK-NEXT:    retq1946  %vec = load <32 x i16>, ptr %vp1947  %res = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 2, i32 2, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7, i32 10, i32 10, i32 8, i32 11, i32 12, i32 13, i32 14, i32 15, i32 18, i32 18, i32 16, i32 19, i32 20, i32 21, i32 22, i32 23, i32 26, i32 26, i32 24, i32 27, i32 28, i32 29, i32 30, i32 31>1948  ret <32 x i16> %res1949}1950define <32 x i16> @test_masked_32xi16_perm_low_mem_mask3(ptr %vp, <32 x i16> %vec2, <32 x i16> %mask) {1951; CHECK-LABEL: test_masked_32xi16_perm_low_mem_mask3:1952; CHECK:       # %bb.0:1953; CHECK-NEXT:    vptestnmw %zmm1, %zmm1, %k11954; CHECK-NEXT:    vpshuflw {{.*#+}} zmm0 {%k1} = mem[2,2,0,3,4,5,6,7,10,10,8,11,12,13,14,15,18,18,16,19,20,21,22,23,26,26,24,27,28,29,30,31]1955; CHECK-NEXT:    retq1956  %vec = load <32 x i16>, ptr %vp1957  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 2, i32 2, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7, i32 10, i32 10, i32 8, i32 11, i32 12, i32 13, i32 14, i32 15, i32 18, i32 18, i32 16, i32 19, i32 20, i32 21, i32 22, i32 23, i32 26, i32 26, i32 24, i32 27, i32 28, i32 29, i32 30, i32 31>1958  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1959  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec21960  ret <32 x i16> %res1961}1962 1963define <32 x i16> @test_masked_z_32xi16_perm_low_mem_mask3(ptr %vp, <32 x i16> %mask) {1964; CHECK-LABEL: test_masked_z_32xi16_perm_low_mem_mask3:1965; CHECK:       # %bb.0:1966; CHECK-NEXT:    vptestnmw %zmm0, %zmm0, %k11967; CHECK-NEXT:    vpshuflw {{.*#+}} zmm0 {%k1} {z} = mem[2,2,0,3,4,5,6,7,10,10,8,11,12,13,14,15,18,18,16,19,20,21,22,23,26,26,24,27,28,29,30,31]1968; CHECK-NEXT:    retq1969  %vec = load <32 x i16>, ptr %vp1970  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 2, i32 2, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7, i32 10, i32 10, i32 8, i32 11, i32 12, i32 13, i32 14, i32 15, i32 18, i32 18, i32 16, i32 19, i32 20, i32 21, i32 22, i32 23, i32 26, i32 26, i32 24, i32 27, i32 28, i32 29, i32 30, i32 31>1971  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1972  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer1973  ret <32 x i16> %res1974}1975 1976define <32 x i16> @test_masked_32xi16_perm_high_mem_mask4(ptr %vp, <32 x i16> %vec2, <32 x i16> %mask) {1977; CHECK-LABEL: test_masked_32xi16_perm_high_mem_mask4:1978; CHECK:       # %bb.0:1979; CHECK-NEXT:    vptestnmw %zmm1, %zmm1, %k11980; CHECK-NEXT:    vpshufhw {{.*#+}} zmm0 {%k1} = mem[0,1,2,3,7,4,6,5,8,9,10,11,15,12,14,13,16,17,18,19,23,20,22,21,24,25,26,27,31,28,30,29]1981; CHECK-NEXT:    retq1982  %vec = load <32 x i16>, ptr %vp1983  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 4, i32 6, i32 5, i32 8, i32 9, i32 10, i32 11, i32 15, i32 12, i32 14, i32 13, i32 16, i32 17, i32 18, i32 19, i32 23, i32 20, i32 22, i32 21, i32 24, i32 25, i32 26, i32 27, i32 31, i32 28, i32 30, i32 29>1984  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1985  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec21986  ret <32 x i16> %res1987}1988 1989define <32 x i16> @test_masked_z_32xi16_perm_high_mem_mask4(ptr %vp, <32 x i16> %mask) {1990; CHECK-LABEL: test_masked_z_32xi16_perm_high_mem_mask4:1991; CHECK:       # %bb.0:1992; CHECK-NEXT:    vptestnmw %zmm0, %zmm0, %k11993; CHECK-NEXT:    vpshufhw {{.*#+}} zmm0 {%k1} {z} = mem[0,1,2,3,7,4,6,5,8,9,10,11,15,12,14,13,16,17,18,19,23,20,22,21,24,25,26,27,31,28,30,29]1994; CHECK-NEXT:    retq1995  %vec = load <32 x i16>, ptr %vp1996  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 7, i32 4, i32 6, i32 5, i32 8, i32 9, i32 10, i32 11, i32 15, i32 12, i32 14, i32 13, i32 16, i32 17, i32 18, i32 19, i32 23, i32 20, i32 22, i32 21, i32 24, i32 25, i32 26, i32 27, i32 31, i32 28, i32 30, i32 29>1997  %cmp = icmp eq <32 x i16> %mask, zeroinitializer1998  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer1999  ret <32 x i16> %res2000}2001 2002define <32 x i16> @test_masked_32xi16_perm_low_mem_mask5(ptr %vp, <32 x i16> %vec2, <32 x i16> %mask) {2003; CHECK-LABEL: test_masked_32xi16_perm_low_mem_mask5:2004; CHECK:       # %bb.0:2005; CHECK-NEXT:    vpshufd {{.*#+}} zmm2 = mem[0,0,2,3,4,4,6,7,8,8,10,11,12,12,14,15]2006; CHECK-NEXT:    vptestnmw %zmm1, %zmm1, %k12007; CHECK-NEXT:    vmovdqu16 %zmm2, %zmm0 {%k1}2008; CHECK-NEXT:    retq2009  %vec = load <32 x i16>, ptr %vp2010  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 8, i32 9, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 16, i32 17, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 24, i32 25, i32 28, i32 29, i32 30, i32 31>2011  %cmp = icmp eq <32 x i16> %mask, zeroinitializer2012  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec22013  ret <32 x i16> %res2014}2015 2016define <32 x i16> @test_masked_z_32xi16_perm_low_mem_mask5(ptr %vp, <32 x i16> %mask) {2017; CHECK-LABEL: test_masked_z_32xi16_perm_low_mem_mask5:2018; CHECK:       # %bb.0:2019; CHECK-NEXT:    vpshufd {{.*#+}} zmm1 = mem[0,0,2,3,4,4,6,7,8,8,10,11,12,12,14,15]2020; CHECK-NEXT:    vptestnmw %zmm0, %zmm0, %k12021; CHECK-NEXT:    vmovdqu16 %zmm1, %zmm0 {%k1} {z}2022; CHECK-NEXT:    retq2023  %vec = load <32 x i16>, ptr %vp2024  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 8, i32 9, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 16, i32 17, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 24, i32 25, i32 28, i32 29, i32 30, i32 31>2025  %cmp = icmp eq <32 x i16> %mask, zeroinitializer2026  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer2027  ret <32 x i16> %res2028}2029 2030define <32 x i16> @test_32xi16_perm_high_mem_mask6(ptr %vp) {2031; CHECK-LABEL: test_32xi16_perm_high_mem_mask6:2032; CHECK:       # %bb.0:2033; CHECK-NEXT:    vpshufhw {{.*#+}} zmm0 = mem[0,1,2,3,6,5,6,6,8,9,10,11,14,13,14,14,16,17,18,19,22,21,22,22,24,25,26,27,30,29,30,30]2034; CHECK-NEXT:    retq2035  %vec = load <32 x i16>, ptr %vp2036  %res = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 6, i32 6, i32 8, i32 9, i32 10, i32 11, i32 14, i32 13, i32 14, i32 14, i32 16, i32 17, i32 18, i32 19, i32 22, i32 21, i32 22, i32 22, i32 24, i32 25, i32 26, i32 27, i32 30, i32 29, i32 30, i32 30>2037  ret <32 x i16> %res2038}2039define <32 x i16> @test_masked_32xi16_perm_high_mem_mask6(ptr %vp, <32 x i16> %vec2, <32 x i16> %mask) {2040; CHECK-LABEL: test_masked_32xi16_perm_high_mem_mask6:2041; CHECK:       # %bb.0:2042; CHECK-NEXT:    vptestnmw %zmm1, %zmm1, %k12043; CHECK-NEXT:    vpshufhw {{.*#+}} zmm0 {%k1} = mem[0,1,2,3,6,5,6,6,8,9,10,11,14,13,14,14,16,17,18,19,22,21,22,22,24,25,26,27,30,29,30,30]2044; CHECK-NEXT:    retq2045  %vec = load <32 x i16>, ptr %vp2046  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 6, i32 6, i32 8, i32 9, i32 10, i32 11, i32 14, i32 13, i32 14, i32 14, i32 16, i32 17, i32 18, i32 19, i32 22, i32 21, i32 22, i32 22, i32 24, i32 25, i32 26, i32 27, i32 30, i32 29, i32 30, i32 30>2047  %cmp = icmp eq <32 x i16> %mask, zeroinitializer2048  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec22049  ret <32 x i16> %res2050}2051 2052define <32 x i16> @test_masked_z_32xi16_perm_high_mem_mask6(ptr %vp, <32 x i16> %mask) {2053; CHECK-LABEL: test_masked_z_32xi16_perm_high_mem_mask6:2054; CHECK:       # %bb.0:2055; CHECK-NEXT:    vptestnmw %zmm0, %zmm0, %k12056; CHECK-NEXT:    vpshufhw {{.*#+}} zmm0 {%k1} {z} = mem[0,1,2,3,6,5,6,6,8,9,10,11,14,13,14,14,16,17,18,19,22,21,22,22,24,25,26,27,30,29,30,30]2057; CHECK-NEXT:    retq2058  %vec = load <32 x i16>, ptr %vp2059  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 6, i32 6, i32 8, i32 9, i32 10, i32 11, i32 14, i32 13, i32 14, i32 14, i32 16, i32 17, i32 18, i32 19, i32 22, i32 21, i32 22, i32 22, i32 24, i32 25, i32 26, i32 27, i32 30, i32 29, i32 30, i32 30>2060  %cmp = icmp eq <32 x i16> %mask, zeroinitializer2061  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer2062  ret <32 x i16> %res2063}2064 2065define <32 x i16> @test_masked_32xi16_perm_low_mem_mask7(ptr %vp, <32 x i16> %vec2, <32 x i16> %mask) {2066; CHECK-LABEL: test_masked_32xi16_perm_low_mem_mask7:2067; CHECK:       # %bb.0:2068; CHECK-NEXT:    vptestnmw %zmm1, %zmm1, %k12069; CHECK-NEXT:    vpshuflw {{.*#+}} zmm0 {%k1} = mem[3,1,3,0,4,5,6,7,11,9,11,8,12,13,14,15,19,17,19,16,20,21,22,23,27,25,27,24,28,29,30,31]2070; CHECK-NEXT:    retq2071  %vec = load <32 x i16>, ptr %vp2072  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 3, i32 1, i32 3, i32 0, i32 4, i32 5, i32 6, i32 7, i32 11, i32 9, i32 11, i32 8, i32 12, i32 13, i32 14, i32 15, i32 19, i32 17, i32 19, i32 16, i32 20, i32 21, i32 22, i32 23, i32 27, i32 25, i32 27, i32 24, i32 28, i32 29, i32 30, i32 31>2073  %cmp = icmp eq <32 x i16> %mask, zeroinitializer2074  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> %vec22075  ret <32 x i16> %res2076}2077 2078define <32 x i16> @test_masked_z_32xi16_perm_low_mem_mask7(ptr %vp, <32 x i16> %mask) {2079; CHECK-LABEL: test_masked_z_32xi16_perm_low_mem_mask7:2080; CHECK:       # %bb.0:2081; CHECK-NEXT:    vptestnmw %zmm0, %zmm0, %k12082; CHECK-NEXT:    vpshuflw {{.*#+}} zmm0 {%k1} {z} = mem[3,1,3,0,4,5,6,7,11,9,11,8,12,13,14,15,19,17,19,16,20,21,22,23,27,25,27,24,28,29,30,31]2083; CHECK-NEXT:    retq2084  %vec = load <32 x i16>, ptr %vp2085  %shuf = shufflevector <32 x i16> %vec, <32 x i16> undef, <32 x i32> <i32 3, i32 1, i32 3, i32 0, i32 4, i32 5, i32 6, i32 7, i32 11, i32 9, i32 11, i32 8, i32 12, i32 13, i32 14, i32 15, i32 19, i32 17, i32 19, i32 16, i32 20, i32 21, i32 22, i32 23, i32 27, i32 25, i32 27, i32 24, i32 28, i32 29, i32 30, i32 31>2086  %cmp = icmp eq <32 x i16> %mask, zeroinitializer2087  %res = select <32 x i1> %cmp, <32 x i16> %shuf, <32 x i16> zeroinitializer2088  ret <32 x i16> %res2089}2090 2091define <4 x i32> @test_4xi32_perm_mask0(<4 x i32> %vec) {2092; CHECK-LABEL: test_4xi32_perm_mask0:2093; CHECK:       # %bb.0:2094; CHECK-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[2,3,3,0]2095; CHECK-NEXT:    retq2096  %res = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 3, i32 0>2097  ret <4 x i32> %res2098}2099define <4 x i32> @test_masked_4xi32_perm_mask0(<4 x i32> %vec, <4 x i32> %vec2, <4 x i32> %mask) {2100; CHECK-LABEL: test_masked_4xi32_perm_mask0:2101; CHECK:       # %bb.0:2102; CHECK-NEXT:    vptestnmd %xmm2, %xmm2, %k12103; CHECK-NEXT:    vpshufd {{.*#+}} xmm1 {%k1} = xmm0[2,3,3,0]2104; CHECK-NEXT:    vmovdqa %xmm1, %xmm02105; CHECK-NEXT:    retq2106  %shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 3, i32 0>2107  %cmp = icmp eq <4 x i32> %mask, zeroinitializer2108  %res = select <4 x i1> %cmp, <4 x i32> %shuf, <4 x i32> %vec22109  ret <4 x i32> %res2110}2111 2112define <4 x i32> @test_masked_z_4xi32_perm_mask0(<4 x i32> %vec, <4 x i32> %mask) {2113; CHECK-LABEL: test_masked_z_4xi32_perm_mask0:2114; CHECK:       # %bb.0:2115; CHECK-NEXT:    vptestnmd %xmm1, %xmm1, %k12116; CHECK-NEXT:    vpshufd {{.*#+}} xmm0 {%k1} {z} = xmm0[2,3,3,0]2117; CHECK-NEXT:    retq2118  %shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 3, i32 0>2119  %cmp = icmp eq <4 x i32> %mask, zeroinitializer2120  %res = select <4 x i1> %cmp, <4 x i32> %shuf, <4 x i32> zeroinitializer2121  ret <4 x i32> %res2122}2123define <4 x i32> @test_masked_4xi32_perm_mask1(<4 x i32> %vec, <4 x i32> %vec2, <4 x i32> %mask) {2124; CHECK-LABEL: test_masked_4xi32_perm_mask1:2125; CHECK:       # %bb.0:2126; CHECK-NEXT:    vptestnmd %xmm2, %xmm2, %k12127; CHECK-NEXT:    vpshufd {{.*#+}} xmm1 {%k1} = xmm0[1,0,2,0]2128; CHECK-NEXT:    vmovdqa %xmm1, %xmm02129; CHECK-NEXT:    retq2130  %shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 1, i32 0, i32 2, i32 0>2131  %cmp = icmp eq <4 x i32> %mask, zeroinitializer2132  %res = select <4 x i1> %cmp, <4 x i32> %shuf, <4 x i32> %vec22133  ret <4 x i32> %res2134}2135 2136define <4 x i32> @test_masked_z_4xi32_perm_mask1(<4 x i32> %vec, <4 x i32> %mask) {2137; CHECK-LABEL: test_masked_z_4xi32_perm_mask1:2138; CHECK:       # %bb.0:2139; CHECK-NEXT:    vptestnmd %xmm1, %xmm1, %k12140; CHECK-NEXT:    vpshufd {{.*#+}} xmm0 {%k1} {z} = xmm0[1,0,2,0]2141; CHECK-NEXT:    retq2142  %shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 1, i32 0, i32 2, i32 0>2143  %cmp = icmp eq <4 x i32> %mask, zeroinitializer2144  %res = select <4 x i1> %cmp, <4 x i32> %shuf, <4 x i32> zeroinitializer2145  ret <4 x i32> %res2146}2147define <4 x i32> @test_masked_4xi32_perm_mask2(<4 x i32> %vec, <4 x i32> %vec2, <4 x i32> %mask) {2148; CHECK-LABEL: test_masked_4xi32_perm_mask2:2149; CHECK:       # %bb.0:2150; CHECK-NEXT:    vptestnmd %xmm2, %xmm2, %k12151; CHECK-NEXT:    vpshufd {{.*#+}} xmm1 {%k1} = xmm0[3,0,1,0]2152; CHECK-NEXT:    vmovdqa %xmm1, %xmm02153; CHECK-NEXT:    retq2154  %shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 3, i32 0, i32 1, i32 0>2155  %cmp = icmp eq <4 x i32> %mask, zeroinitializer2156  %res = select <4 x i1> %cmp, <4 x i32> %shuf, <4 x i32> %vec22157  ret <4 x i32> %res2158}2159 2160define <4 x i32> @test_masked_z_4xi32_perm_mask2(<4 x i32> %vec, <4 x i32> %mask) {2161; CHECK-LABEL: test_masked_z_4xi32_perm_mask2:2162; CHECK:       # %bb.0:2163; CHECK-NEXT:    vptestnmd %xmm1, %xmm1, %k12164; CHECK-NEXT:    vpshufd {{.*#+}} xmm0 {%k1} {z} = xmm0[3,0,1,0]2165; CHECK-NEXT:    retq2166  %shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 3, i32 0, i32 1, i32 0>2167  %cmp = icmp eq <4 x i32> %mask, zeroinitializer2168  %res = select <4 x i1> %cmp, <4 x i32> %shuf, <4 x i32> zeroinitializer2169  ret <4 x i32> %res2170}2171define <4 x i32> @test_4xi32_perm_mask3(<4 x i32> %vec) {2172; CHECK-LABEL: test_4xi32_perm_mask3:2173; CHECK:       # %bb.0:2174; CHECK-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[1,1,0,3]2175; CHECK-NEXT:    retq2176  %res = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 0, i32 3>2177  ret <4 x i32> %res2178}2179define <4 x i32> @test_masked_4xi32_perm_mask3(<4 x i32> %vec, <4 x i32> %vec2, <4 x i32> %mask) {2180; CHECK-LABEL: test_masked_4xi32_perm_mask3:2181; CHECK:       # %bb.0:2182; CHECK-NEXT:    vptestnmd %xmm2, %xmm2, %k12183; CHECK-NEXT:    vpshufd {{.*#+}} xmm1 {%k1} = xmm0[1,1,0,3]2184; CHECK-NEXT:    vmovdqa %xmm1, %xmm02185; CHECK-NEXT:    retq2186  %shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 0, i32 3>2187  %cmp = icmp eq <4 x i32> %mask, zeroinitializer2188  %res = select <4 x i1> %cmp, <4 x i32> %shuf, <4 x i32> %vec22189  ret <4 x i32> %res2190}2191 2192define <4 x i32> @test_masked_z_4xi32_perm_mask3(<4 x i32> %vec, <4 x i32> %mask) {2193; CHECK-LABEL: test_masked_z_4xi32_perm_mask3:2194; CHECK:       # %bb.0:2195; CHECK-NEXT:    vptestnmd %xmm1, %xmm1, %k12196; CHECK-NEXT:    vpshufd {{.*#+}} xmm0 {%k1} {z} = xmm0[1,1,0,3]2197; CHECK-NEXT:    retq2198  %shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 0, i32 3>2199  %cmp = icmp eq <4 x i32> %mask, zeroinitializer2200  %res = select <4 x i1> %cmp, <4 x i32> %shuf, <4 x i32> zeroinitializer2201  ret <4 x i32> %res2202}2203define <4 x i32> @test_4xi32_perm_mem_mask0(ptr %vp) {2204; CHECK-LABEL: test_4xi32_perm_mem_mask0:2205; CHECK:       # %bb.0:2206; CHECK-NEXT:    vpermilps {{.*#+}} xmm0 = mem[0,1,3,3]2207; CHECK-NEXT:    retq2208  %vec = load <4 x i32>, ptr %vp2209  %res = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 3, i32 3>2210  ret <4 x i32> %res2211}2212define <4 x i32> @test_masked_4xi32_perm_mem_mask0(ptr %vp, <4 x i32> %vec2, <4 x i32> %mask) {2213; CHECK-LABEL: test_masked_4xi32_perm_mem_mask0:2214; CHECK:       # %bb.0:2215; CHECK-NEXT:    vptestnmd %xmm1, %xmm1, %k12216; CHECK-NEXT:    vpshufd {{.*#+}} xmm0 {%k1} = mem[0,1,3,3]2217; CHECK-NEXT:    retq2218  %vec = load <4 x i32>, ptr %vp2219  %shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 3, i32 3>2220  %cmp = icmp eq <4 x i32> %mask, zeroinitializer2221  %res = select <4 x i1> %cmp, <4 x i32> %shuf, <4 x i32> %vec22222  ret <4 x i32> %res2223}2224 2225define <4 x i32> @test_masked_z_4xi32_perm_mem_mask0(ptr %vp, <4 x i32> %mask) {2226; CHECK-LABEL: test_masked_z_4xi32_perm_mem_mask0:2227; CHECK:       # %bb.0:2228; CHECK-NEXT:    vptestnmd %xmm0, %xmm0, %k12229; CHECK-NEXT:    vpshufd {{.*#+}} xmm0 {%k1} {z} = mem[0,1,3,3]2230; CHECK-NEXT:    retq2231  %vec = load <4 x i32>, ptr %vp2232  %shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 3, i32 3>2233  %cmp = icmp eq <4 x i32> %mask, zeroinitializer2234  %res = select <4 x i1> %cmp, <4 x i32> %shuf, <4 x i32> zeroinitializer2235  ret <4 x i32> %res2236}2237 2238define <4 x i32> @test_masked_4xi32_perm_mem_mask1(ptr %vp, <4 x i32> %vec2, <4 x i32> %mask) {2239; CHECK-LABEL: test_masked_4xi32_perm_mem_mask1:2240; CHECK:       # %bb.0:2241; CHECK-NEXT:    vptestnmd %xmm1, %xmm1, %k12242; CHECK-NEXT:    vpshufd {{.*#+}} xmm0 {%k1} = mem[2,2,3,1]2243; CHECK-NEXT:    retq2244  %vec = load <4 x i32>, ptr %vp2245  %shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 2, i32 2, i32 3, i32 1>2246  %cmp = icmp eq <4 x i32> %mask, zeroinitializer2247  %res = select <4 x i1> %cmp, <4 x i32> %shuf, <4 x i32> %vec22248  ret <4 x i32> %res2249}2250 2251define <4 x i32> @test_masked_z_4xi32_perm_mem_mask1(ptr %vp, <4 x i32> %mask) {2252; CHECK-LABEL: test_masked_z_4xi32_perm_mem_mask1:2253; CHECK:       # %bb.0:2254; CHECK-NEXT:    vptestnmd %xmm0, %xmm0, %k12255; CHECK-NEXT:    vpshufd {{.*#+}} xmm0 {%k1} {z} = mem[2,2,3,1]2256; CHECK-NEXT:    retq2257  %vec = load <4 x i32>, ptr %vp2258  %shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 2, i32 2, i32 3, i32 1>2259  %cmp = icmp eq <4 x i32> %mask, zeroinitializer2260  %res = select <4 x i1> %cmp, <4 x i32> %shuf, <4 x i32> zeroinitializer2261  ret <4 x i32> %res2262}2263 2264define <4 x i32> @test_masked_4xi32_perm_mem_mask2(ptr %vp, <4 x i32> %vec2, <4 x i32> %mask) {2265; CHECK-LABEL: test_masked_4xi32_perm_mem_mask2:2266; CHECK:       # %bb.0:2267; CHECK-NEXT:    vptestnmd %xmm1, %xmm1, %k12268; CHECK-NEXT:    vpshufd {{.*#+}} xmm0 {%k1} = mem[0,3,0,1]2269; CHECK-NEXT:    retq2270  %vec = load <4 x i32>, ptr %vp2271  %shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 3, i32 0, i32 1>2272  %cmp = icmp eq <4 x i32> %mask, zeroinitializer2273  %res = select <4 x i1> %cmp, <4 x i32> %shuf, <4 x i32> %vec22274  ret <4 x i32> %res2275}2276 2277define <4 x i32> @test_masked_z_4xi32_perm_mem_mask2(ptr %vp, <4 x i32> %mask) {2278; CHECK-LABEL: test_masked_z_4xi32_perm_mem_mask2:2279; CHECK:       # %bb.0:2280; CHECK-NEXT:    vptestnmd %xmm0, %xmm0, %k12281; CHECK-NEXT:    vpshufd {{.*#+}} xmm0 {%k1} {z} = mem[0,3,0,1]2282; CHECK-NEXT:    retq2283  %vec = load <4 x i32>, ptr %vp2284  %shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 3, i32 0, i32 1>2285  %cmp = icmp eq <4 x i32> %mask, zeroinitializer2286  %res = select <4 x i1> %cmp, <4 x i32> %shuf, <4 x i32> zeroinitializer2287  ret <4 x i32> %res2288}2289 2290define <4 x i32> @test_4xi32_perm_mem_mask3(ptr %vp) {2291; CHECK-LABEL: test_4xi32_perm_mem_mask3:2292; CHECK:       # %bb.0:2293; CHECK-NEXT:    vpermilps {{.*#+}} xmm0 = mem[1,0,1,0]2294; CHECK-NEXT:    retq2295  %vec = load <4 x i32>, ptr %vp2296  %res = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 1, i32 0, i32 1, i32 0>2297  ret <4 x i32> %res2298}2299define <4 x i32> @test_masked_4xi32_perm_mem_mask3(ptr %vp, <4 x i32> %vec2, <4 x i32> %mask) {2300; CHECK-LABEL: test_masked_4xi32_perm_mem_mask3:2301; CHECK:       # %bb.0:2302; CHECK-NEXT:    vptestnmd %xmm1, %xmm1, %k12303; CHECK-NEXT:    vpshufd {{.*#+}} xmm0 {%k1} = mem[1,0,1,0]2304; CHECK-NEXT:    retq2305  %vec = load <4 x i32>, ptr %vp2306  %shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 1, i32 0, i32 1, i32 0>2307  %cmp = icmp eq <4 x i32> %mask, zeroinitializer2308  %res = select <4 x i1> %cmp, <4 x i32> %shuf, <4 x i32> %vec22309  ret <4 x i32> %res2310}2311 2312define <4 x i32> @test_masked_z_4xi32_perm_mem_mask3(ptr %vp, <4 x i32> %mask) {2313; CHECK-LABEL: test_masked_z_4xi32_perm_mem_mask3:2314; CHECK:       # %bb.0:2315; CHECK-NEXT:    vptestnmd %xmm0, %xmm0, %k12316; CHECK-NEXT:    vpshufd {{.*#+}} xmm0 {%k1} {z} = mem[1,0,1,0]2317; CHECK-NEXT:    retq2318  %vec = load <4 x i32>, ptr %vp2319  %shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 1, i32 0, i32 1, i32 0>2320  %cmp = icmp eq <4 x i32> %mask, zeroinitializer2321  %res = select <4 x i1> %cmp, <4 x i32> %shuf, <4 x i32> zeroinitializer2322  ret <4 x i32> %res2323}2324 2325define <8 x i32> @test_8xi32_perm_mask0(<8 x i32> %vec) {2326; CHECK-LABEL: test_8xi32_perm_mask0:2327; CHECK:       # %bb.0:2328; CHECK-NEXT:    vshufps {{.*#+}} ymm0 = ymm0[2,3,1,0,6,7,5,4]2329; CHECK-NEXT:    retq2330  %res = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 1, i32 0, i32 6, i32 7, i32 5, i32 4>2331  ret <8 x i32> %res2332}2333define <8 x i32> @test_masked_8xi32_perm_mask0(<8 x i32> %vec, <8 x i32> %vec2, <8 x i32> %mask) {2334; CHECK-LABEL: test_masked_8xi32_perm_mask0:2335; CHECK:       # %bb.0:2336; CHECK-NEXT:    vptestnmd %ymm2, %ymm2, %k12337; CHECK-NEXT:    vpshufd {{.*#+}} ymm1 {%k1} = ymm0[2,3,1,0,6,7,5,4]2338; CHECK-NEXT:    vmovdqa %ymm1, %ymm02339; CHECK-NEXT:    retq2340  %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 1, i32 0, i32 6, i32 7, i32 5, i32 4>2341  %cmp = icmp eq <8 x i32> %mask, zeroinitializer2342  %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec22343  ret <8 x i32> %res2344}2345 2346define <8 x i32> @test_masked_z_8xi32_perm_mask0(<8 x i32> %vec, <8 x i32> %mask) {2347; CHECK-LABEL: test_masked_z_8xi32_perm_mask0:2348; CHECK:       # %bb.0:2349; CHECK-NEXT:    vptestnmd %ymm1, %ymm1, %k12350; CHECK-NEXT:    vpshufd {{.*#+}} ymm0 {%k1} {z} = ymm0[2,3,1,0,6,7,5,4]2351; CHECK-NEXT:    retq2352  %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 1, i32 0, i32 6, i32 7, i32 5, i32 4>2353  %cmp = icmp eq <8 x i32> %mask, zeroinitializer2354  %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> zeroinitializer2355  ret <8 x i32> %res2356}2357define <8 x i32> @test_masked_8xi32_perm_mask1(<8 x i32> %vec, <8 x i32> %vec2, <8 x i32> %mask) {2358; CHECK-LABEL: test_masked_8xi32_perm_mask1:2359; CHECK:       # %bb.0:2360; CHECK-NEXT:    vptestnmd %ymm2, %ymm2, %k12361; CHECK-NEXT:    vpshufd {{.*#+}} ymm1 {%k1} = ymm0[0,3,3,3,4,7,7,7]2362; CHECK-NEXT:    vmovdqa %ymm1, %ymm02363; CHECK-NEXT:    retq2364  %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 0, i32 3, i32 3, i32 3, i32 4, i32 7, i32 7, i32 7>2365  %cmp = icmp eq <8 x i32> %mask, zeroinitializer2366  %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec22367  ret <8 x i32> %res2368}2369 2370define <8 x i32> @test_masked_z_8xi32_perm_mask1(<8 x i32> %vec, <8 x i32> %mask) {2371; CHECK-LABEL: test_masked_z_8xi32_perm_mask1:2372; CHECK:       # %bb.0:2373; CHECK-NEXT:    vptestnmd %ymm1, %ymm1, %k12374; CHECK-NEXT:    vpshufd {{.*#+}} ymm0 {%k1} {z} = ymm0[0,3,3,3,4,7,7,7]2375; CHECK-NEXT:    retq2376  %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 0, i32 3, i32 3, i32 3, i32 4, i32 7, i32 7, i32 7>2377  %cmp = icmp eq <8 x i32> %mask, zeroinitializer2378  %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> zeroinitializer2379  ret <8 x i32> %res2380}2381define <8 x i32> @test_masked_8xi32_perm_mask2(<8 x i32> %vec, <8 x i32> %vec2, <8 x i32> %mask) {2382; CHECK-LABEL: test_masked_8xi32_perm_mask2:2383; CHECK:       # %bb.0:2384; CHECK-NEXT:    vptestnmd %ymm2, %ymm2, %k12385; CHECK-NEXT:    vpshufd {{.*#+}} ymm1 {%k1} = ymm0[1,2,0,3,5,6,4,7]2386; CHECK-NEXT:    vmovdqa %ymm1, %ymm02387; CHECK-NEXT:    retq2388  %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 1, i32 2, i32 0, i32 3, i32 5, i32 6, i32 4, i32 7>2389  %cmp = icmp eq <8 x i32> %mask, zeroinitializer2390  %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec22391  ret <8 x i32> %res2392}2393 2394define <8 x i32> @test_masked_z_8xi32_perm_mask2(<8 x i32> %vec, <8 x i32> %mask) {2395; CHECK-LABEL: test_masked_z_8xi32_perm_mask2:2396; CHECK:       # %bb.0:2397; CHECK-NEXT:    vptestnmd %ymm1, %ymm1, %k12398; CHECK-NEXT:    vpshufd {{.*#+}} ymm0 {%k1} {z} = ymm0[1,2,0,3,5,6,4,7]2399; CHECK-NEXT:    retq2400  %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 1, i32 2, i32 0, i32 3, i32 5, i32 6, i32 4, i32 7>2401  %cmp = icmp eq <8 x i32> %mask, zeroinitializer2402  %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> zeroinitializer2403  ret <8 x i32> %res2404}2405define <8 x i32> @test_8xi32_perm_mask3(<8 x i32> %vec) {2406; CHECK-LABEL: test_8xi32_perm_mask3:2407; CHECK:       # %bb.0:2408; CHECK-NEXT:    vshufps {{.*#+}} ymm0 = ymm0[1,3,1,0,5,7,5,4]2409; CHECK-NEXT:    retq2410  %res = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 1, i32 3, i32 1, i32 0, i32 5, i32 7, i32 5, i32 4>2411  ret <8 x i32> %res2412}2413define <8 x i32> @test_masked_8xi32_perm_mask3(<8 x i32> %vec, <8 x i32> %vec2, <8 x i32> %mask) {2414; CHECK-LABEL: test_masked_8xi32_perm_mask3:2415; CHECK:       # %bb.0:2416; CHECK-NEXT:    vptestnmd %ymm2, %ymm2, %k12417; CHECK-NEXT:    vpshufd {{.*#+}} ymm1 {%k1} = ymm0[1,3,1,0,5,7,5,4]2418; CHECK-NEXT:    vmovdqa %ymm1, %ymm02419; CHECK-NEXT:    retq2420  %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 1, i32 3, i32 1, i32 0, i32 5, i32 7, i32 5, i32 4>2421  %cmp = icmp eq <8 x i32> %mask, zeroinitializer2422  %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec22423  ret <8 x i32> %res2424}2425 2426define <8 x i32> @test_masked_z_8xi32_perm_mask3(<8 x i32> %vec, <8 x i32> %mask) {2427; CHECK-LABEL: test_masked_z_8xi32_perm_mask3:2428; CHECK:       # %bb.0:2429; CHECK-NEXT:    vptestnmd %ymm1, %ymm1, %k12430; CHECK-NEXT:    vpshufd {{.*#+}} ymm0 {%k1} {z} = ymm0[1,3,1,0,5,7,5,4]2431; CHECK-NEXT:    retq2432  %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 1, i32 3, i32 1, i32 0, i32 5, i32 7, i32 5, i32 4>2433  %cmp = icmp eq <8 x i32> %mask, zeroinitializer2434  %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> zeroinitializer2435  ret <8 x i32> %res2436}2437define <8 x i32> @test_8xi32_perm_mem_mask0(ptr %vp) {2438; CHECK-LABEL: test_8xi32_perm_mem_mask0:2439; CHECK:       # %bb.0:2440; CHECK-NEXT:    vpermilps {{.*#+}} ymm0 = mem[1,0,2,0,5,4,6,4]2441; CHECK-NEXT:    retq2442  %vec = load <8 x i32>, ptr %vp2443  %res = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 1, i32 0, i32 2, i32 0, i32 5, i32 4, i32 6, i32 4>2444  ret <8 x i32> %res2445}2446define <8 x i32> @test_masked_8xi32_perm_mem_mask0(ptr %vp, <8 x i32> %vec2, <8 x i32> %mask) {2447; CHECK-LABEL: test_masked_8xi32_perm_mem_mask0:2448; CHECK:       # %bb.0:2449; CHECK-NEXT:    vptestnmd %ymm1, %ymm1, %k12450; CHECK-NEXT:    vpshufd {{.*#+}} ymm0 {%k1} = mem[1,0,2,0,5,4,6,4]2451; CHECK-NEXT:    retq2452  %vec = load <8 x i32>, ptr %vp2453  %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 1, i32 0, i32 2, i32 0, i32 5, i32 4, i32 6, i32 4>2454  %cmp = icmp eq <8 x i32> %mask, zeroinitializer2455  %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec22456  ret <8 x i32> %res2457}2458 2459define <8 x i32> @test_masked_z_8xi32_perm_mem_mask0(ptr %vp, <8 x i32> %mask) {2460; CHECK-LABEL: test_masked_z_8xi32_perm_mem_mask0:2461; CHECK:       # %bb.0:2462; CHECK-NEXT:    vptestnmd %ymm0, %ymm0, %k12463; CHECK-NEXT:    vpshufd {{.*#+}} ymm0 {%k1} {z} = mem[1,0,2,0,5,4,6,4]2464; CHECK-NEXT:    retq2465  %vec = load <8 x i32>, ptr %vp2466  %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 1, i32 0, i32 2, i32 0, i32 5, i32 4, i32 6, i32 4>2467  %cmp = icmp eq <8 x i32> %mask, zeroinitializer2468  %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> zeroinitializer2469  ret <8 x i32> %res2470}2471 2472define <8 x i32> @test_masked_8xi32_perm_mem_mask1(ptr %vp, <8 x i32> %vec2, <8 x i32> %mask) {2473; CHECK-LABEL: test_masked_8xi32_perm_mem_mask1:2474; CHECK:       # %bb.0:2475; CHECK-NEXT:    vptestnmd %ymm1, %ymm1, %k12476; CHECK-NEXT:    vpshufd {{.*#+}} ymm0 {%k1} = mem[0,3,2,0,4,7,6,4]2477; CHECK-NEXT:    retq2478  %vec = load <8 x i32>, ptr %vp2479  %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 0, i32 3, i32 2, i32 0, i32 4, i32 7, i32 6, i32 4>2480  %cmp = icmp eq <8 x i32> %mask, zeroinitializer2481  %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec22482  ret <8 x i32> %res2483}2484 2485define <8 x i32> @test_masked_z_8xi32_perm_mem_mask1(ptr %vp, <8 x i32> %mask) {2486; CHECK-LABEL: test_masked_z_8xi32_perm_mem_mask1:2487; CHECK:       # %bb.0:2488; CHECK-NEXT:    vptestnmd %ymm0, %ymm0, %k12489; CHECK-NEXT:    vpshufd {{.*#+}} ymm0 {%k1} {z} = mem[0,3,2,0,4,7,6,4]2490; CHECK-NEXT:    retq2491  %vec = load <8 x i32>, ptr %vp2492  %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 0, i32 3, i32 2, i32 0, i32 4, i32 7, i32 6, i32 4>2493  %cmp = icmp eq <8 x i32> %mask, zeroinitializer2494  %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> zeroinitializer2495  ret <8 x i32> %res2496}2497 2498define <8 x i32> @test_masked_8xi32_perm_mem_mask2(ptr %vp, <8 x i32> %vec2, <8 x i32> %mask) {2499; CHECK-LABEL: test_masked_8xi32_perm_mem_mask2:2500; CHECK:       # %bb.0:2501; CHECK-NEXT:    vptestnmd %ymm1, %ymm1, %k12502; CHECK-NEXT:    vpshufd {{.*#+}} ymm0 {%k1} = mem[3,2,3,1,7,6,7,5]2503; CHECK-NEXT:    retq2504  %vec = load <8 x i32>, ptr %vp2505  %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 3, i32 2, i32 3, i32 1, i32 7, i32 6, i32 7, i32 5>2506  %cmp = icmp eq <8 x i32> %mask, zeroinitializer2507  %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec22508  ret <8 x i32> %res2509}2510 2511define <8 x i32> @test_masked_z_8xi32_perm_mem_mask2(ptr %vp, <8 x i32> %mask) {2512; CHECK-LABEL: test_masked_z_8xi32_perm_mem_mask2:2513; CHECK:       # %bb.0:2514; CHECK-NEXT:    vptestnmd %ymm0, %ymm0, %k12515; CHECK-NEXT:    vpshufd {{.*#+}} ymm0 {%k1} {z} = mem[3,2,3,1,7,6,7,5]2516; CHECK-NEXT:    retq2517  %vec = load <8 x i32>, ptr %vp2518  %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 3, i32 2, i32 3, i32 1, i32 7, i32 6, i32 7, i32 5>2519  %cmp = icmp eq <8 x i32> %mask, zeroinitializer2520  %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> zeroinitializer2521  ret <8 x i32> %res2522}2523 2524define <8 x i32> @test_8xi32_perm_mem_mask3(ptr %vp) {2525; CHECK-LABEL: test_8xi32_perm_mem_mask3:2526; CHECK:       # %bb.0:2527; CHECK-NEXT:    vpermilps {{.*#+}} ymm0 = mem[3,2,0,0,7,6,4,4]2528; CHECK-NEXT:    retq2529  %vec = load <8 x i32>, ptr %vp2530  %res = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 3, i32 2, i32 0, i32 0, i32 7, i32 6, i32 4, i32 4>2531  ret <8 x i32> %res2532}2533define <8 x i32> @test_masked_8xi32_perm_mem_mask3(ptr %vp, <8 x i32> %vec2, <8 x i32> %mask) {2534; CHECK-LABEL: test_masked_8xi32_perm_mem_mask3:2535; CHECK:       # %bb.0:2536; CHECK-NEXT:    vptestnmd %ymm1, %ymm1, %k12537; CHECK-NEXT:    vpshufd {{.*#+}} ymm0 {%k1} = mem[3,2,0,0,7,6,4,4]2538; CHECK-NEXT:    retq2539  %vec = load <8 x i32>, ptr %vp2540  %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 3, i32 2, i32 0, i32 0, i32 7, i32 6, i32 4, i32 4>2541  %cmp = icmp eq <8 x i32> %mask, zeroinitializer2542  %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> %vec22543  ret <8 x i32> %res2544}2545 2546define <8 x i32> @test_masked_z_8xi32_perm_mem_mask3(ptr %vp, <8 x i32> %mask) {2547; CHECK-LABEL: test_masked_z_8xi32_perm_mem_mask3:2548; CHECK:       # %bb.0:2549; CHECK-NEXT:    vptestnmd %ymm0, %ymm0, %k12550; CHECK-NEXT:    vpshufd {{.*#+}} ymm0 {%k1} {z} = mem[3,2,0,0,7,6,4,4]2551; CHECK-NEXT:    retq2552  %vec = load <8 x i32>, ptr %vp2553  %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> <i32 3, i32 2, i32 0, i32 0, i32 7, i32 6, i32 4, i32 4>2554  %cmp = icmp eq <8 x i32> %mask, zeroinitializer2555  %res = select <8 x i1> %cmp, <8 x i32> %shuf, <8 x i32> zeroinitializer2556  ret <8 x i32> %res2557}2558 2559define <16 x i32> @test_16xi32_perm_mask0(<16 x i32> %vec) {2560; CHECK-LABEL: test_16xi32_perm_mask0:2561; CHECK:       # %bb.0:2562; CHECK-NEXT:    vshufps {{.*#+}} zmm0 = zmm0[3,1,3,0,7,5,7,4,11,9,11,8,15,13,15,12]2563; CHECK-NEXT:    retq2564  %res = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 3, i32 1, i32 3, i32 0, i32 7, i32 5, i32 7, i32 4, i32 11, i32 9, i32 11, i32 8, i32 15, i32 13, i32 15, i32 12>2565  ret <16 x i32> %res2566}2567define <16 x i32> @test_masked_16xi32_perm_mask0(<16 x i32> %vec, <16 x i32> %vec2, <16 x i32> %mask) {2568; CHECK-LABEL: test_masked_16xi32_perm_mask0:2569; CHECK:       # %bb.0:2570; CHECK-NEXT:    vptestnmd %zmm2, %zmm2, %k12571; CHECK-NEXT:    vpshufd {{.*#+}} zmm1 {%k1} = zmm0[3,1,3,0,7,5,7,4,11,9,11,8,15,13,15,12]2572; CHECK-NEXT:    vmovdqa64 %zmm1, %zmm02573; CHECK-NEXT:    retq2574  %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 3, i32 1, i32 3, i32 0, i32 7, i32 5, i32 7, i32 4, i32 11, i32 9, i32 11, i32 8, i32 15, i32 13, i32 15, i32 12>2575  %cmp = icmp eq <16 x i32> %mask, zeroinitializer2576  %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> %vec22577  ret <16 x i32> %res2578}2579 2580define <16 x i32> @test_masked_z_16xi32_perm_mask0(<16 x i32> %vec, <16 x i32> %mask) {2581; CHECK-LABEL: test_masked_z_16xi32_perm_mask0:2582; CHECK:       # %bb.0:2583; CHECK-NEXT:    vptestnmd %zmm1, %zmm1, %k12584; CHECK-NEXT:    vpshufd {{.*#+}} zmm0 {%k1} {z} = zmm0[3,1,3,0,7,5,7,4,11,9,11,8,15,13,15,12]2585; CHECK-NEXT:    retq2586  %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 3, i32 1, i32 3, i32 0, i32 7, i32 5, i32 7, i32 4, i32 11, i32 9, i32 11, i32 8, i32 15, i32 13, i32 15, i32 12>2587  %cmp = icmp eq <16 x i32> %mask, zeroinitializer2588  %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> zeroinitializer2589  ret <16 x i32> %res2590}2591define <16 x i32> @test_masked_16xi32_perm_mask1(<16 x i32> %vec, <16 x i32> %vec2, <16 x i32> %mask) {2592; CHECK-LABEL: test_masked_16xi32_perm_mask1:2593; CHECK:       # %bb.0:2594; CHECK-NEXT:    vptestnmd %zmm2, %zmm2, %k12595; CHECK-NEXT:    vpshufd {{.*#+}} zmm1 {%k1} = zmm0[2,0,3,0,6,4,7,4,10,8,11,8,14,12,15,12]2596; CHECK-NEXT:    vmovdqa64 %zmm1, %zmm02597; CHECK-NEXT:    retq2598  %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 2, i32 0, i32 3, i32 0, i32 6, i32 4, i32 7, i32 4, i32 10, i32 8, i32 11, i32 8, i32 14, i32 12, i32 15, i32 12>2599  %cmp = icmp eq <16 x i32> %mask, zeroinitializer2600  %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> %vec22601  ret <16 x i32> %res2602}2603 2604define <16 x i32> @test_masked_z_16xi32_perm_mask1(<16 x i32> %vec, <16 x i32> %mask) {2605; CHECK-LABEL: test_masked_z_16xi32_perm_mask1:2606; CHECK:       # %bb.0:2607; CHECK-NEXT:    vptestnmd %zmm1, %zmm1, %k12608; CHECK-NEXT:    vpshufd {{.*#+}} zmm0 {%k1} {z} = zmm0[2,0,3,0,6,4,7,4,10,8,11,8,14,12,15,12]2609; CHECK-NEXT:    retq2610  %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 2, i32 0, i32 3, i32 0, i32 6, i32 4, i32 7, i32 4, i32 10, i32 8, i32 11, i32 8, i32 14, i32 12, i32 15, i32 12>2611  %cmp = icmp eq <16 x i32> %mask, zeroinitializer2612  %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> zeroinitializer2613  ret <16 x i32> %res2614}2615define <16 x i32> @test_masked_16xi32_perm_mask2(<16 x i32> %vec, <16 x i32> %vec2, <16 x i32> %mask) {2616; CHECK-LABEL: test_masked_16xi32_perm_mask2:2617; CHECK:       # %bb.0:2618; CHECK-NEXT:    vptestnmd %zmm2, %zmm2, %k12619; CHECK-NEXT:    vpshufd {{.*#+}} zmm1 {%k1} = zmm0[1,3,3,0,5,7,7,4,9,11,11,8,13,15,15,12]2620; CHECK-NEXT:    vmovdqa64 %zmm1, %zmm02621; CHECK-NEXT:    retq2622  %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 1, i32 3, i32 3, i32 0, i32 5, i32 7, i32 7, i32 4, i32 9, i32 11, i32 11, i32 8, i32 13, i32 15, i32 15, i32 12>2623  %cmp = icmp eq <16 x i32> %mask, zeroinitializer2624  %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> %vec22625  ret <16 x i32> %res2626}2627 2628define <16 x i32> @test_masked_z_16xi32_perm_mask2(<16 x i32> %vec, <16 x i32> %mask) {2629; CHECK-LABEL: test_masked_z_16xi32_perm_mask2:2630; CHECK:       # %bb.0:2631; CHECK-NEXT:    vptestnmd %zmm1, %zmm1, %k12632; CHECK-NEXT:    vpshufd {{.*#+}} zmm0 {%k1} {z} = zmm0[1,3,3,0,5,7,7,4,9,11,11,8,13,15,15,12]2633; CHECK-NEXT:    retq2634  %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 1, i32 3, i32 3, i32 0, i32 5, i32 7, i32 7, i32 4, i32 9, i32 11, i32 11, i32 8, i32 13, i32 15, i32 15, i32 12>2635  %cmp = icmp eq <16 x i32> %mask, zeroinitializer2636  %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> zeroinitializer2637  ret <16 x i32> %res2638}2639define <16 x i32> @test_16xi32_perm_mask3(<16 x i32> %vec) {2640; CHECK-LABEL: test_16xi32_perm_mask3:2641; CHECK:       # %bb.0:2642; CHECK-NEXT:    vshufps {{.*#+}} zmm0 = zmm0[3,2,0,3,7,6,4,7,11,10,8,11,15,14,12,15]2643; CHECK-NEXT:    retq2644  %res = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 3, i32 2, i32 0, i32 3, i32 7, i32 6, i32 4, i32 7, i32 11, i32 10, i32 8, i32 11, i32 15, i32 14, i32 12, i32 15>2645  ret <16 x i32> %res2646}2647define <16 x i32> @test_masked_16xi32_perm_mask3(<16 x i32> %vec, <16 x i32> %vec2, <16 x i32> %mask) {2648; CHECK-LABEL: test_masked_16xi32_perm_mask3:2649; CHECK:       # %bb.0:2650; CHECK-NEXT:    vptestnmd %zmm2, %zmm2, %k12651; CHECK-NEXT:    vpshufd {{.*#+}} zmm1 {%k1} = zmm0[3,2,0,3,7,6,4,7,11,10,8,11,15,14,12,15]2652; CHECK-NEXT:    vmovdqa64 %zmm1, %zmm02653; CHECK-NEXT:    retq2654  %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 3, i32 2, i32 0, i32 3, i32 7, i32 6, i32 4, i32 7, i32 11, i32 10, i32 8, i32 11, i32 15, i32 14, i32 12, i32 15>2655  %cmp = icmp eq <16 x i32> %mask, zeroinitializer2656  %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> %vec22657  ret <16 x i32> %res2658}2659 2660define <16 x i32> @test_masked_z_16xi32_perm_mask3(<16 x i32> %vec, <16 x i32> %mask) {2661; CHECK-LABEL: test_masked_z_16xi32_perm_mask3:2662; CHECK:       # %bb.0:2663; CHECK-NEXT:    vptestnmd %zmm1, %zmm1, %k12664; CHECK-NEXT:    vpshufd {{.*#+}} zmm0 {%k1} {z} = zmm0[3,2,0,3,7,6,4,7,11,10,8,11,15,14,12,15]2665; CHECK-NEXT:    retq2666  %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 3, i32 2, i32 0, i32 3, i32 7, i32 6, i32 4, i32 7, i32 11, i32 10, i32 8, i32 11, i32 15, i32 14, i32 12, i32 15>2667  %cmp = icmp eq <16 x i32> %mask, zeroinitializer2668  %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> zeroinitializer2669  ret <16 x i32> %res2670}2671define <16 x i32> @test_16xi32_perm_mem_mask0(ptr %vp) {2672; CHECK-LABEL: test_16xi32_perm_mem_mask0:2673; CHECK:       # %bb.0:2674; CHECK-NEXT:    vpermilps {{.*#+}} zmm0 = mem[1,0,1,3,5,4,5,7,9,8,9,11,13,12,13,15]2675; CHECK-NEXT:    retq2676  %vec = load <16 x i32>, ptr %vp2677  %res = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 1, i32 0, i32 1, i32 3, i32 5, i32 4, i32 5, i32 7, i32 9, i32 8, i32 9, i32 11, i32 13, i32 12, i32 13, i32 15>2678  ret <16 x i32> %res2679}2680define <16 x i32> @test_masked_16xi32_perm_mem_mask0(ptr %vp, <16 x i32> %vec2, <16 x i32> %mask) {2681; CHECK-LABEL: test_masked_16xi32_perm_mem_mask0:2682; CHECK:       # %bb.0:2683; CHECK-NEXT:    vptestnmd %zmm1, %zmm1, %k12684; CHECK-NEXT:    vpshufd {{.*#+}} zmm0 {%k1} = mem[1,0,1,3,5,4,5,7,9,8,9,11,13,12,13,15]2685; CHECK-NEXT:    retq2686  %vec = load <16 x i32>, ptr %vp2687  %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 1, i32 0, i32 1, i32 3, i32 5, i32 4, i32 5, i32 7, i32 9, i32 8, i32 9, i32 11, i32 13, i32 12, i32 13, i32 15>2688  %cmp = icmp eq <16 x i32> %mask, zeroinitializer2689  %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> %vec22690  ret <16 x i32> %res2691}2692 2693define <16 x i32> @test_masked_z_16xi32_perm_mem_mask0(ptr %vp, <16 x i32> %mask) {2694; CHECK-LABEL: test_masked_z_16xi32_perm_mem_mask0:2695; CHECK:       # %bb.0:2696; CHECK-NEXT:    vptestnmd %zmm0, %zmm0, %k12697; CHECK-NEXT:    vpshufd {{.*#+}} zmm0 {%k1} {z} = mem[1,0,1,3,5,4,5,7,9,8,9,11,13,12,13,15]2698; CHECK-NEXT:    retq2699  %vec = load <16 x i32>, ptr %vp2700  %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 1, i32 0, i32 1, i32 3, i32 5, i32 4, i32 5, i32 7, i32 9, i32 8, i32 9, i32 11, i32 13, i32 12, i32 13, i32 15>2701  %cmp = icmp eq <16 x i32> %mask, zeroinitializer2702  %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> zeroinitializer2703  ret <16 x i32> %res2704}2705 2706define <16 x i32> @test_masked_16xi32_perm_mem_mask1(ptr %vp, <16 x i32> %vec2, <16 x i32> %mask) {2707; CHECK-LABEL: test_masked_16xi32_perm_mem_mask1:2708; CHECK:       # %bb.0:2709; CHECK-NEXT:    vptestnmd %zmm1, %zmm1, %k12710; CHECK-NEXT:    vpshufd {{.*#+}} zmm0 {%k1} = mem[1,0,0,2,5,4,4,6,9,8,8,10,13,12,12,14]2711; CHECK-NEXT:    retq2712  %vec = load <16 x i32>, ptr %vp2713  %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 1, i32 0, i32 0, i32 2, i32 5, i32 4, i32 4, i32 6, i32 9, i32 8, i32 8, i32 10, i32 13, i32 12, i32 12, i32 14>2714  %cmp = icmp eq <16 x i32> %mask, zeroinitializer2715  %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> %vec22716  ret <16 x i32> %res2717}2718 2719define <16 x i32> @test_masked_z_16xi32_perm_mem_mask1(ptr %vp, <16 x i32> %mask) {2720; CHECK-LABEL: test_masked_z_16xi32_perm_mem_mask1:2721; CHECK:       # %bb.0:2722; CHECK-NEXT:    vptestnmd %zmm0, %zmm0, %k12723; CHECK-NEXT:    vpshufd {{.*#+}} zmm0 {%k1} {z} = mem[1,0,0,2,5,4,4,6,9,8,8,10,13,12,12,14]2724; CHECK-NEXT:    retq2725  %vec = load <16 x i32>, ptr %vp2726  %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 1, i32 0, i32 0, i32 2, i32 5, i32 4, i32 4, i32 6, i32 9, i32 8, i32 8, i32 10, i32 13, i32 12, i32 12, i32 14>2727  %cmp = icmp eq <16 x i32> %mask, zeroinitializer2728  %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> zeroinitializer2729  ret <16 x i32> %res2730}2731 2732define <16 x i32> @test_masked_16xi32_perm_mem_mask2(ptr %vp, <16 x i32> %vec2, <16 x i32> %mask) {2733; CHECK-LABEL: test_masked_16xi32_perm_mem_mask2:2734; CHECK:       # %bb.0:2735; CHECK-NEXT:    vptestnmd %zmm1, %zmm1, %k12736; CHECK-NEXT:    vpshufd {{.*#+}} zmm0 {%k1} = mem[2,0,1,2,6,4,5,6,10,8,9,10,14,12,13,14]2737; CHECK-NEXT:    retq2738  %vec = load <16 x i32>, ptr %vp2739  %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 2, i32 0, i32 1, i32 2, i32 6, i32 4, i32 5, i32 6, i32 10, i32 8, i32 9, i32 10, i32 14, i32 12, i32 13, i32 14>2740  %cmp = icmp eq <16 x i32> %mask, zeroinitializer2741  %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> %vec22742  ret <16 x i32> %res2743}2744 2745define <16 x i32> @test_masked_z_16xi32_perm_mem_mask2(ptr %vp, <16 x i32> %mask) {2746; CHECK-LABEL: test_masked_z_16xi32_perm_mem_mask2:2747; CHECK:       # %bb.0:2748; CHECK-NEXT:    vptestnmd %zmm0, %zmm0, %k12749; CHECK-NEXT:    vpshufd {{.*#+}} zmm0 {%k1} {z} = mem[2,0,1,2,6,4,5,6,10,8,9,10,14,12,13,14]2750; CHECK-NEXT:    retq2751  %vec = load <16 x i32>, ptr %vp2752  %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 2, i32 0, i32 1, i32 2, i32 6, i32 4, i32 5, i32 6, i32 10, i32 8, i32 9, i32 10, i32 14, i32 12, i32 13, i32 14>2753  %cmp = icmp eq <16 x i32> %mask, zeroinitializer2754  %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> zeroinitializer2755  ret <16 x i32> %res2756}2757 2758define <16 x i32> @test_16xi32_perm_mem_mask3(ptr %vp) {2759; CHECK-LABEL: test_16xi32_perm_mem_mask3:2760; CHECK:       # %bb.0:2761; CHECK-NEXT:    vpermilps {{.*#+}} zmm0 = mem[3,1,1,1,7,5,5,5,11,9,9,9,15,13,13,13]2762; CHECK-NEXT:    retq2763  %vec = load <16 x i32>, ptr %vp2764  %res = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 3, i32 1, i32 1, i32 1, i32 7, i32 5, i32 5, i32 5, i32 11, i32 9, i32 9, i32 9, i32 15, i32 13, i32 13, i32 13>2765  ret <16 x i32> %res2766}2767define <16 x i32> @test_masked_16xi32_perm_mem_mask3(ptr %vp, <16 x i32> %vec2, <16 x i32> %mask) {2768; CHECK-LABEL: test_masked_16xi32_perm_mem_mask3:2769; CHECK:       # %bb.0:2770; CHECK-NEXT:    vptestnmd %zmm1, %zmm1, %k12771; CHECK-NEXT:    vpshufd {{.*#+}} zmm0 {%k1} = mem[3,1,1,1,7,5,5,5,11,9,9,9,15,13,13,13]2772; CHECK-NEXT:    retq2773  %vec = load <16 x i32>, ptr %vp2774  %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 3, i32 1, i32 1, i32 1, i32 7, i32 5, i32 5, i32 5, i32 11, i32 9, i32 9, i32 9, i32 15, i32 13, i32 13, i32 13>2775  %cmp = icmp eq <16 x i32> %mask, zeroinitializer2776  %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> %vec22777  ret <16 x i32> %res2778}2779 2780define <16 x i32> @test_masked_z_16xi32_perm_mem_mask3(ptr %vp, <16 x i32> %mask) {2781; CHECK-LABEL: test_masked_z_16xi32_perm_mem_mask3:2782; CHECK:       # %bb.0:2783; CHECK-NEXT:    vptestnmd %zmm0, %zmm0, %k12784; CHECK-NEXT:    vpshufd {{.*#+}} zmm0 {%k1} {z} = mem[3,1,1,1,7,5,5,5,11,9,9,9,15,13,13,13]2785; CHECK-NEXT:    retq2786  %vec = load <16 x i32>, ptr %vp2787  %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> <i32 3, i32 1, i32 1, i32 1, i32 7, i32 5, i32 5, i32 5, i32 11, i32 9, i32 9, i32 9, i32 15, i32 13, i32 13, i32 13>2788  %cmp = icmp eq <16 x i32> %mask, zeroinitializer2789  %res = select <16 x i1> %cmp, <16 x i32> %shuf, <16 x i32> zeroinitializer2790  ret <16 x i32> %res2791}2792 2793