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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw -mattr=+avx512dq -mattr=+avx512vl| FileCheck %s3 4define <8 x i1> @test(<2 x i1> %a) {5; CHECK-LABEL: test:6; CHECK: # %bb.0:7; CHECK-NEXT: vpsllq $63, %xmm0, %xmm08; CHECK-NEXT: vpmovq2m %xmm0, %k09; CHECK-NEXT: kshiftlb $2, %k0, %k010; CHECK-NEXT: vpmovm2w %k0, %xmm011; CHECK-NEXT: retq12 %res = shufflevector <2 x i1> %a, <2 x i1> undef, <8 x i32> <i32 undef, i32 undef, i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef>13 ret <8 x i1> %res14}15 16define <8 x i1> @test1(<2 x i1> %a) {17; CHECK-LABEL: test1:18; CHECK: # %bb.0:19; CHECK-NEXT: vpsllq $63, %xmm0, %xmm020; CHECK-NEXT: vpmovq2m %xmm0, %k021; CHECK-NEXT: kshiftlb $4, %k0, %k022; CHECK-NEXT: vpmovm2w %k0, %xmm023; CHECK-NEXT: retq24 %res = shufflevector <2 x i1> %a, <2 x i1> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 undef, i32 undef>25 ret <8 x i1> %res26}27 28define <8 x i1> @test2(<2 x i1> %a) {29; CHECK-LABEL: test2:30; CHECK: # %bb.0:31; CHECK-NEXT: vpsllq $63, %xmm0, %xmm032; CHECK-NEXT: vpmovq2m %xmm0, %k033; CHECK-NEXT: kshiftlb $4, %k0, %k034; CHECK-NEXT: vpmovm2w %k0, %xmm035; CHECK-NEXT: retq36 %res = shufflevector <2 x i1> %a, <2 x i1> zeroinitializer, <8 x i32> <i32 3, i32 3, i32 undef, i32 undef, i32 0, i32 1, i32 undef, i32 undef>37 ret <8 x i1> %res38}39 40define <8 x i1> @test3(<4 x i1> %a) {41; CHECK-LABEL: test3:42; CHECK: # %bb.0:43; CHECK-NEXT: vpslld $31, %xmm0, %xmm044; CHECK-NEXT: vpmovd2m %xmm0, %k045; CHECK-NEXT: vpmovm2w %k0, %xmm046; CHECK-NEXT: retq47 48 %res = shufflevector <4 x i1> %a, <4 x i1> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>49 ret <8 x i1> %res50}51 52define <8 x i1> @test4(<4 x i1> %a, <4 x i1>%b) {53; CHECK-LABEL: test4:54; CHECK: # %bb.0:55; CHECK-NEXT: vpslld $31, %xmm1, %xmm156; CHECK-NEXT: vpmovd2m %xmm1, %k057; CHECK-NEXT: vpslld $31, %xmm0, %xmm058; CHECK-NEXT: vpmovd2m %xmm0, %k159; CHECK-NEXT: kshiftlb $4, %k0, %k060; CHECK-NEXT: korb %k0, %k1, %k061; CHECK-NEXT: vpmovm2w %k0, %xmm062; CHECK-NEXT: retq63 64 %res = shufflevector <4 x i1> %a, <4 x i1> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>65 ret <8 x i1> %res66}67 68define <4 x i1> @test5(<2 x i1> %a, <2 x i1>%b) {69; CHECK-LABEL: test5:70; CHECK: # %bb.0:71; CHECK-NEXT: vpsllq $63, %xmm1, %xmm172; CHECK-NEXT: vpmovq2m %xmm1, %k073; CHECK-NEXT: vpsllq $63, %xmm0, %xmm074; CHECK-NEXT: vpmovq2m %xmm0, %k175; CHECK-NEXT: kshiftlb $2, %k0, %k076; CHECK-NEXT: korw %k0, %k1, %k077; CHECK-NEXT: vpmovm2d %k0, %xmm078; CHECK-NEXT: retq79 80 %res = shufflevector <2 x i1> %a, <2 x i1> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 3>81 ret <4 x i1> %res82}83 84define <16 x i1> @test6(<2 x i1> %a, <2 x i1>%b) {85; CHECK-LABEL: test6:86; CHECK: # %bb.0:87; CHECK-NEXT: vpsllq $63, %xmm1, %xmm188; CHECK-NEXT: vpmovq2m %xmm1, %k089; CHECK-NEXT: vpsllq $63, %xmm0, %xmm090; CHECK-NEXT: vpmovq2m %xmm0, %k191; CHECK-NEXT: kshiftlb $2, %k0, %k092; CHECK-NEXT: korw %k0, %k1, %k093; CHECK-NEXT: vpmovm2b %k0, %xmm094; CHECK-NEXT: retq95 96 %res = shufflevector <2 x i1> %a, <2 x i1> %b, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>97 ret <16 x i1> %res98}99 100define <32 x i1> @test7(<4 x i1> %a, <4 x i1>%b) {101; CHECK-LABEL: test7:102; CHECK: # %bb.0:103; CHECK-NEXT: vpslld $31, %xmm1, %xmm1104; CHECK-NEXT: vpmovd2m %xmm1, %k0105; CHECK-NEXT: vpslld $31, %xmm0, %xmm0106; CHECK-NEXT: vpmovd2m %xmm0, %k1107; CHECK-NEXT: kshiftlb $4, %k0, %k0108; CHECK-NEXT: korb %k0, %k1, %k0109; CHECK-NEXT: vpmovm2b %k0, %ymm0110; CHECK-NEXT: retq111 112 %res = shufflevector <4 x i1> %a, <4 x i1> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>113 ret <32 x i1> %res114}115 116define <64 x i1> @test8(<8 x i1> %a, <8 x i1>%b) {117; CHECK-LABEL: test8:118; CHECK: # %bb.0:119; CHECK-NEXT: vpsllw $15, %xmm1, %xmm1120; CHECK-NEXT: vpmovw2m %xmm1, %k0121; CHECK-NEXT: vpsllw $15, %xmm0, %xmm0122; CHECK-NEXT: vpmovw2m %xmm0, %k1123; CHECK-NEXT: kunpckdq %k1, %k0, %k0124; CHECK-NEXT: vpmovm2b %k0, %zmm0125; CHECK-NEXT: retq126 127 %res = shufflevector <8 x i1> %a, <8 x i1> %b, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>128 ret <64 x i1> %res129}130 131define <4 x i1> @test9(<8 x i1> %a, <8 x i1> %b) {132; CHECK-LABEL: test9:133; CHECK: # %bb.0:134; CHECK-NEXT: vpsllw $15, %xmm0, %xmm0135; CHECK-NEXT: vpmovw2m %xmm0, %k0136; CHECK-NEXT: kshiftrb $4, %k0, %k0137; CHECK-NEXT: vpmovm2d %k0, %xmm0138; CHECK-NEXT: retq139 %res = shufflevector <8 x i1> %a, <8 x i1> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 7>140 ret <4 x i1> %res141}142 143define <2 x i1> @test10(<4 x i1> %a, <4 x i1> %b) {144; CHECK-LABEL: test10:145; CHECK: # %bb.0:146; CHECK-NEXT: vpslld $31, %xmm0, %xmm0147; CHECK-NEXT: vpmovd2m %xmm0, %k0148; CHECK-NEXT: kshiftrb $2, %k0, %k0149; CHECK-NEXT: vpmovm2q %k0, %xmm0150; CHECK-NEXT: retq151 %res = shufflevector <4 x i1> %a, <4 x i1> %b, <2 x i32> <i32 2, i32 3>152 ret <2 x i1> %res153}154 155define <8 x i1> @test11(<4 x i1> %a, <4 x i1>%b) {156; CHECK-LABEL: test11:157; CHECK: # %bb.0:158; CHECK-NEXT: vpslld $31, %xmm0, %xmm0159; CHECK-NEXT: vpmovd2m %xmm0, %k0160; CHECK-NEXT: kshiftlb $4, %k0, %k0161; CHECK-NEXT: vpmovm2w %k0, %xmm0162; CHECK-NEXT: retq163 %res = shufflevector <4 x i1> %a, <4 x i1> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3>164 ret <8 x i1> %res165}166 167define <16 x i1> @test12(<2 x i1> %a) {168; CHECK-LABEL: test12:169; CHECK: # %bb.0:170; CHECK-NEXT: vpsllq $63, %xmm0, %xmm0171; CHECK-NEXT: vpmovq2m %xmm0, %k0172; CHECK-NEXT: kshiftlw $10, %k0, %k0173; CHECK-NEXT: vpmovm2b %k0, %xmm0174; CHECK-NEXT: retq175 %res = shufflevector <2 x i1> %a, <2 x i1> zeroinitializer, <16 x i32> <i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef>176 ret <16 x i1> %res177}178 179define <32 x i1> @test13(<2 x i1> %a) {180; CHECK-LABEL: test13:181; CHECK: # %bb.0:182; CHECK-NEXT: vpsllq $63, %xmm0, %xmm0183; CHECK-NEXT: vpmovq2m %xmm0, %k0184; CHECK-NEXT: kshiftld $10, %k0, %k0185; CHECK-NEXT: vpmovm2b %k0, %ymm0186; CHECK-NEXT: retq187 %res = shufflevector <2 x i1> %a, <2 x i1> zeroinitializer, <32 x i32> <i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>188 ret <32 x i1> %res189}190 191define <64 x i1> @test14(<2 x i1> %a) {192; CHECK-LABEL: test14:193; CHECK: # %bb.0:194; CHECK-NEXT: vpsllq $63, %xmm0, %xmm0195; CHECK-NEXT: vpmovq2m %xmm0, %k0196; CHECK-NEXT: kshiftlq $10, %k0, %k0197; CHECK-NEXT: vpmovm2b %k0, %zmm0198; CHECK-NEXT: retq199 %res = shufflevector <2 x i1> %a, <2 x i1> zeroinitializer, <64 x i32> <i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>200 ret <64 x i1> %res201}202 203; Make sure we can recognize this shuffle as an insertion in to a zero vector.204define i8 @test15(<2 x i64> %x) {205; CHECK-LABEL: test15:206; CHECK: # %bb.0:207; CHECK-NEXT: vptestnmq %xmm0, %xmm0, %k0208; CHECK-NEXT: kmovd %k0, %eax209; CHECK-NEXT: # kill: def $al killed $al killed $eax210; CHECK-NEXT: retq211 %a = icmp eq <2 x i64> %x, zeroinitializer212 %b = shufflevector <2 x i1> %a, <2 x i1> <i1 false, i1 undef>, <8 x i32> <i32 0, i32 1, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>213 %c = bitcast <8 x i1> %b to i8214 ret i8 %c215}216