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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s3 4; These test cases demonstrate cases where vpternlog could benefit from being commuted.5 6declare <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i32)7 8define <16 x i32> @vpternlog_v16i32_012(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {9; CHECK-LABEL: vpternlog_v16i32_012:10; CHECK: ## %bb.0:11; CHECK-NEXT: vpternlogd $114, %zmm2, %zmm1, %zmm012; CHECK-NEXT: retq13 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)14 ret <16 x i32> %115}16 17define <16 x i32> @vpternlog_v16i32_102(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {18; CHECK-LABEL: vpternlog_v16i32_102:19; CHECK: ## %bb.0:20; CHECK-NEXT: vpternlogd $78, %zmm2, %zmm1, %zmm021; CHECK-NEXT: retq22 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)23 ret <16 x i32> %124}25 26define <16 x i32> @vpternlog_v16i32_210(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {27; CHECK-LABEL: vpternlog_v16i32_210:28; CHECK: ## %bb.0:29; CHECK-NEXT: vpternlogd $92, %zmm1, %zmm2, %zmm030; CHECK-NEXT: retq31 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)32 ret <16 x i32> %133}34 35define <16 x i32> @vpternlog_v16i32_012_load0(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2) {36; CHECK-LABEL: vpternlog_v16i32_012_load0:37; CHECK: ## %bb.0:38; CHECK-NEXT: vpternlogd $46, (%rdi), %zmm1, %zmm039; CHECK-NEXT: retq40 %x0 = load <16 x i32>, ptr %x0ptr41 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)42 ret <16 x i32> %143}44 45define <16 x i32> @vpternlog_v16i32_012_load1(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2) {46; CHECK-LABEL: vpternlog_v16i32_012_load1:47; CHECK: ## %bb.0:48; CHECK-NEXT: vpternlogd $116, (%rdi), %zmm1, %zmm049; CHECK-NEXT: retq50 %x1 = load <16 x i32>, ptr %x1ptr51 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)52 ret <16 x i32> %153}54 55define <16 x i32> @vpternlog_v16i32_012_load2(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr) {56; CHECK-LABEL: vpternlog_v16i32_012_load2:57; CHECK: ## %bb.0:58; CHECK-NEXT: vpternlogd $114, (%rdi), %zmm1, %zmm059; CHECK-NEXT: retq60 %x2 = load <16 x i32>, ptr %x2ptr61 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)62 ret <16 x i32> %163}64 65define <16 x i32> @vpternlog_v16i32_102_load0(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2) {66; CHECK-LABEL: vpternlog_v16i32_102_load0:67; CHECK: ## %bb.0:68; CHECK-NEXT: vpternlogd $116, (%rdi), %zmm1, %zmm069; CHECK-NEXT: retq70 %x0 = load <16 x i32>, ptr %x0ptr71 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)72 ret <16 x i32> %173}74 75define <16 x i32> @vpternlog_v16i32_102_load1(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2) {76; CHECK-LABEL: vpternlog_v16i32_102_load1:77; CHECK: ## %bb.0:78; CHECK-NEXT: vpternlogd $46, (%rdi), %zmm1, %zmm079; CHECK-NEXT: retq80 %x1 = load <16 x i32>, ptr %x1ptr81 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)82 ret <16 x i32> %183}84 85define <16 x i32> @vpternlog_v16i32_102_load2(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr) {86; CHECK-LABEL: vpternlog_v16i32_102_load2:87; CHECK: ## %bb.0:88; CHECK-NEXT: vpternlogd $78, (%rdi), %zmm1, %zmm089; CHECK-NEXT: retq90 %x2 = load <16 x i32>, ptr %x2ptr91 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)92 ret <16 x i32> %193}94 95define <16 x i32> @vpternlog_v16i32_210_load0(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2) {96; CHECK-LABEL: vpternlog_v16i32_210_load0:97; CHECK: ## %bb.0:98; CHECK-NEXT: vpternlogd $78, (%rdi), %zmm1, %zmm099; CHECK-NEXT: retq100 %x0 = load <16 x i32>, ptr %x0ptr101 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)102 ret <16 x i32> %1103}104 105define <16 x i32> @vpternlog_v16i32_210_load1(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2) {106; CHECK-LABEL: vpternlog_v16i32_210_load1:107; CHECK: ## %bb.0:108; CHECK-NEXT: vpternlogd $92, (%rdi), %zmm1, %zmm0109; CHECK-NEXT: retq110 %x1 = load <16 x i32>, ptr %x1ptr111 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)112 ret <16 x i32> %1113}114 115define <16 x i32> @vpternlog_v16i32_210_load2(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr) {116; CHECK-LABEL: vpternlog_v16i32_210_load2:117; CHECK: ## %bb.0:118; CHECK-NEXT: vpternlogd $58, (%rdi), %zmm1, %zmm0119; CHECK-NEXT: retq120 %x2 = load <16 x i32>, ptr %x2ptr121 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)122 ret <16 x i32> %1123}124 125define <16 x i32> @vpternlog_v16i32_021_load0(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2) {126; CHECK-LABEL: vpternlog_v16i32_021_load0:127; CHECK: ## %bb.0:128; CHECK-NEXT: vpternlogd $58, (%rdi), %zmm1, %zmm0129; CHECK-NEXT: retq130 %x0 = load <16 x i32>, ptr %x0ptr131 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x2, <16 x i32> %x1, i32 114)132 ret <16 x i32> %1133}134 135define <16 x i32> @vpternlog_v16i32_021_load1(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2) {136; CHECK-LABEL: vpternlog_v16i32_021_load1:137; CHECK: ## %bb.0:138; CHECK-NEXT: vpternlogd $114, (%rdi), %zmm1, %zmm0139; CHECK-NEXT: retq140 %x1 = load <16 x i32>, ptr %x1ptr141 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x2, <16 x i32> %x1, i32 114)142 ret <16 x i32> %1143}144 145define <16 x i32> @vpternlog_v16i32_021_load2(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr) {146; CHECK-LABEL: vpternlog_v16i32_021_load2:147; CHECK: ## %bb.0:148; CHECK-NEXT: vpternlogd $116, (%rdi), %zmm1, %zmm0149; CHECK-NEXT: retq150 %x2 = load <16 x i32>, ptr %x2ptr151 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x2, <16 x i32> %x1, i32 114)152 ret <16 x i32> %1153}154 155define <16 x i32> @vpternlog_v16i32_012_mask(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {156; CHECK-LABEL: vpternlog_v16i32_012_mask:157; CHECK: ## %bb.0:158; CHECK-NEXT: kmovd %edi, %k1159; CHECK-NEXT: vpternlogd $114, %zmm2, %zmm1, %zmm0 {%k1}160; CHECK-NEXT: retq161 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)162 %2 = bitcast i16 %mask to <16 x i1>163 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x0164 ret <16 x i32> %3165}166 167define <16 x i32> @vpternlog_v16i32_102_mask(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {168; CHECK-LABEL: vpternlog_v16i32_102_mask:169; CHECK: ## %bb.0:170; CHECK-NEXT: kmovd %edi, %k1171; CHECK-NEXT: vpternlogd $114, %zmm2, %zmm0, %zmm1 {%k1}172; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0173; CHECK-NEXT: retq174 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)175 %2 = bitcast i16 %mask to <16 x i1>176 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x1177 ret <16 x i32> %3178}179 180define <16 x i32> @vpternlog_v16i32_210_mask(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {181; CHECK-LABEL: vpternlog_v16i32_210_mask:182; CHECK: ## %bb.0:183; CHECK-NEXT: kmovd %edi, %k1184; CHECK-NEXT: vpternlogd $114, %zmm0, %zmm1, %zmm2 {%k1}185; CHECK-NEXT: vmovdqa64 %zmm2, %zmm0186; CHECK-NEXT: retq187 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)188 %2 = bitcast i16 %mask to <16 x i1>189 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x2190 ret <16 x i32> %3191}192 193define <16 x i32> @vpternlog_v16i32_012_mask1(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {194; CHECK-LABEL: vpternlog_v16i32_012_mask1:195; CHECK: ## %bb.0:196; CHECK-NEXT: kmovd %edi, %k1197; CHECK-NEXT: vpternlogd $78, %zmm2, %zmm0, %zmm1 {%k1}198; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0199; CHECK-NEXT: retq200 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)201 %mask.cast = bitcast i16 %mask to <16 x i1>202 %res2 = select <16 x i1> %mask.cast, <16 x i32> %1, <16 x i32> %x1203 ret <16 x i32> %res2204}205 206define <16 x i32> @vpternlog_v16i32_012_mask2(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {207; CHECK-LABEL: vpternlog_v16i32_012_mask2:208; CHECK: ## %bb.0:209; CHECK-NEXT: kmovd %edi, %k1210; CHECK-NEXT: vpternlogd $58, %zmm0, %zmm1, %zmm2 {%k1}211; CHECK-NEXT: vmovdqa64 %zmm2, %zmm0212; CHECK-NEXT: retq213 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)214 %mask.cast = bitcast i16 %mask to <16 x i1>215 %res2 = select <16 x i1> %mask.cast, <16 x i32> %1, <16 x i32> %x2216 ret <16 x i32> %res2217}218 219define <16 x i32> @vpternlog_v16i32_012_load0_mask(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {220; CHECK-LABEL: vpternlog_v16i32_012_load0_mask:221; CHECK: ## %bb.0:222; CHECK-NEXT: vmovdqa64 (%rdi), %zmm2223; CHECK-NEXT: kmovd %esi, %k1224; CHECK-NEXT: vpternlogd $114, %zmm1, %zmm0, %zmm2 {%k1}225; CHECK-NEXT: vmovdqa64 %zmm2, %zmm0226; CHECK-NEXT: retq227 %x0 = load <16 x i32>, ptr %x0ptr228 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)229 %2 = bitcast i16 %mask to <16 x i1>230 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x0231 ret <16 x i32> %3232}233 234define <16 x i32> @vpternlog_v16i32_012_load0_mask1(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {235; CHECK-LABEL: vpternlog_v16i32_012_load0_mask1:236; CHECK: ## %bb.0:237; CHECK-NEXT: kmovd %esi, %k1238; CHECK-NEXT: vpternlogd $65, (%rdi), %zmm1, %zmm0 {%k1}239; CHECK-NEXT: retq240 %x0 = load <16 x i32>, ptr %x0ptr241 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 33)242 %mask.cast = bitcast i16 %mask to <16 x i1>243 %res2 = select <16 x i1> %mask.cast, <16 x i32> %1, <16 x i32> %x1244 ret <16 x i32> %res2245}246 247define <16 x i32> @vpternlog_v16i32_012_load0_mask2(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {248; CHECK-LABEL: vpternlog_v16i32_012_load0_mask2:249; CHECK: ## %bb.0:250; CHECK-NEXT: kmovd %esi, %k1251; CHECK-NEXT: vpternlogd $33, (%rdi), %zmm0, %zmm1 {%k1}252; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0253; CHECK-NEXT: retq254 %x0 = load <16 x i32>, ptr %x0ptr255 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 33)256 %mask.cast = bitcast i16 %mask to <16 x i1>257 %res2 = select <16 x i1> %mask.cast, <16 x i32> %1, <16 x i32> %x2258 ret <16 x i32> %res2259}260 261define <16 x i32> @vpternlog_v16i32_012_load1_mask(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2, i16 %mask) {262; CHECK-LABEL: vpternlog_v16i32_012_load1_mask:263; CHECK: ## %bb.0:264; CHECK-NEXT: kmovd %esi, %k1265; CHECK-NEXT: vpternlogd $116, (%rdi), %zmm1, %zmm0 {%k1}266; CHECK-NEXT: retq267 %x1 = load <16 x i32>, ptr %x1ptr268 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)269 %2 = bitcast i16 %mask to <16 x i1>270 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x0271 ret <16 x i32> %3272}273 274define <16 x i32> @vpternlog_v16i32_012_load1_mask2(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2, i16 %mask) {275; CHECK-LABEL: vpternlog_v16i32_012_load1_mask2:276; CHECK: ## %bb.0:277; CHECK-NEXT: kmovd %esi, %k1278; CHECK-NEXT: vpternlogd $9, (%rdi), %zmm0, %zmm1 {%k1}279; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0280; CHECK-NEXT: retq281 %x1 = load <16 x i32>, ptr %x1ptr282 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 33)283 %mask.cast = bitcast i16 %mask to <16 x i1>284 %res2 = select <16 x i1> %mask.cast, <16 x i32> %1, <16 x i32> %x2285 ret <16 x i32> %res2286}287 288define <16 x i32> @vpternlog_v16i32_012_load2_mask(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr, i16 %mask) {289; CHECK-LABEL: vpternlog_v16i32_012_load2_mask:290; CHECK: ## %bb.0:291; CHECK-NEXT: kmovd %esi, %k1292; CHECK-NEXT: vpternlogd $114, (%rdi), %zmm1, %zmm0 {%k1}293; CHECK-NEXT: retq294 %x2 = load <16 x i32>, ptr %x2ptr295 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)296 %2 = bitcast i16 %mask to <16 x i1>297 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x0298 ret <16 x i32> %3299}300 301define <16 x i32> @vpternlog_v16i32_012_load2_mask1(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr, i16 %mask) {302; CHECK-LABEL: vpternlog_v16i32_012_load2_mask1:303; CHECK: ## %bb.0:304; CHECK-NEXT: kmovd %esi, %k1305; CHECK-NEXT: vpternlogd $9, (%rdi), %zmm0, %zmm1 {%k1}306; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0307; CHECK-NEXT: retq308 %x2 = load <16 x i32>, ptr %x2ptr309 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 33)310 %mask.cast = bitcast i16 %mask to <16 x i1>311 %res2 = select <16 x i1> %mask.cast, <16 x i32> %1, <16 x i32> %x1312 ret <16 x i32> %res2313}314 315define <16 x i32> @vpternlog_v16i32_102_load0_mask(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {316; CHECK-LABEL: vpternlog_v16i32_102_load0_mask:317; CHECK: ## %bb.0:318; CHECK-NEXT: kmovd %esi, %k1319; CHECK-NEXT: vpternlogd $116, (%rdi), %zmm1, %zmm0 {%k1}320; CHECK-NEXT: retq321 %x0 = load <16 x i32>, ptr %x0ptr322 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)323 %2 = bitcast i16 %mask to <16 x i1>324 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x1325 ret <16 x i32> %3326}327 328define <16 x i32> @vpternlog_v16i32_102_load1_mask(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2, i16 %mask) {329; CHECK-LABEL: vpternlog_v16i32_102_load1_mask:330; CHECK: ## %bb.0:331; CHECK-NEXT: vmovdqa64 (%rdi), %zmm2332; CHECK-NEXT: kmovd %esi, %k1333; CHECK-NEXT: vpternlogd $114, %zmm1, %zmm0, %zmm2 {%k1}334; CHECK-NEXT: vmovdqa64 %zmm2, %zmm0335; CHECK-NEXT: retq336 %x1 = load <16 x i32>, ptr %x1ptr337 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)338 %2 = bitcast i16 %mask to <16 x i1>339 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x1340 ret <16 x i32> %3341}342 343define <16 x i32> @vpternlog_v16i32_102_load2_mask(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr, i16 %mask) {344; CHECK-LABEL: vpternlog_v16i32_102_load2_mask:345; CHECK: ## %bb.0:346; CHECK-NEXT: kmovd %esi, %k1347; CHECK-NEXT: vpternlogd $114, (%rdi), %zmm0, %zmm1 {%k1}348; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0349; CHECK-NEXT: retq350 %x2 = load <16 x i32>, ptr %x2ptr351 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)352 %2 = bitcast i16 %mask to <16 x i1>353 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x1354 ret <16 x i32> %3355}356 357define <16 x i32> @vpternlog_v16i32_210_load0_mask(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {358; CHECK-LABEL: vpternlog_v16i32_210_load0_mask:359; CHECK: ## %bb.0:360; CHECK-NEXT: kmovd %esi, %k1361; CHECK-NEXT: vpternlogd $114, (%rdi), %zmm0, %zmm1 {%k1}362; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0363; CHECK-NEXT: retq364 %x0 = load <16 x i32>, ptr %x0ptr365 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)366 %2 = bitcast i16 %mask to <16 x i1>367 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x2368 ret <16 x i32> %3369}370 371define <16 x i32> @vpternlog_v16i32_210_load1_mask(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2, i16 %mask) {372; CHECK-LABEL: vpternlog_v16i32_210_load1_mask:373; CHECK: ## %bb.0:374; CHECK-NEXT: kmovd %esi, %k1375; CHECK-NEXT: vpternlogd $116, (%rdi), %zmm0, %zmm1 {%k1}376; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0377; CHECK-NEXT: retq378 %x1 = load <16 x i32>, ptr %x1ptr379 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)380 %2 = bitcast i16 %mask to <16 x i1>381 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x2382 ret <16 x i32> %3383}384 385define <16 x i32> @vpternlog_v16i32_210_load2_mask(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr, i16 %mask) {386; CHECK-LABEL: vpternlog_v16i32_210_load2_mask:387; CHECK: ## %bb.0:388; CHECK-NEXT: vmovdqa64 (%rdi), %zmm2389; CHECK-NEXT: kmovd %esi, %k1390; CHECK-NEXT: vpternlogd $114, %zmm0, %zmm1, %zmm2 {%k1}391; CHECK-NEXT: vmovdqa64 %zmm2, %zmm0392; CHECK-NEXT: retq393 %x2 = load <16 x i32>, ptr %x2ptr394 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)395 %2 = bitcast i16 %mask to <16 x i1>396 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x2397 ret <16 x i32> %3398}399 400define <16 x i32> @vpternlog_v16i32_021_load0_mask(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {401; CHECK-LABEL: vpternlog_v16i32_021_load0_mask:402; CHECK: ## %bb.0:403; CHECK-NEXT: vmovdqa64 (%rdi), %zmm2404; CHECK-NEXT: kmovd %esi, %k1405; CHECK-NEXT: vpternlogd $114, %zmm0, %zmm1, %zmm2 {%k1}406; CHECK-NEXT: vmovdqa64 %zmm2, %zmm0407; CHECK-NEXT: retq408 %x0 = load <16 x i32>, ptr %x0ptr409 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x2, <16 x i32> %x1, i32 114)410 %2 = bitcast i16 %mask to <16 x i1>411 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x0412 ret <16 x i32> %3413}414 415define <16 x i32> @vpternlog_v16i32_021_load1_mask(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2, i16 %mask) {416; CHECK-LABEL: vpternlog_v16i32_021_load1_mask:417; CHECK: ## %bb.0:418; CHECK-NEXT: kmovd %esi, %k1419; CHECK-NEXT: vpternlogd $114, (%rdi), %zmm1, %zmm0 {%k1}420; CHECK-NEXT: retq421 %x1 = load <16 x i32>, ptr %x1ptr422 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x2, <16 x i32> %x1, i32 114)423 %2 = bitcast i16 %mask to <16 x i1>424 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x0425 ret <16 x i32> %3426}427 428define <16 x i32> @vpternlog_v16i32_021_load2_mask(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr, i16 %mask) {429; CHECK-LABEL: vpternlog_v16i32_021_load2_mask:430; CHECK: ## %bb.0:431; CHECK-NEXT: kmovd %esi, %k1432; CHECK-NEXT: vpternlogd $116, (%rdi), %zmm1, %zmm0 {%k1}433; CHECK-NEXT: retq434 %x2 = load <16 x i32>, ptr %x2ptr435 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x2, <16 x i32> %x1, i32 114)436 %2 = bitcast i16 %mask to <16 x i1>437 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x0438 ret <16 x i32> %3439}440 441define <16 x i32> @vpternlog_v16i32_012_maskz(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {442; CHECK-LABEL: vpternlog_v16i32_012_maskz:443; CHECK: ## %bb.0:444; CHECK-NEXT: kmovd %edi, %k1445; CHECK-NEXT: vpternlogd $114, %zmm2, %zmm1, %zmm0 {%k1} {z}446; CHECK-NEXT: retq447 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)448 %2 = bitcast i16 %mask to <16 x i1>449 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer450 ret <16 x i32> %3451}452 453define <16 x i32> @vpternlog_v16i32_102_maskz(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {454; CHECK-LABEL: vpternlog_v16i32_102_maskz:455; CHECK: ## %bb.0:456; CHECK-NEXT: kmovd %edi, %k1457; CHECK-NEXT: vpternlogd $78, %zmm2, %zmm1, %zmm0 {%k1} {z}458; CHECK-NEXT: retq459 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)460 %2 = bitcast i16 %mask to <16 x i1>461 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer462 ret <16 x i32> %3463}464 465define <16 x i32> @vpternlog_v16i32_210_maskz(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {466; CHECK-LABEL: vpternlog_v16i32_210_maskz:467; CHECK: ## %bb.0:468; CHECK-NEXT: kmovd %edi, %k1469; CHECK-NEXT: vpternlogd $92, %zmm1, %zmm2, %zmm0 {%k1} {z}470; CHECK-NEXT: retq471 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)472 %2 = bitcast i16 %mask to <16 x i1>473 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer474 ret <16 x i32> %3475}476 477define <16 x i32> @vpternlog_v16i32_012_load0_maskz(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {478; CHECK-LABEL: vpternlog_v16i32_012_load0_maskz:479; CHECK: ## %bb.0:480; CHECK-NEXT: kmovd %esi, %k1481; CHECK-NEXT: vpternlogd $46, (%rdi), %zmm1, %zmm0 {%k1} {z}482; CHECK-NEXT: retq483 %x0 = load <16 x i32>, ptr %x0ptr484 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)485 %2 = bitcast i16 %mask to <16 x i1>486 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer487 ret <16 x i32> %3488}489 490define <16 x i32> @vpternlog_v16i32_012_load1_maskz(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2, i16 %mask) {491; CHECK-LABEL: vpternlog_v16i32_012_load1_maskz:492; CHECK: ## %bb.0:493; CHECK-NEXT: kmovd %esi, %k1494; CHECK-NEXT: vpternlogd $116, (%rdi), %zmm1, %zmm0 {%k1} {z}495; CHECK-NEXT: retq496 %x1 = load <16 x i32>, ptr %x1ptr497 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)498 %2 = bitcast i16 %mask to <16 x i1>499 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer500 ret <16 x i32> %3501}502 503define <16 x i32> @vpternlog_v16i32_012_load2_maskz(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr, i16 %mask) {504; CHECK-LABEL: vpternlog_v16i32_012_load2_maskz:505; CHECK: ## %bb.0:506; CHECK-NEXT: kmovd %esi, %k1507; CHECK-NEXT: vpternlogd $114, (%rdi), %zmm1, %zmm0 {%k1} {z}508; CHECK-NEXT: retq509 %x2 = load <16 x i32>, ptr %x2ptr510 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)511 %2 = bitcast i16 %mask to <16 x i1>512 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer513 ret <16 x i32> %3514}515 516define <16 x i32> @vpternlog_v16i32_102_load0_maskz(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {517; CHECK-LABEL: vpternlog_v16i32_102_load0_maskz:518; CHECK: ## %bb.0:519; CHECK-NEXT: kmovd %esi, %k1520; CHECK-NEXT: vpternlogd $116, (%rdi), %zmm1, %zmm0 {%k1} {z}521; CHECK-NEXT: retq522 %x0 = load <16 x i32>, ptr %x0ptr523 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)524 %2 = bitcast i16 %mask to <16 x i1>525 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer526 ret <16 x i32> %3527}528 529define <16 x i32> @vpternlog_v16i32_102_load1_maskz(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2, i16 %mask) {530; CHECK-LABEL: vpternlog_v16i32_102_load1_maskz:531; CHECK: ## %bb.0:532; CHECK-NEXT: kmovd %esi, %k1533; CHECK-NEXT: vpternlogd $46, (%rdi), %zmm1, %zmm0 {%k1} {z}534; CHECK-NEXT: retq535 %x1 = load <16 x i32>, ptr %x1ptr536 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)537 %2 = bitcast i16 %mask to <16 x i1>538 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer539 ret <16 x i32> %3540}541 542define <16 x i32> @vpternlog_v16i32_102_load2_maskz(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr, i16 %mask) {543; CHECK-LABEL: vpternlog_v16i32_102_load2_maskz:544; CHECK: ## %bb.0:545; CHECK-NEXT: kmovd %esi, %k1546; CHECK-NEXT: vpternlogd $78, (%rdi), %zmm1, %zmm0 {%k1} {z}547; CHECK-NEXT: retq548 %x2 = load <16 x i32>, ptr %x2ptr549 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)550 %2 = bitcast i16 %mask to <16 x i1>551 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer552 ret <16 x i32> %3553}554 555define <16 x i32> @vpternlog_v16i32_210_load0_maskz(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {556; CHECK-LABEL: vpternlog_v16i32_210_load0_maskz:557; CHECK: ## %bb.0:558; CHECK-NEXT: kmovd %esi, %k1559; CHECK-NEXT: vpternlogd $78, (%rdi), %zmm1, %zmm0 {%k1} {z}560; CHECK-NEXT: retq561 %x0 = load <16 x i32>, ptr %x0ptr562 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)563 %2 = bitcast i16 %mask to <16 x i1>564 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer565 ret <16 x i32> %3566}567 568define <16 x i32> @vpternlog_v16i32_210_load1_maskz(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2, i16 %mask) {569; CHECK-LABEL: vpternlog_v16i32_210_load1_maskz:570; CHECK: ## %bb.0:571; CHECK-NEXT: kmovd %esi, %k1572; CHECK-NEXT: vpternlogd $92, (%rdi), %zmm1, %zmm0 {%k1} {z}573; CHECK-NEXT: retq574 %x1 = load <16 x i32>, ptr %x1ptr575 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)576 %2 = bitcast i16 %mask to <16 x i1>577 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer578 ret <16 x i32> %3579}580 581define <16 x i32> @vpternlog_v16i32_210_load2_maskz(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr, i16 %mask) {582; CHECK-LABEL: vpternlog_v16i32_210_load2_maskz:583; CHECK: ## %bb.0:584; CHECK-NEXT: kmovd %esi, %k1585; CHECK-NEXT: vpternlogd $58, (%rdi), %zmm1, %zmm0 {%k1} {z}586; CHECK-NEXT: retq587 %x2 = load <16 x i32>, ptr %x2ptr588 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)589 %2 = bitcast i16 %mask to <16 x i1>590 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer591 ret <16 x i32> %3592}593 594define <16 x i32> @vpternlog_v16i32_021_load0_maskz(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {595; CHECK-LABEL: vpternlog_v16i32_021_load0_maskz:596; CHECK: ## %bb.0:597; CHECK-NEXT: kmovd %esi, %k1598; CHECK-NEXT: vpternlogd $58, (%rdi), %zmm1, %zmm0 {%k1} {z}599; CHECK-NEXT: retq600 %x0 = load <16 x i32>, ptr %x0ptr601 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x2, <16 x i32> %x1, i32 114)602 %2 = bitcast i16 %mask to <16 x i1>603 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer604 ret <16 x i32> %3605}606 607define <16 x i32> @vpternlog_v16i32_021_load1_maskz(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2, i16 %mask) {608; CHECK-LABEL: vpternlog_v16i32_021_load1_maskz:609; CHECK: ## %bb.0:610; CHECK-NEXT: kmovd %esi, %k1611; CHECK-NEXT: vpternlogd $114, (%rdi), %zmm1, %zmm0 {%k1} {z}612; CHECK-NEXT: retq613 %x1 = load <16 x i32>, ptr %x1ptr614 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x2, <16 x i32> %x1, i32 114)615 %2 = bitcast i16 %mask to <16 x i1>616 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer617 ret <16 x i32> %3618}619 620define <16 x i32> @vpternlog_v16i32_021_load2_maskz(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr, i16 %mask) {621; CHECK-LABEL: vpternlog_v16i32_021_load2_maskz:622; CHECK: ## %bb.0:623; CHECK-NEXT: kmovd %esi, %k1624; CHECK-NEXT: vpternlogd $116, (%rdi), %zmm1, %zmm0 {%k1} {z}625; CHECK-NEXT: retq626 %x2 = load <16 x i32>, ptr %x2ptr627 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x2, <16 x i32> %x1, i32 114)628 %2 = bitcast i16 %mask to <16 x i1>629 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer630 ret <16 x i32> %3631}632 633define <16 x i32> @vpternlog_v16i32_012_broadcast0(ptr %ptr_x0, <16 x i32> %x1, <16 x i32> %x2) {634; CHECK-LABEL: vpternlog_v16i32_012_broadcast0:635; CHECK: ## %bb.0:636; CHECK-NEXT: vpternlogd $46, (%rdi){1to16}, %zmm1, %zmm0637; CHECK-NEXT: retq638 %x0_scalar = load i32, ptr %ptr_x0639 %vecinit.i = insertelement <16 x i32> undef, i32 %x0_scalar, i32 0640 %x0 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer641 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)642 ret <16 x i32> %1643}644 645define <16 x i32> @vpternlog_v16i32_012_broadcast1(<16 x i32> %x0, ptr %ptr_x1, <16 x i32> %x2) {646; CHECK-LABEL: vpternlog_v16i32_012_broadcast1:647; CHECK: ## %bb.0:648; CHECK-NEXT: vpternlogd $116, (%rdi){1to16}, %zmm1, %zmm0649; CHECK-NEXT: retq650 %x1_scalar = load i32, ptr %ptr_x1651 %vecinit.i = insertelement <16 x i32> undef, i32 %x1_scalar, i32 0652 %x1 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer653 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)654 ret <16 x i32> %1655}656 657define <16 x i32> @vpternlog_v16i32_012_broadcast2(<16 x i32> %x0, <16 x i32> %x1, ptr %ptr_x2) {658; CHECK-LABEL: vpternlog_v16i32_012_broadcast2:659; CHECK: ## %bb.0:660; CHECK-NEXT: vpternlogd $114, (%rdi){1to16}, %zmm1, %zmm0661; CHECK-NEXT: retq662 %x2_scalar = load i32, ptr %ptr_x2663 %vecinit.i = insertelement <16 x i32> undef, i32 %x2_scalar, i32 0664 %x2 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer665 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)666 ret <16 x i32> %1667}668 669define <16 x i32> @vpternlog_v16i32_102_broadcast0(ptr %ptr_x0, <16 x i32> %x1, <16 x i32> %x2) {670; CHECK-LABEL: vpternlog_v16i32_102_broadcast0:671; CHECK: ## %bb.0:672; CHECK-NEXT: vpternlogd $116, (%rdi){1to16}, %zmm1, %zmm0673; CHECK-NEXT: retq674 %x0_scalar = load i32, ptr %ptr_x0675 %vecinit.i = insertelement <16 x i32> undef, i32 %x0_scalar, i32 0676 %x0 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer677 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)678 ret <16 x i32> %1679}680 681define <16 x i32> @vpternlog_v16i32_102_broadcast1(<16 x i32> %x0, ptr %ptr_x1, <16 x i32> %x2) {682; CHECK-LABEL: vpternlog_v16i32_102_broadcast1:683; CHECK: ## %bb.0:684; CHECK-NEXT: vpternlogd $46, (%rdi){1to16}, %zmm1, %zmm0685; CHECK-NEXT: retq686 %x1_scalar = load i32, ptr %ptr_x1687 %vecinit.i = insertelement <16 x i32> undef, i32 %x1_scalar, i32 0688 %x1 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer689 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)690 ret <16 x i32> %1691}692 693define <16 x i32> @vpternlog_v16i32_102_broadcast2(<16 x i32> %x0, <16 x i32> %x1, ptr %ptr_x2) {694; CHECK-LABEL: vpternlog_v16i32_102_broadcast2:695; CHECK: ## %bb.0:696; CHECK-NEXT: vpternlogd $78, (%rdi){1to16}, %zmm1, %zmm0697; CHECK-NEXT: retq698 %x2_scalar = load i32, ptr %ptr_x2699 %vecinit.i = insertelement <16 x i32> undef, i32 %x2_scalar, i32 0700 %x2 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer701 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)702 ret <16 x i32> %1703}704 705define <16 x i32> @vpternlog_v16i32_210_broadcast0(ptr %ptr_x0, <16 x i32> %x1, <16 x i32> %x2) {706; CHECK-LABEL: vpternlog_v16i32_210_broadcast0:707; CHECK: ## %bb.0:708; CHECK-NEXT: vpternlogd $78, (%rdi){1to16}, %zmm1, %zmm0709; CHECK-NEXT: retq710 %x0_scalar = load i32, ptr %ptr_x0711 %vecinit.i = insertelement <16 x i32> undef, i32 %x0_scalar, i32 0712 %x0 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer713 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)714 ret <16 x i32> %1715}716 717define <16 x i32> @vpternlog_v16i32_210_broadcast1(<16 x i32> %x0, ptr %ptr_x1, <16 x i32> %x2) {718; CHECK-LABEL: vpternlog_v16i32_210_broadcast1:719; CHECK: ## %bb.0:720; CHECK-NEXT: vpternlogd $92, (%rdi){1to16}, %zmm1, %zmm0721; CHECK-NEXT: retq722 %x1_scalar = load i32, ptr %ptr_x1723 %vecinit.i = insertelement <16 x i32> undef, i32 %x1_scalar, i32 0724 %x1 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer725 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)726 ret <16 x i32> %1727}728 729define <16 x i32> @vpternlog_v16i32_210_broadcast2(<16 x i32> %x0, <16 x i32> %x1, ptr %ptr_x2) {730; CHECK-LABEL: vpternlog_v16i32_210_broadcast2:731; CHECK: ## %bb.0:732; CHECK-NEXT: vpternlogd $58, (%rdi){1to16}, %zmm1, %zmm0733; CHECK-NEXT: retq734 %x2_scalar = load i32, ptr %ptr_x2735 %vecinit.i = insertelement <16 x i32> undef, i32 %x2_scalar, i32 0736 %x2 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer737 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)738 ret <16 x i32> %1739}740 741define <16 x i32> @vpternlog_v16i32_012_broadcast0_mask(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {742; CHECK-LABEL: vpternlog_v16i32_012_broadcast0_mask:743; CHECK: ## %bb.0:744; CHECK-NEXT: vpbroadcastd (%rdi), %zmm2745; CHECK-NEXT: kmovd %esi, %k1746; CHECK-NEXT: vpternlogd $114, %zmm1, %zmm0, %zmm2 {%k1}747; CHECK-NEXT: vmovdqa64 %zmm2, %zmm0748; CHECK-NEXT: retq749 %x0scalar = load i32, ptr %x0ptr750 %vecinit.i = insertelement <16 x i32> undef, i32 %x0scalar, i32 0751 %x0 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer752 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)753 %2 = bitcast i16 %mask to <16 x i1>754 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x0755 ret <16 x i32> %3756}757 758define <16 x i32> @vpternlog_v16i32_012_broadcast1_mask(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2, i16 %mask) {759; CHECK-LABEL: vpternlog_v16i32_012_broadcast1_mask:760; CHECK: ## %bb.0:761; CHECK-NEXT: kmovd %esi, %k1762; CHECK-NEXT: vpternlogd $116, (%rdi){1to16}, %zmm1, %zmm0 {%k1}763; CHECK-NEXT: retq764 %x1scalar = load i32, ptr %x1ptr765 %vecinit.i = insertelement <16 x i32> undef, i32 %x1scalar, i32 0766 %x1 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer767 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)768 %2 = bitcast i16 %mask to <16 x i1>769 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x0770 ret <16 x i32> %3771}772 773define <16 x i32> @vpternlog_v16i32_012_broadcast2_mask(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr, i16 %mask) {774; CHECK-LABEL: vpternlog_v16i32_012_broadcast2_mask:775; CHECK: ## %bb.0:776; CHECK-NEXT: kmovd %esi, %k1777; CHECK-NEXT: vpternlogd $114, (%rdi){1to16}, %zmm1, %zmm0 {%k1}778; CHECK-NEXT: retq779 %x2scalar = load i32, ptr %x2ptr780 %vecinit.i = insertelement <16 x i32> undef, i32 %x2scalar, i32 0781 %x2 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer782 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)783 %2 = bitcast i16 %mask to <16 x i1>784 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x0785 ret <16 x i32> %3786}787 788define <16 x i32> @vpternlog_v16i32_102_broadcast0_mask(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {789; CHECK-LABEL: vpternlog_v16i32_102_broadcast0_mask:790; CHECK: ## %bb.0:791; CHECK-NEXT: kmovd %esi, %k1792; CHECK-NEXT: vpternlogd $116, (%rdi){1to16}, %zmm1, %zmm0 {%k1}793; CHECK-NEXT: retq794 %x0scalar = load i32, ptr %x0ptr795 %vecinit.i = insertelement <16 x i32> undef, i32 %x0scalar, i32 0796 %x0 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer797 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)798 %2 = bitcast i16 %mask to <16 x i1>799 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x1800 ret <16 x i32> %3801}802 803define <16 x i32> @vpternlog_v16i32_102_broadcast1_mask(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2, i16 %mask) {804; CHECK-LABEL: vpternlog_v16i32_102_broadcast1_mask:805; CHECK: ## %bb.0:806; CHECK-NEXT: vpbroadcastd (%rdi), %zmm2807; CHECK-NEXT: kmovd %esi, %k1808; CHECK-NEXT: vpternlogd $114, %zmm1, %zmm0, %zmm2 {%k1}809; CHECK-NEXT: vmovdqa64 %zmm2, %zmm0810; CHECK-NEXT: retq811 %x1scalar = load i32, ptr %x1ptr812 %vecinit.i = insertelement <16 x i32> undef, i32 %x1scalar, i32 0813 %x1 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer814 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)815 %2 = bitcast i16 %mask to <16 x i1>816 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x1817 ret <16 x i32> %3818}819 820define <16 x i32> @vpternlog_v16i32_102_broadcast2_mask(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr, i16 %mask) {821; CHECK-LABEL: vpternlog_v16i32_102_broadcast2_mask:822; CHECK: ## %bb.0:823; CHECK-NEXT: kmovd %esi, %k1824; CHECK-NEXT: vpternlogd $114, (%rdi){1to16}, %zmm0, %zmm1 {%k1}825; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0826; CHECK-NEXT: retq827 %x2scalar = load i32, ptr %x2ptr828 %vecinit.i = insertelement <16 x i32> undef, i32 %x2scalar, i32 0829 %x2 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer830 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)831 %2 = bitcast i16 %mask to <16 x i1>832 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x1833 ret <16 x i32> %3834}835 836define <16 x i32> @vpternlog_v16i32_210_broadcast0_mask(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {837; CHECK-LABEL: vpternlog_v16i32_210_broadcast0_mask:838; CHECK: ## %bb.0:839; CHECK-NEXT: kmovd %esi, %k1840; CHECK-NEXT: vpternlogd $114, (%rdi){1to16}, %zmm0, %zmm1 {%k1}841; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0842; CHECK-NEXT: retq843 %x0scalar = load i32, ptr %x0ptr844 %vecinit.i = insertelement <16 x i32> undef, i32 %x0scalar, i32 0845 %x0 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer846 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)847 %2 = bitcast i16 %mask to <16 x i1>848 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x2849 ret <16 x i32> %3850}851 852define <16 x i32> @vpternlog_v16i32_210_broadcast1_mask(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2, i16 %mask) {853; CHECK-LABEL: vpternlog_v16i32_210_broadcast1_mask:854; CHECK: ## %bb.0:855; CHECK-NEXT: kmovd %esi, %k1856; CHECK-NEXT: vpternlogd $116, (%rdi){1to16}, %zmm0, %zmm1 {%k1}857; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0858; CHECK-NEXT: retq859 %x1scalar = load i32, ptr %x1ptr860 %vecinit.i = insertelement <16 x i32> undef, i32 %x1scalar, i32 0861 %x1 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer862 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)863 %2 = bitcast i16 %mask to <16 x i1>864 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x2865 ret <16 x i32> %3866}867 868define <16 x i32> @vpternlog_v16i32_210_broadcast2_mask(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr, i16 %mask) {869; CHECK-LABEL: vpternlog_v16i32_210_broadcast2_mask:870; CHECK: ## %bb.0:871; CHECK-NEXT: vpbroadcastd (%rdi), %zmm2872; CHECK-NEXT: kmovd %esi, %k1873; CHECK-NEXT: vpternlogd $114, %zmm0, %zmm1, %zmm2 {%k1}874; CHECK-NEXT: vmovdqa64 %zmm2, %zmm0875; CHECK-NEXT: retq876 %x2scalar = load i32, ptr %x2ptr877 %vecinit.i = insertelement <16 x i32> undef, i32 %x2scalar, i32 0878 %x2 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer879 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)880 %2 = bitcast i16 %mask to <16 x i1>881 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x2882 ret <16 x i32> %3883}884 885define <16 x i32> @vpternlog_v16i32_021_broadcast0_mask(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {886; CHECK-LABEL: vpternlog_v16i32_021_broadcast0_mask:887; CHECK: ## %bb.0:888; CHECK-NEXT: vpbroadcastd (%rdi), %zmm2889; CHECK-NEXT: kmovd %esi, %k1890; CHECK-NEXT: vpternlogd $114, %zmm0, %zmm1, %zmm2 {%k1}891; CHECK-NEXT: vmovdqa64 %zmm2, %zmm0892; CHECK-NEXT: retq893 %x0scalar = load i32, ptr %x0ptr894 %vecinit.i = insertelement <16 x i32> undef, i32 %x0scalar, i32 0895 %x0 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer896 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x2, <16 x i32> %x1, i32 114)897 %2 = bitcast i16 %mask to <16 x i1>898 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x0899 ret <16 x i32> %3900}901 902define <16 x i32> @vpternlog_v16i32_021_broadcast1_mask(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2, i16 %mask) {903; CHECK-LABEL: vpternlog_v16i32_021_broadcast1_mask:904; CHECK: ## %bb.0:905; CHECK-NEXT: kmovd %esi, %k1906; CHECK-NEXT: vpternlogd $114, (%rdi){1to16}, %zmm1, %zmm0 {%k1}907; CHECK-NEXT: retq908 %x1scalar = load i32, ptr %x1ptr909 %vecinit.i = insertelement <16 x i32> undef, i32 %x1scalar, i32 0910 %x1 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer911 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x2, <16 x i32> %x1, i32 114)912 %2 = bitcast i16 %mask to <16 x i1>913 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x0914 ret <16 x i32> %3915}916 917define <16 x i32> @vpternlog_v16i32_021_broadcast2_mask(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr, i16 %mask) {918; CHECK-LABEL: vpternlog_v16i32_021_broadcast2_mask:919; CHECK: ## %bb.0:920; CHECK-NEXT: kmovd %esi, %k1921; CHECK-NEXT: vpternlogd $116, (%rdi){1to16}, %zmm1, %zmm0 {%k1}922; CHECK-NEXT: retq923 %x2scalar = load i32, ptr %x2ptr924 %vecinit.i = insertelement <16 x i32> undef, i32 %x2scalar, i32 0925 %x2 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer926 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x2, <16 x i32> %x1, i32 114)927 %2 = bitcast i16 %mask to <16 x i1>928 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x0929 ret <16 x i32> %3930}931 932define <16 x i32> @vpternlog_v16i32_012_broadcast0_maskz(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {933; CHECK-LABEL: vpternlog_v16i32_012_broadcast0_maskz:934; CHECK: ## %bb.0:935; CHECK-NEXT: kmovd %esi, %k1936; CHECK-NEXT: vpternlogd $46, (%rdi){1to16}, %zmm1, %zmm0 {%k1} {z}937; CHECK-NEXT: retq938 %x0scalar = load i32, ptr %x0ptr939 %vecinit.i = insertelement <16 x i32> undef, i32 %x0scalar, i32 0940 %x0 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer941 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)942 %2 = bitcast i16 %mask to <16 x i1>943 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer944 ret <16 x i32> %3945}946 947define <16 x i32> @vpternlog_v16i32_012_broadcast1_maskz(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2, i16 %mask) {948; CHECK-LABEL: vpternlog_v16i32_012_broadcast1_maskz:949; CHECK: ## %bb.0:950; CHECK-NEXT: kmovd %esi, %k1951; CHECK-NEXT: vpternlogd $116, (%rdi){1to16}, %zmm1, %zmm0 {%k1} {z}952; CHECK-NEXT: retq953 %x1scalar = load i32, ptr %x1ptr954 %vecinit.i = insertelement <16 x i32> undef, i32 %x1scalar, i32 0955 %x1 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer956 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)957 %2 = bitcast i16 %mask to <16 x i1>958 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer959 ret <16 x i32> %3960}961 962define <16 x i32> @vpternlog_v16i32_012_broadcast2_maskz(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr, i16 %mask) {963; CHECK-LABEL: vpternlog_v16i32_012_broadcast2_maskz:964; CHECK: ## %bb.0:965; CHECK-NEXT: kmovd %esi, %k1966; CHECK-NEXT: vpternlogd $114, (%rdi){1to16}, %zmm1, %zmm0 {%k1} {z}967; CHECK-NEXT: retq968 %x2scalar = load i32, ptr %x2ptr969 %vecinit.i = insertelement <16 x i32> undef, i32 %x2scalar, i32 0970 %x2 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer971 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)972 %2 = bitcast i16 %mask to <16 x i1>973 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer974 ret <16 x i32> %3975}976 977define <16 x i32> @vpternlog_v16i32_102_broadcast0_maskz(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {978; CHECK-LABEL: vpternlog_v16i32_102_broadcast0_maskz:979; CHECK: ## %bb.0:980; CHECK-NEXT: kmovd %esi, %k1981; CHECK-NEXT: vpternlogd $116, (%rdi){1to16}, %zmm1, %zmm0 {%k1} {z}982; CHECK-NEXT: retq983 %x0scalar = load i32, ptr %x0ptr984 %vecinit.i = insertelement <16 x i32> undef, i32 %x0scalar, i32 0985 %x0 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer986 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)987 %2 = bitcast i16 %mask to <16 x i1>988 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer989 ret <16 x i32> %3990}991 992define <16 x i32> @vpternlog_v16i32_102_broadcast1_maskz(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2, i16 %mask) {993; CHECK-LABEL: vpternlog_v16i32_102_broadcast1_maskz:994; CHECK: ## %bb.0:995; CHECK-NEXT: kmovd %esi, %k1996; CHECK-NEXT: vpternlogd $46, (%rdi){1to16}, %zmm1, %zmm0 {%k1} {z}997; CHECK-NEXT: retq998 %x1scalar = load i32, ptr %x1ptr999 %vecinit.i = insertelement <16 x i32> undef, i32 %x1scalar, i32 01000 %x1 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer1001 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)1002 %2 = bitcast i16 %mask to <16 x i1>1003 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer1004 ret <16 x i32> %31005}1006 1007define <16 x i32> @vpternlog_v16i32_102_broadcast2_maskz(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr, i16 %mask) {1008; CHECK-LABEL: vpternlog_v16i32_102_broadcast2_maskz:1009; CHECK: ## %bb.0:1010; CHECK-NEXT: kmovd %esi, %k11011; CHECK-NEXT: vpternlogd $78, (%rdi){1to16}, %zmm1, %zmm0 {%k1} {z}1012; CHECK-NEXT: retq1013 %x2scalar = load i32, ptr %x2ptr1014 %vecinit.i = insertelement <16 x i32> undef, i32 %x2scalar, i32 01015 %x2 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer1016 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x1, <16 x i32> %x0, <16 x i32> %x2, i32 114)1017 %2 = bitcast i16 %mask to <16 x i1>1018 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer1019 ret <16 x i32> %31020}1021 1022define <16 x i32> @vpternlog_v16i32_210_broadcast0_maskz(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {1023; CHECK-LABEL: vpternlog_v16i32_210_broadcast0_maskz:1024; CHECK: ## %bb.0:1025; CHECK-NEXT: kmovd %esi, %k11026; CHECK-NEXT: vpternlogd $78, (%rdi){1to16}, %zmm1, %zmm0 {%k1} {z}1027; CHECK-NEXT: retq1028 %x0scalar = load i32, ptr %x0ptr1029 %vecinit.i = insertelement <16 x i32> undef, i32 %x0scalar, i32 01030 %x0 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer1031 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)1032 %2 = bitcast i16 %mask to <16 x i1>1033 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer1034 ret <16 x i32> %31035}1036 1037define <16 x i32> @vpternlog_v16i32_210_broadcast1_maskz(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2, i16 %mask) {1038; CHECK-LABEL: vpternlog_v16i32_210_broadcast1_maskz:1039; CHECK: ## %bb.0:1040; CHECK-NEXT: kmovd %esi, %k11041; CHECK-NEXT: vpternlogd $92, (%rdi){1to16}, %zmm1, %zmm0 {%k1} {z}1042; CHECK-NEXT: retq1043 %x1scalar = load i32, ptr %x1ptr1044 %vecinit.i = insertelement <16 x i32> undef, i32 %x1scalar, i32 01045 %x1 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer1046 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)1047 %2 = bitcast i16 %mask to <16 x i1>1048 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer1049 ret <16 x i32> %31050}1051 1052define <16 x i32> @vpternlog_v16i32_210_broadcast2_maskz(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr, i16 %mask) {1053; CHECK-LABEL: vpternlog_v16i32_210_broadcast2_maskz:1054; CHECK: ## %bb.0:1055; CHECK-NEXT: kmovd %esi, %k11056; CHECK-NEXT: vpternlogd $58, (%rdi){1to16}, %zmm1, %zmm0 {%k1} {z}1057; CHECK-NEXT: retq1058 %x2scalar = load i32, ptr %x2ptr1059 %vecinit.i = insertelement <16 x i32> undef, i32 %x2scalar, i32 01060 %x2 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer1061 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x2, <16 x i32> %x1, <16 x i32> %x0, i32 114)1062 %2 = bitcast i16 %mask to <16 x i1>1063 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer1064 ret <16 x i32> %31065}1066 1067define <16 x i32> @vpternlog_v16i32_021_broadcast0_maskz(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {1068; CHECK-LABEL: vpternlog_v16i32_021_broadcast0_maskz:1069; CHECK: ## %bb.0:1070; CHECK-NEXT: kmovd %esi, %k11071; CHECK-NEXT: vpternlogd $58, (%rdi){1to16}, %zmm1, %zmm0 {%k1} {z}1072; CHECK-NEXT: retq1073 %x0scalar = load i32, ptr %x0ptr1074 %vecinit.i = insertelement <16 x i32> undef, i32 %x0scalar, i32 01075 %x0 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer1076 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x2, <16 x i32> %x1, i32 114)1077 %2 = bitcast i16 %mask to <16 x i1>1078 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer1079 ret <16 x i32> %31080}1081 1082define <16 x i32> @vpternlog_v16i32_021_broadcast1_maskz(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2, i16 %mask) {1083; CHECK-LABEL: vpternlog_v16i32_021_broadcast1_maskz:1084; CHECK: ## %bb.0:1085; CHECK-NEXT: kmovd %esi, %k11086; CHECK-NEXT: vpternlogd $114, (%rdi){1to16}, %zmm1, %zmm0 {%k1} {z}1087; CHECK-NEXT: retq1088 %x1scalar = load i32, ptr %x1ptr1089 %vecinit.i = insertelement <16 x i32> undef, i32 %x1scalar, i32 01090 %x1 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer1091 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x2, <16 x i32> %x1, i32 114)1092 %2 = bitcast i16 %mask to <16 x i1>1093 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer1094 ret <16 x i32> %31095}1096 1097define <16 x i32> @vpternlog_v16i32_021_broadcast2_maskz(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr, i16 %mask) {1098; CHECK-LABEL: vpternlog_v16i32_021_broadcast2_maskz:1099; CHECK: ## %bb.0:1100; CHECK-NEXT: kmovd %esi, %k11101; CHECK-NEXT: vpternlogd $116, (%rdi){1to16}, %zmm1, %zmm0 {%k1} {z}1102; CHECK-NEXT: retq1103 %x2scalar = load i32, ptr %x2ptr1104 %vecinit.i = insertelement <16 x i32> undef, i32 %x2scalar, i32 01105 %x2 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer1106 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x2, <16 x i32> %x1, i32 114)1107 %2 = bitcast i16 %mask to <16 x i1>1108 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer1109 ret <16 x i32> %31110}1111 1112define <16 x i32> @vpternlog_v16i32_012_broadcast0_mask1(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {1113; CHECK-LABEL: vpternlog_v16i32_012_broadcast0_mask1:1114; CHECK: ## %bb.0:1115; CHECK-NEXT: kmovd %esi, %k11116; CHECK-NEXT: vpternlogd $92, (%rdi){1to16}, %zmm1, %zmm0 {%k1}1117; CHECK-NEXT: retq1118 %x0scalar = load i32, ptr %x0ptr1119 %vecinit.i = insertelement <16 x i32> undef, i32 %x0scalar, i32 01120 %x0 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer1121 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)1122 %mask.cast = bitcast i16 %mask to <16 x i1>1123 %res2 = select <16 x i1> %mask.cast, <16 x i32> %1, <16 x i32> %x11124 ret <16 x i32> %res21125}1126 1127define <16 x i32> @vpternlog_v16i32_012_broadcast0_mask2(ptr %x0ptr, <16 x i32> %x1, <16 x i32> %x2, i16 %mask) {1128; CHECK-LABEL: vpternlog_v16i32_012_broadcast0_mask2:1129; CHECK: ## %bb.0:1130; CHECK-NEXT: kmovd %esi, %k11131; CHECK-NEXT: vpternlogd $58, (%rdi){1to16}, %zmm0, %zmm1 {%k1}1132; CHECK-NEXT: vmovdqa64 %zmm1, %zmm01133; CHECK-NEXT: retq1134 %x0scalar = load i32, ptr %x0ptr1135 %vecinit.i = insertelement <16 x i32> undef, i32 %x0scalar, i32 01136 %x0 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer1137 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)1138 %mask.cast = bitcast i16 %mask to <16 x i1>1139 %res2 = select <16 x i1> %mask.cast, <16 x i32> %1, <16 x i32> %x21140 ret <16 x i32> %res21141}1142 1143define <16 x i32> @vpternlog_v16i32_012_broadcast1_mask2(<16 x i32> %x0, ptr %x1ptr, <16 x i32> %x2, i16 %mask) {1144; CHECK-LABEL: vpternlog_v16i32_012_broadcast1_mask2:1145; CHECK: ## %bb.0:1146; CHECK-NEXT: kmovd %esi, %k11147; CHECK-NEXT: vpternlogd $46, (%rdi){1to16}, %zmm0, %zmm1 {%k1}1148; CHECK-NEXT: vmovdqa64 %zmm1, %zmm01149; CHECK-NEXT: retq1150 %x1scalar = load i32, ptr %x1ptr1151 %vecinit.i = insertelement <16 x i32> undef, i32 %x1scalar, i32 01152 %x1 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer1153 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)1154 %mask.cast = bitcast i16 %mask to <16 x i1>1155 %res2 = select <16 x i1> %mask.cast, <16 x i32> %1, <16 x i32> %x21156 ret <16 x i32> %res21157}1158 1159define <16 x i32> @vpternlog_v16i32_012_broadcast2_mask1(<16 x i32> %x0, <16 x i32> %x1, ptr %x2ptr, i16 %mask) {1160; CHECK-LABEL: vpternlog_v16i32_012_broadcast2_mask1:1161; CHECK: ## %bb.0:1162; CHECK-NEXT: kmovd %esi, %k11163; CHECK-NEXT: vpternlogd $78, (%rdi){1to16}, %zmm0, %zmm1 {%k1}1164; CHECK-NEXT: vmovdqa64 %zmm1, %zmm01165; CHECK-NEXT: retq1166 %x2scalar = load i32, ptr %x2ptr1167 %vecinit.i = insertelement <16 x i32> undef, i32 %x2scalar, i32 01168 %x2 = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer1169 %1 = call <16 x i32> @llvm.x86.avx512.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 114)1170 %mask.cast = bitcast i16 %mask to <16 x i1>1171 %res2 = select <16 x i1> %mask.cast, <16 x i32> %1, <16 x i32> %x11172 ret <16 x i32> %res21173}1174