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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw -mattr=+avx512vl --show-mc-encoding| FileCheck %s3 4define <32 x i8> @test_256_1(ptr %addr) {5; CHECK-LABEL: test_256_1:6; CHECK: ## %bb.0:7; CHECK-NEXT: vmovups (%rdi), %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfc,0x10,0x07]8; CHECK-NEXT: retq ## encoding: [0xc3]9 %res = load <32 x i8>, ptr %addr, align 110 ret <32 x i8>%res11}12 13define void @test_256_2(ptr %addr, <32 x i8> %data) {14; CHECK-LABEL: test_256_2:15; CHECK: ## %bb.0:16; CHECK-NEXT: vmovups %ymm0, (%rdi) ## EVEX TO VEX Compression encoding: [0xc5,0xfc,0x11,0x07]17; CHECK-NEXT: retq ## encoding: [0xc3]18 store <32 x i8>%data, ptr %addr, align 119 ret void20}21 22define <32 x i8> @test_256_3(ptr %addr, <32 x i8> %old, <32 x i8> %mask1) {23; CHECK-LABEL: test_256_3:24; CHECK: ## %bb.0:25; CHECK-NEXT: vptestmb %ymm1, %ymm1, %k1 ## encoding: [0x62,0xf2,0x75,0x28,0x26,0xc9]26; CHECK-NEXT: vmovdqu8 (%rdi), %ymm0 {%k1} ## encoding: [0x62,0xf1,0x7f,0x29,0x6f,0x07]27; CHECK-NEXT: retq ## encoding: [0xc3]28 %mask = icmp ne <32 x i8> %mask1, zeroinitializer29 %r = load <32 x i8>, ptr %addr, align 130 %res = select <32 x i1> %mask, <32 x i8> %r, <32 x i8> %old31 ret <32 x i8>%res32}33 34define <32 x i8> @test_256_4(ptr %addr, <32 x i8> %mask1) {35; CHECK-LABEL: test_256_4:36; CHECK: ## %bb.0:37; CHECK-NEXT: vptestmb %ymm0, %ymm0, %k1 ## encoding: [0x62,0xf2,0x7d,0x28,0x26,0xc8]38; CHECK-NEXT: vmovdqu8 (%rdi), %ymm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7f,0xa9,0x6f,0x07]39; CHECK-NEXT: retq ## encoding: [0xc3]40 %mask = icmp ne <32 x i8> %mask1, zeroinitializer41 %r = load <32 x i8>, ptr %addr, align 142 %res = select <32 x i1> %mask, <32 x i8> %r, <32 x i8> zeroinitializer43 ret <32 x i8>%res44}45 46define <16 x i16> @test_256_5(ptr %addr) {47; CHECK-LABEL: test_256_5:48; CHECK: ## %bb.0:49; CHECK-NEXT: vmovups (%rdi), %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfc,0x10,0x07]50; CHECK-NEXT: retq ## encoding: [0xc3]51 %res = load <16 x i16>, ptr %addr, align 152 ret <16 x i16>%res53}54 55define void @test_256_6(ptr %addr, <16 x i16> %data) {56; CHECK-LABEL: test_256_6:57; CHECK: ## %bb.0:58; CHECK-NEXT: vmovups %ymm0, (%rdi) ## EVEX TO VEX Compression encoding: [0xc5,0xfc,0x11,0x07]59; CHECK-NEXT: retq ## encoding: [0xc3]60 store <16 x i16>%data, ptr %addr, align 161 ret void62}63 64define <16 x i16> @test_256_7(ptr %addr, <16 x i16> %old, <16 x i16> %mask1) {65; CHECK-LABEL: test_256_7:66; CHECK: ## %bb.0:67; CHECK-NEXT: vptestmw %ymm1, %ymm1, %k1 ## encoding: [0x62,0xf2,0xf5,0x28,0x26,0xc9]68; CHECK-NEXT: vmovdqu16 (%rdi), %ymm0 {%k1} ## encoding: [0x62,0xf1,0xff,0x29,0x6f,0x07]69; CHECK-NEXT: retq ## encoding: [0xc3]70 %mask = icmp ne <16 x i16> %mask1, zeroinitializer71 %r = load <16 x i16>, ptr %addr, align 172 %res = select <16 x i1> %mask, <16 x i16> %r, <16 x i16> %old73 ret <16 x i16>%res74}75 76define <16 x i16> @test_256_8(ptr %addr, <16 x i16> %mask1) {77; CHECK-LABEL: test_256_8:78; CHECK: ## %bb.0:79; CHECK-NEXT: vptestmw %ymm0, %ymm0, %k1 ## encoding: [0x62,0xf2,0xfd,0x28,0x26,0xc8]80; CHECK-NEXT: vmovdqu16 (%rdi), %ymm0 {%k1} {z} ## encoding: [0x62,0xf1,0xff,0xa9,0x6f,0x07]81; CHECK-NEXT: retq ## encoding: [0xc3]82 %mask = icmp ne <16 x i16> %mask1, zeroinitializer83 %r = load <16 x i16>, ptr %addr, align 184 %res = select <16 x i1> %mask, <16 x i16> %r, <16 x i16> zeroinitializer85 ret <16 x i16>%res86}87 88define <16 x i8> @test_128_1(ptr %addr) {89; CHECK-LABEL: test_128_1:90; CHECK: ## %bb.0:91; CHECK-NEXT: vmovups (%rdi), %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf8,0x10,0x07]92; CHECK-NEXT: retq ## encoding: [0xc3]93 %res = load <16 x i8>, ptr %addr, align 194 ret <16 x i8>%res95}96 97define void @test_128_2(ptr %addr, <16 x i8> %data) {98; CHECK-LABEL: test_128_2:99; CHECK: ## %bb.0:100; CHECK-NEXT: vmovups %xmm0, (%rdi) ## EVEX TO VEX Compression encoding: [0xc5,0xf8,0x11,0x07]101; CHECK-NEXT: retq ## encoding: [0xc3]102 store <16 x i8>%data, ptr %addr, align 1103 ret void104}105 106define <16 x i8> @test_128_3(ptr %addr, <16 x i8> %old, <16 x i8> %mask1) {107; CHECK-LABEL: test_128_3:108; CHECK: ## %bb.0:109; CHECK-NEXT: vptestmb %xmm1, %xmm1, %k1 ## encoding: [0x62,0xf2,0x75,0x08,0x26,0xc9]110; CHECK-NEXT: vmovdqu8 (%rdi), %xmm0 {%k1} ## encoding: [0x62,0xf1,0x7f,0x09,0x6f,0x07]111; CHECK-NEXT: retq ## encoding: [0xc3]112 %mask = icmp ne <16 x i8> %mask1, zeroinitializer113 %r = load <16 x i8>, ptr %addr, align 1114 %res = select <16 x i1> %mask, <16 x i8> %r, <16 x i8> %old115 ret <16 x i8>%res116}117 118define <16 x i8> @test_128_4(ptr %addr, <16 x i8> %mask1) {119; CHECK-LABEL: test_128_4:120; CHECK: ## %bb.0:121; CHECK-NEXT: vptestmb %xmm0, %xmm0, %k1 ## encoding: [0x62,0xf2,0x7d,0x08,0x26,0xc8]122; CHECK-NEXT: vmovdqu8 (%rdi), %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7f,0x89,0x6f,0x07]123; CHECK-NEXT: retq ## encoding: [0xc3]124 %mask = icmp ne <16 x i8> %mask1, zeroinitializer125 %r = load <16 x i8>, ptr %addr, align 1126 %res = select <16 x i1> %mask, <16 x i8> %r, <16 x i8> zeroinitializer127 ret <16 x i8>%res128}129 130define <8 x i16> @test_128_5(ptr %addr) {131; CHECK-LABEL: test_128_5:132; CHECK: ## %bb.0:133; CHECK-NEXT: vmovups (%rdi), %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf8,0x10,0x07]134; CHECK-NEXT: retq ## encoding: [0xc3]135 %res = load <8 x i16>, ptr %addr, align 1136 ret <8 x i16>%res137}138 139define void @test_128_6(ptr %addr, <8 x i16> %data) {140; CHECK-LABEL: test_128_6:141; CHECK: ## %bb.0:142; CHECK-NEXT: vmovups %xmm0, (%rdi) ## EVEX TO VEX Compression encoding: [0xc5,0xf8,0x11,0x07]143; CHECK-NEXT: retq ## encoding: [0xc3]144 store <8 x i16>%data, ptr %addr, align 1145 ret void146}147 148define <8 x i16> @test_128_7(ptr %addr, <8 x i16> %old, <8 x i16> %mask1) {149; CHECK-LABEL: test_128_7:150; CHECK: ## %bb.0:151; CHECK-NEXT: vptestmw %xmm1, %xmm1, %k1 ## encoding: [0x62,0xf2,0xf5,0x08,0x26,0xc9]152; CHECK-NEXT: vmovdqu16 (%rdi), %xmm0 {%k1} ## encoding: [0x62,0xf1,0xff,0x09,0x6f,0x07]153; CHECK-NEXT: retq ## encoding: [0xc3]154 %mask = icmp ne <8 x i16> %mask1, zeroinitializer155 %r = load <8 x i16>, ptr %addr, align 1156 %res = select <8 x i1> %mask, <8 x i16> %r, <8 x i16> %old157 ret <8 x i16>%res158}159 160define <8 x i16> @test_128_8(ptr %addr, <8 x i16> %mask1) {161; CHECK-LABEL: test_128_8:162; CHECK: ## %bb.0:163; CHECK-NEXT: vptestmw %xmm0, %xmm0, %k1 ## encoding: [0x62,0xf2,0xfd,0x08,0x26,0xc8]164; CHECK-NEXT: vmovdqu16 (%rdi), %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xff,0x89,0x6f,0x07]165; CHECK-NEXT: retq ## encoding: [0xc3]166 %mask = icmp ne <8 x i16> %mask1, zeroinitializer167 %r = load <8 x i16>, ptr %addr, align 1168 %res = select <8 x i1> %mask, <8 x i16> %r, <8 x i16> zeroinitializer169 ret <8 x i16>%res170}171 172