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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512cd | FileCheck %s --check-prefixes=CHECK,X863; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512cd | FileCheck %s --check-prefixes=CHECK,X644 5define <16 x i32> @test_conflict_d(<16 x i32> %a) {6; CHECK-LABEL: test_conflict_d:7; CHECK: # %bb.0:8; CHECK-NEXT: vpconflictd %zmm0, %zmm09; CHECK-NEXT: ret{{[l|q]}}10 %1 = call <16 x i32> @llvm.x86.avx512.conflict.d.512(<16 x i32> %a)11 ret <16 x i32> %112}13 14define <16 x i32> @test_mask_conflict_d(<16 x i32> %a, <16 x i32> %b, i16 %mask) {15; X86-LABEL: test_mask_conflict_d:16; X86: # %bb.0:17; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k118; X86-NEXT: vpconflictd %zmm0, %zmm1 {%k1}19; X86-NEXT: vmovdqa64 %zmm1, %zmm020; X86-NEXT: retl21;22; X64-LABEL: test_mask_conflict_d:23; X64: # %bb.0:24; X64-NEXT: kmovw %edi, %k125; X64-NEXT: vpconflictd %zmm0, %zmm1 {%k1}26; X64-NEXT: vmovdqa64 %zmm1, %zmm027; X64-NEXT: retq28 %1 = call <16 x i32> @llvm.x86.avx512.conflict.d.512(<16 x i32> %a)29 %2 = bitcast i16 %mask to <16 x i1>30 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %b31 ret <16 x i32> %332}33 34define <16 x i32> @test_maskz_conflict_d(<16 x i32> %a, i16 %mask) {35; X86-LABEL: test_maskz_conflict_d:36; X86: # %bb.0:37; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k138; X86-NEXT: vpconflictd %zmm0, %zmm0 {%k1} {z}39; X86-NEXT: retl40;41; X64-LABEL: test_maskz_conflict_d:42; X64: # %bb.0:43; X64-NEXT: kmovw %edi, %k144; X64-NEXT: vpconflictd %zmm0, %zmm0 {%k1} {z}45; X64-NEXT: retq46 %1 = call <16 x i32> @llvm.x86.avx512.conflict.d.512(<16 x i32> %a)47 %2 = bitcast i16 %mask to <16 x i1>48 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer49 ret <16 x i32> %350}51 52define <8 x i64> @test_conflict_q(<8 x i64> %a) {53; CHECK-LABEL: test_conflict_q:54; CHECK: # %bb.0:55; CHECK-NEXT: vpconflictq %zmm0, %zmm056; CHECK-NEXT: ret{{[l|q]}}57 %1 = call <8 x i64> @llvm.x86.avx512.conflict.q.512(<8 x i64> %a)58 ret <8 x i64> %159}60 61define <8 x i64> @test_mask_conflict_q(<8 x i64> %a, <8 x i64> %b, i8 %mask) {62; X86-LABEL: test_mask_conflict_q:63; X86: # %bb.0:64; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax65; X86-NEXT: kmovw %eax, %k166; X86-NEXT: vpconflictq %zmm0, %zmm1 {%k1}67; X86-NEXT: vmovdqa64 %zmm1, %zmm068; X86-NEXT: retl69;70; X64-LABEL: test_mask_conflict_q:71; X64: # %bb.0:72; X64-NEXT: kmovw %edi, %k173; X64-NEXT: vpconflictq %zmm0, %zmm1 {%k1}74; X64-NEXT: vmovdqa64 %zmm1, %zmm075; X64-NEXT: retq76 %1 = call <8 x i64> @llvm.x86.avx512.conflict.q.512(<8 x i64> %a)77 %2 = bitcast i8 %mask to <8 x i1>78 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %b79 ret <8 x i64> %380}81 82define <8 x i64> @test_maskz_conflict_q(<8 x i64> %a, i8 %mask) {83; X86-LABEL: test_maskz_conflict_q:84; X86: # %bb.0:85; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax86; X86-NEXT: kmovw %eax, %k187; X86-NEXT: vpconflictq %zmm0, %zmm0 {%k1} {z}88; X86-NEXT: retl89;90; X64-LABEL: test_maskz_conflict_q:91; X64: # %bb.0:92; X64-NEXT: kmovw %edi, %k193; X64-NEXT: vpconflictq %zmm0, %zmm0 {%k1} {z}94; X64-NEXT: retq95 %1 = call <8 x i64> @llvm.x86.avx512.conflict.q.512(<8 x i64> %a)96 %2 = bitcast i8 %mask to <8 x i1>97 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> zeroinitializer98 ret <8 x i64> %399}100 101define <16 x i32> @test_lzcnt_d(<16 x i32> %a) {102; CHECK-LABEL: test_lzcnt_d:103; CHECK: # %bb.0:104; CHECK-NEXT: vplzcntd %zmm0, %zmm0105; CHECK-NEXT: ret{{[l|q]}}106 %1 = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)107 ret <16 x i32> %1108}109declare <16 x i32> @llvm.ctlz.v16i32(<16 x i32>, i1) #0110 111define <8 x i64> @test_lzcnt_q(<8 x i64> %a) {112; CHECK-LABEL: test_lzcnt_q:113; CHECK: # %bb.0:114; CHECK-NEXT: vplzcntq %zmm0, %zmm0115; CHECK-NEXT: ret{{[l|q]}}116 %1 = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)117 ret <8 x i64> %1118}119declare <8 x i64> @llvm.ctlz.v8i64(<8 x i64>, i1) #0120 121define <16 x i32> @test_mask_lzcnt_d(<16 x i32> %a, <16 x i32> %b, i16 %mask) {122; X86-LABEL: test_mask_lzcnt_d:123; X86: # %bb.0:124; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1125; X86-NEXT: vplzcntd %zmm0, %zmm1 {%k1}126; X86-NEXT: vmovdqa64 %zmm1, %zmm0127; X86-NEXT: retl128;129; X64-LABEL: test_mask_lzcnt_d:130; X64: # %bb.0:131; X64-NEXT: kmovw %edi, %k1132; X64-NEXT: vplzcntd %zmm0, %zmm1 {%k1}133; X64-NEXT: vmovdqa64 %zmm1, %zmm0134; X64-NEXT: retq135 %1 = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)136 %2 = bitcast i16 %mask to <16 x i1>137 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %b138 ret <16 x i32> %3139}140 141define <8 x i64> @test_mask_lzcnt_q(<8 x i64> %a, <8 x i64> %b, i8 %mask) {142; X86-LABEL: test_mask_lzcnt_q:143; X86: # %bb.0:144; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax145; X86-NEXT: kmovw %eax, %k1146; X86-NEXT: vplzcntq %zmm0, %zmm1 {%k1}147; X86-NEXT: vmovdqa64 %zmm1, %zmm0148; X86-NEXT: retl149;150; X64-LABEL: test_mask_lzcnt_q:151; X64: # %bb.0:152; X64-NEXT: kmovw %edi, %k1153; X64-NEXT: vplzcntq %zmm0, %zmm1 {%k1}154; X64-NEXT: vmovdqa64 %zmm1, %zmm0155; X64-NEXT: retq156 %1 = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)157 %2 = bitcast i8 %mask to <8 x i1>158 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %b159 ret <8 x i64> %3160}161 162declare <16 x i32> @llvm.x86.avx512.conflict.d.512(<16 x i32>)163declare <8 x i64> @llvm.x86.avx512.conflict.q.512(<8 x i64>)164