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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw -mattr=+avx512fp16 -mattr=+avx512vl | FileCheck %s3 4declare <4 x float> @llvm.x86.avx512fp16.mask.vfmadd.cph.128(<4 x float>, <4 x float>, <4 x float>, i8)5declare <4 x float> @llvm.x86.avx512fp16.maskz.vfmadd.cph.128(<4 x float>, <4 x float>, <4 x float>, i8)6 7define <4 x float> @test_int_x86_avx512fp8_mask_cfmadd_ph_bst(<4 x float> %x0, <4 x float> %x1, i8 %x3){8; CHECK-LABEL: test_int_x86_avx512fp8_mask_cfmadd_ph_bst:9; CHECK: ## %bb.0:10; CHECK-NEXT: kmovd %edi, %k111; CHECK-NEXT: vfmaddcph {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm1 {%k1}12; CHECK-NEXT: vmovaps %xmm1, %xmm013; CHECK-NEXT: retq14 %res = call <4 x float> @llvm.x86.avx512fp16.mask.vfmadd.cph.128(<4 x float> %x0, <4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, <4 x float> %x1, i8 %x3)15 ret <4 x float> %res16}17 18define <4 x float> @test_int_x86_avx512fp8_mask_cfmadd_ph_bst2(<4 x float> %x0, <4 x float> %x1, i8 %x3){19; CHECK-LABEL: test_int_x86_avx512fp8_mask_cfmadd_ph_bst2:20; CHECK: ## %bb.0:21; CHECK-NEXT: kmovd %edi, %k122; CHECK-NEXT: vfmaddcph {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm1 {%k1}23; CHECK-NEXT: vmovaps %xmm1, %xmm024; CHECK-NEXT: retq25 %res = call <4 x float> @llvm.x86.avx512fp16.mask.vfmadd.cph.128(<4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, <4 x float> %x0, <4 x float> %x1, i8 %x3)26 ret <4 x float> %res27}28 29define <4 x float> @test_int_x86_avx512fp8_mask_cfmadd_ph_128(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3){30; CHECK-LABEL: test_int_x86_avx512fp8_mask_cfmadd_ph_128:31; CHECK: ## %bb.0:32; CHECK-NEXT: kmovd %edi, %k133; CHECK-NEXT: vfmaddcph %xmm1, %xmm0, %xmm2 {%k1}34; CHECK-NEXT: vmovaps %xmm2, %xmm035; CHECK-NEXT: retq36 %res = call <4 x float> @llvm.x86.avx512fp16.mask.vfmadd.cph.128(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3)37 ret <4 x float> %res38}39 40define <4 x float> @test_int_x86_avx512fp8_maskz_cfmadd_ph_128(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3){41; CHECK-LABEL: test_int_x86_avx512fp8_maskz_cfmadd_ph_128:42; CHECK: ## %bb.0:43; CHECK-NEXT: kmovd %edi, %k144; CHECK-NEXT: vfmaddcph %xmm1, %xmm0, %xmm2 {%k1} {z}45; CHECK-NEXT: vmovaps %xmm2, %xmm046; CHECK-NEXT: retq47 %res = call <4 x float> @llvm.x86.avx512fp16.maskz.vfmadd.cph.128(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3)48 ret <4 x float> %res49}50 51define <4 x float> @test_int_x86_avx512fp8_cfmadd_ph_128(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2){52; CHECK-LABEL: test_int_x86_avx512fp8_cfmadd_ph_128:53; CHECK: ## %bb.0:54; CHECK-NEXT: vfmaddcph %xmm1, %xmm2, %xmm055; CHECK-NEXT: retq56 %res = call <4 x float> @llvm.x86.avx512fp16.mask.vfmadd.cph.128(<4 x float> %x2, <4 x float> %x1, <4 x float> %x0, i8 -1)57 ret <4 x float> %res58}59 60 61declare <8 x float> @llvm.x86.avx512fp16.mask.vfmadd.cph.256(<8 x float>, <8 x float>, <8 x float>, i8)62declare <8 x float> @llvm.x86.avx512fp16.maskz.vfmadd.cph.256(<8 x float>, <8 x float>, <8 x float>, i8)63 64define <8 x float> @test_int_x86_avx512fp16_mask_cfmadd_ph_256(<8 x float> %x0, <8 x float> %x1, <8 x float> %x2, i8 %x3){65; CHECK-LABEL: test_int_x86_avx512fp16_mask_cfmadd_ph_256:66; CHECK: ## %bb.0:67; CHECK-NEXT: kmovd %edi, %k168; CHECK-NEXT: vfmaddcph %ymm1, %ymm0, %ymm2 {%k1}69; CHECK-NEXT: vmovaps %ymm2, %ymm070; CHECK-NEXT: retq71 %res = call <8 x float> @llvm.x86.avx512fp16.mask.vfmadd.cph.256(<8 x float> %x0, <8 x float> %x1, <8 x float> %x2, i8 %x3)72 ret <8 x float> %res73}74 75define <8 x float> @test_int_x86_avx512fp16_maskz_cfmadd_ph_256(<8 x float> %x0, <8 x float> %x1, <8 x float> %x2, i8 %x3){76; CHECK-LABEL: test_int_x86_avx512fp16_maskz_cfmadd_ph_256:77; CHECK: ## %bb.0:78; CHECK-NEXT: kmovd %edi, %k179; CHECK-NEXT: vfmaddcph %ymm1, %ymm0, %ymm2 {%k1} {z}80; CHECK-NEXT: vmovaps %ymm2, %ymm081; CHECK-NEXT: retq82 %res = call <8 x float> @llvm.x86.avx512fp16.maskz.vfmadd.cph.256(<8 x float> %x0, <8 x float> %x1, <8 x float> %x2, i8 %x3)83 ret <8 x float> %res84}85 86define <8 x float> @test_int_x86_avx512fp16_cfmadd_ph_256(<8 x float> %x0, <8 x float> %x1, <8 x float> %x2){87; CHECK-LABEL: test_int_x86_avx512fp16_cfmadd_ph_256:88; CHECK: ## %bb.0:89; CHECK-NEXT: vfmaddcph %ymm1, %ymm2, %ymm090; CHECK-NEXT: retq91 %res = call <8 x float> @llvm.x86.avx512fp16.mask.vfmadd.cph.256(<8 x float> %x2, <8 x float> %x1, <8 x float> %x0, i8 -1)92 ret <8 x float> %res93}94 95 96declare <16 x float> @llvm.x86.avx512fp16.mask.vfmadd.cph.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)97declare <16 x float> @llvm.x86.avx512fp16.maskz.vfmadd.cph.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)98 99define <16 x float> @test_int_x86_avx512fp16_mask_cfmadd_ph_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){100; CHECK-LABEL: test_int_x86_avx512fp16_mask_cfmadd_ph_512:101; CHECK: ## %bb.0:102; CHECK-NEXT: kmovd %edi, %k1103; CHECK-NEXT: vfmaddcph %zmm1, %zmm0, %zmm2 {%k1}104; CHECK-NEXT: vmovaps %zmm2, %zmm0105; CHECK-NEXT: retq106 %res = call <16 x float> @llvm.x86.avx512fp16.mask.vfmadd.cph.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 4)107 ret <16 x float> %res108}109 110define <16 x float> @test_int_x86_avx512fp16_maskz_cfmadd_ph_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){111; CHECK-LABEL: test_int_x86_avx512fp16_maskz_cfmadd_ph_512:112; CHECK: ## %bb.0:113; CHECK-NEXT: kmovd %edi, %k1114; CHECK-NEXT: vfmaddcph %zmm1, %zmm0, %zmm2 {%k1} {z}115; CHECK-NEXT: vmovaps %zmm2, %zmm0116; CHECK-NEXT: retq117 %res = call <16 x float> @llvm.x86.avx512fp16.maskz.vfmadd.cph.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 4)118 ret <16 x float> %res119}120 121define <16 x float> @test_int_x86_avx512fp16_cfmadd_ph_512_rn(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){122; CHECK-LABEL: test_int_x86_avx512fp16_cfmadd_ph_512_rn:123; CHECK: ## %bb.0:124; CHECK-NEXT: vfmaddcph {rz-sae}, %zmm1, %zmm2, %zmm0125; CHECK-NEXT: retq126 %res = call <16 x float> @llvm.x86.avx512fp16.mask.vfmadd.cph.512(<16 x float> %x2, <16 x float> %x1, <16 x float> %x0, i16 -1, i32 11)127 ret <16 x float> %res128}129 130define <16 x float> @test_int_x86_avx512fp16_cfmadd_ph_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){131; CHECK-LABEL: test_int_x86_avx512fp16_cfmadd_ph_512:132; CHECK: ## %bb.0:133; CHECK-NEXT: vfmaddcph %zmm1, %zmm2, %zmm0134; CHECK-NEXT: retq135 %res = call <16 x float> @llvm.x86.avx512fp16.mask.vfmadd.cph.512(<16 x float> %x2, <16 x float> %x1, <16 x float> %x0, i16 -1, i32 4)136 ret <16 x float> %res137}138 139declare <4 x float> @llvm.x86.avx512fp16.mask.vfcmadd.cph.128(<4 x float>, <4 x float>, <4 x float>, i8)140declare <4 x float> @llvm.x86.avx512fp16.maskz.vfcmadd.cph.128(<4 x float>, <4 x float>, <4 x float>, i8)141 142define <4 x float> @test_int_x86_avx512fp8_mask_cfcmadd_ph_bst(<4 x float> %x0, <4 x float> %x1, i8 %x3){143; CHECK-LABEL: test_int_x86_avx512fp8_mask_cfcmadd_ph_bst:144; CHECK: ## %bb.0:145; CHECK-NEXT: kmovd %edi, %k1146; CHECK-NEXT: vfcmaddcph {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm1 {%k1}147; CHECK-NEXT: vmovaps %xmm1, %xmm0148; CHECK-NEXT: retq149 %res = call <4 x float> @llvm.x86.avx512fp16.mask.vfcmadd.cph.128(<4 x float> %x0, <4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, <4 x float> %x1, i8 %x3)150 ret <4 x float> %res151}152 153; Check conjugate complex FMA is not commutable.154define <4 x float> @test_int_x86_avx512fp8_mask_cfcmadd_ph_bst2(<4 x float> %x0, <4 x float> %x1, i8 %x3){155; CHECK-LABEL: test_int_x86_avx512fp8_mask_cfcmadd_ph_bst2:156; CHECK: ## %bb.0:157; CHECK-NEXT: kmovd %edi, %k1158; CHECK-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]159; CHECK-NEXT: vfcmaddcph %xmm0, %xmm2, %xmm1 {%k1}160; CHECK-NEXT: vmovaps %xmm1, %xmm0161; CHECK-NEXT: retq162 %res = call <4 x float> @llvm.x86.avx512fp16.mask.vfcmadd.cph.128(<4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, <4 x float> %x0, <4 x float> %x1, i8 %x3)163 ret <4 x float> %res164}165 166define <4 x float> @test_int_x86_avx512fp8_mask_cfcmadd_ph_128(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3){167; CHECK-LABEL: test_int_x86_avx512fp8_mask_cfcmadd_ph_128:168; CHECK: ## %bb.0:169; CHECK-NEXT: kmovd %edi, %k1170; CHECK-NEXT: vfcmaddcph %xmm1, %xmm0, %xmm2 {%k1}171; CHECK-NEXT: vmovaps %xmm2, %xmm0172; CHECK-NEXT: retq173 %res = call <4 x float> @llvm.x86.avx512fp16.mask.vfcmadd.cph.128(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3)174 ret <4 x float> %res175}176 177define <4 x float> @test_int_x86_avx512fp8_maskz_cfcmadd_ph_128(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3){178; CHECK-LABEL: test_int_x86_avx512fp8_maskz_cfcmadd_ph_128:179; CHECK: ## %bb.0:180; CHECK-NEXT: kmovd %edi, %k1181; CHECK-NEXT: vfcmaddcph %xmm1, %xmm0, %xmm2 {%k1} {z}182; CHECK-NEXT: vmovaps %xmm2, %xmm0183; CHECK-NEXT: retq184 %res = call <4 x float> @llvm.x86.avx512fp16.maskz.vfcmadd.cph.128(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3)185 ret <4 x float> %res186}187 188define <4 x float> @test_int_x86_avx512fp8_cfcmadd_ph_128(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2){189; CHECK-LABEL: test_int_x86_avx512fp8_cfcmadd_ph_128:190; CHECK: ## %bb.0:191; CHECK-NEXT: vfcmaddcph %xmm1, %xmm2, %xmm0192; CHECK-NEXT: retq193 %res = call <4 x float> @llvm.x86.avx512fp16.mask.vfcmadd.cph.128(<4 x float> %x2, <4 x float> %x1, <4 x float> %x0, i8 -1)194 ret <4 x float> %res195}196 197 198declare <8 x float> @llvm.x86.avx512fp16.mask.vfcmadd.cph.256(<8 x float>, <8 x float>, <8 x float>, i8)199declare <8 x float> @llvm.x86.avx512fp16.maskz.vfcmadd.cph.256(<8 x float>, <8 x float>, <8 x float>, i8)200 201define <8 x float> @test_int_x86_avx512fp16_mask_cfcmadd_ph_256(<8 x float> %x0, <8 x float> %x1, <8 x float> %x2, i8 %x3){202; CHECK-LABEL: test_int_x86_avx512fp16_mask_cfcmadd_ph_256:203; CHECK: ## %bb.0:204; CHECK-NEXT: kmovd %edi, %k1205; CHECK-NEXT: vfcmaddcph %ymm1, %ymm0, %ymm2 {%k1}206; CHECK-NEXT: vmovaps %ymm2, %ymm0207; CHECK-NEXT: retq208 %res = call <8 x float> @llvm.x86.avx512fp16.mask.vfcmadd.cph.256(<8 x float> %x0, <8 x float> %x1, <8 x float> %x2, i8 %x3)209 ret <8 x float> %res210}211 212define <8 x float> @test_int_x86_avx512fp16_maskz_cfcmadd_ph_256(<8 x float> %x0, <8 x float> %x1, <8 x float> %x2, i8 %x3){213; CHECK-LABEL: test_int_x86_avx512fp16_maskz_cfcmadd_ph_256:214; CHECK: ## %bb.0:215; CHECK-NEXT: kmovd %edi, %k1216; CHECK-NEXT: vfcmaddcph %ymm1, %ymm0, %ymm2 {%k1} {z}217; CHECK-NEXT: vmovaps %ymm2, %ymm0218; CHECK-NEXT: retq219 %res = call <8 x float> @llvm.x86.avx512fp16.maskz.vfcmadd.cph.256(<8 x float> %x0, <8 x float> %x1, <8 x float> %x2, i8 %x3)220 ret <8 x float> %res221}222 223define <8 x float> @test_int_x86_avx512fp16_cfcmadd_ph_256(<8 x float> %x0, <8 x float> %x1, <8 x float> %x2){224; CHECK-LABEL: test_int_x86_avx512fp16_cfcmadd_ph_256:225; CHECK: ## %bb.0:226; CHECK-NEXT: vfcmaddcph %ymm1, %ymm2, %ymm0227; CHECK-NEXT: retq228 %res = call <8 x float> @llvm.x86.avx512fp16.mask.vfcmadd.cph.256(<8 x float> %x2, <8 x float> %x1, <8 x float> %x0, i8 -1)229 ret <8 x float> %res230}231 232 233declare <16 x float> @llvm.x86.avx512fp16.mask.vfcmadd.cph.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)234declare <16 x float> @llvm.x86.avx512fp16.maskz.vfcmadd.cph.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)235 236define <16 x float> @test_int_x86_avx512fp16_mask_cfcmadd_ph_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){237; CHECK-LABEL: test_int_x86_avx512fp16_mask_cfcmadd_ph_512:238; CHECK: ## %bb.0:239; CHECK-NEXT: kmovd %edi, %k1240; CHECK-NEXT: vfcmaddcph %zmm1, %zmm0, %zmm2 {%k1}241; CHECK-NEXT: vmovaps %zmm2, %zmm0242; CHECK-NEXT: retq243 %res = call <16 x float> @llvm.x86.avx512fp16.mask.vfcmadd.cph.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 4)244 ret <16 x float> %res245}246 247define <16 x float> @test_int_x86_avx512fp16_maskz_cfcmadd_ph_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){248; CHECK-LABEL: test_int_x86_avx512fp16_maskz_cfcmadd_ph_512:249; CHECK: ## %bb.0:250; CHECK-NEXT: kmovd %edi, %k1251; CHECK-NEXT: vfcmaddcph %zmm1, %zmm0, %zmm2 {%k1} {z}252; CHECK-NEXT: vmovaps %zmm2, %zmm0253; CHECK-NEXT: retq254 %res = call <16 x float> @llvm.x86.avx512fp16.maskz.vfcmadd.cph.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 4)255 ret <16 x float> %res256}257 258define <16 x float> @test_int_x86_avx512fp16_cfcmadd_ph_512_rn(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){259; CHECK-LABEL: test_int_x86_avx512fp16_cfcmadd_ph_512_rn:260; CHECK: ## %bb.0:261; CHECK-NEXT: vfcmaddcph {rz-sae}, %zmm1, %zmm2, %zmm0262; CHECK-NEXT: retq263 %res = call <16 x float> @llvm.x86.avx512fp16.mask.vfcmadd.cph.512(<16 x float> %x2, <16 x float> %x1, <16 x float> %x0, i16 -1, i32 11)264 ret <16 x float> %res265}266 267define <16 x float> @test_int_x86_avx512fp16_cfcmadd_ph_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3){268; CHECK-LABEL: test_int_x86_avx512fp16_cfcmadd_ph_512:269; CHECK: ## %bb.0:270; CHECK-NEXT: vfcmaddcph %zmm1, %zmm2, %zmm0271; CHECK-NEXT: retq272 %res = call <16 x float> @llvm.x86.avx512fp16.mask.vfcmadd.cph.512(<16 x float> %x2, <16 x float> %x1, <16 x float> %x0, i16 -1, i32 4)273 ret <16 x float> %res274}275