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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unkown-unkown -mattr=+avx512bw -mattr=+avx512fp16 -mattr=+avx512vl | FileCheck %s3 4declare <32 x half> @llvm.x86.avx512fp16.add.ph.512(<32 x half>, <32 x half>, i32)5 6define <32 x half> @test_int_x86_avx512fp16_add_ph_512(<32 x half> %x1, <32 x half> %x2) {7; CHECK-LABEL: test_int_x86_avx512fp16_add_ph_512:8; CHECK: # %bb.0:9; CHECK-NEXT: vaddph %zmm1, %zmm0, %zmm010; CHECK-NEXT: retq11 %res = call <32 x half> @llvm.x86.avx512fp16.add.ph.512(<32 x half> %x1, <32 x half> %x2, i32 4)12 ret <32 x half> %res13}14 15define <32 x half> @test_int_x86_avx512fp16_mask_add_ph_512(<32 x half> %src, <32 x half> %x1, <32 x half> %x2, i32 %msk, ptr %ptr) {16; CHECK-LABEL: test_int_x86_avx512fp16_mask_add_ph_512:17; CHECK: # %bb.0:18; CHECK-NEXT: kmovd %edi, %k119; CHECK-NEXT: vaddph %zmm2, %zmm1, %zmm0 {%k1}20; CHECK-NEXT: retq21 %mask = bitcast i32 %msk to <32 x i1>22 %res0 = call <32 x half> @llvm.x86.avx512fp16.add.ph.512(<32 x half> %x1, <32 x half> %x2, i32 4)23 %res = select <32 x i1> %mask, <32 x half> %res0, <32 x half> %src24 ret <32 x half> %res25}26 27define <32 x half> @test_int_x86_avx512fp16_maskz_add_ph_512(<32 x half> %src, <32 x half> %x1, <32 x half> %x2, i32 %msk, ptr %ptr) {28; CHECK-LABEL: test_int_x86_avx512fp16_maskz_add_ph_512:29; CHECK: # %bb.0:30; CHECK-NEXT: kmovd %edi, %k131; CHECK-NEXT: vaddph %zmm2, %zmm1, %zmm0 {%k1} {z}32; CHECK-NEXT: vaddph (%rsi), %zmm1, %zmm1 {%k1} {z}33; CHECK-NEXT: vaddph %zmm1, %zmm0, %zmm034; CHECK-NEXT: retq35 %mask = bitcast i32 %msk to <32 x i1>36 %val = load <32 x half>, ptr %ptr37 %res0 = call <32 x half> @llvm.x86.avx512fp16.add.ph.512(<32 x half> %x1, <32 x half> %x2, i32 4)38 %res1 = select <32 x i1> %mask, <32 x half> %res0, <32 x half> zeroinitializer39 %t2 = call <32 x half> @llvm.x86.avx512fp16.add.ph.512(<32 x half> %x1, <32 x half> %val, i32 4)40 %res2 = select <32 x i1> %mask, <32 x half> %t2, <32 x half> zeroinitializer41 %res3 = fadd <32 x half> %res1, %res242 ret <32 x half> %res343}44 45define <32 x half> @test_int_x86_avx512fp16_add_ph_512_round(<32 x half> %x1, <32 x half> %x2, <32 x half> %src, i32 %msk, ptr %ptr) {46; CHECK-LABEL: test_int_x86_avx512fp16_add_ph_512_round:47; CHECK: # %bb.0:48; CHECK-NEXT: kmovd %edi, %k149; CHECK-NEXT: vaddph {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1}50; CHECK-NEXT: vmovaps %zmm2, %zmm051; CHECK-NEXT: retq52 %mask = bitcast i32 %msk to <32 x i1>53 %t1 = call <32 x half> @llvm.x86.avx512fp16.add.ph.512(<32 x half> %x1, <32 x half> %x2, i32 10)54 %res = select <32 x i1> %mask, <32 x half> %t1, <32 x half> %src55 ret <32 x half> %res56}57 58declare <32 x half> @llvm.x86.avx512fp16.sub.ph.512(<32 x half>, <32 x half>, i32)59 60define <32 x half> @test_int_x86_avx512fp16_sub_ph_512(<32 x half> %x1, <32 x half> %x2) {61; CHECK-LABEL: test_int_x86_avx512fp16_sub_ph_512:62; CHECK: # %bb.0:63; CHECK-NEXT: vsubph %zmm1, %zmm0, %zmm064; CHECK-NEXT: retq65 %res = call <32 x half> @llvm.x86.avx512fp16.sub.ph.512(<32 x half> %x1, <32 x half> %x2, i32 4)66 ret <32 x half> %res67}68 69define <32 x half> @test_int_x86_avx512fp16_mask_sub_ph_512(<32 x half> %src, <32 x half> %x1, <32 x half> %x2, i32 %msk, ptr %ptr) {70; CHECK-LABEL: test_int_x86_avx512fp16_mask_sub_ph_512:71; CHECK: # %bb.0:72; CHECK-NEXT: kmovd %edi, %k173; CHECK-NEXT: vsubph %zmm2, %zmm1, %zmm0 {%k1}74; CHECK-NEXT: retq75 %mask = bitcast i32 %msk to <32 x i1>76 %res0 = call <32 x half> @llvm.x86.avx512fp16.sub.ph.512(<32 x half> %x1, <32 x half> %x2, i32 4)77 %res = select <32 x i1> %mask, <32 x half> %res0, <32 x half> %src78 ret <32 x half> %res79}80 81define <32 x half> @test_int_x86_avx512fp16_maskz_sub_ph_512(<32 x half> %src, <32 x half> %x1, <32 x half> %x2, i32 %msk, ptr %ptr) {82; CHECK-LABEL: test_int_x86_avx512fp16_maskz_sub_ph_512:83; CHECK: # %bb.0:84; CHECK-NEXT: kmovd %edi, %k185; CHECK-NEXT: vsubph %zmm2, %zmm1, %zmm0 {%k1} {z}86; CHECK-NEXT: vsubph (%rsi), %zmm1, %zmm187; CHECK-NEXT: vsubph %zmm1, %zmm0, %zmm0 {%k1}88; CHECK-NEXT: retq89 %mask = bitcast i32 %msk to <32 x i1>90 %val = load <32 x half>, ptr %ptr91 %res0 = call <32 x half> @llvm.x86.avx512fp16.sub.ph.512(<32 x half> %x1, <32 x half> %x2, i32 4)92 %res1 = select <32 x i1> %mask, <32 x half> %res0, <32 x half> zeroinitializer93 %t2 = call <32 x half> @llvm.x86.avx512fp16.sub.ph.512(<32 x half> %x1, <32 x half> %val, i32 4)94 %res2 = select <32 x i1> %mask, <32 x half> %t2, <32 x half> zeroinitializer95 %res3 = fsub <32 x half> %res1, %res296 ret <32 x half> %res397}98 99define <32 x half> @test_int_x86_avx512fp16_sub_ph_512_round(<32 x half> %x1, <32 x half> %x2, <32 x half> %src, i32 %msk, ptr %ptr) {100; CHECK-LABEL: test_int_x86_avx512fp16_sub_ph_512_round:101; CHECK: # %bb.0:102; CHECK-NEXT: kmovd %edi, %k1103; CHECK-NEXT: vsubph {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1}104; CHECK-NEXT: vmovaps %zmm2, %zmm0105; CHECK-NEXT: retq106 %mask = bitcast i32 %msk to <32 x i1>107 %t1 = call <32 x half> @llvm.x86.avx512fp16.sub.ph.512(<32 x half> %x1, <32 x half> %x2, i32 10)108 %res = select <32 x i1> %mask, <32 x half> %t1, <32 x half> %src109 ret <32 x half> %res110}111 112declare <32 x half> @llvm.x86.avx512fp16.mul.ph.512(<32 x half>, <32 x half>, i32)113 114define <32 x half> @test_int_x86_avx512fp16_mul_ph_512(<32 x half> %x1, <32 x half> %x2) {115; CHECK-LABEL: test_int_x86_avx512fp16_mul_ph_512:116; CHECK: # %bb.0:117; CHECK-NEXT: vmulph %zmm1, %zmm0, %zmm0118; CHECK-NEXT: retq119 %res = call <32 x half> @llvm.x86.avx512fp16.mul.ph.512(<32 x half> %x1, <32 x half> %x2, i32 4)120 ret <32 x half> %res121}122 123define <32 x half> @test_int_x86_avx512fp16_mask_mul_ph_512(<32 x half> %src, <32 x half> %x1, <32 x half> %x2, i32 %msk, ptr %ptr) {124; CHECK-LABEL: test_int_x86_avx512fp16_mask_mul_ph_512:125; CHECK: # %bb.0:126; CHECK-NEXT: kmovd %edi, %k1127; CHECK-NEXT: vmulph %zmm2, %zmm1, %zmm0 {%k1}128; CHECK-NEXT: retq129 %mask = bitcast i32 %msk to <32 x i1>130 %res0 = call <32 x half> @llvm.x86.avx512fp16.mul.ph.512(<32 x half> %x1, <32 x half> %x2, i32 4)131 %res = select <32 x i1> %mask, <32 x half> %res0, <32 x half> %src132 ret <32 x half> %res133}134 135define <32 x half> @test_int_x86_avx512fp16_maskz_mul_ph_512(<32 x half> %src, <32 x half> %x1, <32 x half> %x2, i32 %msk, ptr %ptr) {136; CHECK-LABEL: test_int_x86_avx512fp16_maskz_mul_ph_512:137; CHECK: # %bb.0:138; CHECK-NEXT: kmovd %edi, %k1139; CHECK-NEXT: vmulph %zmm2, %zmm1, %zmm0 {%k1} {z}140; CHECK-NEXT: vmulph (%rsi), %zmm1, %zmm1 {%k1} {z}141; CHECK-NEXT: vmulph %zmm1, %zmm0, %zmm0142; CHECK-NEXT: retq143 %mask = bitcast i32 %msk to <32 x i1>144 %val = load <32 x half>, ptr %ptr145 %res0 = call <32 x half> @llvm.x86.avx512fp16.mul.ph.512(<32 x half> %x1, <32 x half> %x2, i32 4)146 %res1 = select <32 x i1> %mask, <32 x half> %res0, <32 x half> zeroinitializer147 %t2 = call <32 x half> @llvm.x86.avx512fp16.mul.ph.512(<32 x half> %x1, <32 x half> %val, i32 4)148 %res2 = select <32 x i1> %mask, <32 x half> %t2, <32 x half> zeroinitializer149 %res3 = fmul <32 x half> %res1, %res2150 ret <32 x half> %res3151}152 153define <32 x half> @test_int_x86_avx512fp16_mul_ph_512_round(<32 x half> %x1, <32 x half> %x2, <32 x half> %src, i32 %msk, ptr %ptr) {154; CHECK-LABEL: test_int_x86_avx512fp16_mul_ph_512_round:155; CHECK: # %bb.0:156; CHECK-NEXT: kmovd %edi, %k1157; CHECK-NEXT: vmulph {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1}158; CHECK-NEXT: vmovaps %zmm2, %zmm0159; CHECK-NEXT: retq160 %mask = bitcast i32 %msk to <32 x i1>161 %t1 = call <32 x half> @llvm.x86.avx512fp16.mul.ph.512(<32 x half> %x1, <32 x half> %x2, i32 10)162 %res = select <32 x i1> %mask, <32 x half> %t1, <32 x half> %src163 ret <32 x half> %res164}165 166declare <32 x half> @llvm.x86.avx512fp16.div.ph.512(<32 x half>, <32 x half>, i32)167 168define <32 x half> @test_int_x86_avx512fp16_div_ph_512(<32 x half> %x1, <32 x half> %x2) {169; CHECK-LABEL: test_int_x86_avx512fp16_div_ph_512:170; CHECK: # %bb.0:171; CHECK-NEXT: vdivph %zmm1, %zmm0, %zmm0172; CHECK-NEXT: retq173 %res = call <32 x half> @llvm.x86.avx512fp16.div.ph.512(<32 x half> %x1, <32 x half> %x2, i32 4)174 ret <32 x half> %res175}176 177define <32 x half> @test_int_x86_avx512fp16_mask_div_ph_512(<32 x half> %src, <32 x half> %x1, <32 x half> %x2, i32 %msk, ptr %ptr) {178; CHECK-LABEL: test_int_x86_avx512fp16_mask_div_ph_512:179; CHECK: # %bb.0:180; CHECK-NEXT: kmovd %edi, %k1181; CHECK-NEXT: vdivph %zmm2, %zmm1, %zmm0 {%k1}182; CHECK-NEXT: retq183 %mask = bitcast i32 %msk to <32 x i1>184 %res0 = call <32 x half> @llvm.x86.avx512fp16.div.ph.512(<32 x half> %x1, <32 x half> %x2, i32 4)185 %res = select <32 x i1> %mask, <32 x half> %res0, <32 x half> %src186 ret <32 x half> %res187}188 189define <32 x half> @test_int_x86_avx512fp16_maskz_div_ph_512(<32 x half> %src, <32 x half> %x1, <32 x half> %x2, i32 %msk, ptr %ptr) {190; CHECK-LABEL: test_int_x86_avx512fp16_maskz_div_ph_512:191; CHECK: # %bb.0:192; CHECK-NEXT: kmovd %edi, %k1193; CHECK-NEXT: vdivph %zmm2, %zmm1, %zmm0 {%k1} {z}194; CHECK-NEXT: vdivph (%rsi), %zmm1, %zmm1 {%k1} {z}195; CHECK-NEXT: vdivph %zmm1, %zmm0, %zmm0196; CHECK-NEXT: retq197 %mask = bitcast i32 %msk to <32 x i1>198 %val = load <32 x half>, ptr %ptr199 %res0 = call <32 x half> @llvm.x86.avx512fp16.div.ph.512(<32 x half> %x1, <32 x half> %x2, i32 4)200 %res1 = select <32 x i1> %mask, <32 x half> %res0, <32 x half> zeroinitializer201 %t2 = call <32 x half> @llvm.x86.avx512fp16.div.ph.512(<32 x half> %x1, <32 x half> %val, i32 4)202 %res2 = select <32 x i1> %mask, <32 x half> %t2, <32 x half> zeroinitializer203 %res3 = fdiv <32 x half> %res1, %res2204 ret <32 x half> %res3205}206 207define <32 x half> @test_int_x86_avx512fp16_div_ph_512_round(<32 x half> %x1, <32 x half> %x2, <32 x half> %src, i32 %msk, ptr %ptr) {208; CHECK-LABEL: test_int_x86_avx512fp16_div_ph_512_round:209; CHECK: # %bb.0:210; CHECK-NEXT: kmovd %edi, %k1211; CHECK-NEXT: vdivph {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1}212; CHECK-NEXT: vmovaps %zmm2, %zmm0213; CHECK-NEXT: retq214 %mask = bitcast i32 %msk to <32 x i1>215 %t1 = call <32 x half> @llvm.x86.avx512fp16.div.ph.512(<32 x half> %x1, <32 x half> %x2, i32 10)216 %res = select <32 x i1> %mask, <32 x half> %t1, <32 x half> %src217 ret <32 x half> %res218}219 220declare <32 x half> @llvm.x86.avx512fp16.min.ph.512(<32 x half>, <32 x half>, i32)221 222define <32 x half> @test_min_ph(<32 x half> %x1, <32 x half> %x2) {223; CHECK-LABEL: test_min_ph:224; CHECK: # %bb.0:225; CHECK-NEXT: vminph %zmm1, %zmm0, %zmm0226; CHECK-NEXT: retq227 %res0 = fcmp olt <32 x half> %x1, %x2228 %res1 = select <32 x i1> %res0, <32 x half> %x1, <32 x half> %x2229 ret <32 x half> %res1230}231 232define <32 x half> @test_int_x86_avx512fp16_min_ph_512_sae(<32 x half> %x1, <32 x half> %x2) {233; CHECK-LABEL: test_int_x86_avx512fp16_min_ph_512_sae:234; CHECK: # %bb.0:235; CHECK-NEXT: vminph {sae}, %zmm1, %zmm0, %zmm0236; CHECK-NEXT: retq237 %res0 = call <32 x half> @llvm.x86.avx512fp16.min.ph.512(<32 x half> %x1, <32 x half> %x2, i32 8)238 ret <32 x half> %res0239}240 241define <32 x half> @test_int_x86_avx512fp16_maskz_min_ph_512_sae(<32 x half> %x1, <32 x half> %x2, i32 %msk) {242; CHECK-LABEL: test_int_x86_avx512fp16_maskz_min_ph_512_sae:243; CHECK: # %bb.0:244; CHECK-NEXT: kmovd %edi, %k1245; CHECK-NEXT: vminph {sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}246; CHECK-NEXT: retq247 %mask = bitcast i32 %msk to <32 x i1>248 %res0 = call <32 x half> @llvm.x86.avx512fp16.min.ph.512(<32 x half> %x1, <32 x half> %x2, i32 8)249 %res1 = select <32 x i1> %mask, <32 x half> %res0, <32 x half> zeroinitializer250 ret <32 x half> %res1251}252 253declare <32 x half> @llvm.x86.avx512fp16.max.ph.512(<32 x half>, <32 x half>, i32)254 255define <32 x half> @test_max_ph(<32 x half> %x1, <32 x half> %x2) {256; CHECK-LABEL: test_max_ph:257; CHECK: # %bb.0:258; CHECK-NEXT: vmaxph %zmm1, %zmm0, %zmm0259; CHECK-NEXT: retq260 %res0 = fcmp ogt <32 x half> %x1, %x2261 %res1 = select <32 x i1> %res0, <32 x half> %x1, <32 x half> %x2262 ret <32 x half> %res1263}264 265define <32 x half> @test_int_x86_avx512fp16_max_ph_512_sae(<32 x half> %x1, <32 x half> %x2) {266; CHECK-LABEL: test_int_x86_avx512fp16_max_ph_512_sae:267; CHECK: # %bb.0:268; CHECK-NEXT: vmaxph {sae}, %zmm1, %zmm0, %zmm0269; CHECK-NEXT: retq270 %res0 = call <32 x half> @llvm.x86.avx512fp16.max.ph.512(<32 x half> %x1, <32 x half> %x2, i32 8)271 ret <32 x half> %res0272}273 274define <32 x half> @test_int_x86_avx512fp16_maskz_max_ph_512_sae(<32 x half> %x1, <32 x half> %x2, i32 %msk) {275; CHECK-LABEL: test_int_x86_avx512fp16_maskz_max_ph_512_sae:276; CHECK: # %bb.0:277; CHECK-NEXT: kmovd %edi, %k1278; CHECK-NEXT: vmaxph {sae}, %zmm1, %zmm0, %zmm0 {%k1} {z}279; CHECK-NEXT: retq280 %mask = bitcast i32 %msk to <32 x i1>281 %res0 = call <32 x half> @llvm.x86.avx512fp16.max.ph.512(<32 x half> %x1, <32 x half> %x2, i32 8)282 %res1 = select <32 x i1> %mask, <32 x half> %res0, <32 x half> zeroinitializer283 ret <32 x half> %res1284}285 286declare <8 x double> @llvm.x86.avx512fp16.mask.vcvtph2pd.512(<8 x half>, <8 x double>, i8, i32)287 288define <8 x double> @test_int_x86_avx512_mask_vcvt_ph2pd(<8 x half> %x0, <8 x double> %x1, i8 %x2) {289; CHECK-LABEL: test_int_x86_avx512_mask_vcvt_ph2pd:290; CHECK: # %bb.0:291; CHECK-NEXT: kmovd %edi, %k1292; CHECK-NEXT: vcvtph2pd %xmm0, %zmm1 {%k1}293; CHECK-NEXT: vmovaps %zmm1, %zmm0294; CHECK-NEXT: retq295 %res = call <8 x double> @llvm.x86.avx512fp16.mask.vcvtph2pd.512(<8 x half> %x0, <8 x double> %x1, i8 %x2, i32 4)296 ret <8 x double> %res297}298 299define <8 x double> @test_int_x86_avx512_mask_vcvt_ph2pd_sae(<8 x half> %x0, <8 x double> %x1, i8 %x2) {300; CHECK-LABEL: test_int_x86_avx512_mask_vcvt_ph2pd_sae:301; CHECK: # %bb.0:302; CHECK-NEXT: kmovd %edi, %k1303; CHECK-NEXT: vcvtph2pd {sae}, %xmm0, %zmm1 {%k1}304; CHECK-NEXT: vmovaps %zmm1, %zmm0305; CHECK-NEXT: retq306 %res = call <8 x double> @llvm.x86.avx512fp16.mask.vcvtph2pd.512(<8 x half> %x0, <8 x double> %x1, i8 %x2, i32 8)307 ret <8 x double> %res308}309 310define <8 x double> @test_int_x86_avx512_mask_vcvt_ph2pd_nomask(<8 x half> %x0, <8 x double> %x1) {311; CHECK-LABEL: test_int_x86_avx512_mask_vcvt_ph2pd_nomask:312; CHECK: # %bb.0:313; CHECK-NEXT: vcvtph2pd %xmm0, %zmm0314; CHECK-NEXT: retq315 %res = call <8 x double> @llvm.x86.avx512fp16.mask.vcvtph2pd.512(<8 x half> %x0, <8 x double> %x1, i8 -1, i32 4)316 ret <8 x double> %res317}318 319define <8 x double> @test_int_x86_avx512_mask_vcvt_ph2pd_load(ptr %px0, <8 x double> %x1, i8 %x2) {320; CHECK-LABEL: test_int_x86_avx512_mask_vcvt_ph2pd_load:321; CHECK: # %bb.0:322; CHECK-NEXT: kmovd %esi, %k1323; CHECK-NEXT: vcvtph2pd (%rdi), %zmm0 {%k1}324; CHECK-NEXT: retq325 %x0 = load <8 x half>, ptr %px0, align 16326 %res = call <8 x double> @llvm.x86.avx512fp16.mask.vcvtph2pd.512(<8 x half> %x0, <8 x double> %x1, i8 %x2, i32 4)327 ret <8 x double> %res328}329 330declare <8 x half> @llvm.x86.avx512fp16.mask.vcvtpd2ph.512(<8 x double>, <8 x half>, i8, i32)331 332define <8 x half> @test_int_x86_avx512_mask_vcvt_pd2ph(<8 x double> %x0, <8 x half> %x1, i8 %x2) {333; CHECK-LABEL: test_int_x86_avx512_mask_vcvt_pd2ph:334; CHECK: # %bb.0:335; CHECK-NEXT: kmovd %edi, %k1336; CHECK-NEXT: vcvtpd2ph %zmm0, %xmm1 {%k1}337; CHECK-NEXT: vmovaps %xmm1, %xmm0338; CHECK-NEXT: vzeroupper339; CHECK-NEXT: retq340 %res = call <8 x half> @llvm.x86.avx512fp16.mask.vcvtpd2ph.512(<8 x double> %x0, <8 x half> %x1, i8 %x2, i32 4)341 ret <8 x half> %res342}343 344define <8 x half> @test_int_x86_avx512_mask_vcvt_pd2ph_r(<8 x double> %x0, <8 x half> %x1, i8 %x2) {345; CHECK-LABEL: test_int_x86_avx512_mask_vcvt_pd2ph_r:346; CHECK: # %bb.0:347; CHECK-NEXT: kmovd %edi, %k1348; CHECK-NEXT: vcvtpd2ph {rz-sae}, %zmm0, %xmm1 {%k1}349; CHECK-NEXT: vmovaps %xmm1, %xmm0350; CHECK-NEXT: vzeroupper351; CHECK-NEXT: retq352 %res = call <8 x half> @llvm.x86.avx512fp16.mask.vcvtpd2ph.512(<8 x double> %x0, <8 x half> %x1, i8 %x2, i32 11)353 ret <8 x half> %res354}355 356define <8 x half> @test_int_x86_avx512_mask_vcvt_pd2ph_load(ptr %px0, <8 x half> %x1, i8 %x2) {357; CHECK-LABEL: test_int_x86_avx512_mask_vcvt_pd2ph_load:358; CHECK: # %bb.0:359; CHECK-NEXT: kmovd %esi, %k1360; CHECK-NEXT: vcvtpd2phz (%rdi), %xmm0 {%k1}361; CHECK-NEXT: retq362 %x0 = load <8 x double>, ptr %px0, align 64363 %res = call <8 x half> @llvm.x86.avx512fp16.mask.vcvtpd2ph.512(<8 x double> %x0, <8 x half> %x1, i8 %x2, i32 4)364 ret <8 x half> %res365}366 367declare <8 x half> @llvm.x86.avx512fp16.mask.vcvtss2sh.round(<8 x half>, <4 x float>, <8 x half>, i8, i32)368 369define <8 x half> @test_int_x86_avx512fp16_mask_cvt_ss2sh_round(<8 x half> %x0, <4 x float> %x1, <8 x half> %x2, i8 %x3) {370; CHECK-LABEL: test_int_x86_avx512fp16_mask_cvt_ss2sh_round:371; CHECK: # %bb.0:372; CHECK-NEXT: kmovd %edi, %k1373; CHECK-NEXT: vcvtss2sh %xmm1, %xmm0, %xmm2 {%k1}374; CHECK-NEXT: vmovaps %xmm2, %xmm0375; CHECK-NEXT: retq376 %res = call <8 x half> @llvm.x86.avx512fp16.mask.vcvtss2sh.round(<8 x half> %x0, <4 x float> %x1, <8 x half> %x2, i8 %x3, i32 4)377 ret <8 x half> %res378}379 380define <8 x half> @test_int_x86_avx512fp16_mask_cvt_ss2sh_round_r(<8 x half> %x0, <4 x float> %x1, <8 x half> %x2, i8 %x3) {381; CHECK-LABEL: test_int_x86_avx512fp16_mask_cvt_ss2sh_round_r:382; CHECK: # %bb.0:383; CHECK-NEXT: kmovd %edi, %k1384; CHECK-NEXT: vcvtss2sh {rz-sae}, %xmm1, %xmm0, %xmm2 {%k1}385; CHECK-NEXT: vmovaps %xmm2, %xmm0386; CHECK-NEXT: retq387 %res = call <8 x half> @llvm.x86.avx512fp16.mask.vcvtss2sh.round(<8 x half> %x0, <4 x float> %x1, <8 x half> %x2, i8 %x3, i32 11)388 ret <8 x half> %res389}390 391define <8 x half> @test_int_x86_avx512fp16_mask_cvt_ss2sh_round_nomask(<8 x half> %x0, <4 x float> %x1, <8 x half> %x2) {392; CHECK-LABEL: test_int_x86_avx512fp16_mask_cvt_ss2sh_round_nomask:393; CHECK: # %bb.0:394; CHECK-NEXT: vcvtss2sh %xmm1, %xmm0, %xmm0395; CHECK-NEXT: retq396 %res = call <8 x half> @llvm.x86.avx512fp16.mask.vcvtss2sh.round(<8 x half> %x0, <4 x float> %x1, <8 x half> %x2, i8 -1, i32 4)397 ret <8 x half> %res398}399 400define <8 x half> @test_int_x86_avx512fp16_mask_cvt_ss2sh_round_z(<8 x half> %x0, <4 x float> %x1, i8 %x2) {401; CHECK-LABEL: test_int_x86_avx512fp16_mask_cvt_ss2sh_round_z:402; CHECK: # %bb.0:403; CHECK-NEXT: kmovd %edi, %k1404; CHECK-NEXT: vcvtss2sh %xmm1, %xmm0, %xmm0 {%k1} {z}405; CHECK-NEXT: retq406 %res = call <8 x half> @llvm.x86.avx512fp16.mask.vcvtss2sh.round(<8 x half> %x0, <4 x float> %x1, <8 x half> zeroinitializer, i8 %x2, i32 4)407 ret <8 x half> %res408}409 410declare <8 x half> @llvm.x86.avx512fp16.mask.vcvtsd2sh.round(<8 x half>, <2 x double>, <8 x half>, i8, i32)411 412define <8 x half> @test_int_x86_avx512fp16_mask_cvt_sd2sh_round(<8 x half> %x0, <2 x double> %x1, <8 x half> %x2, i8 %x3) {413; CHECK-LABEL: test_int_x86_avx512fp16_mask_cvt_sd2sh_round:414; CHECK: # %bb.0:415; CHECK-NEXT: kmovd %edi, %k1416; CHECK-NEXT: vcvtsd2sh %xmm1, %xmm0, %xmm2 {%k1}417; CHECK-NEXT: vmovaps %xmm2, %xmm0418; CHECK-NEXT: retq419 %res = call <8 x half> @llvm.x86.avx512fp16.mask.vcvtsd2sh.round(<8 x half> %x0, <2 x double> %x1, <8 x half> %x2, i8 %x3, i32 4)420 ret <8 x half> %res421}422 423define <8 x half> @test_int_x86_avx512fp16_mask_cvt_sd2sh_round_r(<8 x half> %x0, <2 x double> %x1, <8 x half> %x2, i8 %x3) {424; CHECK-LABEL: test_int_x86_avx512fp16_mask_cvt_sd2sh_round_r:425; CHECK: # %bb.0:426; CHECK-NEXT: kmovd %edi, %k1427; CHECK-NEXT: vcvtsd2sh {rz-sae}, %xmm1, %xmm0, %xmm2 {%k1}428; CHECK-NEXT: vmovaps %xmm2, %xmm0429; CHECK-NEXT: retq430 %res = call <8 x half> @llvm.x86.avx512fp16.mask.vcvtsd2sh.round(<8 x half> %x0, <2 x double> %x1, <8 x half> %x2, i8 %x3, i32 11)431 ret <8 x half> %res432}433 434define <8 x half> @test_int_x86_avx512fp16_mask_cvt_sd2sh_round_nomask(<8 x half> %x0, <2 x double> %x1, <8 x half> %x2) {435; CHECK-LABEL: test_int_x86_avx512fp16_mask_cvt_sd2sh_round_nomask:436; CHECK: # %bb.0:437; CHECK-NEXT: vcvtsd2sh %xmm1, %xmm0, %xmm0438; CHECK-NEXT: retq439 %res = call <8 x half> @llvm.x86.avx512fp16.mask.vcvtsd2sh.round(<8 x half> %x0, <2 x double> %x1, <8 x half> %x2, i8 -1, i32 4)440 ret <8 x half> %res441}442 443define <8 x half> @test_int_x86_avx512fp16_mask_cvt_sd2sh_round_z(<8 x half> %x0, <2 x double> %x1, i8 %x2) {444; CHECK-LABEL: test_int_x86_avx512fp16_mask_cvt_sd2sh_round_z:445; CHECK: # %bb.0:446; CHECK-NEXT: kmovd %edi, %k1447; CHECK-NEXT: vcvtsd2sh %xmm1, %xmm0, %xmm0 {%k1} {z}448; CHECK-NEXT: retq449 %res = call <8 x half> @llvm.x86.avx512fp16.mask.vcvtsd2sh.round(<8 x half> %x0, <2 x double> %x1, <8 x half> zeroinitializer, i8 %x2, i32 4)450 ret <8 x half> %res451}452 453declare <4 x float> @llvm.x86.avx512fp16.mask.vcvtsh2ss.round(<4 x float>, <8 x half>, <4 x float>, i8, i32)454 455define <4 x float> @test_int_x86_avx512fp16_mask_cvt_sh2ss_round(<4 x float> %x0, <8 x half> %x1, <4 x float> %x2, i8 %x3) {456; CHECK-LABEL: test_int_x86_avx512fp16_mask_cvt_sh2ss_round:457; CHECK: # %bb.0:458; CHECK-NEXT: kmovd %edi, %k1459; CHECK-NEXT: vcvtsh2ss %xmm1, %xmm0, %xmm2 {%k1}460; CHECK-NEXT: vmovaps %xmm2, %xmm0461; CHECK-NEXT: retq462 %res = call <4 x float> @llvm.x86.avx512fp16.mask.vcvtsh2ss.round(<4 x float> %x0, <8 x half> %x1, <4 x float> %x2, i8 %x3, i32 4)463 ret <4 x float> %res464}465 466define <4 x float> @test_int_x86_avx512fp16_mask_cvt_sh2ss_round_r(<4 x float> %x0, <8 x half> %x1, <4 x float> %x2, i8 %x3) {467; CHECK-LABEL: test_int_x86_avx512fp16_mask_cvt_sh2ss_round_r:468; CHECK: # %bb.0:469; CHECK-NEXT: kmovd %edi, %k1470; CHECK-NEXT: vcvtsh2ss {sae}, %xmm1, %xmm0, %xmm2 {%k1}471; CHECK-NEXT: vmovaps %xmm2, %xmm0472; CHECK-NEXT: retq473 %res = call <4 x float> @llvm.x86.avx512fp16.mask.vcvtsh2ss.round(<4 x float> %x0, <8 x half> %x1, <4 x float> %x2, i8 %x3, i32 8)474 ret <4 x float> %res475}476 477define <4 x float> @test_int_x86_avx512fp16_mask_cvt_sh2ss_round_nomask(<4 x float> %x0, <8 x half> %x1, <4 x float> %x2) {478; CHECK-LABEL: test_int_x86_avx512fp16_mask_cvt_sh2ss_round_nomask:479; CHECK: # %bb.0:480; CHECK-NEXT: vcvtsh2ss %xmm1, %xmm0, %xmm0481; CHECK-NEXT: retq482 %res = call <4 x float> @llvm.x86.avx512fp16.mask.vcvtsh2ss.round(<4 x float> %x0, <8 x half> %x1, <4 x float> %x2, i8 -1, i32 4)483 ret <4 x float> %res484}485 486define <4 x float> @test_int_x86_avx512fp16_mask_cvt_sh2ss_round_z(<4 x float> %x0, <8 x half> %x1, i8 %x2) {487; CHECK-LABEL: test_int_x86_avx512fp16_mask_cvt_sh2ss_round_z:488; CHECK: # %bb.0:489; CHECK-NEXT: kmovd %edi, %k1490; CHECK-NEXT: vcvtsh2ss %xmm1, %xmm0, %xmm0 {%k1} {z}491; CHECK-NEXT: retq492 %res = call <4 x float> @llvm.x86.avx512fp16.mask.vcvtsh2ss.round(<4 x float> %x0, <8 x half> %x1, <4 x float> zeroinitializer, i8 %x2, i32 4)493 ret <4 x float> %res494}495 496declare <2 x double> @llvm.x86.avx512fp16.mask.vcvtsh2sd.round(<2 x double>, <8 x half>, <2 x double>, i8, i32)497 498define <2 x double> @test_int_x86_avx512fp16_mask_cvt_sh2sd_round(<2 x double> %x0, <8 x half> %x1, <2 x double> %x2, i8 %x3) {499; CHECK-LABEL: test_int_x86_avx512fp16_mask_cvt_sh2sd_round:500; CHECK: # %bb.0:501; CHECK-NEXT: kmovd %edi, %k1502; CHECK-NEXT: vcvtsh2sd %xmm1, %xmm0, %xmm2 {%k1}503; CHECK-NEXT: vmovaps %xmm2, %xmm0504; CHECK-NEXT: retq505 %res = call <2 x double> @llvm.x86.avx512fp16.mask.vcvtsh2sd.round(<2 x double> %x0, <8 x half> %x1, <2 x double> %x2, i8 %x3, i32 4)506 ret <2 x double> %res507}508 509define <2 x double> @test_int_x86_avx512fp16_mask_cvt_sh2sd_round_r(<2 x double> %x0, <8 x half> %x1, <2 x double> %x2, i8 %x3) {510; CHECK-LABEL: test_int_x86_avx512fp16_mask_cvt_sh2sd_round_r:511; CHECK: # %bb.0:512; CHECK-NEXT: kmovd %edi, %k1513; CHECK-NEXT: vcvtsh2sd {sae}, %xmm1, %xmm0, %xmm2 {%k1}514; CHECK-NEXT: vmovaps %xmm2, %xmm0515; CHECK-NEXT: retq516 %res = call <2 x double> @llvm.x86.avx512fp16.mask.vcvtsh2sd.round(<2 x double> %x0, <8 x half> %x1, <2 x double> %x2, i8 %x3, i32 8)517 ret <2 x double> %res518}519 520define <2 x double> @test_int_x86_avx512fp16_mask_cvt_sh2sd_round_nomask(<2 x double> %x0, <8 x half> %x1, <2 x double> %x2) {521; CHECK-LABEL: test_int_x86_avx512fp16_mask_cvt_sh2sd_round_nomask:522; CHECK: # %bb.0:523; CHECK-NEXT: vcvtsh2sd %xmm1, %xmm0, %xmm0524; CHECK-NEXT: retq525 %res = call <2 x double> @llvm.x86.avx512fp16.mask.vcvtsh2sd.round(<2 x double> %x0, <8 x half> %x1, <2 x double> %x2, i8 -1, i32 4)526 ret <2 x double> %res527}528 529define <2 x double> @test_int_x86_avx512fp16_mask_cvt_sh2sd_round_z(<2 x double> %x0, <8 x half> %x1, i8 %x2) {530; CHECK-LABEL: test_int_x86_avx512fp16_mask_cvt_sh2sd_round_z:531; CHECK: # %bb.0:532; CHECK-NEXT: kmovd %edi, %k1533; CHECK-NEXT: vcvtsh2sd %xmm1, %xmm0, %xmm0 {%k1} {z}534; CHECK-NEXT: retq535 %res = call <2 x double> @llvm.x86.avx512fp16.mask.vcvtsh2sd.round(<2 x double> %x0, <8 x half> %x1, <2 x double> zeroinitializer, i8 %x2, i32 4)536 ret <2 x double> %res537}538 539declare <16 x float> @llvm.x86.avx512fp16.mask.vcvtph2psx.512(<16 x half>, <16 x float>, i16, i32)540 541define <16 x float> @test_int_x86_avx512_cvt_ph2psx_512(<16 x half> %x0) {542; CHECK-LABEL: test_int_x86_avx512_cvt_ph2psx_512:543; CHECK: # %bb.0:544; CHECK-NEXT: vcvtph2psx %ymm0, %zmm0545; CHECK-NEXT: retq546 %res = call <16 x float> @llvm.x86.avx512fp16.mask.vcvtph2psx.512(<16 x half> %x0, <16 x float> undef, i16 -1, i32 4)547 ret <16 x float> %res548}549 550define <16 x float> @test_int_x86_avx512_mask_cvt_ph2psx_512(<16 x half> %x0, <16 x float> %x1, i16 %x2) {551; CHECK-LABEL: test_int_x86_avx512_mask_cvt_ph2psx_512:552; CHECK: # %bb.0:553; CHECK-NEXT: kmovd %edi, %k1554; CHECK-NEXT: vcvtph2psx %ymm0, %zmm1 {%k1}555; CHECK-NEXT: vmovaps %zmm1, %zmm0556; CHECK-NEXT: retq557 %res = call <16 x float> @llvm.x86.avx512fp16.mask.vcvtph2psx.512(<16 x half> %x0, <16 x float> %x1, i16 %x2, i32 4)558 ret <16 x float> %res559}560 561define <16 x float> @test_int_x86_avx512_maskz_cvt_ph2psx_512(<16 x half> %x0, i16 %x2) {562; CHECK-LABEL: test_int_x86_avx512_maskz_cvt_ph2psx_512:563; CHECK: # %bb.0:564; CHECK-NEXT: kmovd %edi, %k1565; CHECK-NEXT: vcvtph2psx %ymm0, %zmm0 {%k1} {z}566; CHECK-NEXT: retq567 %res = call <16 x float> @llvm.x86.avx512fp16.mask.vcvtph2psx.512(<16 x half> %x0, <16 x float> zeroinitializer, i16 %x2, i32 4)568 ret <16 x float> %res569}570 571define <16 x float> @test_int_x86_avx512_cvt_ph2psx_512r(<16 x half> %x0) {572; CHECK-LABEL: test_int_x86_avx512_cvt_ph2psx_512r:573; CHECK: # %bb.0:574; CHECK-NEXT: vcvtph2psx {sae}, %ymm0, %zmm0575; CHECK-NEXT: retq576 %res = call <16 x float> @llvm.x86.avx512fp16.mask.vcvtph2psx.512(<16 x half> %x0, <16 x float> undef, i16 -1, i32 8)577 ret <16 x float> %res578}579 580define <16 x float> @test_int_x86_avx512_mask_cvt_ph2psx_512r(<16 x half> %x0, <16 x float> %x1, i16 %x2) {581; CHECK-LABEL: test_int_x86_avx512_mask_cvt_ph2psx_512r:582; CHECK: # %bb.0:583; CHECK-NEXT: kmovd %edi, %k1584; CHECK-NEXT: vcvtph2psx {sae}, %ymm0, %zmm1 {%k1}585; CHECK-NEXT: vmovaps %zmm1, %zmm0586; CHECK-NEXT: retq587 %res = call <16 x float> @llvm.x86.avx512fp16.mask.vcvtph2psx.512(<16 x half> %x0, <16 x float> %x1, i16 %x2, i32 8)588 ret <16 x float> %res589}590 591define <16 x float> @test_int_x86_avx512_maskz_cvt_ph2psx_512r(<16 x half> %x0, i16 %x2) {592; CHECK-LABEL: test_int_x86_avx512_maskz_cvt_ph2psx_512r:593; CHECK: # %bb.0:594; CHECK-NEXT: kmovd %edi, %k1595; CHECK-NEXT: vcvtph2psx {sae}, %ymm0, %zmm0 {%k1} {z}596; CHECK-NEXT: retq597 %res = call <16 x float> @llvm.x86.avx512fp16.mask.vcvtph2psx.512(<16 x half> %x0, <16 x float> zeroinitializer, i16 %x2, i32 8)598 ret <16 x float> %res599}600 601declare <16 x half> @llvm.x86.avx512fp16.mask.vcvtps2phx.512(<16 x float>, <16 x half>, i16, i32)602 603define <16 x half> @test_int_x86_avx512_cvt_ps2phx_512(<16 x float> %x0) {604; CHECK-LABEL: test_int_x86_avx512_cvt_ps2phx_512:605; CHECK: # %bb.0:606; CHECK-NEXT: vcvtps2phx %zmm0, %ymm0607; CHECK-NEXT: retq608 %res = call <16 x half> @llvm.x86.avx512fp16.mask.vcvtps2phx.512(<16 x float> %x0, <16 x half> undef, i16 -1, i32 4)609 ret <16 x half> %res610}611 612define <16 x half> @test_int_x86_avx512_mask_cvt_ps2phx_512(<16 x float> %x0, <16 x half> %x1, i16 %x2) {613; CHECK-LABEL: test_int_x86_avx512_mask_cvt_ps2phx_512:614; CHECK: # %bb.0:615; CHECK-NEXT: kmovd %edi, %k1616; CHECK-NEXT: vcvtps2phx %zmm0, %ymm1 {%k1}617; CHECK-NEXT: vmovaps %ymm1, %ymm0618; CHECK-NEXT: retq619 %res = call <16 x half> @llvm.x86.avx512fp16.mask.vcvtps2phx.512(<16 x float> %x0, <16 x half> %x1, i16 %x2, i32 4)620 ret <16 x half> %res621}622 623define <16 x half> @test_int_x86_avx512_maskz_cvt_ps2phx_512(<16 x float> %x0, i16 %x2) {624; CHECK-LABEL: test_int_x86_avx512_maskz_cvt_ps2phx_512:625; CHECK: # %bb.0:626; CHECK-NEXT: kmovd %edi, %k1627; CHECK-NEXT: vcvtps2phx %zmm0, %ymm0 {%k1} {z}628; CHECK-NEXT: retq629 %res = call <16 x half> @llvm.x86.avx512fp16.mask.vcvtps2phx.512(<16 x float> %x0, <16 x half> zeroinitializer, i16 %x2, i32 4)630 ret <16 x half> %res631}632 633define <16 x half> @test_int_x86_avx512_mask_cvt_ps2phx_512r(<16 x float> %x0, <16 x half> %x1, i16 %x2) {634; CHECK-LABEL: test_int_x86_avx512_mask_cvt_ps2phx_512r:635; CHECK: # %bb.0:636; CHECK-NEXT: kmovd %edi, %k1637; CHECK-NEXT: vcvtps2phx {rd-sae}, %zmm0, %ymm1 {%k1}638; CHECK-NEXT: vcvtps2phx {ru-sae}, %zmm0, %ymm0639; CHECK-NEXT: vaddph %ymm0, %ymm1, %ymm0640; CHECK-NEXT: retq641 %res = call <16 x half> @llvm.x86.avx512fp16.mask.vcvtps2phx.512(<16 x float> %x0, <16 x half> %x1, i16 %x2, i32 9)642 %res1 = call <16 x half> @llvm.x86.avx512fp16.mask.vcvtps2phx.512(<16 x float> %x0, <16 x half> %x1, i16 -1, i32 10)643 %res2 = fadd <16 x half> %res, %res1644 ret <16 x half> %res2645}646