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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 < %s | FileCheck %s3 4; Verify that we're folding the load into the math instruction.5; This pattern is generated out of the simplest intrinsics usage:6; _mm_add_ss(a, _mm_load_ss(b));7 8define <8 x half> @addsh(<8 x half> %va, ptr %pb) {9; CHECK-LABEL: addsh:10; CHECK: # %bb.0:11; CHECK-NEXT: vaddsh (%rdi), %xmm0, %xmm012; CHECK-NEXT: retq13 %a = extractelement <8 x half> %va, i32 014 %b = load half, ptr %pb15 %r = fadd half %a, %b16 %vr = insertelement <8 x half> %va, half %r, i32 017 ret <8 x half> %vr18}19 20define <8 x half> @subsh(<8 x half> %va, ptr %pb) {21; CHECK-LABEL: subsh:22; CHECK: # %bb.0:23; CHECK-NEXT: vsubsh (%rdi), %xmm0, %xmm024; CHECK-NEXT: retq25 %a = extractelement <8 x half> %va, i32 026 %b = load half, ptr %pb27 %r = fsub half %a, %b28 %vr = insertelement <8 x half> %va, half %r, i32 029 ret <8 x half> %vr30}31 32define <8 x half> @mulsh(<8 x half> %va, ptr %pb) {33; CHECK-LABEL: mulsh:34; CHECK: # %bb.0:35; CHECK-NEXT: vmulsh (%rdi), %xmm0, %xmm036; CHECK-NEXT: retq37 %a = extractelement <8 x half> %va, i32 038 %b = load half, ptr %pb39 %r = fmul half %a, %b40 %vr = insertelement <8 x half> %va, half %r, i32 041 ret <8 x half> %vr42}43 44define <8 x half> @divsh(<8 x half> %va, ptr %pb) {45; CHECK-LABEL: divsh:46; CHECK: # %bb.0:47; CHECK-NEXT: vdivsh (%rdi), %xmm0, %xmm048; CHECK-NEXT: retq49 %a = extractelement <8 x half> %va, i32 050 %b = load half, ptr %pb51 %r = fdiv half %a, %b52 %vr = insertelement <8 x half> %va, half %r, i32 053 ret <8 x half> %vr54}55 56define <8 x half> @minsh(<8 x half> %va, ptr %pb) {57; CHECK-LABEL: minsh:58; CHECK: # %bb.0:59; CHECK-NEXT: vminsh (%rdi), %xmm0, %xmm160; CHECK-NEXT: vmovsh {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3,4,5,6,7]61; CHECK-NEXT: retq62 %a = extractelement <8 x half> %va, i32 063 %b = load half, ptr %pb64 %r = call nnan half @llvm.minnum.f16(half %a, half %b) readnone65 %vr = insertelement <8 x half> %va, half %r, i32 066 ret <8 x half> %vr67}68 69define <8 x half> @maxsh(<8 x half> %va, ptr %pb) {70; CHECK-LABEL: maxsh:71; CHECK: # %bb.0:72; CHECK-NEXT: vminsh (%rdi), %xmm0, %xmm173; CHECK-NEXT: vmovsh {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3,4,5,6,7]74; CHECK-NEXT: retq75 %a = extractelement <8 x half> %va, i32 076 %b = load half, ptr %pb77 %r = call nnan half @llvm.minnum.f16(half %a, half %b) readnone78 %vr = insertelement <8 x half> %va, half %r, i32 079 ret <8 x half> %vr80}81 82declare half @llvm.minnum.f16(half, half)83declare half @llvm.maxnum.f16(half, half)84