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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl < %s | FileCheck %s3 4; Test cases derived from float/double tests in fp-logic.ll5 6; 1 FP operand, 1 int operand, int result7 8define i16 @f1(half %x, i16 %y) {9; CHECK-LABEL: f1:10; CHECK: # %bb.0:11; CHECK-NEXT: vmovw %xmm0, %eax12; CHECK-NEXT: andl %edi, %eax13; CHECK-NEXT: # kill: def $ax killed $ax killed $eax14; CHECK-NEXT: retq15 %bc1 = bitcast half %x to i1616 %and = and i16 %bc1, %y17 ret i16 %and18}19 20; Swap operands of the logic op.21 22define i16 @f2(half %x, i16 %y) {23; CHECK-LABEL: f2:24; CHECK: # %bb.0:25; CHECK-NEXT: vmovw %xmm0, %eax26; CHECK-NEXT: andl %edi, %eax27; CHECK-NEXT: # kill: def $ax killed $ax killed $eax28; CHECK-NEXT: retq29 %bc1 = bitcast half %x to i1630 %and = and i16 %y, %bc131 ret i16 %and32}33 34; 1 FP operand, 1 constant operand, int result35 36define i16 @f3(half %x) {37; CHECK-LABEL: f3:38; CHECK: # %bb.0:39; CHECK-NEXT: vmovw %xmm0, %eax40; CHECK-NEXT: andl $1, %eax41; CHECK-NEXT: # kill: def $ax killed $ax killed $eax42; CHECK-NEXT: retq43 %bc1 = bitcast half %x to i1644 %and = and i16 %bc1, 145 ret i16 %and46}47 48; Swap operands of the logic op.49 50define i16 @f4(half %x) {51; CHECK-LABEL: f4:52; CHECK: # %bb.0:53; CHECK-NEXT: vmovw %xmm0, %eax54; CHECK-NEXT: andl $2, %eax55; CHECK-NEXT: # kill: def $ax killed $ax killed $eax56; CHECK-NEXT: retq57 %bc1 = bitcast half %x to i1658 %and = and i16 2, %bc159 ret i16 %and60}61 62; 1 FP operand, 1 integer operand, FP result63 64define half @f5(half %x, i16 %y) {65; CHECK-LABEL: f5:66; CHECK: # %bb.0:67; CHECK-NEXT: vmovw %edi, %xmm168; CHECK-NEXT: vandps %xmm1, %xmm0, %xmm069; CHECK-NEXT: retq70 %bc1 = bitcast half %x to i1671 %and = and i16 %bc1, %y72 %bc2 = bitcast i16 %and to half73 ret half %bc274}75 76; Swap operands of the logic op.77 78define half @f6(half %x, i16 %y) {79; CHECK-LABEL: f6:80; CHECK: # %bb.0:81; CHECK-NEXT: vmovw %edi, %xmm182; CHECK-NEXT: vandps %xmm1, %xmm0, %xmm083; CHECK-NEXT: retq84 %bc1 = bitcast half %x to i1685 %and = and i16 %y, %bc186 %bc2 = bitcast i16 %and to half87 ret half %bc288}89 90; 1 FP operand, 1 constant operand, FP result91 92define half @f7(half %x) {93; CHECK-LABEL: f7:94; CHECK: # %bb.0:95; CHECK-NEXT: vmovsh {{.*#+}} xmm1 = [1.7881E-7,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0]96; CHECK-NEXT: vandps %xmm1, %xmm0, %xmm097; CHECK-NEXT: retq98 %bc1 = bitcast half %x to i1699 %and = and i16 %bc1, 3100 %bc2 = bitcast i16 %and to half101 ret half %bc2102}103 104; Swap operands of the logic op.105 106define half @f8(half %x) {107; CHECK-LABEL: f8:108; CHECK: # %bb.0:109; CHECK-NEXT: vmovsh {{.*#+}} xmm1 = [2.3842E-7,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0]110; CHECK-NEXT: vandps %xmm1, %xmm0, %xmm0111; CHECK-NEXT: retq112 %bc1 = bitcast half %x to i16113 %and = and i16 4, %bc1114 %bc2 = bitcast i16 %and to half115 ret half %bc2116}117 118; 2 FP operands, int result119 120define i16 @f9(half %x, half %y) {121; CHECK-LABEL: f9:122; CHECK: # %bb.0:123; CHECK-NEXT: vandps %xmm1, %xmm0, %xmm0124; CHECK-NEXT: vmovw %xmm0, %eax125; CHECK-NEXT: # kill: def $ax killed $ax killed $eax126; CHECK-NEXT: retq127 %bc1 = bitcast half %x to i16128 %bc2 = bitcast half %y to i16129 %and = and i16 %bc1, %bc2130 ret i16 %and131}132 133; 2 FP operands, FP result134 135define half @f10(half %x, half %y) {136; CHECK-LABEL: f10:137; CHECK: # %bb.0:138; CHECK-NEXT: vandps %xmm1, %xmm0, %xmm0139; CHECK-NEXT: retq140 %bc1 = bitcast half %x to i16141 %bc2 = bitcast half %y to i16142 %and = and i16 %bc1, %bc2143 %bc3 = bitcast i16 %and to half144 ret half %bc3145}146 147define half @or(half %x, half %y) {148; CHECK-LABEL: or:149; CHECK: # %bb.0:150; CHECK-NEXT: vorps %xmm1, %xmm0, %xmm0151; CHECK-NEXT: retq152 %bc1 = bitcast half %x to i16153 %bc2 = bitcast half %y to i16154 %and = or i16 %bc1, %bc2155 %bc3 = bitcast i16 %and to half156 ret half %bc3157}158 159define half @xor(half %x, half %y) {160; CHECK-LABEL: xor:161; CHECK: # %bb.0:162; CHECK-NEXT: vxorps %xmm1, %xmm0, %xmm0163; CHECK-NEXT: retq164 %bc1 = bitcast half %x to i16165 %bc2 = bitcast half %y to i16166 %and = xor i16 %bc1, %bc2167 %bc3 = bitcast i16 %and to half168 ret half %bc3169}170 171define half @f7_or(half %x) {172; CHECK-LABEL: f7_or:173; CHECK: # %bb.0:174; CHECK-NEXT: vmovsh {{.*#+}} xmm1 = [1.7881E-7,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0]175; CHECK-NEXT: vorps %xmm1, %xmm0, %xmm0176; CHECK-NEXT: retq177 %bc1 = bitcast half %x to i16178 %and = or i16 %bc1, 3179 %bc2 = bitcast i16 %and to half180 ret half %bc2181}182 183define half @f7_xor(half %x) {184; CHECK-LABEL: f7_xor:185; CHECK: # %bb.0:186; CHECK-NEXT: vmovsh {{.*#+}} xmm1 = [1.7881E-7,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0]187; CHECK-NEXT: vxorps %xmm1, %xmm0, %xmm0188; CHECK-NEXT: retq189 %bc1 = bitcast half %x to i16190 %and = xor i16 %bc1, 3191 %bc2 = bitcast i16 %and to half192 ret half %bc2193}194 195; Grabbing the sign bit is a special case that could be handled196; by movmskps/movmskpd, but if we're not shifting it over, then197; a simple FP logic op is cheaper.198 199define half @movmsk(half %x) {200; CHECK-LABEL: movmsk:201; CHECK: # %bb.0:202; CHECK-NEXT: vmovsh {{.*#+}} xmm1 = [-0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0]203; CHECK-NEXT: vandps %xmm1, %xmm0, %xmm0204; CHECK-NEXT: retq205 %bc1 = bitcast half %x to i16206 %and = and i16 %bc1, 32768207 %bc2 = bitcast i16 %and to half208 ret half %bc2209}210 211define half @bitcast_fabs(half %x) {212; CHECK-LABEL: bitcast_fabs:213; CHECK: # %bb.0:214; CHECK-NEXT: vpbroadcastw {{.*#+}} xmm1 = [NaN,NaN,NaN,NaN,NaN,NaN,NaN,NaN]215; CHECK-NEXT: vpand %xmm1, %xmm0, %xmm0216; CHECK-NEXT: retq217 %bc1 = bitcast half %x to i16218 %and = and i16 %bc1, 32767219 %bc2 = bitcast i16 %and to half220 ret half %bc2221}222 223define half @bitcast_fneg(half %x) {224; CHECK-LABEL: bitcast_fneg:225; CHECK: # %bb.0:226; CHECK-NEXT: vpbroadcastw {{.*#+}} xmm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]227; CHECK-NEXT: vpxor %xmm1, %xmm0, %xmm0228; CHECK-NEXT: retq229 %bc1 = bitcast half %x to i16230 %xor = xor i16 %bc1, 32768231 %bc2 = bitcast i16 %xor to half232 ret half %bc2233}234 235define <8 x half> @bitcast_fabs_vec(<8 x half> %x) {236; CHECK-LABEL: bitcast_fabs_vec:237; CHECK: # %bb.0:238; CHECK-NEXT: vpbroadcastw {{.*#+}} xmm1 = [NaN,NaN,NaN,NaN,NaN,NaN,NaN,NaN]239; CHECK-NEXT: vpand %xmm1, %xmm0, %xmm0240; CHECK-NEXT: retq241 %bc1 = bitcast <8 x half> %x to <8 x i16>242 %and = and <8 x i16> %bc1, <i16 32767, i16 32767, i16 32767, i16 32767, i16 32767, i16 32767, i16 32767, i16 32767>243 %bc2 = bitcast <8 x i16> %and to <8 x half>244 ret <8 x half> %bc2245}246 247define <8 x half> @bitcast_fneg_vec(<8 x half> %x) {248; CHECK-LABEL: bitcast_fneg_vec:249; CHECK: # %bb.0:250; CHECK-NEXT: vpbroadcastw {{.*#+}} xmm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]251; CHECK-NEXT: vpxor %xmm1, %xmm0, %xmm0252; CHECK-NEXT: retq253 %bc1 = bitcast <8 x half> %x to <8 x i16>254 %xor = xor <8 x i16> %bc1, <i16 32768, i16 32768, i16 32768, i16 32768, i16 32768, i16 32768, i16 32768, i16 32768>255 %bc2 = bitcast <8 x i16> %xor to <8 x half>256 ret <8 x half> %bc2257}258 259define half @fadd_bitcast_fneg(half %x, half %y) {260; CHECK-LABEL: fadd_bitcast_fneg:261; CHECK: # %bb.0:262; CHECK-NEXT: vsubsh %xmm1, %xmm0, %xmm0263; CHECK-NEXT: retq264 %bc1 = bitcast half %y to i16265 %xor = xor i16 %bc1, 32768266 %bc2 = bitcast i16 %xor to half267 %fadd = fadd half %x, %bc2268 ret half %fadd269}270 271define half @fsub_bitcast_fneg(half %x, half %y) {272; CHECK-LABEL: fsub_bitcast_fneg:273; CHECK: # %bb.0:274; CHECK-NEXT: vmovsh {{.*#+}} xmm2 = [NaN,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0,0.0E+0]275; CHECK-NEXT: vxorps %xmm2, %xmm1, %xmm1276; CHECK-NEXT: vsubsh %xmm1, %xmm0, %xmm0277; CHECK-NEXT: retq278 %bc1 = bitcast half %y to i16279 %xor = xor i16 %bc1, 32767280 %bc2 = bitcast i16 %xor to half281 %fsub = fsub half %x, %bc2282 ret half %fsub283}284 285define half @nabs(half %a) {286; CHECK-LABEL: nabs:287; CHECK: # %bb.0:288; CHECK-NEXT: vpbroadcastw {{.*#+}} xmm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]289; CHECK-NEXT: vpor %xmm1, %xmm0, %xmm0290; CHECK-NEXT: retq291 %conv = bitcast half %a to i16292 %and = or i16 %conv, -32768293 %conv1 = bitcast i16 %and to half294 ret half %conv1295}296 297define <8 x half> @nabsv8f16(<8 x half> %a) {298; CHECK-LABEL: nabsv8f16:299; CHECK: # %bb.0:300; CHECK-NEXT: vpbroadcastw {{.*#+}} xmm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]301; CHECK-NEXT: vpor %xmm1, %xmm0, %xmm0302; CHECK-NEXT: retq303 %conv = bitcast <8 x half> %a to <8 x i16>304 %and = or <8 x i16> %conv, <i16 -32768, i16 -32768, i16 -32768, i16 -32768, i16 -32768, i16 -32768, i16 -32768, i16 -32768>305 %conv1 = bitcast <8 x i16> %and to <8 x half>306 ret <8 x half> %conv1307}308 309define <8 x half> @fadd_bitcast_fneg_vec(<8 x half> %x, <8 x half> %y) {310; CHECK-LABEL: fadd_bitcast_fneg_vec:311; CHECK: # %bb.0:312; CHECK-NEXT: vsubph %xmm1, %xmm0, %xmm0313; CHECK-NEXT: retq314 %bc1 = bitcast <8 x half> %y to <8 x i16>315 %xor = xor <8 x i16> %bc1, <i16 32768, i16 32768, i16 32768, i16 32768, i16 32768, i16 32768, i16 32768, i16 32768>316 %bc2 = bitcast <8 x i16> %xor to <8 x half>317 %fadd = fadd <8 x half> %x, %bc2318 ret <8 x half> %fadd319}320 321define <8 x half> @fadd_bitcast_fneg_vec_undef_elts(<8 x half> %x, <8 x half> %y) {322; CHECK-LABEL: fadd_bitcast_fneg_vec_undef_elts:323; CHECK: # %bb.0:324; CHECK-NEXT: vsubph %xmm1, %xmm0, %xmm0325; CHECK-NEXT: retq326 %bc1 = bitcast <8 x half> %y to <8 x i16>327 %xor = xor <8 x i16> %bc1, <i16 32768, i16 32768, i16 32768, i16 32768, i16 32768, i16 32768, i16 undef, i16 32768>328 %bc2 = bitcast <8 x i16> %xor to <8 x half>329 %fadd = fadd <8 x half> %x, %bc2330 ret <8 x half> %fadd331}332 333define <8 x half> @fsub_bitcast_fneg_vec(<8 x half> %x, <8 x half> %y) {334; CHECK-LABEL: fsub_bitcast_fneg_vec:335; CHECK: # %bb.0:336; CHECK-NEXT: vaddph %xmm1, %xmm0, %xmm0337; CHECK-NEXT: retq338 %bc1 = bitcast <8 x half> %y to <8 x i16>339 %xor = xor <8 x i16> %bc1, <i16 32768, i16 32768, i16 32768, i16 32768, i16 32768, i16 32768, i16 32768, i16 32768>340 %bc2 = bitcast <8 x i16> %xor to <8 x half>341 %fsub = fsub <8 x half> %x, %bc2342 ret <8 x half> %fsub343}344 345define <8 x half> @fsub_bitcast_fneg_vec_undef_elts(<8 x half> %x, <8 x half> %y) {346; CHECK-LABEL: fsub_bitcast_fneg_vec_undef_elts:347; CHECK: # %bb.0:348; CHECK-NEXT: vaddph %xmm1, %xmm0, %xmm0349; CHECK-NEXT: retq350 %bc1 = bitcast <8 x half> %y to <8 x i16>351 %xor = xor <8 x i16> %bc1, <i16 undef, i16 32768, i16 32768, i16 32768, i16 32768, i16 32768, i16 32768, i16 undef>352 %bc2 = bitcast <8 x i16> %xor to <8 x half>353 %fsub = fsub <8 x half> %x, %bc2354 ret <8 x half> %fsub355}356 357define <8 x half> @fadd_bitcast_fneg_vec_width(<8 x half> %x, <8 x half> %y) {358; CHECK-LABEL: fadd_bitcast_fneg_vec_width:359; CHECK: # %bb.0:360; CHECK-NEXT: vpxorq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm1361; CHECK-NEXT: vaddph %xmm1, %xmm0, %xmm0362; CHECK-NEXT: retq363 %bc1 = bitcast <8 x half> %y to <2 x i64>364 %xor = xor <2 x i64> %bc1, <i64 -9223231297218904064, i64 -9223231297218904064>365 %bc2 = bitcast <2 x i64> %xor to <8 x half>366 %fadd = fadd <8 x half> %x, %bc2367 ret <8 x half> %fadd368}369 370define <8 x half> @fsub_bitcast_fneg_vec_width(<8 x half> %x, <8 x half> %y) {371; CHECK-LABEL: fsub_bitcast_fneg_vec_width:372; CHECK: # %bb.0:373; CHECK-NEXT: vpxorq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm1374; CHECK-NEXT: vsubph %xmm1, %xmm0, %xmm0375; CHECK-NEXT: retq376 %bc1 = bitcast <8 x half> %y to <2 x i64>377 %xor = xor <2 x i64> %bc1, <i64 -9223231297218904064, i64 -9223231297218904064>378 %bc2 = bitcast <2 x i64> %xor to <8 x half>379 %fsub = fsub <8 x half> %x, %bc2380 ret <8 x half> %fsub381}382