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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 | FileCheck %s3 4declare i32 @llvm.x86.avx512fp16.vcomi.sh(<8 x half>, <8 x half>, i32, i32)5 6define i32 @test_x86_avx512fp16_ucomi_sh_lt(<8 x half> %a0, <8 x half> %a1) {7; CHECK-LABEL: test_x86_avx512fp16_ucomi_sh_lt:8; CHECK: # %bb.0:9; CHECK-NEXT: vcmpngesh %xmm1, %xmm0, %k010; CHECK-NEXT: kmovw %k0, %eax11; CHECK-NEXT: retq12 %res = call i32 @llvm.x86.avx512fp16.vcomi.sh(<8 x half> %a0, <8 x half> %a1, i32 9, i32 4)13 ret i32 %res14}15 16declare <32 x half> @llvm.x86.avx512fp16.sqrt.ph.512(<32 x half>, i32) nounwind readnone17 18define <32 x half> @test_sqrt_ph_512(<32 x half> %a0) {19; CHECK-LABEL: test_sqrt_ph_512:20; CHECK: # %bb.0:21; CHECK-NEXT: vsqrtph %zmm0, %zmm022; CHECK-NEXT: retq23 %1 = call <32 x half> @llvm.sqrt.v32f16(<32 x half> %a0)24 ret <32 x half> %125}26 27define <32 x half> @test_sqrt_ph_512_fast(<32 x half> %a0, <32 x half> %a1) {28; CHECK-LABEL: test_sqrt_ph_512_fast:29; CHECK: # %bb.0:30; CHECK-NEXT: vrsqrtph %zmm0, %zmm031; CHECK-NEXT: vmulph %zmm0, %zmm1, %zmm032; CHECK-NEXT: retq33 %1 = call fast <32 x half> @llvm.sqrt.v32f16(<32 x half> %a0)34 %2 = fdiv fast <32 x half> %a1, %135 ret <32 x half> %236}37 38define <32 x half> @test_sqrt_ph_512_fast_estimate_attribute(<32 x half> %a0, <32 x half> %a1) "reciprocal-estimates"="vec-sqrt" {39; CHECK-LABEL: test_sqrt_ph_512_fast_estimate_attribute:40; CHECK: # %bb.0:41; CHECK-NEXT: vrsqrtph %zmm0, %zmm042; CHECK-NEXT: vmulph %zmm0, %zmm1, %zmm043; CHECK-NEXT: retq44 %1 = call fast <32 x half> @llvm.sqrt.v32f16(<32 x half> %a0)45 %2 = fdiv fast <32 x half> %a1, %146 ret <32 x half> %247}48 49define <32 x half> @test_sqrt_ph_512_fast_estimate_attribute_2(<32 x half> %a0, <32 x half> %a1) "reciprocal-estimates"="vec-sqrth:1" {50; CHECK-LABEL: test_sqrt_ph_512_fast_estimate_attribute_2:51; CHECK: # %bb.0:52; CHECK-NEXT: vrsqrtph %zmm0, %zmm253; CHECK-NEXT: vmulph %zmm2, %zmm0, %zmm054; CHECK-NEXT: vfmadd213ph {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to32}, %zmm2, %zmm055; CHECK-NEXT: vmulph {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to32}, %zmm2, %zmm256; CHECK-NEXT: vmulph %zmm2, %zmm1, %zmm157; CHECK-NEXT: vmulph %zmm0, %zmm1, %zmm058; CHECK-NEXT: retq59 %1 = call fast <32 x half> @llvm.sqrt.v32f16(<32 x half> %a0)60 %2 = fdiv fast <32 x half> %a1, %161 ret <32 x half> %262}63 64define <32 x half> @test_mask_sqrt_ph_512(<32 x half> %a0, <32 x half> %passthru, i32 %mask) {65; CHECK-LABEL: test_mask_sqrt_ph_512:66; CHECK: # %bb.0:67; CHECK-NEXT: kmovd %edi, %k168; CHECK-NEXT: vsqrtph %zmm0, %zmm1 {%k1}69; CHECK-NEXT: vmovaps %zmm1, %zmm070; CHECK-NEXT: retq71 %1 = call <32 x half> @llvm.sqrt.v32f16(<32 x half> %a0)72 %2 = bitcast i32 %mask to <32 x i1>73 %3 = select <32 x i1> %2, <32 x half> %1, <32 x half> %passthru74 ret <32 x half> %375}76 77define <32 x half> @test_maskz_sqrt_ph_512(<32 x half> %a0, i32 %mask) {78; CHECK-LABEL: test_maskz_sqrt_ph_512:79; CHECK: # %bb.0:80; CHECK-NEXT: kmovd %edi, %k181; CHECK-NEXT: vsqrtph %zmm0, %zmm0 {%k1} {z}82; CHECK-NEXT: retq83 %1 = call <32 x half> @llvm.sqrt.v32f16(<32 x half> %a0)84 %2 = bitcast i32 %mask to <32 x i1>85 %3 = select <32 x i1> %2, <32 x half> %1, <32 x half> zeroinitializer86 ret <32 x half> %387}88 89declare <32 x half> @llvm.sqrt.v32f16(<32 x half>)90 91define <32 x half> @test_sqrt_round_ph_512(<32 x half> %a0) {92; CHECK-LABEL: test_sqrt_round_ph_512:93; CHECK: # %bb.0:94; CHECK-NEXT: vsqrtph {rz-sae}, %zmm0, %zmm095; CHECK-NEXT: retq96 %1 = call <32 x half> @llvm.x86.avx512fp16.sqrt.ph.512(<32 x half> %a0, i32 11)97 ret <32 x half> %198}99 100define <32 x half> @test_mask_sqrt_round_ph_512(<32 x half> %a0, <32 x half> %passthru, i32 %mask) {101; CHECK-LABEL: test_mask_sqrt_round_ph_512:102; CHECK: # %bb.0:103; CHECK-NEXT: kmovd %edi, %k1104; CHECK-NEXT: vsqrtph {rz-sae}, %zmm0, %zmm1 {%k1}105; CHECK-NEXT: vmovaps %zmm1, %zmm0106; CHECK-NEXT: retq107 %1 = call <32 x half> @llvm.x86.avx512fp16.sqrt.ph.512(<32 x half> %a0, i32 11)108 %2 = bitcast i32 %mask to <32 x i1>109 %3 = select <32 x i1> %2, <32 x half> %1, <32 x half> %passthru110 ret <32 x half> %3111}112 113define <32 x half> @test_maskz_sqrt_round_ph_512(<32 x half> %a0, i32 %mask) {114; CHECK-LABEL: test_maskz_sqrt_round_ph_512:115; CHECK: # %bb.0:116; CHECK-NEXT: kmovd %edi, %k1117; CHECK-NEXT: vsqrtph {rz-sae}, %zmm0, %zmm0 {%k1} {z}118; CHECK-NEXT: retq119 %1 = call <32 x half> @llvm.x86.avx512fp16.sqrt.ph.512(<32 x half> %a0, i32 11)120 %2 = bitcast i32 %mask to <32 x i1>121 %3 = select <32 x i1> %2, <32 x half> %1, <32 x half> zeroinitializer122 ret <32 x half> %3123}124 125declare <8 x half> @llvm.x86.avx512fp16.mask.sqrt.sh(<8 x half>, <8 x half>, <8 x half>, i8, i32) nounwind readnone126 127define <8 x half> @test_sqrt_sh(<8 x half> %a0, <8 x half> %a1, <8 x half> %a2, i8 %mask) {128; CHECK-LABEL: test_sqrt_sh:129; CHECK: # %bb.0:130; CHECK-NEXT: kmovd %edi, %k1131; CHECK-NEXT: vsqrtsh %xmm1, %xmm0, %xmm2 {%k1}132; CHECK-NEXT: vmovaps %xmm2, %xmm0133; CHECK-NEXT: retq134 %res = call <8 x half> @llvm.x86.avx512fp16.mask.sqrt.sh(<8 x half> %a0, <8 x half> %a1, <8 x half> %a2, i8 %mask, i32 4)135 ret <8 x half> %res136}137 138define half @test_sqrt_sh2(half %a0, half %a1) {139; CHECK-LABEL: test_sqrt_sh2:140; CHECK: # %bb.0:141; CHECK-NEXT: vrsqrtsh %xmm0, %xmm0, %xmm0142; CHECK-NEXT: vmulsh %xmm0, %xmm1, %xmm0143; CHECK-NEXT: retq144 %1 = call fast half @llvm.sqrt.f16(half %a0)145 %2 = fdiv fast half %a1, %1146 ret half %2147}148 149define half @test_sqrt_sh3(half %a0, half %a1) {150; CHECK-LABEL: test_sqrt_sh3:151; CHECK: # %bb.0:152; CHECK-NEXT: vsqrtsh %xmm0, %xmm0, %xmm0153; CHECK-NEXT: retq154 %1 = call fast half @llvm.sqrt.f16(half %a0)155 ret half %1156}157 158declare half @llvm.sqrt.f16(half)159 160define <8 x half> @test_sqrt_sh_r(<8 x half> %a0, <8 x half> %a1, <8 x half> %a2, i8 %mask) {161; CHECK-LABEL: test_sqrt_sh_r:162; CHECK: # %bb.0:163; CHECK-NEXT: kmovd %edi, %k1164; CHECK-NEXT: vsqrtsh {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1}165; CHECK-NEXT: vmovaps %xmm2, %xmm0166; CHECK-NEXT: retq167 %res = call <8 x half> @llvm.x86.avx512fp16.mask.sqrt.sh(<8 x half> %a0, <8 x half> %a1, <8 x half> %a2, i8 %mask, i32 10)168 ret <8 x half> %res169}170 171define <8 x half> @test_sqrt_sh_nomask(<8 x half> %a0, <8 x half> %a1, <8 x half> %a2) {172; CHECK-LABEL: test_sqrt_sh_nomask:173; CHECK: # %bb.0:174; CHECK-NEXT: vsqrtsh %xmm1, %xmm0, %xmm0175; CHECK-NEXT: retq176 %res = call <8 x half> @llvm.x86.avx512fp16.mask.sqrt.sh(<8 x half> %a0, <8 x half> %a1, <8 x half> %a2, i8 -1, i32 4)177 ret <8 x half> %res178}179 180define <8 x half> @test_sqrt_sh_z(<8 x half> %a0, <8 x half> %a1, <8 x half> %a2, i8 %mask) {181; CHECK-LABEL: test_sqrt_sh_z:182; CHECK: # %bb.0:183; CHECK-NEXT: kmovd %edi, %k1184; CHECK-NEXT: vsqrtsh {ru-sae}, %xmm1, %xmm0, %xmm0 {%k1} {z}185; CHECK-NEXT: retq186 %res = call <8 x half> @llvm.x86.avx512fp16.mask.sqrt.sh(<8 x half> %a0, <8 x half> %a1, <8 x half> zeroinitializer, i8 %mask, i32 10)187 ret <8 x half> %res188}189 190declare <32 x half> @llvm.x86.avx512fp16.mask.rsqrt.ph.512(<32 x half>, <32 x half>, i32)191declare <8 x half> @llvm.x86.avx512fp16.mask.rsqrt.sh(<8 x half>, <8 x half>, <8 x half>, i8)192 193define <32 x half> @test_rsqrt_ph_512(<32 x half> %a0) {194; CHECK-LABEL: test_rsqrt_ph_512:195; CHECK: # %bb.0:196; CHECK-NEXT: vrsqrtph %zmm0, %zmm0197; CHECK-NEXT: retq198 %res = call <32 x half> @llvm.x86.avx512fp16.mask.rsqrt.ph.512(<32 x half> %a0, <32 x half> zeroinitializer, i32 -1)199 ret <32 x half> %res200}201 202define <8 x half> @test_rsqrt_sh(<8 x half> %a0, <8 x half> %a1, <8 x half> %a2) {203; CHECK-LABEL: test_rsqrt_sh:204; CHECK: # %bb.0:205; CHECK-NEXT: vrsqrtsh %xmm0, %xmm0, %xmm0206; CHECK-NEXT: retq207 %res = call <8 x half> @llvm.x86.avx512fp16.mask.rsqrt.sh(<8 x half> %a0, <8 x half> %a0, <8 x half> %a2, i8 -1)208 ret <8 x half> %res209}210 211define <8 x half> @test_rsqrt_sh_load(<8 x half> %a0, ptr %a1ptr) {212; CHECK-LABEL: test_rsqrt_sh_load:213; CHECK: # %bb.0:214; CHECK-NEXT: vrsqrtsh (%rdi), %xmm0, %xmm0215; CHECK-NEXT: retq216 %a1 = load <8 x half>, ptr %a1ptr217 %res = call <8 x half> @llvm.x86.avx512fp16.mask.rsqrt.sh(<8 x half> %a0, <8 x half> %a1, <8 x half> undef, i8 -1)218 ret <8 x half> %res219}220 221define <8 x half> @test_rsqrt_sh_maskz(<8 x half> %a0, i8 %mask) {222; CHECK-LABEL: test_rsqrt_sh_maskz:223; CHECK: # %bb.0:224; CHECK-NEXT: kmovd %edi, %k1225; CHECK-NEXT: vrsqrtsh %xmm0, %xmm0, %xmm0 {%k1} {z}226; CHECK-NEXT: retq227 %res = call <8 x half> @llvm.x86.avx512fp16.mask.rsqrt.sh(<8 x half> %a0, <8 x half> %a0, <8 x half> zeroinitializer, i8 %mask)228 ret <8 x half> %res229}230 231define <8 x half> @test_rsqrt_sh_mask(<8 x half> %a0, <8 x half> %b0, <8 x half> %c0, i8 %mask) {232; CHECK-LABEL: test_rsqrt_sh_mask:233; CHECK: # %bb.0:234; CHECK-NEXT: kmovd %edi, %k1235; CHECK-NEXT: vrsqrtsh %xmm1, %xmm0, %xmm2 {%k1}236; CHECK-NEXT: vmovaps %xmm2, %xmm0237; CHECK-NEXT: retq238 %res = call <8 x half> @llvm.x86.avx512fp16.mask.rsqrt.sh(<8 x half> %a0, <8 x half> %b0, <8 x half> %c0, i8 %mask)239 ret <8 x half> %res240}241 242declare <32 x i1> @llvm.x86.avx512fp16.fpclass.ph.512(<32 x half>, i32)243 244define i32 @test_int_x86_avx512_fpclass_ph_512(<32 x half> %x0) {245; CHECK-LABEL: test_int_x86_avx512_fpclass_ph_512:246; CHECK: # %bb.0:247; CHECK-NEXT: vfpclassph $2, %zmm0, %k1 # k1 = isPositiveZero(zmm0)248; CHECK-NEXT: vfpclassph $4, %zmm0, %k0 {%k1} # k0 {%k1} = isNegativeZero(zmm0)249; CHECK-NEXT: kmovd %k0, %eax250; CHECK-NEXT: vzeroupper251; CHECK-NEXT: retq252 %res = call <32 x i1> @llvm.x86.avx512fp16.fpclass.ph.512(<32 x half> %x0, i32 4)253 %res1 = call <32 x i1> @llvm.x86.avx512fp16.fpclass.ph.512(<32 x half> %x0, i32 2)254 %1 = and <32 x i1> %res1, %res255 %2 = bitcast <32 x i1> %1 to i32256 ret i32 %2257}258 259declare i8 @llvm.x86.avx512fp16.mask.fpclass.sh(<8 x half>, i32, i8)260 261define i8 @test_int_x86_avx512_mask_fpclass_sh(<8 x half> %x0) {262; CHECK-LABEL: test_int_x86_avx512_mask_fpclass_sh:263; CHECK: # %bb.0:264; CHECK-NEXT: vfpclasssh $4, %xmm0, %k1 # k1 = isNegativeZero(xmm0)265; CHECK-NEXT: vfpclasssh $2, %xmm0, %k0 {%k1} # k0 {%k1} = isPositiveZero(xmm0)266; CHECK-NEXT: kmovd %k0, %eax267; CHECK-NEXT: # kill: def $al killed $al killed $eax268; CHECK-NEXT: retq269 %res = call i8 @llvm.x86.avx512fp16.mask.fpclass.sh(<8 x half> %x0, i32 2, i8 -1)270 %res1 = call i8 @llvm.x86.avx512fp16.mask.fpclass.sh(<8 x half> %x0, i32 4, i8 %res)271 ret i8 %res1272}273 274define i8 @test_int_x86_avx512_mask_fpclass_sh_load(ptr %x0ptr) {275; CHECK-LABEL: test_int_x86_avx512_mask_fpclass_sh_load:276; CHECK: # %bb.0:277; CHECK-NEXT: vfpclasssh $4, (%rdi), %k0 # k0 = isNegativeZero(mem)278; CHECK-NEXT: kmovd %k0, %eax279; CHECK-NEXT: # kill: def $al killed $al killed $eax280; CHECK-NEXT: retq281 %x0 = load <8 x half>, ptr %x0ptr282 %res = call i8 @llvm.x86.avx512fp16.mask.fpclass.sh(<8 x half> %x0, i32 4, i8 -1)283 ret i8 %res284}285 286declare <32 x half> @llvm.x86.avx512fp16.mask.rcp.ph.512(<32 x half>, <32 x half>, i32)287 288define <32 x half> @test_rcp_ph_512(<32 x half> %a0, <32 x half> %a1, i32 %mask) {289; CHECK-LABEL: test_rcp_ph_512:290; CHECK: # %bb.0:291; CHECK-NEXT: kmovd %edi, %k1292; CHECK-NEXT: vrcpph %zmm0, %zmm1 {%k1}293; CHECK-NEXT: vmovaps %zmm1, %zmm0294; CHECK-NEXT: retq295 %res = call <32 x half> @llvm.x86.avx512fp16.mask.rcp.ph.512(<32 x half> %a0, <32 x half> %a1, i32 %mask)296 ret <32 x half> %res297}298 299declare <8 x half> @llvm.x86.avx512fp16.mask.rcp.sh(<8 x half>, <8 x half>, <8 x half>, i8)300 301define <8 x half> @test_rcp_sh(<8 x half> %a0) {302; CHECK-LABEL: test_rcp_sh:303; CHECK: # %bb.0:304; CHECK-NEXT: vrcpsh %xmm0, %xmm0, %xmm0305; CHECK-NEXT: retq306 %res = call <8 x half> @llvm.x86.avx512fp16.mask.rcp.sh(<8 x half> %a0, <8 x half> %a0, <8 x half> zeroinitializer, i8 -1)307 ret <8 x half> %res308}309 310define <8 x half> @test_rcp_sh_load(<8 x half> %a0, ptr %a1ptr) {311; CHECK-LABEL: test_rcp_sh_load:312; CHECK: # %bb.0:313; CHECK-NEXT: vrcpsh (%rdi), %xmm0, %xmm0314; CHECK-NEXT: retq315 %a1 = load <8 x half>, ptr %a1ptr316 %res = call <8 x half> @llvm.x86.avx512fp16.mask.rcp.sh(<8 x half> %a0, <8 x half> %a1, <8 x half> zeroinitializer, i8 -1)317 ret <8 x half> %res318}319 320declare <32 x half> @llvm.x86.avx512fp16.mask.reduce.ph.512(<32 x half>, i32, <32 x half>, i32, i32)321 322define <32 x half>@test_int_x86_avx512_mask_reduce_ph_512(<32 x half> %x0, <32 x half> %x2, i32 %x3) {323; CHECK-LABEL: test_int_x86_avx512_mask_reduce_ph_512:324; CHECK: # %bb.0:325; CHECK-NEXT: kmovd %edi, %k1326; CHECK-NEXT: vreduceph $8, %zmm0, %zmm1 {%k1}327; CHECK-NEXT: vreduceph $4, {sae}, %zmm0, %zmm0328; CHECK-NEXT: vaddph %zmm0, %zmm1, %zmm0329; CHECK-NEXT: retq330 %res = call <32 x half> @llvm.x86.avx512fp16.mask.reduce.ph.512(<32 x half> %x0, i32 8, <32 x half> %x2, i32 %x3, i32 4)331 %res1 = call <32 x half> @llvm.x86.avx512fp16.mask.reduce.ph.512(<32 x half> %x0, i32 4, <32 x half> %x2, i32 -1, i32 8)332 %res2 = fadd <32 x half> %res, %res1333 ret <32 x half> %res2334}335 336declare <8 x half> @llvm.x86.avx512fp16.mask.reduce.sh(<8 x half>, <8 x half>,<8 x half>, i8, i32, i32)337 338define <8 x half>@test_int_x86_avx512_mask_reduce_sh(<8 x half> %x0, <8 x half> %x1, <8 x half> %x3, i8 %x4) {339; CHECK-LABEL: test_int_x86_avx512_mask_reduce_sh:340; CHECK: # %bb.0:341; CHECK-NEXT: kmovd %edi, %k1342; CHECK-NEXT: vreducesh $4, %xmm1, %xmm0, %xmm2 {%k1}343; CHECK-NEXT: vmovaps %xmm2, %xmm0344; CHECK-NEXT: retq345 %res = call <8 x half> @llvm.x86.avx512fp16.mask.reduce.sh(<8 x half> %x0, <8 x half> %x1, <8 x half> %x3, i8 %x4, i32 4, i32 4)346 ret <8 x half> %res347}348 349define <8 x half>@test_int_x86_avx512_mask_reduce_sh_nomask(<8 x half> %x0, <8 x half> %x1, <8 x half> %x3) {350; CHECK-LABEL: test_int_x86_avx512_mask_reduce_sh_nomask:351; CHECK: # %bb.0:352; CHECK-NEXT: vreducesh $4, {sae}, %xmm1, %xmm0, %xmm0353; CHECK-NEXT: retq354 %res = call <8 x half> @llvm.x86.avx512fp16.mask.reduce.sh(<8 x half> %x0, <8 x half> %x1, <8 x half> %x3, i8 -1, i32 4, i32 8)355 ret <8 x half> %res356}357 358declare <32 x half> @llvm.x86.avx512fp16.mask.rndscale.ph.512(<32 x half>, i32, <32 x half>, i32, i32)359 360define <32 x half>@test_int_x86_avx512_mask_rndscale_ph_512(<32 x half> %x0, <32 x half> %x2, i32 %x3) {361; CHECK-LABEL: test_int_x86_avx512_mask_rndscale_ph_512:362; CHECK: # %bb.0:363; CHECK-NEXT: kmovd %edi, %k1364; CHECK-NEXT: vrndscaleph $8, %zmm0, %zmm1 {%k1}365; CHECK-NEXT: vrndscaleph $4, {sae}, %zmm0, %zmm0366; CHECK-NEXT: vaddph %zmm0, %zmm1, %zmm0367; CHECK-NEXT: retq368 %res = call <32 x half> @llvm.x86.avx512fp16.mask.rndscale.ph.512(<32 x half> %x0, i32 8, <32 x half> %x2, i32 %x3, i32 4)369 %res1 = call <32 x half> @llvm.x86.avx512fp16.mask.rndscale.ph.512(<32 x half> %x0, i32 4, <32 x half> %x2, i32 -1, i32 8)370 %res2 = fadd <32 x half> %res, %res1371 ret <32 x half> %res2372}373 374declare <8 x half> @llvm.x86.avx512fp16.mask.rndscale.sh(<8 x half>, <8 x half>,<8 x half>, i8, i32, i32)375 376define <8 x half>@test_int_x86_avx512_mask_rndscale_sh(<8 x half> %x0, <8 x half> %x1, <8 x half> %x3, i8 %x4) {377; CHECK-LABEL: test_int_x86_avx512_mask_rndscale_sh:378; CHECK: # %bb.0:379; CHECK-NEXT: kmovd %edi, %k1380; CHECK-NEXT: vrndscalesh $4, %xmm1, %xmm0, %xmm2 {%k1}381; CHECK-NEXT: vmovaps %xmm2, %xmm0382; CHECK-NEXT: retq383 %res = call <8 x half> @llvm.x86.avx512fp16.mask.rndscale.sh(<8 x half> %x0, <8 x half> %x1, <8 x half> %x3, i8 %x4, i32 4, i32 4)384 ret <8 x half> %res385}386 387define <8 x half>@test_int_x86_avx512_mask_rndscale_sh_nomask(<8 x half> %x0, <8 x half> %x1, <8 x half> %x3) {388; CHECK-LABEL: test_int_x86_avx512_mask_rndscale_sh_nomask:389; CHECK: # %bb.0:390; CHECK-NEXT: vrndscalesh $4, {sae}, %xmm1, %xmm0, %xmm0391; CHECK-NEXT: retq392 %res = call <8 x half> @llvm.x86.avx512fp16.mask.rndscale.sh(<8 x half> %x0, <8 x half> %x1, <8 x half> %x3, i8 -1, i32 4, i32 8)393 ret <8 x half> %res394}395 396declare <32 x half> @llvm.x86.avx512fp16.mask.getexp.ph.512(<32 x half>, <32 x half>, i32, i32)397 398define <32 x half>@test_int_x86_avx512_mask_getexp_ph_512(<32 x half> %x0, <32 x half> %x1, i32 %x2) {399; CHECK-LABEL: test_int_x86_avx512_mask_getexp_ph_512:400; CHECK: # %bb.0:401; CHECK-NEXT: kmovd %edi, %k1402; CHECK-NEXT: vgetexpph %zmm0, %zmm1 {%k1}403; CHECK-NEXT: vgetexpph {sae}, %zmm0, %zmm0404; CHECK-NEXT: vaddph %zmm0, %zmm1, %zmm0405; CHECK-NEXT: retq406 %res1 = call <32 x half> @llvm.x86.avx512fp16.mask.getexp.ph.512(<32 x half> %x0, <32 x half> %x1, i32 %x2, i32 4)407 %res2 = call <32 x half> @llvm.x86.avx512fp16.mask.getexp.ph.512(<32 x half> %x0, <32 x half> zeroinitializer, i32 -1, i32 8)408 %res3 = fadd <32 x half> %res1, %res2409 ret <32 x half> %res3410}411 412declare <8 x half> @llvm.x86.avx512fp16.mask.getexp.sh(<8 x half>, <8 x half>,<8 x half>, i8, i32)413 414define <8 x half>@test_int_x86_avx512_mask_getexp_sh(<8 x half> %x0, <8 x half> %x1, <8 x half> %x3, i8 %x4) {415; CHECK-LABEL: test_int_x86_avx512_mask_getexp_sh:416; CHECK: # %bb.0:417; CHECK-NEXT: kmovd %edi, %k1418; CHECK-NEXT: vgetexpsh %xmm1, %xmm0, %xmm2 {%k1}419; CHECK-NEXT: vmovaps %xmm2, %xmm0420; CHECK-NEXT: retq421 %res = call <8 x half> @llvm.x86.avx512fp16.mask.getexp.sh(<8 x half> %x0, <8 x half> %x1, <8 x half> %x3, i8 %x4, i32 4)422 ret <8 x half> %res423}424 425define <8 x half>@test_int_x86_avx512_mask_getexp_sh_nomask(<8 x half> %x0, <8 x half> %x1, <8 x half> %x3) {426; CHECK-LABEL: test_int_x86_avx512_mask_getexp_sh_nomask:427; CHECK: # %bb.0:428; CHECK-NEXT: vgetexpsh {sae}, %xmm1, %xmm0, %xmm0429; CHECK-NEXT: retq430 %res = call <8 x half> @llvm.x86.avx512fp16.mask.getexp.sh(<8 x half> %x0, <8 x half> %x1, <8 x half> %x3, i8 -1, i32 8)431 ret <8 x half> %res432}433 434define <8 x half>@test_int_x86_avx512_mask_getexp_sh_load(<8 x half> %x0, ptr %x1ptr) {435; CHECK-LABEL: test_int_x86_avx512_mask_getexp_sh_load:436; CHECK: # %bb.0:437; CHECK-NEXT: vgetexpsh (%rdi), %xmm0, %xmm0438; CHECK-NEXT: retq439 %x1 = load <8 x half>, ptr %x1ptr440 %res = call <8 x half> @llvm.x86.avx512fp16.mask.getexp.sh(<8 x half> %x0, <8 x half> %x1, <8 x half> undef, i8 -1, i32 4)441 ret <8 x half> %res442}443 444declare <32 x half> @llvm.x86.avx512fp16.mask.getmant.ph.512(<32 x half>, i32, <32 x half>, i32, i32)445 446define <32 x half>@test_int_x86_avx512_mask_getmant_ph_512(<32 x half> %x0, <32 x half> %x2, i32 %x3) {447; CHECK-LABEL: test_int_x86_avx512_mask_getmant_ph_512:448; CHECK: # %bb.0:449; CHECK-NEXT: kmovd %edi, %k1450; CHECK-NEXT: vgetmantph $8, %zmm0, %zmm1 {%k1}451; CHECK-NEXT: vgetmantph $4, {sae}, %zmm0, %zmm0452; CHECK-NEXT: vaddph %zmm0, %zmm1, %zmm0453; CHECK-NEXT: retq454 %res = call <32 x half> @llvm.x86.avx512fp16.mask.getmant.ph.512(<32 x half> %x0, i32 8, <32 x half> %x2, i32 %x3, i32 4)455 %res1 = call <32 x half> @llvm.x86.avx512fp16.mask.getmant.ph.512(<32 x half> %x0, i32 4, <32 x half> %x2, i32 -1, i32 8)456 %res2 = fadd <32 x half> %res, %res1457 ret <32 x half> %res2458}459 460declare <8 x half> @llvm.x86.avx512fp16.mask.getmant.sh(<8 x half>, <8 x half>, i32, <8 x half>, i8, i32)461 462define <8 x half>@test_int_x86_avx512_mask_getmant_sh(<8 x half> %x0, <8 x half> %x1, <8 x half> %x3, i8 %x4) {463; CHECK-LABEL: test_int_x86_avx512_mask_getmant_sh:464; CHECK: # %bb.0:465; CHECK-NEXT: kmovd %edi, %k1466; CHECK-NEXT: vgetmantsh $11, %xmm1, %xmm0, %xmm2 {%k1}467; CHECK-NEXT: vmovaps %xmm2, %xmm0468; CHECK-NEXT: retq469 %res = call <8 x half> @llvm.x86.avx512fp16.mask.getmant.sh(<8 x half> %x0, <8 x half> %x1, i32 11, <8 x half> %x3, i8 %x4, i32 4)470 ret <8 x half> %res471}472 473define <8 x half>@test_int_x86_avx512_mask_getmant_sh_nomask(<8 x half> %x0, <8 x half> %x1, <8 x half> %x3) {474; CHECK-LABEL: test_int_x86_avx512_mask_getmant_sh_nomask:475; CHECK: # %bb.0:476; CHECK-NEXT: vgetmantsh $11, %xmm1, %xmm0, %xmm0477; CHECK-NEXT: retq478 %res = call <8 x half> @llvm.x86.avx512fp16.mask.getmant.sh(<8 x half> %x0, <8 x half> %x1, i32 11, <8 x half> %x3, i8 -1, i32 4)479 ret <8 x half> %res480}481 482define <8 x half>@test_int_x86_avx512_mask_getmant_sh_z(<8 x half> %x0, <8 x half> %x1, i8 %x4) {483; CHECK-LABEL: test_int_x86_avx512_mask_getmant_sh_z:484; CHECK: # %bb.0:485; CHECK-NEXT: kmovd %edi, %k1486; CHECK-NEXT: vgetmantsh $11, %xmm1, %xmm0, %xmm0 {%k1} {z}487; CHECK-NEXT: retq488 %res = call <8 x half> @llvm.x86.avx512fp16.mask.getmant.sh(<8 x half> %x0, <8 x half> %x1, i32 11, <8 x half> zeroinitializer, i8 %x4, i32 4)489 ret <8 x half> %res490}491 492declare <32 x half> @llvm.x86.avx512fp16.mask.scalef.ph.512(<32 x half>, <32 x half>, <32 x half>, i32, i32)493 494define <32 x half>@test_int_x86_avx512_mask_scalef_ph_512(<32 x half> %x0, <32 x half> %x1, <32 x half> %x2, i32 %x3) {495; CHECK-LABEL: test_int_x86_avx512_mask_scalef_ph_512:496; CHECK: # %bb.0:497; CHECK-NEXT: kmovd %edi, %k1498; CHECK-NEXT: vscalefph {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1}499; CHECK-NEXT: vscalefph {rn-sae}, %zmm1, %zmm0, %zmm0500; CHECK-NEXT: vaddph %zmm0, %zmm2, %zmm0501; CHECK-NEXT: retq502 %mask = bitcast i32 %x3 to <32 x i1>503 %res1 = call <32 x half> @llvm.x86.avx512fp16.mask.scalef.ph.512(<32 x half> %x0, <32 x half> %x1, <32 x half> %x2, i32 %x3, i32 11)504 %res2 = call <32 x half> @llvm.x86.avx512fp16.mask.scalef.ph.512(<32 x half> %x0, <32 x half> %x1, <32 x half> zeroinitializer, i32 -1, i32 8)505 %res3 = fadd <32 x half> %res1, %res2506 ret <32 x half> %res3507}508 509declare <8 x half> @llvm.x86.avx512fp16.mask.scalef.sh(<8 x half>, <8 x half>,<8 x half>, i8, i32)510 511define <8 x half>@test_int_x86_avx512_mask_scalef_sh(<8 x half> %x0, <8 x half> %x1, <8 x half> %x3, i8 %x4) {512; CHECK-LABEL: test_int_x86_avx512_mask_scalef_sh:513; CHECK: # %bb.0:514; CHECK-NEXT: kmovd %edi, %k1515; CHECK-NEXT: vscalefsh %xmm1, %xmm0, %xmm2 {%k1}516; CHECK-NEXT: vmovaps %xmm2, %xmm0517; CHECK-NEXT: retq518 %res = call <8 x half> @llvm.x86.avx512fp16.mask.scalef.sh(<8 x half> %x0, <8 x half> %x1, <8 x half> %x3, i8 %x4, i32 4)519 ret <8 x half> %res520}521 522define <8 x half>@test_int_x86_avx512_mask_scalef_sh_nomask(<8 x half> %x0, <8 x half> %x1, <8 x half> %x3) {523; CHECK-LABEL: test_int_x86_avx512_mask_scalef_sh_nomask:524; CHECK: # %bb.0:525; CHECK-NEXT: vscalefsh {rn-sae}, %xmm1, %xmm0, %xmm0526; CHECK-NEXT: retq527 %res = call <8 x half> @llvm.x86.avx512fp16.mask.scalef.sh(<8 x half> %x0, <8 x half> %x1, <8 x half> %x3, i8 -1, i32 8)528 ret <8 x half> %res529}530 531define <8 x half>@test_int_x86_avx512_mask_scalef_sh_load(<8 x half> %x0, ptr %x1ptr) {532; CHECK-LABEL: test_int_x86_avx512_mask_scalef_sh_load:533; CHECK: # %bb.0:534; CHECK-NEXT: vscalefsh (%rdi), %xmm0, %xmm0535; CHECK-NEXT: retq536 %x1 = load <8 x half>, ptr %x1ptr537 %res = call <8 x half> @llvm.x86.avx512fp16.mask.scalef.sh(<8 x half> %x0, <8 x half> %x1, <8 x half> undef, i8 -1, i32 4)538 ret <8 x half> %res539}540 541declare <8 x half> @llvm.x86.avx512fp16.mask.add.sh.round(<8 x half>, <8 x half>, <8 x half>, i8, i32)542 543define <8 x half> @test_int_x86_avx512fp16_mask_add_sh(<8 x half> %x1, <8 x half> %x2, <8 x half> %src, i8 %mask, ptr %ptr) {544; CHECK-LABEL: test_int_x86_avx512fp16_mask_add_sh:545; CHECK: # %bb.0:546; CHECK-NEXT: kmovd %edi, %k1547; CHECK-NEXT: vaddsh %xmm1, %xmm0, %xmm0548; CHECK-NEXT: vmovaps %xmm2, %xmm3549; CHECK-NEXT: vaddsh %xmm1, %xmm0, %xmm3 {%k1}550; CHECK-NEXT: vaddsh %xmm1, %xmm3, %xmm0 {%k1} {z}551; CHECK-NEXT: vaddsh (%rsi), %xmm0, %xmm2 {%k1}552; CHECK-NEXT: vmovaps %xmm2, %xmm0553; CHECK-NEXT: retq554 %val.half = load half,ptr %ptr555 %val = insertelement <8 x half> undef, half %val.half, i32 0556 %res0 = call <8 x half> @llvm.x86.avx512fp16.mask.add.sh.round(<8 x half> %x1, <8 x half> %x2, <8 x half> zeroinitializer, i8 -1, i32 4)557 %res1 = call <8 x half> @llvm.x86.avx512fp16.mask.add.sh.round(<8 x half> %res0, <8 x half> %x2, <8 x half> %src , i8 %mask, i32 4)558 %res2 = call <8 x half> @llvm.x86.avx512fp16.mask.add.sh.round(<8 x half> %res1, <8 x half> %x2, <8 x half> zeroinitializer , i8 %mask, i32 4)559 %res3 = call <8 x half> @llvm.x86.avx512fp16.mask.add.sh.round(<8 x half> %res2, <8 x half> %val, <8 x half> %src , i8 %mask, i32 4)560 ret <8 x half> %res3561}562 563declare <8 x half> @llvm.x86.avx512fp16.mask.sub.sh.round(<8 x half>, <8 x half>, <8 x half>, i8, i32)564 565define <8 x half> @test_int_x86_avx512fp16_mask_sub_sh(<8 x half> %x1, <8 x half> %x2, <8 x half> %src, i8 %mask, ptr %ptr) {566; CHECK-LABEL: test_int_x86_avx512fp16_mask_sub_sh:567; CHECK: # %bb.0:568; CHECK-NEXT: kmovd %edi, %k1569; CHECK-NEXT: vsubsh %xmm1, %xmm0, %xmm0570; CHECK-NEXT: vmovaps %xmm2, %xmm3571; CHECK-NEXT: vsubsh %xmm1, %xmm0, %xmm3 {%k1}572; CHECK-NEXT: vsubsh %xmm1, %xmm3, %xmm0 {%k1} {z}573; CHECK-NEXT: vsubsh (%rsi), %xmm0, %xmm2 {%k1}574; CHECK-NEXT: vmovaps %xmm2, %xmm0575; CHECK-NEXT: retq576 %val.half = load half,ptr %ptr577 %val = insertelement <8 x half> undef, half %val.half, i32 0578 %res0 = call <8 x half> @llvm.x86.avx512fp16.mask.sub.sh.round(<8 x half> %x1, <8 x half> %x2, <8 x half> zeroinitializer, i8 -1, i32 4)579 %res1 = call <8 x half> @llvm.x86.avx512fp16.mask.sub.sh.round(<8 x half> %res0, <8 x half> %x2, <8 x half> %src , i8 %mask, i32 4)580 %res2 = call <8 x half> @llvm.x86.avx512fp16.mask.sub.sh.round(<8 x half> %res1, <8 x half> %x2, <8 x half> zeroinitializer , i8 %mask, i32 4)581 %res3 = call <8 x half> @llvm.x86.avx512fp16.mask.sub.sh.round(<8 x half> %res2, <8 x half> %val, <8 x half> %src , i8 %mask, i32 4)582 ret <8 x half> %res3583}584 585declare <8 x half> @llvm.x86.avx512fp16.mask.mul.sh.round(<8 x half>, <8 x half>, <8 x half>, i8, i32)586 587define <8 x half> @test_int_x86_avx512fp16_mask_mul_sh(<8 x half> %x1, <8 x half> %x2, <8 x half> %src, i8 %mask, ptr %ptr) {588; CHECK-LABEL: test_int_x86_avx512fp16_mask_mul_sh:589; CHECK: # %bb.0:590; CHECK-NEXT: kmovd %edi, %k1591; CHECK-NEXT: vmulsh %xmm1, %xmm0, %xmm0592; CHECK-NEXT: vmovaps %xmm2, %xmm3593; CHECK-NEXT: vmulsh %xmm1, %xmm0, %xmm3 {%k1}594; CHECK-NEXT: vmulsh %xmm1, %xmm3, %xmm0 {%k1} {z}595; CHECK-NEXT: vmulsh (%rsi), %xmm0, %xmm2 {%k1}596; CHECK-NEXT: vmovaps %xmm2, %xmm0597; CHECK-NEXT: retq598 %val.half = load half,ptr %ptr599 %val = insertelement <8 x half> undef, half %val.half, i32 0600 %res0 = call <8 x half> @llvm.x86.avx512fp16.mask.mul.sh.round(<8 x half> %x1, <8 x half> %x2, <8 x half> zeroinitializer, i8 -1, i32 4)601 %res1 = call <8 x half> @llvm.x86.avx512fp16.mask.mul.sh.round(<8 x half> %res0, <8 x half> %x2, <8 x half> %src , i8 %mask, i32 4)602 %res2 = call <8 x half> @llvm.x86.avx512fp16.mask.mul.sh.round(<8 x half> %res1, <8 x half> %x2, <8 x half> zeroinitializer , i8 %mask, i32 4)603 %res3 = call <8 x half> @llvm.x86.avx512fp16.mask.mul.sh.round(<8 x half> %res2, <8 x half> %val, <8 x half> %src , i8 %mask, i32 4)604 ret <8 x half> %res3605}606 607declare <8 x half> @llvm.x86.avx512fp16.mask.div.sh.round(<8 x half>, <8 x half>, <8 x half>, i8, i32)608 609define <8 x half> @test_int_x86_avx512fp16_mask_div_sh(<8 x half> %x1, <8 x half> %x2, <8 x half> %src, i8 %mask, ptr %ptr) {610; CHECK-LABEL: test_int_x86_avx512fp16_mask_div_sh:611; CHECK: # %bb.0:612; CHECK-NEXT: kmovd %edi, %k1613; CHECK-NEXT: vdivsh %xmm1, %xmm0, %xmm0614; CHECK-NEXT: vmovaps %xmm2, %xmm3615; CHECK-NEXT: vdivsh %xmm1, %xmm0, %xmm3 {%k1}616; CHECK-NEXT: vdivsh %xmm1, %xmm3, %xmm0 {%k1} {z}617; CHECK-NEXT: vdivsh (%rsi), %xmm0, %xmm2 {%k1}618; CHECK-NEXT: vmovaps %xmm2, %xmm0619; CHECK-NEXT: retq620 %val.half = load half,ptr %ptr621 %val = insertelement <8 x half> undef, half %val.half, i32 0622 %res0 = call <8 x half> @llvm.x86.avx512fp16.mask.div.sh.round(<8 x half> %x1, <8 x half> %x2, <8 x half> zeroinitializer, i8 -1, i32 4)623 %res1 = call <8 x half> @llvm.x86.avx512fp16.mask.div.sh.round(<8 x half> %res0, <8 x half> %x2, <8 x half> %src , i8 %mask, i32 4)624 %res2 = call <8 x half> @llvm.x86.avx512fp16.mask.div.sh.round(<8 x half> %res1, <8 x half> %x2, <8 x half> zeroinitializer , i8 %mask, i32 4)625 %res3 = call <8 x half> @llvm.x86.avx512fp16.mask.div.sh.round(<8 x half> %res2, <8 x half> %val, <8 x half> %src , i8 %mask, i32 4)626 ret <8 x half> %res3627}628 629declare <8 x half> @llvm.x86.avx512fp16.mask.min.sh.round(<8 x half>, <8 x half>, <8 x half>, i8, i32)630 631define <8 x half> @test_int_x86_avx512fp16_mask_min_sh(<8 x half> %x1, <8 x half> %x2, <8 x half> %src, i8 %mask, ptr %ptr) {632; CHECK-LABEL: test_int_x86_avx512fp16_mask_min_sh:633; CHECK: # %bb.0:634; CHECK-NEXT: kmovd %edi, %k1635; CHECK-NEXT: vminsh %xmm1, %xmm0, %xmm0636; CHECK-NEXT: vmovaps %xmm2, %xmm3637; CHECK-NEXT: vminsh %xmm1, %xmm0, %xmm3 {%k1}638; CHECK-NEXT: vminsh %xmm1, %xmm3, %xmm0 {%k1} {z}639; CHECK-NEXT: vminsh (%rsi), %xmm0, %xmm2 {%k1}640; CHECK-NEXT: vmovaps %xmm2, %xmm0641; CHECK-NEXT: retq642 %val.half = load half,ptr %ptr643 %val = insertelement <8 x half> undef, half %val.half, i32 0644 %res0 = call <8 x half> @llvm.x86.avx512fp16.mask.min.sh.round(<8 x half> %x1, <8 x half> %x2, <8 x half> zeroinitializer, i8 -1, i32 4)645 %res1 = call <8 x half> @llvm.x86.avx512fp16.mask.min.sh.round(<8 x half> %res0, <8 x half> %x2, <8 x half> %src , i8 %mask, i32 4)646 %res2 = call <8 x half> @llvm.x86.avx512fp16.mask.min.sh.round(<8 x half> %res1, <8 x half> %x2, <8 x half> zeroinitializer , i8 %mask, i32 4)647 %res3 = call <8 x half> @llvm.x86.avx512fp16.mask.min.sh.round(<8 x half> %res2, <8 x half> %val, <8 x half> %src , i8 %mask, i32 4)648 ret <8 x half> %res3649}650 651declare <8 x half> @llvm.x86.avx512fp16.mask.max.sh.round(<8 x half>, <8 x half>, <8 x half>, i8, i32)652 653define <8 x half> @test_int_x86_avx512fp16_mask_max_sh(<8 x half> %x1, <8 x half> %x2, <8 x half> %src, i8 %mask, ptr %ptr) {654; CHECK-LABEL: test_int_x86_avx512fp16_mask_max_sh:655; CHECK: # %bb.0:656; CHECK-NEXT: kmovd %edi, %k1657; CHECK-NEXT: vmaxsh %xmm1, %xmm0, %xmm0658; CHECK-NEXT: vmovaps %xmm2, %xmm3659; CHECK-NEXT: vmaxsh %xmm1, %xmm0, %xmm3 {%k1}660; CHECK-NEXT: vmaxsh %xmm1, %xmm3, %xmm0 {%k1} {z}661; CHECK-NEXT: vmaxsh (%rsi), %xmm0, %xmm2 {%k1}662; CHECK-NEXT: vmovaps %xmm2, %xmm0663; CHECK-NEXT: retq664 %val.half = load half,ptr %ptr665 %val = insertelement <8 x half> undef, half %val.half, i32 0666 %res0 = call <8 x half> @llvm.x86.avx512fp16.mask.max.sh.round(<8 x half> %x1, <8 x half> %x2, <8 x half> zeroinitializer, i8 -1, i32 4)667 %res1 = call <8 x half> @llvm.x86.avx512fp16.mask.max.sh.round(<8 x half> %res0, <8 x half> %x2, <8 x half> %src , i8 %mask, i32 4)668 %res2 = call <8 x half> @llvm.x86.avx512fp16.mask.max.sh.round(<8 x half> %res1, <8 x half> %x2, <8 x half> zeroinitializer , i8 %mask, i32 4)669 %res3 = call <8 x half> @llvm.x86.avx512fp16.mask.max.sh.round(<8 x half> %res2, <8 x half> %val, <8 x half> %src , i8 %mask, i32 4)670 ret <8 x half> %res3671}672 673declare i8 @llvm.x86.avx512fp16.mask.cmp.sh(<8 x half>, <8 x half>, i32, i8, i32)674 675define i8 @test_int_x86_avx512_mask_cmp_sh(<8 x half> %x0, <8 x half> %x1, i8 %x3, i32 %x4) {676; CHECK-LABEL: test_int_x86_avx512_mask_cmp_sh:677; CHECK: # %bb.0:678; CHECK-NEXT: kmovd %edi, %k1679; CHECK-NEXT: vcmpunordsh %xmm1, %xmm0, %k0 {%k1}680; CHECK-NEXT: kmovd %k0, %eax681; CHECK-NEXT: # kill: def $al killed $al killed $eax682; CHECK-NEXT: retq683 %res2 = call i8 @llvm.x86.avx512fp16.mask.cmp.sh(<8 x half> %x0, <8 x half> %x1, i32 3, i8 %x3, i32 4)684 ret i8 %res2685}686 687 688define i8 @test_int_x86_avx512_mask_cmp_sh_all(<8 x half> %x0, <8 x half> %x1, i8 %x3, i32 %x4) {689; CHECK-LABEL: test_int_x86_avx512_mask_cmp_sh_all:690; CHECK: # %bb.0:691; CHECK-NEXT: kmovd %edi, %k1692; CHECK-NEXT: vcmplesh %xmm1, %xmm0, %k0693; CHECK-NEXT: kmovd %k0, %ecx694; CHECK-NEXT: vcmpunordsh {sae}, %xmm1, %xmm0, %k0695; CHECK-NEXT: kmovd %k0, %edx696; CHECK-NEXT: vcmpneqsh %xmm1, %xmm0, %k0 {%k1}697; CHECK-NEXT: kmovd %k0, %esi698; CHECK-NEXT: vcmpnltsh {sae}, %xmm1, %xmm0, %k0 {%k1}699; CHECK-NEXT: kmovd %k0, %eax700; CHECK-NEXT: andl %ecx, %edx701; CHECK-NEXT: andl %esi, %eax702; CHECK-NEXT: andl %edx, %eax703; CHECK-NEXT: # kill: def $al killed $al killed $eax704; CHECK-NEXT: retq705 %res1 = call i8 @llvm.x86.avx512fp16.mask.cmp.sh(<8 x half> %x0, <8 x half> %x1, i32 2, i8 -1, i32 4)706 %res2 = call i8 @llvm.x86.avx512fp16.mask.cmp.sh(<8 x half> %x0, <8 x half> %x1, i32 3, i8 -1, i32 8)707 %res3 = call i8 @llvm.x86.avx512fp16.mask.cmp.sh(<8 x half> %x0, <8 x half> %x1, i32 4, i8 %x3, i32 4)708 %res4 = call i8 @llvm.x86.avx512fp16.mask.cmp.sh(<8 x half> %x0, <8 x half> %x1, i32 5, i8 %x3, i32 8)709 710 %res11 = and i8 %res1, %res2711 %res12 = and i8 %res3, %res4712 %res13 = and i8 %res11, %res12713 ret i8 %res13714}715 716declare <16 x half> @llvm.x86.avx512.sitofp.round.v16f16.v16i32(<16 x i32>, i32)717 718define <16 x half> @test_int_x86_avx512_mask_cvt_dq2ph_512(<16 x i32> %x0, <16 x half> %x1, i16 %x2) {719; CHECK-LABEL: test_int_x86_avx512_mask_cvt_dq2ph_512:720; CHECK: # %bb.0:721; CHECK-NEXT: kmovd %edi, %k1722; CHECK-NEXT: vcvtdq2ph %zmm0, %ymm1 {%k1}723; CHECK-NEXT: vmovaps %ymm1, %ymm0724; CHECK-NEXT: retq725 %mask = bitcast i16 %x2 to <16 x i1>726 %res0 = call <16 x half> @llvm.x86.avx512.sitofp.round.v16f16.v16i32(<16 x i32> %x0, i32 4)727 %res = select <16 x i1> %mask, <16 x half> %res0, <16 x half> %x1728 ret <16 x half> %res729}730 731define <16 x half> @test_int_x86_avx512_mask_cvt_dq2ph_512_r(<16 x i32> %x0, <16 x half> %x1, i16 %x2) {732; CHECK-LABEL: test_int_x86_avx512_mask_cvt_dq2ph_512_r:733; CHECK: # %bb.0:734; CHECK-NEXT: kmovd %edi, %k1735; CHECK-NEXT: vcvtdq2ph {ru-sae}, %zmm0, %ymm1 {%k1}736; CHECK-NEXT: vmovaps %ymm1, %ymm0737; CHECK-NEXT: retq738 %mask = bitcast i16 %x2 to <16 x i1>739 %res0 = call <16 x half> @llvm.x86.avx512.sitofp.round.v16f16.v16i32(<16 x i32> %x0, i32 10)740 %res = select <16 x i1> %mask, <16 x half> %res0, <16 x half> %x1741 ret <16 x half> %res742}743 744define <16 x half> @test_int_x86_avx512_mask_cvt_dq2ph_512_nomask(<16 x i32> %x0, <16 x half> %x1) {745; CHECK-LABEL: test_int_x86_avx512_mask_cvt_dq2ph_512_nomask:746; CHECK: # %bb.0:747; CHECK-NEXT: vcvtdq2ph %zmm0, %ymm0748; CHECK-NEXT: retq749 %res = call <16 x half> @llvm.x86.avx512.sitofp.round.v16f16.v16i32(<16 x i32> %x0, i32 4)750 ret <16 x half> %res751}752 753define <16 x half> @test_int_x86_avx512_mask_cvt_dq2ph_512_z(<16 x i32> %x0, i16 %x2) {754; CHECK-LABEL: test_int_x86_avx512_mask_cvt_dq2ph_512_z:755; CHECK: # %bb.0:756; CHECK-NEXT: kmovd %edi, %k1757; CHECK-NEXT: vcvtdq2ph %zmm0, %ymm0 {%k1} {z}758; CHECK-NEXT: retq759 %mask = bitcast i16 %x2 to <16 x i1>760 %res0 = call <16 x half> @llvm.x86.avx512.sitofp.round.v16f16.v16i32(<16 x i32> %x0, i32 4)761 %res = select <16 x i1> %mask, <16 x half> %res0, <16 x half> zeroinitializer762 ret <16 x half> %res763}764 765define <16 x half> @sint_to_fp_16i32_to_16f16(<16 x i32> %x) {766; CHECK-LABEL: sint_to_fp_16i32_to_16f16:767; CHECK: # %bb.0:768; CHECK-NEXT: vcvtdq2ph %zmm0, %ymm0769; CHECK-NEXT: retq770 %res = sitofp <16 x i32> %x to <16 x half>771 ret <16 x half> %res772}773 774declare <16 x half> @llvm.x86.avx512.uitofp.round.v16f16.v16i32(<16 x i32>, i32)775 776define <16 x half> @test_int_x86_avx512_mask_cvt_udq2ph_512_r(<16 x i32> %x0, <16 x half> %x1, i16 %x2) {777; CHECK-LABEL: test_int_x86_avx512_mask_cvt_udq2ph_512_r:778; CHECK: # %bb.0:779; CHECK-NEXT: kmovd %edi, %k1780; CHECK-NEXT: vcvtudq2ph {ru-sae}, %zmm0, %ymm1 {%k1}781; CHECK-NEXT: vmovaps %ymm1, %ymm0782; CHECK-NEXT: retq783 %mask = bitcast i16 %x2 to <16 x i1>784 %res0 = call <16 x half> @llvm.x86.avx512.uitofp.round.v16f16.v16i32(<16 x i32> %x0, i32 10)785 %res = select <16 x i1> %mask, <16 x half> %res0, <16 x half> %x1786 ret <16 x half> %res787}788 789define <16 x half> @test_int_x86_avx512_mask_cvt_udq2ph_512_nomask(<16 x i32> %x0, <16 x half> %x1) {790; CHECK-LABEL: test_int_x86_avx512_mask_cvt_udq2ph_512_nomask:791; CHECK: # %bb.0:792; CHECK-NEXT: vcvtudq2ph %zmm0, %ymm0793; CHECK-NEXT: retq794 %res = call <16 x half> @llvm.x86.avx512.uitofp.round.v16f16.v16i32(<16 x i32> %x0, i32 4)795 ret <16 x half> %res796}797 798define <16 x half> @test_int_x86_avx512_mask_cvt_udq2ph_512_z(<16 x i32> %x0, i16 %x2) {799; CHECK-LABEL: test_int_x86_avx512_mask_cvt_udq2ph_512_z:800; CHECK: # %bb.0:801; CHECK-NEXT: kmovd %edi, %k1802; CHECK-NEXT: vcvtudq2ph %zmm0, %ymm0 {%k1} {z}803; CHECK-NEXT: retq804 %mask = bitcast i16 %x2 to <16 x i1>805 %res0 = call <16 x half> @llvm.x86.avx512.uitofp.round.v16f16.v16i32(<16 x i32> %x0, i32 4)806 %res = select <16 x i1> %mask, <16 x half> %res0, <16 x half> zeroinitializer807 ret <16 x half> %res808}809 810define <16 x half> @uint_to_fp_16i32_to_16f16(<16 x i32> %x) {811; CHECK-LABEL: uint_to_fp_16i32_to_16f16:812; CHECK: # %bb.0:813; CHECK-NEXT: vcvtudq2ph %zmm0, %ymm0814; CHECK-NEXT: retq815 %res = uitofp <16 x i32> %x to <16 x half>816 ret <16 x half> %res817}818 819declare <16 x i32> @llvm.x86.avx512fp16.mask.vcvtph2dq.512(<16 x half>, <16 x i32>, i16, i32)820 821define <16 x i32> @test_int_x86_avx512_mask_cvt_ph2dq_512(<16 x half> %x0, <16 x i32> %x1, i16 %x2) {822; CHECK-LABEL: test_int_x86_avx512_mask_cvt_ph2dq_512:823; CHECK: # %bb.0:824; CHECK-NEXT: kmovd %edi, %k1825; CHECK-NEXT: vcvtph2dq {ru-sae}, %ymm0, %zmm1 {%k1}826; CHECK-NEXT: vcvtph2dq {rn-sae}, %ymm0, %zmm0827; CHECK-NEXT: vpaddd %zmm0, %zmm1, %zmm0828; CHECK-NEXT: retq829 %res = call <16 x i32> @llvm.x86.avx512fp16.mask.vcvtph2dq.512(<16 x half> %x0, <16 x i32> %x1, i16 %x2, i32 10)830 %res1 = call <16 x i32> @llvm.x86.avx512fp16.mask.vcvtph2dq.512(<16 x half> %x0, <16 x i32> %x1, i16 -1, i32 8)831 %res2 = add <16 x i32> %res, %res1832 ret <16 x i32> %res2833}834 835declare <16 x i32> @llvm.x86.avx512fp16.mask.vcvtph2udq.512(<16 x half>, <16 x i32>, i16, i32)836 837define <16 x i32> @test_int_x86_avx512_mask_cvt_ph2udq_512(<16 x half> %x0, <16 x i32> %x1, i16 %x2) {838; CHECK-LABEL: test_int_x86_avx512_mask_cvt_ph2udq_512:839; CHECK: # %bb.0:840; CHECK-NEXT: kmovd %edi, %k1841; CHECK-NEXT: vcvtph2udq {ru-sae}, %ymm0, %zmm1 {%k1}842; CHECK-NEXT: vcvtph2udq {rn-sae}, %ymm0, %zmm0843; CHECK-NEXT: vpaddd %zmm0, %zmm1, %zmm0844; CHECK-NEXT: retq845 %res = call <16 x i32> @llvm.x86.avx512fp16.mask.vcvtph2udq.512(<16 x half> %x0, <16 x i32> %x1, i16 %x2, i32 10)846 %res1 = call <16 x i32> @llvm.x86.avx512fp16.mask.vcvtph2udq.512(<16 x half> %x0, <16 x i32> %x1, i16 -1, i32 8)847 %res2 = add <16 x i32> %res, %res1848 ret <16 x i32> %res2849}850 851declare <16 x i32> @llvm.x86.avx512fp16.mask.vcvttph2dq.512(<16 x half>, <16 x i32>, i16, i32)852 853define <16 x i32> @test_int_x86_avx512_mask_cvtt_ph2dq_512(<16 x half> %x0, <16 x i32> %x1, i16 %x2) {854; CHECK-LABEL: test_int_x86_avx512_mask_cvtt_ph2dq_512:855; CHECK: # %bb.0:856; CHECK-NEXT: kmovd %edi, %k1857; CHECK-NEXT: vcvttph2dq %ymm0, %zmm1 {%k1}858; CHECK-NEXT: vcvttph2dq {sae}, %ymm0, %zmm0859; CHECK-NEXT: vpaddd %zmm0, %zmm1, %zmm0860; CHECK-NEXT: retq861 %res = call <16 x i32> @llvm.x86.avx512fp16.mask.vcvttph2dq.512(<16 x half> %x0, <16 x i32> %x1, i16 %x2, i32 4)862 %res1 = call <16 x i32> @llvm.x86.avx512fp16.mask.vcvttph2dq.512(<16 x half> %x0, <16 x i32> %x1, i16 -1, i32 8)863 %res2 = add <16 x i32> %res, %res1864 ret <16 x i32> %res2865}866 867declare <16 x i32> @llvm.x86.avx512fp16.mask.vcvttph2udq.512(<16 x half>, <16 x i32>, i16, i32)868 869define <16 x i32> @test_int_x86_avx512_mask_cvtt_ph2udq_512(<16 x half> %x0, <16 x i32> %x1, i16 %x2) {870; CHECK-LABEL: test_int_x86_avx512_mask_cvtt_ph2udq_512:871; CHECK: # %bb.0:872; CHECK-NEXT: kmovd %edi, %k1873; CHECK-NEXT: vcvttph2udq %ymm0, %zmm1 {%k1}874; CHECK-NEXT: vcvttph2udq {sae}, %ymm0, %zmm0875; CHECK-NEXT: vpaddd %zmm0, %zmm1, %zmm0876; CHECK-NEXT: retq877 %res = call <16 x i32> @llvm.x86.avx512fp16.mask.vcvttph2udq.512(<16 x half> %x0, <16 x i32> %x1, i16 %x2, i32 4)878 %res1 = call <16 x i32> @llvm.x86.avx512fp16.mask.vcvttph2udq.512(<16 x half> %x0, <16 x i32> %x1, i16 -1, i32 8)879 %res2 = add <16 x i32> %res, %res1880 ret <16 x i32> %res2881}882 883declare <8 x half> @llvm.x86.avx512.sitofp.round.v8f16.v8i64(<8 x i64>, i32)884 885define <8 x half> @test_int_x86_avx512_mask_cvt_qq2ph_512(<8 x i64> %x0, <8 x half> %x1, i8 %x2) {886; CHECK-LABEL: test_int_x86_avx512_mask_cvt_qq2ph_512:887; CHECK: # %bb.0:888; CHECK-NEXT: kmovd %edi, %k1889; CHECK-NEXT: vcvtqq2ph %zmm0, %xmm1 {%k1}890; CHECK-NEXT: vmovaps %xmm1, %xmm0891; CHECK-NEXT: vzeroupper892; CHECK-NEXT: retq893 %mask = bitcast i8 %x2 to <8 x i1>894 %res0 = call <8 x half> @llvm.x86.avx512.sitofp.round.v8f16.v8i64(<8 x i64> %x0, i32 4)895 %res = select <8 x i1> %mask, <8 x half> %res0, <8 x half> %x1896 ret <8 x half> %res897}898 899define <8 x half> @test_int_x86_avx512_mask_cvt_qq2ph_512_r(<8 x i64> %x0, <8 x half> %x1, i8 %x2) {900; CHECK-LABEL: test_int_x86_avx512_mask_cvt_qq2ph_512_r:901; CHECK: # %bb.0:902; CHECK-NEXT: kmovd %edi, %k1903; CHECK-NEXT: vcvtqq2ph {ru-sae}, %zmm0, %xmm1 {%k1}904; CHECK-NEXT: vmovaps %xmm1, %xmm0905; CHECK-NEXT: vzeroupper906; CHECK-NEXT: retq907 %mask = bitcast i8 %x2 to <8 x i1>908 %res0 = call <8 x half> @llvm.x86.avx512.sitofp.round.v8f16.v8i64(<8 x i64> %x0, i32 10)909 %res = select <8 x i1> %mask, <8 x half> %res0, <8 x half> %x1910 ret <8 x half> %res911}912 913define <8 x half> @test_int_x86_avx512_mask_cvt_qq2ph_512_nomask(<8 x i64> %x0, <8 x half> %x1) {914; CHECK-LABEL: test_int_x86_avx512_mask_cvt_qq2ph_512_nomask:915; CHECK: # %bb.0:916; CHECK-NEXT: vcvtqq2ph %zmm0, %xmm0917; CHECK-NEXT: vzeroupper918; CHECK-NEXT: retq919 %res = call <8 x half> @llvm.x86.avx512.sitofp.round.v8f16.v8i64(<8 x i64> %x0, i32 4)920 ret <8 x half> %res921}922 923define <8 x half> @test_int_x86_avx512_mask_cvt_qq2ph_512_z(<8 x i64> %x0, i8 %x2) {924; CHECK-LABEL: test_int_x86_avx512_mask_cvt_qq2ph_512_z:925; CHECK: # %bb.0:926; CHECK-NEXT: kmovd %edi, %k1927; CHECK-NEXT: vcvtqq2ph %zmm0, %xmm0 {%k1} {z}928; CHECK-NEXT: vzeroupper929; CHECK-NEXT: retq930 %mask = bitcast i8 %x2 to <8 x i1>931 %res0 = call <8 x half> @llvm.x86.avx512.sitofp.round.v8f16.v8i64(<8 x i64> %x0, i32 4)932 %res = select <8 x i1> %mask, <8 x half> %res0, <8 x half> zeroinitializer933 ret <8 x half> %res934}935 936declare <8 x half> @llvm.x86.avx512.uitofp.round.v8f16.v8i64(<8 x i64>, i32)937 938define <8 x half> @test_int_x86_avx512_mask_cvt_uqq2ph_512(<8 x i64> %x0, <8 x half> %x1, i8 %x2) {939; CHECK-LABEL: test_int_x86_avx512_mask_cvt_uqq2ph_512:940; CHECK: # %bb.0:941; CHECK-NEXT: kmovd %edi, %k1942; CHECK-NEXT: vcvtuqq2ph %zmm0, %xmm1 {%k1}943; CHECK-NEXT: vmovaps %xmm1, %xmm0944; CHECK-NEXT: vzeroupper945; CHECK-NEXT: retq946 %mask = bitcast i8 %x2 to <8 x i1>947 %res0 = call <8 x half> @llvm.x86.avx512.uitofp.round.v8f16.v8i64(<8 x i64> %x0, i32 4)948 %res = select <8 x i1> %mask, <8 x half> %res0, <8 x half> %x1949 ret <8 x half> %res950}951 952define <8 x half> @test_int_x86_avx512_mask_cvt_uqq2ph_512_r(<8 x i64> %x0, <8 x half> %x1, i8 %x2) {953; CHECK-LABEL: test_int_x86_avx512_mask_cvt_uqq2ph_512_r:954; CHECK: # %bb.0:955; CHECK-NEXT: kmovd %edi, %k1956; CHECK-NEXT: vcvtuqq2ph {ru-sae}, %zmm0, %xmm1 {%k1}957; CHECK-NEXT: vmovaps %xmm1, %xmm0958; CHECK-NEXT: vzeroupper959; CHECK-NEXT: retq960 %mask = bitcast i8 %x2 to <8 x i1>961 %res0 = call <8 x half> @llvm.x86.avx512.uitofp.round.v8f16.v8i64(<8 x i64> %x0, i32 10)962 %res = select <8 x i1> %mask, <8 x half> %res0, <8 x half> %x1963 ret <8 x half> %res964}965 966define <8 x half> @test_int_x86_avx512_mask_cvt_uqq2ph_512_nomask(<8 x i64> %x0, <8 x half> %x1) {967; CHECK-LABEL: test_int_x86_avx512_mask_cvt_uqq2ph_512_nomask:968; CHECK: # %bb.0:969; CHECK-NEXT: vcvtuqq2ph %zmm0, %xmm0970; CHECK-NEXT: vzeroupper971; CHECK-NEXT: retq972 %res = call <8 x half> @llvm.x86.avx512.uitofp.round.v8f16.v8i64(<8 x i64> %x0, i32 4)973 ret <8 x half> %res974}975 976define <8 x half> @test_int_x86_avx512_mask_cvt_uqq2ph_512_z(<8 x i64> %x0, i8 %x2) {977; CHECK-LABEL: test_int_x86_avx512_mask_cvt_uqq2ph_512_z:978; CHECK: # %bb.0:979; CHECK-NEXT: kmovd %edi, %k1980; CHECK-NEXT: vcvtuqq2ph %zmm0, %xmm0 {%k1} {z}981; CHECK-NEXT: vzeroupper982; CHECK-NEXT: retq983 %mask = bitcast i8 %x2 to <8 x i1>984 %res0 = call <8 x half> @llvm.x86.avx512.uitofp.round.v8f16.v8i64(<8 x i64> %x0, i32 4)985 %res = select <8 x i1> %mask, <8 x half> %res0, <8 x half> zeroinitializer986 ret <8 x half> %res987}988 989declare <8 x i64> @llvm.x86.avx512fp16.mask.vcvtph2qq.512(<8 x half>, <8 x i64>, i8, i32)990 991define <8 x i64> @test_int_x86_avx512_mask_cvt_ph2qq_512(<8 x half> %x0, <8 x i64> %x1, i8 %x2) {992; CHECK-LABEL: test_int_x86_avx512_mask_cvt_ph2qq_512:993; CHECK: # %bb.0:994; CHECK-NEXT: kmovd %edi, %k1995; CHECK-NEXT: vcvtph2qq {ru-sae}, %xmm0, %zmm1 {%k1}996; CHECK-NEXT: vcvtph2qq {rn-sae}, %xmm0, %zmm0997; CHECK-NEXT: vpaddq %zmm0, %zmm1, %zmm0998; CHECK-NEXT: retq999 %res = call <8 x i64> @llvm.x86.avx512fp16.mask.vcvtph2qq.512(<8 x half> %x0, <8 x i64> %x1, i8 %x2, i32 10)1000 %res1 = call <8 x i64> @llvm.x86.avx512fp16.mask.vcvtph2qq.512(<8 x half> %x0, <8 x i64> %x1, i8 -1, i32 8)1001 %res2 = add <8 x i64> %res, %res11002 ret <8 x i64> %res21003}1004 1005declare <8 x i64> @llvm.x86.avx512fp16.mask.vcvtph2uqq.512(<8 x half>, <8 x i64>, i8, i32)1006 1007define <8 x i64> @test_int_x86_avx512_mask_cvt_ph2uqq_512(<8 x half> %x0, <8 x i64> %x1, i8 %x2) {1008; CHECK-LABEL: test_int_x86_avx512_mask_cvt_ph2uqq_512:1009; CHECK: # %bb.0:1010; CHECK-NEXT: kmovd %edi, %k11011; CHECK-NEXT: vcvtph2uqq {ru-sae}, %xmm0, %zmm1 {%k1}1012; CHECK-NEXT: vcvtph2uqq {rn-sae}, %xmm0, %zmm01013; CHECK-NEXT: vpaddq %zmm0, %zmm1, %zmm01014; CHECK-NEXT: retq1015 %res = call <8 x i64> @llvm.x86.avx512fp16.mask.vcvtph2uqq.512(<8 x half> %x0, <8 x i64> %x1, i8 %x2, i32 10)1016 %res1 = call <8 x i64> @llvm.x86.avx512fp16.mask.vcvtph2uqq.512(<8 x half> %x0, <8 x i64> %x1, i8 -1, i32 8)1017 %res2 = add <8 x i64> %res, %res11018 ret <8 x i64> %res21019}1020 1021declare <8 x i64> @llvm.x86.avx512fp16.mask.vcvttph2uqq.512(<8 x half>, <8 x i64>, i8, i32)1022 1023define <8 x i64> @test_int_x86_avx512_mask_cvtt_ph2uqq_512(<8 x half> %x0, <8 x i64> %x1, i8 %x2) {1024; CHECK-LABEL: test_int_x86_avx512_mask_cvtt_ph2uqq_512:1025; CHECK: # %bb.0:1026; CHECK-NEXT: kmovd %edi, %k11027; CHECK-NEXT: vcvttph2uqq {sae}, %xmm0, %zmm1 {%k1}1028; CHECK-NEXT: vcvttph2uqq %xmm0, %zmm01029; CHECK-NEXT: vpaddq %zmm0, %zmm1, %zmm01030; CHECK-NEXT: retq1031 %res = call <8 x i64> @llvm.x86.avx512fp16.mask.vcvttph2uqq.512(<8 x half> %x0, <8 x i64> %x1, i8 %x2, i32 8)1032 %res1 = call <8 x i64> @llvm.x86.avx512fp16.mask.vcvttph2uqq.512(<8 x half> %x0, <8 x i64> %x1, i8 -1, i32 4)1033 %res2 = add <8 x i64> %res, %res11034 ret <8 x i64> %res21035}1036 1037declare i32 @llvm.x86.avx512fp16.vcvtsh2si32(<8 x half>, i32)1038 1039define i32 @test_x86_avx512fp16_vcvtsh2si32(<8 x half> %arg0) {1040; CHECK-LABEL: test_x86_avx512fp16_vcvtsh2si32:1041; CHECK: # %bb.0:1042; CHECK-NEXT: vcvtsh2si %xmm0, %ecx1043; CHECK-NEXT: vcvtsh2si {rz-sae}, %xmm0, %eax1044; CHECK-NEXT: addl %ecx, %eax1045; CHECK-NEXT: retq1046 %res1 = call i32 @llvm.x86.avx512fp16.vcvtsh2si32(<8 x half> %arg0, i32 4)1047 %res2 = call i32 @llvm.x86.avx512fp16.vcvtsh2si32(<8 x half> %arg0, i32 11)1048 %res = add i32 %res1, %res21049 ret i32 %res1050}1051 1052declare i64 @llvm.x86.avx512fp16.vcvtsh2si64(<8 x half>, i32)1053 1054define i64 @test_x86_avx512fp16_vcvtsh2si64(<8 x half> %arg0) {1055; CHECK-LABEL: test_x86_avx512fp16_vcvtsh2si64:1056; CHECK: # %bb.0:1057; CHECK-NEXT: vcvtsh2si %xmm0, %rcx1058; CHECK-NEXT: vcvtsh2si {ru-sae}, %xmm0, %rax1059; CHECK-NEXT: addq %rcx, %rax1060; CHECK-NEXT: retq1061 %res1 = call i64 @llvm.x86.avx512fp16.vcvtsh2si64(<8 x half> %arg0, i32 4)1062 %res2 = call i64 @llvm.x86.avx512fp16.vcvtsh2si64(<8 x half> %arg0, i32 10)1063 %res = add i64 %res1, %res21064 ret i64 %res1065}1066 1067declare i32 @llvm.x86.avx512fp16.vcvttsh2si32(<8 x half>, i32)1068 1069define i32 @test_x86_avx512fp16_vcvttsh2si32(<8 x half> %arg0) {1070; CHECK-LABEL: test_x86_avx512fp16_vcvttsh2si32:1071; CHECK: # %bb.0:1072; CHECK-NEXT: vcvttsh2si %xmm0, %ecx1073; CHECK-NEXT: vcvttsh2si {sae}, %xmm0, %eax1074; CHECK-NEXT: addl %ecx, %eax1075; CHECK-NEXT: retq1076 %res1 = call i32 @llvm.x86.avx512fp16.vcvttsh2si32(<8 x half> %arg0, i32 4)1077 %res2 = call i32 @llvm.x86.avx512fp16.vcvttsh2si32(<8 x half> %arg0, i32 8)1078 %res = add i32 %res1, %res21079 ret i32 %res1080}1081 1082declare i64 @llvm.x86.avx512fp16.vcvttsh2si64(<8 x half>, i32)1083 1084define i64 @test_x86_avx512fp16_vcvttsh2si64(<8 x half> %arg0) {1085; CHECK-LABEL: test_x86_avx512fp16_vcvttsh2si64:1086; CHECK: # %bb.0:1087; CHECK-NEXT: vcvttsh2si %xmm0, %rcx1088; CHECK-NEXT: vcvttsh2si {sae}, %xmm0, %rax1089; CHECK-NEXT: addq %rcx, %rax1090; CHECK-NEXT: retq1091 %res1 = call i64 @llvm.x86.avx512fp16.vcvttsh2si64(<8 x half> %arg0, i32 4)1092 %res2 = call i64 @llvm.x86.avx512fp16.vcvttsh2si64(<8 x half> %arg0, i32 8)1093 %res = add i64 %res1, %res21094 ret i64 %res1095}1096 1097 1098declare i32 @llvm.x86.avx512fp16.vcvtsh2usi32(<8 x half>, i32)1099 1100define i32 @test_x86_avx512fp16_vcvtsh2usi32(<8 x half> %arg0) {1101; CHECK-LABEL: test_x86_avx512fp16_vcvtsh2usi32:1102; CHECK: # %bb.0:1103; CHECK-NEXT: vcvtsh2usi %xmm0, %ecx1104; CHECK-NEXT: vcvtsh2usi {rd-sae}, %xmm0, %eax1105; CHECK-NEXT: addl %ecx, %eax1106; CHECK-NEXT: retq1107 %res1 = call i32 @llvm.x86.avx512fp16.vcvtsh2usi32(<8 x half> %arg0, i32 4)1108 %res2 = call i32 @llvm.x86.avx512fp16.vcvtsh2usi32(<8 x half> %arg0, i32 9)1109 %res = add i32 %res1, %res21110 ret i32 %res1111}1112 1113 1114declare i64 @llvm.x86.avx512fp16.vcvtsh2usi64(<8 x half>, i32)1115 1116define i64 @test_x86_avx512fp16_vcvtsh2usi64(<8 x half> %arg0) {1117; CHECK-LABEL: test_x86_avx512fp16_vcvtsh2usi64:1118; CHECK: # %bb.0:1119; CHECK-NEXT: vcvtsh2usi %xmm0, %rcx1120; CHECK-NEXT: vcvtsh2usi {ru-sae}, %xmm0, %rax1121; CHECK-NEXT: addq %rcx, %rax1122; CHECK-NEXT: retq1123 %res1 = call i64 @llvm.x86.avx512fp16.vcvtsh2usi64(<8 x half> %arg0, i32 4)1124 %res2 = call i64 @llvm.x86.avx512fp16.vcvtsh2usi64(<8 x half> %arg0, i32 10)1125 %res = add i64 %res1, %res21126 ret i64 %res1127}1128 1129declare i32 @llvm.x86.avx512fp16.vcvttsh2usi32(<8 x half>, i32)1130 1131define i32 @test_x86_avx512fp16_vcvttsh2usi32(<8 x half> %arg0) {1132; CHECK-LABEL: test_x86_avx512fp16_vcvttsh2usi32:1133; CHECK: # %bb.0:1134; CHECK-NEXT: vcvttsh2usi %xmm0, %ecx1135; CHECK-NEXT: vcvttsh2usi {sae}, %xmm0, %eax1136; CHECK-NEXT: addl %ecx, %eax1137; CHECK-NEXT: retq1138 %res1 = call i32 @llvm.x86.avx512fp16.vcvttsh2usi32(<8 x half> %arg0, i32 4)1139 %res2 = call i32 @llvm.x86.avx512fp16.vcvttsh2usi32(<8 x half> %arg0, i32 8)1140 %res = add i32 %res1, %res21141 ret i32 %res1142}1143 1144declare i64 @llvm.x86.avx512fp16.vcvttsh2usi64(<8 x half>, i32)1145 1146define i64 @test_x86_avx512fp16_vcvttsh2usi64(<8 x half> %arg0) {1147; CHECK-LABEL: test_x86_avx512fp16_vcvttsh2usi64:1148; CHECK: # %bb.0:1149; CHECK-NEXT: vcvttsh2usi %xmm0, %rcx1150; CHECK-NEXT: vcvttsh2usi {sae}, %xmm0, %rax1151; CHECK-NEXT: addq %rcx, %rax1152; CHECK-NEXT: retq1153 %res1 = call i64 @llvm.x86.avx512fp16.vcvttsh2usi64(<8 x half> %arg0, i32 4)1154 %res2 = call i64 @llvm.x86.avx512fp16.vcvttsh2usi64(<8 x half> %arg0, i32 8)1155 %res = add i64 %res1, %res21156 ret i64 %res1157}1158 1159declare <8 x half> @llvm.x86.avx512fp16.vcvtsi2sh(<8 x half>, i32, i32)1160 1161define <8 x half> @test_x86_avx512fp16_vcvtsi2sh(<8 x half> %arg0, i32 %arg1) {1162; CHECK-LABEL: test_x86_avx512fp16_vcvtsi2sh:1163; CHECK: # %bb.0:1164; CHECK-NEXT: vcvtsi2sh %edi, %xmm0, %xmm11165; CHECK-NEXT: vcvtsi2sh %edi, {rd-sae}, %xmm0, %xmm01166; CHECK-NEXT: vpsrldq {{.*#+}} xmm2 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero1167; CHECK-NEXT: vpsrldq {{.*#+}} xmm3 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero1168; CHECK-NEXT: vaddsh %xmm2, %xmm3, %xmm21169; CHECK-NEXT: vshufps {{.*#+}} xmm3 = xmm0[3,3,3,3]1170; CHECK-NEXT: vshufps {{.*#+}} xmm4 = xmm1[3,3,3,3]1171; CHECK-NEXT: vaddsh %xmm3, %xmm4, %xmm31172; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]1173; CHECK-NEXT: vpsrldq {{.*#+}} xmm3 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero1174; CHECK-NEXT: vpsrldq {{.*#+}} xmm4 = xmm1[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero1175; CHECK-NEXT: vaddsh %xmm3, %xmm4, %xmm31176; CHECK-NEXT: vshufpd {{.*#+}} xmm4 = xmm0[1,0]1177; CHECK-NEXT: vshufpd {{.*#+}} xmm5 = xmm1[1,0]1178; CHECK-NEXT: vaddsh %xmm4, %xmm5, %xmm41179; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]1180; CHECK-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]1181; CHECK-NEXT: vpsrlq $48, %xmm0, %xmm31182; CHECK-NEXT: vpsrlq $48, %xmm1, %xmm41183; CHECK-NEXT: vaddsh %xmm3, %xmm4, %xmm31184; CHECK-NEXT: vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]1185; CHECK-NEXT: vmovshdup {{.*#+}} xmm5 = xmm1[1,1,3,3]1186; CHECK-NEXT: vaddsh %xmm4, %xmm5, %xmm41187; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]1188; CHECK-NEXT: vaddsh %xmm0, %xmm1, %xmm41189; CHECK-NEXT: vpsrld $16, %xmm0, %xmm01190; CHECK-NEXT: vpsrld $16, %xmm1, %xmm11191; CHECK-NEXT: vaddsh %xmm0, %xmm1, %xmm01192; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3]1193; CHECK-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]1194; CHECK-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]1195; CHECK-NEXT: retq1196 %res1 = call <8 x half> @llvm.x86.avx512fp16.vcvtsi2sh(<8 x half> %arg0, i32 %arg1, i32 4)1197 %res2 = call <8 x half> @llvm.x86.avx512fp16.vcvtsi2sh(<8 x half> %arg0, i32 %arg1, i32 9)1198 %res = fadd <8 x half> %res1, %res21199 ret <8 x half> %res1200}1201 1202declare <8 x half> @llvm.x86.avx512fp16.vcvtsi642sh(<8 x half>, i64, i32)1203 1204define <8 x half> @test_x86_avx512fp16_vcvtsi642sh(<8 x half> %arg0, i64 %arg1) {1205; CHECK-LABEL: test_x86_avx512fp16_vcvtsi642sh:1206; CHECK: # %bb.0:1207; CHECK-NEXT: vcvtsi2sh %rdi, %xmm0, %xmm11208; CHECK-NEXT: vcvtsi2sh %rdi, {rn-sae}, %xmm0, %xmm01209; CHECK-NEXT: vpsrldq {{.*#+}} xmm2 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero1210; CHECK-NEXT: vpsrldq {{.*#+}} xmm3 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero1211; CHECK-NEXT: vaddsh %xmm2, %xmm3, %xmm21212; CHECK-NEXT: vshufps {{.*#+}} xmm3 = xmm0[3,3,3,3]1213; CHECK-NEXT: vshufps {{.*#+}} xmm4 = xmm1[3,3,3,3]1214; CHECK-NEXT: vaddsh %xmm3, %xmm4, %xmm31215; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]1216; CHECK-NEXT: vpsrldq {{.*#+}} xmm3 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero1217; CHECK-NEXT: vpsrldq {{.*#+}} xmm4 = xmm1[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero1218; CHECK-NEXT: vaddsh %xmm3, %xmm4, %xmm31219; CHECK-NEXT: vshufpd {{.*#+}} xmm4 = xmm0[1,0]1220; CHECK-NEXT: vshufpd {{.*#+}} xmm5 = xmm1[1,0]1221; CHECK-NEXT: vaddsh %xmm4, %xmm5, %xmm41222; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]1223; CHECK-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]1224; CHECK-NEXT: vpsrlq $48, %xmm0, %xmm31225; CHECK-NEXT: vpsrlq $48, %xmm1, %xmm41226; CHECK-NEXT: vaddsh %xmm3, %xmm4, %xmm31227; CHECK-NEXT: vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]1228; CHECK-NEXT: vmovshdup {{.*#+}} xmm5 = xmm1[1,1,3,3]1229; CHECK-NEXT: vaddsh %xmm4, %xmm5, %xmm41230; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]1231; CHECK-NEXT: vaddsh %xmm0, %xmm1, %xmm41232; CHECK-NEXT: vpsrld $16, %xmm0, %xmm01233; CHECK-NEXT: vpsrld $16, %xmm1, %xmm11234; CHECK-NEXT: vaddsh %xmm0, %xmm1, %xmm01235; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3]1236; CHECK-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]1237; CHECK-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]1238; CHECK-NEXT: retq1239 %res1 = call <8 x half> @llvm.x86.avx512fp16.vcvtsi642sh(<8 x half> %arg0, i64 %arg1, i32 4)1240 %res2 = call <8 x half> @llvm.x86.avx512fp16.vcvtsi642sh(<8 x half> %arg0, i64 %arg1, i32 8)1241 %res = fadd <8 x half> %res1, %res21242 ret <8 x half> %res1243}1244 1245declare <8 x half> @llvm.x86.avx512fp16.vcvtusi2sh(<8 x half>, i32, i32)1246 1247define <8 x half> @test_x86_avx512fp16_vcvtusi2sh(<8 x half> %arg0, i32 %arg1) {1248; CHECK-LABEL: test_x86_avx512fp16_vcvtusi2sh:1249; CHECK: # %bb.0:1250; CHECK-NEXT: vcvtusi2sh %edi, %xmm0, %xmm11251; CHECK-NEXT: vcvtusi2sh %edi, {rd-sae}, %xmm0, %xmm01252; CHECK-NEXT: vpsrldq {{.*#+}} xmm2 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero1253; CHECK-NEXT: vpsrldq {{.*#+}} xmm3 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero1254; CHECK-NEXT: vaddsh %xmm2, %xmm3, %xmm21255; CHECK-NEXT: vshufps {{.*#+}} xmm3 = xmm0[3,3,3,3]1256; CHECK-NEXT: vshufps {{.*#+}} xmm4 = xmm1[3,3,3,3]1257; CHECK-NEXT: vaddsh %xmm3, %xmm4, %xmm31258; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]1259; CHECK-NEXT: vpsrldq {{.*#+}} xmm3 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero1260; CHECK-NEXT: vpsrldq {{.*#+}} xmm4 = xmm1[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero1261; CHECK-NEXT: vaddsh %xmm3, %xmm4, %xmm31262; CHECK-NEXT: vshufpd {{.*#+}} xmm4 = xmm0[1,0]1263; CHECK-NEXT: vshufpd {{.*#+}} xmm5 = xmm1[1,0]1264; CHECK-NEXT: vaddsh %xmm4, %xmm5, %xmm41265; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]1266; CHECK-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]1267; CHECK-NEXT: vpsrlq $48, %xmm0, %xmm31268; CHECK-NEXT: vpsrlq $48, %xmm1, %xmm41269; CHECK-NEXT: vaddsh %xmm3, %xmm4, %xmm31270; CHECK-NEXT: vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]1271; CHECK-NEXT: vmovshdup {{.*#+}} xmm5 = xmm1[1,1,3,3]1272; CHECK-NEXT: vaddsh %xmm4, %xmm5, %xmm41273; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]1274; CHECK-NEXT: vaddsh %xmm0, %xmm1, %xmm41275; CHECK-NEXT: vpsrld $16, %xmm0, %xmm01276; CHECK-NEXT: vpsrld $16, %xmm1, %xmm11277; CHECK-NEXT: vaddsh %xmm0, %xmm1, %xmm01278; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3]1279; CHECK-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]1280; CHECK-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]1281; CHECK-NEXT: retq1282 %res1 = call <8 x half> @llvm.x86.avx512fp16.vcvtusi2sh(<8 x half> %arg0, i32 %arg1, i32 4)1283 %res2 = call <8 x half> @llvm.x86.avx512fp16.vcvtusi2sh(<8 x half> %arg0, i32 %arg1, i32 9)1284 %res = fadd <8 x half> %res1, %res21285 ret <8 x half> %res1286}1287 1288declare <8 x half> @llvm.x86.avx512fp16.vcvtusi642sh(<8 x half>, i64, i32)1289 1290define <8 x half> @test_x86_avx512fp16_vcvtusi642sh(<8 x half> %arg0, i64 %arg1) {1291; CHECK-LABEL: test_x86_avx512fp16_vcvtusi642sh:1292; CHECK: # %bb.0:1293; CHECK-NEXT: vcvtusi2sh %rdi, %xmm0, %xmm11294; CHECK-NEXT: vcvtusi2sh %rdi, {rd-sae}, %xmm0, %xmm01295; CHECK-NEXT: vpsrldq {{.*#+}} xmm2 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero1296; CHECK-NEXT: vpsrldq {{.*#+}} xmm3 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero1297; CHECK-NEXT: vaddsh %xmm2, %xmm3, %xmm21298; CHECK-NEXT: vshufps {{.*#+}} xmm3 = xmm0[3,3,3,3]1299; CHECK-NEXT: vshufps {{.*#+}} xmm4 = xmm1[3,3,3,3]1300; CHECK-NEXT: vaddsh %xmm3, %xmm4, %xmm31301; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]1302; CHECK-NEXT: vpsrldq {{.*#+}} xmm3 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero1303; CHECK-NEXT: vpsrldq {{.*#+}} xmm4 = xmm1[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero1304; CHECK-NEXT: vaddsh %xmm3, %xmm4, %xmm31305; CHECK-NEXT: vshufpd {{.*#+}} xmm4 = xmm0[1,0]1306; CHECK-NEXT: vshufpd {{.*#+}} xmm5 = xmm1[1,0]1307; CHECK-NEXT: vaddsh %xmm4, %xmm5, %xmm41308; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]1309; CHECK-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]1310; CHECK-NEXT: vpsrlq $48, %xmm0, %xmm31311; CHECK-NEXT: vpsrlq $48, %xmm1, %xmm41312; CHECK-NEXT: vaddsh %xmm3, %xmm4, %xmm31313; CHECK-NEXT: vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]1314; CHECK-NEXT: vmovshdup {{.*#+}} xmm5 = xmm1[1,1,3,3]1315; CHECK-NEXT: vaddsh %xmm4, %xmm5, %xmm41316; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]1317; CHECK-NEXT: vaddsh %xmm0, %xmm1, %xmm41318; CHECK-NEXT: vpsrld $16, %xmm0, %xmm01319; CHECK-NEXT: vpsrld $16, %xmm1, %xmm11320; CHECK-NEXT: vaddsh %xmm0, %xmm1, %xmm01321; CHECK-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3]1322; CHECK-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]1323; CHECK-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]1324; CHECK-NEXT: retq1325 %res1 = call <8 x half> @llvm.x86.avx512fp16.vcvtusi642sh(<8 x half> %arg0, i64 %arg1, i32 4)1326 %res2 = call <8 x half> @llvm.x86.avx512fp16.vcvtusi642sh(<8 x half> %arg0, i64 %arg1, i32 9)1327 %res = fadd <8 x half> %res1, %res21328 ret <8 x half> %res1329}1330 1331 1332define <16 x half> @test_mm256_castph128_ph256_freeze(<8 x half> %a0) nounwind {1333; CHECK-LABEL: test_mm256_castph128_ph256_freeze:1334; CHECK: # %bb.0:1335; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm01336; CHECK-NEXT: retq1337 %a1 = freeze <8 x half> poison1338 %res = shufflevector <8 x half> %a0, <8 x half> %a1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>1339 ret <16 x half> %res1340}1341 1342 1343define <32 x half> @test_mm512_castph128_ph512_freeze(<8 x half> %a0) nounwind {1344; CHECK-LABEL: test_mm512_castph128_ph512_freeze:1345; CHECK: # %bb.0:1346; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm11347; CHECK-NEXT: vinsertf32x4 $0, %xmm0, %zmm1, %zmm01348; CHECK-NEXT: retq1349 %a1 = freeze <8 x half> poison1350 %res = shufflevector <8 x half> %a0, <8 x half> %a1, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>1351 ret <32 x half> %res1352}1353 1354 1355define <32 x half> @test_mm512_castph256_ph512_freeze(<16 x half> %a0) nounwind {1356; CHECK-LABEL: test_mm512_castph256_ph512_freeze:1357; CHECK: # %bb.0:1358; CHECK-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm01359; CHECK-NEXT: retq1360 %a1 = freeze <16 x half> poison1361 %res = shufflevector <16 x half> %a0, <16 x half> %a1, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>1362 ret <32 x half> %res1363}1364 1365define <8 x half> @PR153570(ptr %p) {1366; CHECK-LABEL: PR153570:1367; CHECK: # %bb.0:1368; CHECK-NEXT: vpbroadcastw {{.*#+}} xmm0 = [2.0E+0,2.0E+0,2.0E+0,2.0E+0,2.0E+0,2.0E+0,2.0E+0,2.0E+0]1369; CHECK-NEXT: vpbroadcastw {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]1370; CHECK-NEXT: vmulsh {rn-sae}, %xmm0, %xmm1, %xmm01371; CHECK-NEXT: vpbroadcastw {{.*#+}} xmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]1372; CHECK-NEXT: vmovsh {{.*#+}} xmm1 = xmm2[0],xmm1[1,2,3,4,5,6,7]1373; CHECK-NEXT: vmovaps %xmm1, (%rdi)1374; CHECK-NEXT: retq1375 %r = tail call <8 x half> @llvm.x86.avx512fp16.mask.mul.sh.round(<8 x half> <half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00>, <8 x half> <half 0xH4000, half 0xH4000, half 0xH4000, half 0xH4000, half 0xH4000, half 0xH4000, half 0xH4000, half 0xH4000>, <8 x half> <half 0xH8000, half 0xH8000, half 0xH8000, half 0xH8000, half 0xH8000, half 0xH8000, half 0xH8000, half 0xH8000>, i8 0, i32 8)1376 store <8 x half> %r, ptr %p, align 161377 %r1 = tail call <8 x half> @llvm.x86.avx512fp16.mask.mul.sh.round(<8 x half> <half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00>, <8 x half> <half 0xH4000, half 0xH4000, half 0xH4000, half 0xH4000, half 0xH4000, half 0xH4000, half 0xH4000, half 0xH4000>, <8 x half> <half 0xH8000, half 0xH8000, half 0xH8000, half 0xH8000, half 0xH8000, half 0xH8000, half 0xH8000, half 0xH8000>, i8 1, i32 8)1378 ret <8 x half> %r11379}1380