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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl --show-mc-encoding| FileCheck %s3; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl,-evex512 --show-mc-encoding| FileCheck %s4 5; 256-bit6 7define <4 x i64> @vpaddq256_test(<4 x i64> %i, <4 x i64> %j) nounwind readnone {8; CHECK-LABEL: vpaddq256_test:9; CHECK: ## %bb.0:10; CHECK-NEXT: vpaddq %ymm1, %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0xd4,0xc1]11; CHECK-NEXT: retq ## encoding: [0xc3]12 %x = add <4 x i64> %i, %j13 ret <4 x i64> %x14}15 16define <4 x i64> @vpaddq256_fold_test(<4 x i64> %i, ptr %j) nounwind {17; CHECK-LABEL: vpaddq256_fold_test:18; CHECK: ## %bb.0:19; CHECK-NEXT: vpaddq (%rdi), %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0xd4,0x07]20; CHECK-NEXT: retq ## encoding: [0xc3]21 %tmp = load <4 x i64>, ptr %j, align 422 %x = add <4 x i64> %i, %tmp23 ret <4 x i64> %x24}25 26define <4 x i64> @vpaddq256_broadcast_test(<4 x i64> %i) nounwind {27; CHECK-LABEL: vpaddq256_broadcast_test:28; CHECK: ## %bb.0:29; CHECK-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0xfd,0x38,0xd4,0x05,A,A,A,A]30; CHECK-NEXT: ## fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: reloc_riprel_4byte31; CHECK-NEXT: retq ## encoding: [0xc3]32 %x = add <4 x i64> %i, <i64 2, i64 2, i64 2, i64 2>33 ret <4 x i64> %x34}35 36define <4 x i64> @vpaddq256_broadcast2_test(<4 x i64> %i, ptr %j.ptr) nounwind {37; CHECK-LABEL: vpaddq256_broadcast2_test:38; CHECK: ## %bb.0:39; CHECK-NEXT: vpaddq (%rdi){1to4}, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0xfd,0x38,0xd4,0x07]40; CHECK-NEXT: retq ## encoding: [0xc3]41 %j = load i64, ptr %j.ptr42 %j.0 = insertelement <4 x i64> undef, i64 %j, i32 043 %j.v = shufflevector <4 x i64> %j.0, <4 x i64> undef, <4 x i32> zeroinitializer44 %x = add <4 x i64> %i, %j.v45 ret <4 x i64> %x46}47 48define <8 x i32> @vpaddd256_test(<8 x i32> %i, <8 x i32> %j) nounwind readnone {49; CHECK-LABEL: vpaddd256_test:50; CHECK: ## %bb.0:51; CHECK-NEXT: vpaddd %ymm1, %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0xfe,0xc1]52; CHECK-NEXT: retq ## encoding: [0xc3]53 %x = add <8 x i32> %i, %j54 ret <8 x i32> %x55}56 57define <8 x i32> @vpaddd256_fold_test(<8 x i32> %i, ptr %j) nounwind {58; CHECK-LABEL: vpaddd256_fold_test:59; CHECK: ## %bb.0:60; CHECK-NEXT: vpaddd (%rdi), %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0xfe,0x07]61; CHECK-NEXT: retq ## encoding: [0xc3]62 %tmp = load <8 x i32>, ptr %j, align 463 %x = add <8 x i32> %i, %tmp64 ret <8 x i32> %x65}66 67define <8 x i32> @vpaddd256_broadcast_test(<8 x i32> %i) nounwind {68; CHECK-LABEL: vpaddd256_broadcast_test:69; CHECK: ## %bb.0:70; CHECK-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x38,0xfe,0x05,A,A,A,A]71; CHECK-NEXT: ## fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: reloc_riprel_4byte72; CHECK-NEXT: retq ## encoding: [0xc3]73 %x = add <8 x i32> %i, <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>74 ret <8 x i32> %x75}76 77define <8 x i32> @vpaddd256_mask_test(<8 x i32> %i, <8 x i32> %j, <8 x i32> %mask1) nounwind readnone {78; CHECK-LABEL: vpaddd256_mask_test:79; CHECK: ## %bb.0:80; CHECK-NEXT: vptestmd %ymm2, %ymm2, %k1 ## encoding: [0x62,0xf2,0x6d,0x28,0x27,0xca]81; CHECK-NEXT: vpaddd %ymm1, %ymm0, %ymm0 {%k1} ## encoding: [0x62,0xf1,0x7d,0x29,0xfe,0xc1]82; CHECK-NEXT: retq ## encoding: [0xc3]83 %mask = icmp ne <8 x i32> %mask1, zeroinitializer84 %x = add <8 x i32> %i, %j85 %r = select <8 x i1> %mask, <8 x i32> %x, <8 x i32> %i86 ret <8 x i32> %r87}88 89define <8 x i32> @vpaddd256_maskz_test(<8 x i32> %i, <8 x i32> %j, <8 x i32> %mask1) nounwind readnone {90; CHECK-LABEL: vpaddd256_maskz_test:91; CHECK: ## %bb.0:92; CHECK-NEXT: vptestmd %ymm2, %ymm2, %k1 ## encoding: [0x62,0xf2,0x6d,0x28,0x27,0xca]93; CHECK-NEXT: vpaddd %ymm1, %ymm0, %ymm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xa9,0xfe,0xc1]94; CHECK-NEXT: retq ## encoding: [0xc3]95 %mask = icmp ne <8 x i32> %mask1, zeroinitializer96 %x = add <8 x i32> %i, %j97 %r = select <8 x i1> %mask, <8 x i32> %x, <8 x i32> zeroinitializer98 ret <8 x i32> %r99}100 101define <8 x i32> @vpaddd256_mask_fold_test(<8 x i32> %i, ptr %j.ptr, <8 x i32> %mask1) nounwind readnone {102; CHECK-LABEL: vpaddd256_mask_fold_test:103; CHECK: ## %bb.0:104; CHECK-NEXT: vptestmd %ymm1, %ymm1, %k1 ## encoding: [0x62,0xf2,0x75,0x28,0x27,0xc9]105; CHECK-NEXT: vpaddd (%rdi), %ymm0, %ymm0 {%k1} ## encoding: [0x62,0xf1,0x7d,0x29,0xfe,0x07]106; CHECK-NEXT: retq ## encoding: [0xc3]107 %mask = icmp ne <8 x i32> %mask1, zeroinitializer108 %j = load <8 x i32>, ptr %j.ptr109 %x = add <8 x i32> %i, %j110 %r = select <8 x i1> %mask, <8 x i32> %x, <8 x i32> %i111 ret <8 x i32> %r112}113 114define <8 x i32> @vpaddd256_mask_broadcast_test(<8 x i32> %i, <8 x i32> %mask1) nounwind readnone {115; CHECK-LABEL: vpaddd256_mask_broadcast_test:116; CHECK: ## %bb.0:117; CHECK-NEXT: vptestmd %ymm1, %ymm1, %k1 ## encoding: [0x62,0xf2,0x75,0x28,0x27,0xc9]118; CHECK-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm0 {%k1} ## encoding: [0x62,0xf1,0x7d,0x39,0xfe,0x05,A,A,A,A]119; CHECK-NEXT: ## fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: reloc_riprel_4byte120; CHECK-NEXT: retq ## encoding: [0xc3]121 %mask = icmp ne <8 x i32> %mask1, zeroinitializer122 %x = add <8 x i32> %i, <i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>123 %r = select <8 x i1> %mask, <8 x i32> %x, <8 x i32> %i124 ret <8 x i32> %r125}126 127define <8 x i32> @vpaddd256_maskz_fold_test(<8 x i32> %i, ptr %j.ptr, <8 x i32> %mask1) nounwind readnone {128; CHECK-LABEL: vpaddd256_maskz_fold_test:129; CHECK: ## %bb.0:130; CHECK-NEXT: vptestmd %ymm1, %ymm1, %k1 ## encoding: [0x62,0xf2,0x75,0x28,0x27,0xc9]131; CHECK-NEXT: vpaddd (%rdi), %ymm0, %ymm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xa9,0xfe,0x07]132; CHECK-NEXT: retq ## encoding: [0xc3]133 %mask = icmp ne <8 x i32> %mask1, zeroinitializer134 %j = load <8 x i32>, ptr %j.ptr135 %x = add <8 x i32> %i, %j136 %r = select <8 x i1> %mask, <8 x i32> %x, <8 x i32> zeroinitializer137 ret <8 x i32> %r138}139 140define <8 x i32> @vpaddd256_maskz_broadcast_test(<8 x i32> %i, <8 x i32> %mask1) nounwind readnone {141; CHECK-LABEL: vpaddd256_maskz_broadcast_test:142; CHECK: ## %bb.0:143; CHECK-NEXT: vptestmd %ymm1, %ymm1, %k1 ## encoding: [0x62,0xf2,0x75,0x28,0x27,0xc9]144; CHECK-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xb9,0xfe,0x05,A,A,A,A]145; CHECK-NEXT: ## fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: reloc_riprel_4byte146; CHECK-NEXT: retq ## encoding: [0xc3]147 %mask = icmp ne <8 x i32> %mask1, zeroinitializer148 %x = add <8 x i32> %i, <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>149 %r = select <8 x i1> %mask, <8 x i32> %x, <8 x i32> zeroinitializer150 ret <8 x i32> %r151}152 153define <4 x i64> @vpsubq256_test(<4 x i64> %i, <4 x i64> %j) nounwind readnone {154; CHECK-LABEL: vpsubq256_test:155; CHECK: ## %bb.0:156; CHECK-NEXT: vpsubq %ymm1, %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0xfb,0xc1]157; CHECK-NEXT: retq ## encoding: [0xc3]158 %x = sub <4 x i64> %i, %j159 ret <4 x i64> %x160}161 162define <8 x i32> @vpsubd256_test(<8 x i32> %i, <8 x i32> %j) nounwind readnone {163; CHECK-LABEL: vpsubd256_test:164; CHECK: ## %bb.0:165; CHECK-NEXT: vpsubd %ymm1, %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0xfa,0xc1]166; CHECK-NEXT: retq ## encoding: [0xc3]167 %x = sub <8 x i32> %i, %j168 ret <8 x i32> %x169}170 171define <8 x i32> @vpmulld256_test(<8 x i32> %i, <8 x i32> %j) {172; CHECK-LABEL: vpmulld256_test:173; CHECK: ## %bb.0:174; CHECK-NEXT: vpmulld %ymm1, %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7d,0x40,0xc1]175; CHECK-NEXT: retq ## encoding: [0xc3]176 %x = mul <8 x i32> %i, %j177 ret <8 x i32> %x178}179 180define <4 x double> @test_vaddpd_256(<4 x double> %y, <4 x double> %x) {181; CHECK-LABEL: test_vaddpd_256:182; CHECK: ## %bb.0: ## %entry183; CHECK-NEXT: vaddpd %ymm0, %ymm1, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf5,0x58,0xc0]184; CHECK-NEXT: retq ## encoding: [0xc3]185entry:186 %add.i = fadd <4 x double> %x, %y187 ret <4 x double> %add.i188}189 190define <4 x double> @test_fold_vaddpd_256(<4 x double> %y) {191; CHECK-LABEL: test_fold_vaddpd_256:192; CHECK: ## %bb.0: ## %entry193; CHECK-NEXT: vaddpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0x58,0x05,A,A,A,A]194; CHECK-NEXT: ## fixup A - offset: 4, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: reloc_riprel_4byte195; CHECK-NEXT: retq ## encoding: [0xc3]196entry:197 %add.i = fadd <4 x double> %y, <double 4.500000e+00, double 3.400000e+00, double 4.500000e+00, double 5.600000e+00>198 ret <4 x double> %add.i199}200 201define <8 x float> @test_broadcast_vaddpd_256(<8 x float> %a) nounwind {202; CHECK-LABEL: test_broadcast_vaddpd_256:203; CHECK: ## %bb.0:204; CHECK-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7c,0x38,0x58,0x05,A,A,A,A]205; CHECK-NEXT: ## fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: reloc_riprel_4byte206; CHECK-NEXT: retq ## encoding: [0xc3]207 %b = fadd <8 x float> %a, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>208 ret <8 x float> %b209}210 211define <8 x float> @test_mask_vaddps_256(<8 x float> %dst, <8 x float> %i, <8 x float> %j, <8 x i32> %mask1) nounwind readnone {212; CHECK-LABEL: test_mask_vaddps_256:213; CHECK: ## %bb.0:214; CHECK-NEXT: vptestmd %ymm3, %ymm3, %k1 ## encoding: [0x62,0xf2,0x65,0x28,0x27,0xcb]215; CHECK-NEXT: vaddps %ymm2, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf1,0x74,0x29,0x58,0xc2]216; CHECK-NEXT: retq ## encoding: [0xc3]217 %mask = icmp ne <8 x i32> %mask1, zeroinitializer218 %x = fadd <8 x float> %i, %j219 %r = select <8 x i1> %mask, <8 x float> %x, <8 x float> %dst220 ret <8 x float> %r221}222 223define <8 x float> @test_mask_vmulps_256(<8 x float> %dst, <8 x float> %i, <8 x float> %j, <8 x i32> %mask1) nounwind readnone {224; CHECK-LABEL: test_mask_vmulps_256:225; CHECK: ## %bb.0:226; CHECK-NEXT: vptestmd %ymm3, %ymm3, %k1 ## encoding: [0x62,0xf2,0x65,0x28,0x27,0xcb]227; CHECK-NEXT: vmulps %ymm2, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf1,0x74,0x29,0x59,0xc2]228; CHECK-NEXT: retq ## encoding: [0xc3]229 %mask = icmp ne <8 x i32> %mask1, zeroinitializer230 %x = fmul <8 x float> %i, %j231 %r = select <8 x i1> %mask, <8 x float> %x, <8 x float> %dst232 ret <8 x float> %r233}234 235define <8 x float> @test_mask_vminps_256(<8 x float> %dst, <8 x float> %i, <8 x float> %j, <8 x i32> %mask1)nounwind readnone {236; CHECK-LABEL: test_mask_vminps_256:237; CHECK: ## %bb.0:238; CHECK-NEXT: vptestmd %ymm3, %ymm3, %k1 ## encoding: [0x62,0xf2,0x65,0x28,0x27,0xcb]239; CHECK-NEXT: vminps %ymm2, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf1,0x74,0x29,0x5d,0xc2]240; CHECK-NEXT: retq ## encoding: [0xc3]241 %mask = icmp ne <8 x i32> %mask1, zeroinitializer242 %cmp_res = fcmp olt <8 x float> %i, %j243 %min = select <8 x i1> %cmp_res, <8 x float> %i, <8 x float> %j244 %r = select <8 x i1> %mask, <8 x float> %min, <8 x float> %dst245 ret <8 x float> %r246}247 248define <8 x float> @test_mask_vmaxps_256(<8 x float> %dst, <8 x float> %i, <8 x float> %j, <8 x i32> %mask1) nounwind readnone {249; CHECK-LABEL: test_mask_vmaxps_256:250; CHECK: ## %bb.0:251; CHECK-NEXT: vptestmd %ymm3, %ymm3, %k1 ## encoding: [0x62,0xf2,0x65,0x28,0x27,0xcb]252; CHECK-NEXT: vmaxps %ymm2, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf1,0x74,0x29,0x5f,0xc2]253; CHECK-NEXT: retq ## encoding: [0xc3]254 %mask = icmp ne <8 x i32> %mask1, zeroinitializer255 %cmp_res = fcmp ogt <8 x float> %i, %j256 %max = select <8 x i1> %cmp_res, <8 x float> %i, <8 x float> %j257 %r = select <8 x i1> %mask, <8 x float> %max, <8 x float> %dst258 ret <8 x float> %r259}260 261define <8 x float> @test_mask_vsubps_256(<8 x float> %dst, <8 x float> %i, <8 x float> %j, <8 x i32> %mask1) nounwind readnone {262; CHECK-LABEL: test_mask_vsubps_256:263; CHECK: ## %bb.0:264; CHECK-NEXT: vptestmd %ymm3, %ymm3, %k1 ## encoding: [0x62,0xf2,0x65,0x28,0x27,0xcb]265; CHECK-NEXT: vsubps %ymm2, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf1,0x74,0x29,0x5c,0xc2]266; CHECK-NEXT: retq ## encoding: [0xc3]267 %mask = icmp ne <8 x i32> %mask1, zeroinitializer268 %x = fsub <8 x float> %i, %j269 %r = select <8 x i1> %mask, <8 x float> %x, <8 x float> %dst270 ret <8 x float> %r271}272 273define <8 x float> @test_mask_vdivps_256(<8 x float> %dst, <8 x float> %i, <8 x float> %j, <8 x i32> %mask1) nounwind readnone {274; CHECK-LABEL: test_mask_vdivps_256:275; CHECK: ## %bb.0:276; CHECK-NEXT: vptestmd %ymm3, %ymm3, %k1 ## encoding: [0x62,0xf2,0x65,0x28,0x27,0xcb]277; CHECK-NEXT: vdivps %ymm2, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf1,0x74,0x29,0x5e,0xc2]278; CHECK-NEXT: retq ## encoding: [0xc3]279 %mask = icmp ne <8 x i32> %mask1, zeroinitializer280 %x = fdiv <8 x float> %i, %j281 %r = select <8 x i1> %mask, <8 x float> %x, <8 x float> %dst282 ret <8 x float> %r283}284 285define <4 x double> @test_mask_vmulpd_256(<4 x double> %dst, <4 x double> %i, <4 x double> %j, <4 x i64> %mask1) nounwind readnone {286; CHECK-LABEL: test_mask_vmulpd_256:287; CHECK: ## %bb.0:288; CHECK-NEXT: vptestmq %ymm3, %ymm3, %k1 ## encoding: [0x62,0xf2,0xe5,0x28,0x27,0xcb]289; CHECK-NEXT: vmulpd %ymm2, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf1,0xf5,0x29,0x59,0xc2]290; CHECK-NEXT: retq ## encoding: [0xc3]291 %mask = icmp ne <4 x i64> %mask1, zeroinitializer292 %x = fmul <4 x double> %i, %j293 %r = select <4 x i1> %mask, <4 x double> %x, <4 x double> %dst294 ret <4 x double> %r295}296 297define <4 x double> @test_mask_vminpd_256(<4 x double> %dst, <4 x double> %i, <4 x double> %j, <4 x i64> %mask1) nounwind readnone {298; CHECK-LABEL: test_mask_vminpd_256:299; CHECK: ## %bb.0:300; CHECK-NEXT: vptestmq %ymm3, %ymm3, %k1 ## encoding: [0x62,0xf2,0xe5,0x28,0x27,0xcb]301; CHECK-NEXT: vminpd %ymm2, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf1,0xf5,0x29,0x5d,0xc2]302; CHECK-NEXT: retq ## encoding: [0xc3]303 %mask = icmp ne <4 x i64> %mask1, zeroinitializer304 %cmp_res = fcmp olt <4 x double> %i, %j305 %min = select <4 x i1> %cmp_res, <4 x double> %i, <4 x double> %j306 %r = select <4 x i1> %mask, <4 x double> %min, <4 x double> %dst307 ret <4 x double> %r308}309 310define <4 x double> @test_mask_vmaxpd_256(<4 x double> %dst, <4 x double> %i, <4 x double> %j, <4 x i64> %mask1) nounwind readnone {311; CHECK-LABEL: test_mask_vmaxpd_256:312; CHECK: ## %bb.0:313; CHECK-NEXT: vptestmq %ymm3, %ymm3, %k1 ## encoding: [0x62,0xf2,0xe5,0x28,0x27,0xcb]314; CHECK-NEXT: vmaxpd %ymm2, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf1,0xf5,0x29,0x5f,0xc2]315; CHECK-NEXT: retq ## encoding: [0xc3]316 %mask = icmp ne <4 x i64> %mask1, zeroinitializer317 %cmp_res = fcmp ogt <4 x double> %i, %j318 %max = select <4 x i1> %cmp_res, <4 x double> %i, <4 x double> %j319 %r = select <4 x i1> %mask, <4 x double> %max, <4 x double> %dst320 ret <4 x double> %r321}322 323define <4 x double> @test_mask_vsubpd_256(<4 x double> %dst, <4 x double> %i, <4 x double> %j, <4 x i64> %mask1) nounwind readnone {324; CHECK-LABEL: test_mask_vsubpd_256:325; CHECK: ## %bb.0:326; CHECK-NEXT: vptestmq %ymm3, %ymm3, %k1 ## encoding: [0x62,0xf2,0xe5,0x28,0x27,0xcb]327; CHECK-NEXT: vsubpd %ymm2, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf1,0xf5,0x29,0x5c,0xc2]328; CHECK-NEXT: retq ## encoding: [0xc3]329 %mask = icmp ne <4 x i64> %mask1, zeroinitializer330 %x = fsub <4 x double> %i, %j331 %r = select <4 x i1> %mask, <4 x double> %x, <4 x double> %dst332 ret <4 x double> %r333}334 335define <4 x double> @test_mask_vdivpd_256(<4 x double> %dst, <4 x double> %i, <4 x double> %j, <4 x i64> %mask1) nounwind readnone {336; CHECK-LABEL: test_mask_vdivpd_256:337; CHECK: ## %bb.0:338; CHECK-NEXT: vptestmq %ymm3, %ymm3, %k1 ## encoding: [0x62,0xf2,0xe5,0x28,0x27,0xcb]339; CHECK-NEXT: vdivpd %ymm2, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf1,0xf5,0x29,0x5e,0xc2]340; CHECK-NEXT: retq ## encoding: [0xc3]341 %mask = icmp ne <4 x i64> %mask1, zeroinitializer342 %x = fdiv <4 x double> %i, %j343 %r = select <4 x i1> %mask, <4 x double> %x, <4 x double> %dst344 ret <4 x double> %r345}346 347define <4 x double> @test_mask_vaddpd_256(<4 x double> %dst, <4 x double> %i, <4 x double> %j, <4 x i64> %mask1) nounwind readnone {348; CHECK-LABEL: test_mask_vaddpd_256:349; CHECK: ## %bb.0:350; CHECK-NEXT: vptestmq %ymm3, %ymm3, %k1 ## encoding: [0x62,0xf2,0xe5,0x28,0x27,0xcb]351; CHECK-NEXT: vaddpd %ymm2, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf1,0xf5,0x29,0x58,0xc2]352; CHECK-NEXT: retq ## encoding: [0xc3]353 %mask = icmp ne <4 x i64> %mask1, zeroinitializer354 %x = fadd <4 x double> %i, %j355 %r = select <4 x i1> %mask, <4 x double> %x, <4 x double> %dst356 ret <4 x double> %r357}358 359define <4 x double> @test_maskz_vaddpd_256(<4 x double> %i, <4 x double> %j, <4 x i64> %mask1) nounwind readnone {360; CHECK-LABEL: test_maskz_vaddpd_256:361; CHECK: ## %bb.0:362; CHECK-NEXT: vptestmq %ymm2, %ymm2, %k1 ## encoding: [0x62,0xf2,0xed,0x28,0x27,0xca]363; CHECK-NEXT: vaddpd %ymm1, %ymm0, %ymm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xa9,0x58,0xc1]364; CHECK-NEXT: retq ## encoding: [0xc3]365 %mask = icmp ne <4 x i64> %mask1, zeroinitializer366 %x = fadd <4 x double> %i, %j367 %r = select <4 x i1> %mask, <4 x double> %x, <4 x double> zeroinitializer368 ret <4 x double> %r369}370 371define <4 x double> @test_mask_fold_vaddpd_256(<4 x double> %dst, <4 x double> %i, ptr %j, <4 x i64> %mask1) nounwind {372; CHECK-LABEL: test_mask_fold_vaddpd_256:373; CHECK: ## %bb.0:374; CHECK-NEXT: vptestmq %ymm2, %ymm2, %k1 ## encoding: [0x62,0xf2,0xed,0x28,0x27,0xca]375; CHECK-NEXT: vaddpd (%rdi), %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf1,0xf5,0x29,0x58,0x07]376; CHECK-NEXT: retq ## encoding: [0xc3]377 %mask = icmp ne <4 x i64> %mask1, zeroinitializer378 %tmp = load <4 x double>, ptr %j379 %x = fadd <4 x double> %i, %tmp380 %r = select <4 x i1> %mask, <4 x double> %x, <4 x double> %dst381 ret <4 x double> %r382}383 384define <4 x double> @test_maskz_fold_vaddpd_256(<4 x double> %i, ptr %j, <4 x i64> %mask1) nounwind {385; CHECK-LABEL: test_maskz_fold_vaddpd_256:386; CHECK: ## %bb.0:387; CHECK-NEXT: vptestmq %ymm1, %ymm1, %k1 ## encoding: [0x62,0xf2,0xf5,0x28,0x27,0xc9]388; CHECK-NEXT: vaddpd (%rdi), %ymm0, %ymm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xa9,0x58,0x07]389; CHECK-NEXT: retq ## encoding: [0xc3]390 %mask = icmp ne <4 x i64> %mask1, zeroinitializer391 %tmp = load <4 x double>, ptr %j392 %x = fadd <4 x double> %i, %tmp393 %r = select <4 x i1> %mask, <4 x double> %x, <4 x double> zeroinitializer394 ret <4 x double> %r395}396 397define <4 x double> @test_broadcast2_vaddpd_256(<4 x double> %i, ptr %j) nounwind {398; CHECK-LABEL: test_broadcast2_vaddpd_256:399; CHECK: ## %bb.0:400; CHECK-NEXT: vaddpd (%rdi){1to4}, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0xfd,0x38,0x58,0x07]401; CHECK-NEXT: retq ## encoding: [0xc3]402 %tmp = load double, ptr %j403 %b = insertelement <4 x double> undef, double %tmp, i32 0404 %c = shufflevector <4 x double> %b, <4 x double> undef, <4 x i32> zeroinitializer405 %x = fadd <4 x double> %c, %i406 ret <4 x double> %x407}408 409define <4 x double> @test_mask_broadcast_vaddpd_256(<4 x double> %dst, <4 x double> %i, ptr %j, <4 x i64> %mask1) nounwind {410; CHECK-LABEL: test_mask_broadcast_vaddpd_256:411; CHECK: ## %bb.0:412; CHECK-NEXT: vmovapd %ymm1, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0x28,0xc1]413; CHECK-NEXT: vptestmq %ymm2, %ymm2, %k1 ## encoding: [0x62,0xf2,0xed,0x28,0x27,0xca]414; CHECK-NEXT: vaddpd (%rdi){1to4}, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf1,0xf5,0x39,0x58,0x07]415; CHECK-NEXT: retq ## encoding: [0xc3]416 %mask = icmp ne <4 x i64> %mask1, zeroinitializer417 %tmp = load double, ptr %j418 %b = insertelement <4 x double> undef, double %tmp, i32 0419 %c = shufflevector <4 x double> %b, <4 x double> undef, <4 x i32> zeroinitializer420 %x = fadd <4 x double> %c, %i421 %r = select <4 x i1> %mask, <4 x double> %x, <4 x double> %i422 ret <4 x double> %r423}424 425define <4 x double> @test_maskz_broadcast_vaddpd_256(<4 x double> %i, ptr %j, <4 x i64> %mask1) nounwind {426; CHECK-LABEL: test_maskz_broadcast_vaddpd_256:427; CHECK: ## %bb.0:428; CHECK-NEXT: vptestmq %ymm1, %ymm1, %k1 ## encoding: [0x62,0xf2,0xf5,0x28,0x27,0xc9]429; CHECK-NEXT: vaddpd (%rdi){1to4}, %ymm0, %ymm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xb9,0x58,0x07]430; CHECK-NEXT: retq ## encoding: [0xc3]431 %mask = icmp ne <4 x i64> %mask1, zeroinitializer432 %tmp = load double, ptr %j433 %b = insertelement <4 x double> undef, double %tmp, i32 0434 %c = shufflevector <4 x double> %b, <4 x double> undef, <4 x i32> zeroinitializer435 %x = fadd <4 x double> %c, %i436 %r = select <4 x i1> %mask, <4 x double> %x, <4 x double> zeroinitializer437 ret <4 x double> %r438}439 440; 128-bit441 442define <2 x i64> @vpaddq128_test(<2 x i64> %i, <2 x i64> %j) nounwind readnone {443; CHECK-LABEL: vpaddq128_test:444; CHECK: ## %bb.0:445; CHECK-NEXT: vpaddq %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd4,0xc1]446; CHECK-NEXT: retq ## encoding: [0xc3]447 %x = add <2 x i64> %i, %j448 ret <2 x i64> %x449}450 451define <2 x i64> @vpaddq128_fold_test(<2 x i64> %i, ptr %j) nounwind {452; CHECK-LABEL: vpaddq128_fold_test:453; CHECK: ## %bb.0:454; CHECK-NEXT: vpaddq (%rdi), %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd4,0x07]455; CHECK-NEXT: retq ## encoding: [0xc3]456 %tmp = load <2 x i64>, ptr %j, align 4457 %x = add <2 x i64> %i, %tmp458 ret <2 x i64> %x459}460 461define <2 x i64> @vpaddq128_broadcast2_test(<2 x i64> %i, ptr %j) nounwind {462; CHECK-LABEL: vpaddq128_broadcast2_test:463; CHECK: ## %bb.0:464; CHECK-NEXT: vpaddq (%rdi){1to2}, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x18,0xd4,0x07]465; CHECK-NEXT: retq ## encoding: [0xc3]466 %tmp = load i64, ptr %j467 %j.0 = insertelement <2 x i64> undef, i64 %tmp, i32 0468 %j.1 = insertelement <2 x i64> %j.0, i64 %tmp, i32 1469 %x = add <2 x i64> %i, %j.1470 ret <2 x i64> %x471}472 473define <4 x i32> @vpaddd128_test(<4 x i32> %i, <4 x i32> %j) nounwind readnone {474; CHECK-LABEL: vpaddd128_test:475; CHECK: ## %bb.0:476; CHECK-NEXT: vpaddd %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xfe,0xc1]477; CHECK-NEXT: retq ## encoding: [0xc3]478 %x = add <4 x i32> %i, %j479 ret <4 x i32> %x480}481 482define <4 x i32> @vpaddd128_fold_test(<4 x i32> %i, ptr %j) nounwind {483; CHECK-LABEL: vpaddd128_fold_test:484; CHECK: ## %bb.0:485; CHECK-NEXT: vpaddd (%rdi), %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xfe,0x07]486; CHECK-NEXT: retq ## encoding: [0xc3]487 %tmp = load <4 x i32>, ptr %j, align 4488 %x = add <4 x i32> %i, %tmp489 ret <4 x i32> %x490}491 492define <4 x i32> @vpaddd128_broadcast_test(<4 x i32> %i) nounwind {493; CHECK-LABEL: vpaddd128_broadcast_test:494; CHECK: ## %bb.0:495; CHECK-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x18,0xfe,0x05,A,A,A,A]496; CHECK-NEXT: ## fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: reloc_riprel_4byte497; CHECK-NEXT: retq ## encoding: [0xc3]498 %x = add <4 x i32> %i, <i32 6, i32 6, i32 6, i32 6>499 ret <4 x i32> %x500}501 502define <4 x i32> @vpaddd128_mask_test(<4 x i32> %i, <4 x i32> %j, <4 x i32> %mask1) nounwind readnone {503; CHECK-LABEL: vpaddd128_mask_test:504; CHECK: ## %bb.0:505; CHECK-NEXT: vptestmd %xmm2, %xmm2, %k1 ## encoding: [0x62,0xf2,0x6d,0x08,0x27,0xca]506; CHECK-NEXT: vpaddd %xmm1, %xmm0, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x7d,0x09,0xfe,0xc1]507; CHECK-NEXT: retq ## encoding: [0xc3]508 %mask = icmp ne <4 x i32> %mask1, zeroinitializer509 %x = add <4 x i32> %i, %j510 %r = select <4 x i1> %mask, <4 x i32> %x, <4 x i32> %i511 ret <4 x i32> %r512}513 514define <4 x i32> @vpaddd128_maskz_test(<4 x i32> %i, <4 x i32> %j, <4 x i32> %mask1) nounwind readnone {515; CHECK-LABEL: vpaddd128_maskz_test:516; CHECK: ## %bb.0:517; CHECK-NEXT: vptestmd %xmm2, %xmm2, %k1 ## encoding: [0x62,0xf2,0x6d,0x08,0x27,0xca]518; CHECK-NEXT: vpaddd %xmm1, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0x89,0xfe,0xc1]519; CHECK-NEXT: retq ## encoding: [0xc3]520 %mask = icmp ne <4 x i32> %mask1, zeroinitializer521 %x = add <4 x i32> %i, %j522 %r = select <4 x i1> %mask, <4 x i32> %x, <4 x i32> zeroinitializer523 ret <4 x i32> %r524}525 526define <4 x i32> @vpaddd128_mask_fold_test(<4 x i32> %i, ptr %j.ptr, <4 x i32> %mask1) nounwind readnone {527; CHECK-LABEL: vpaddd128_mask_fold_test:528; CHECK: ## %bb.0:529; CHECK-NEXT: vptestmd %xmm1, %xmm1, %k1 ## encoding: [0x62,0xf2,0x75,0x08,0x27,0xc9]530; CHECK-NEXT: vpaddd (%rdi), %xmm0, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x7d,0x09,0xfe,0x07]531; CHECK-NEXT: retq ## encoding: [0xc3]532 %mask = icmp ne <4 x i32> %mask1, zeroinitializer533 %j = load <4 x i32>, ptr %j.ptr534 %x = add <4 x i32> %i, %j535 %r = select <4 x i1> %mask, <4 x i32> %x, <4 x i32> %i536 ret <4 x i32> %r537}538 539define <4 x i32> @vpaddd128_mask_broadcast_test(<4 x i32> %i, <4 x i32> %mask1) nounwind readnone {540; CHECK-LABEL: vpaddd128_mask_broadcast_test:541; CHECK: ## %bb.0:542; CHECK-NEXT: vptestmd %xmm1, %xmm1, %k1 ## encoding: [0x62,0xf2,0x75,0x08,0x27,0xc9]543; CHECK-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x7d,0x19,0xfe,0x05,A,A,A,A]544; CHECK-NEXT: ## fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: reloc_riprel_4byte545; CHECK-NEXT: retq ## encoding: [0xc3]546 %mask = icmp ne <4 x i32> %mask1, zeroinitializer547 %x = add <4 x i32> %i, <i32 7, i32 7, i32 7, i32 7>548 %r = select <4 x i1> %mask, <4 x i32> %x, <4 x i32> %i549 ret <4 x i32> %r550}551 552define <4 x i32> @vpaddd128_maskz_fold_test(<4 x i32> %i, ptr %j.ptr, <4 x i32> %mask1) nounwind readnone {553; CHECK-LABEL: vpaddd128_maskz_fold_test:554; CHECK: ## %bb.0:555; CHECK-NEXT: vptestmd %xmm1, %xmm1, %k1 ## encoding: [0x62,0xf2,0x75,0x08,0x27,0xc9]556; CHECK-NEXT: vpaddd (%rdi), %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0x89,0xfe,0x07]557; CHECK-NEXT: retq ## encoding: [0xc3]558 %mask = icmp ne <4 x i32> %mask1, zeroinitializer559 %j = load <4 x i32>, ptr %j.ptr560 %x = add <4 x i32> %i, %j561 %r = select <4 x i1> %mask, <4 x i32> %x, <4 x i32> zeroinitializer562 ret <4 x i32> %r563}564 565define <4 x i32> @vpaddd128_maskz_broadcast_test(<4 x i32> %i, <4 x i32> %mask1) nounwind readnone {566; CHECK-LABEL: vpaddd128_maskz_broadcast_test:567; CHECK: ## %bb.0:568; CHECK-NEXT: vptestmd %xmm1, %xmm1, %k1 ## encoding: [0x62,0xf2,0x75,0x08,0x27,0xc9]569; CHECK-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0x99,0xfe,0x05,A,A,A,A]570; CHECK-NEXT: ## fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: reloc_riprel_4byte571; CHECK-NEXT: retq ## encoding: [0xc3]572 %mask = icmp ne <4 x i32> %mask1, zeroinitializer573 %x = add <4 x i32> %i, <i32 8, i32 8, i32 8, i32 8>574 %r = select <4 x i1> %mask, <4 x i32> %x, <4 x i32> zeroinitializer575 ret <4 x i32> %r576}577 578define <2 x i64> @vpsubq128_test(<2 x i64> %i, <2 x i64> %j) nounwind readnone {579; CHECK-LABEL: vpsubq128_test:580; CHECK: ## %bb.0:581; CHECK-NEXT: vpsubq %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xfb,0xc1]582; CHECK-NEXT: retq ## encoding: [0xc3]583 %x = sub <2 x i64> %i, %j584 ret <2 x i64> %x585}586 587define <4 x i32> @vpsubd128_test(<4 x i32> %i, <4 x i32> %j) nounwind readnone {588; CHECK-LABEL: vpsubd128_test:589; CHECK: ## %bb.0:590; CHECK-NEXT: vpsubd %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xfa,0xc1]591; CHECK-NEXT: retq ## encoding: [0xc3]592 %x = sub <4 x i32> %i, %j593 ret <4 x i32> %x594}595 596define <4 x i32> @vpmulld128_test(<4 x i32> %i, <4 x i32> %j) {597; CHECK-LABEL: vpmulld128_test:598; CHECK: ## %bb.0:599; CHECK-NEXT: vpmulld %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x40,0xc1]600; CHECK-NEXT: retq ## encoding: [0xc3]601 %x = mul <4 x i32> %i, %j602 ret <4 x i32> %x603}604 605define <2 x double> @test_vaddpd_128(<2 x double> %y, <2 x double> %x) {606; CHECK-LABEL: test_vaddpd_128:607; CHECK: ## %bb.0: ## %entry608; CHECK-NEXT: vaddpd %xmm0, %xmm1, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf1,0x58,0xc0]609; CHECK-NEXT: retq ## encoding: [0xc3]610entry:611 %add.i = fadd <2 x double> %x, %y612 ret <2 x double> %add.i613}614 615define <2 x double> @test_fold_vaddpd_128(<2 x double> %y) {616; CHECK-LABEL: test_fold_vaddpd_128:617; CHECK: ## %bb.0: ## %entry618; CHECK-NEXT: vaddpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x58,0x05,A,A,A,A]619; CHECK-NEXT: ## fixup A - offset: 4, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: reloc_riprel_4byte620; CHECK-NEXT: retq ## encoding: [0xc3]621entry:622 %add.i = fadd <2 x double> %y, <double 4.500000e+00, double 3.400000e+00>623 ret <2 x double> %add.i624}625 626define <4 x float> @test_broadcast_vaddpd_128(<4 x float> %a) nounwind {627; CHECK-LABEL: test_broadcast_vaddpd_128:628; CHECK: ## %bb.0:629; CHECK-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x18,0x58,0x05,A,A,A,A]630; CHECK-NEXT: ## fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: reloc_riprel_4byte631; CHECK-NEXT: retq ## encoding: [0xc3]632 %b = fadd <4 x float> %a, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>633 ret <4 x float> %b634}635 636define <4 x float> @test_mask_vaddps_128(<4 x float> %dst, <4 x float> %i, <4 x float> %j, <4 x i32> %mask1) nounwind readnone {637; CHECK-LABEL: test_mask_vaddps_128:638; CHECK: ## %bb.0:639; CHECK-NEXT: vptestmd %xmm3, %xmm3, %k1 ## encoding: [0x62,0xf2,0x65,0x08,0x27,0xcb]640; CHECK-NEXT: vaddps %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x74,0x09,0x58,0xc2]641; CHECK-NEXT: retq ## encoding: [0xc3]642 %mask = icmp ne <4 x i32> %mask1, zeroinitializer643 %x = fadd <4 x float> %i, %j644 %r = select <4 x i1> %mask, <4 x float> %x, <4 x float> %dst645 ret <4 x float> %r646}647 648define <4 x float> @test_mask_vmulps_128(<4 x float> %dst, <4 x float> %i, <4 x float> %j, <4 x i32> %mask1) nounwind readnone {649; CHECK-LABEL: test_mask_vmulps_128:650; CHECK: ## %bb.0:651; CHECK-NEXT: vptestmd %xmm3, %xmm3, %k1 ## encoding: [0x62,0xf2,0x65,0x08,0x27,0xcb]652; CHECK-NEXT: vmulps %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x74,0x09,0x59,0xc2]653; CHECK-NEXT: retq ## encoding: [0xc3]654 %mask = icmp ne <4 x i32> %mask1, zeroinitializer655 %x = fmul <4 x float> %i, %j656 %r = select <4 x i1> %mask, <4 x float> %x, <4 x float> %dst657 ret <4 x float> %r658}659 660define <4 x float> @test_mask_vminps_128(<4 x float> %dst, <4 x float> %i, <4 x float> %j, <4 x i32> %mask1) nounwind readnone {661; CHECK-LABEL: test_mask_vminps_128:662; CHECK: ## %bb.0:663; CHECK-NEXT: vptestmd %xmm3, %xmm3, %k1 ## encoding: [0x62,0xf2,0x65,0x08,0x27,0xcb]664; CHECK-NEXT: vminps %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x74,0x09,0x5d,0xc2]665; CHECK-NEXT: retq ## encoding: [0xc3]666 %mask = icmp ne <4 x i32> %mask1, zeroinitializer667 %cmp_res = fcmp olt <4 x float> %i, %j668 %min = select <4 x i1> %cmp_res, <4 x float> %i, <4 x float> %j669 %r = select <4 x i1> %mask, <4 x float> %min, <4 x float> %dst670 ret <4 x float> %r671}672 673define <4 x float> @test_mask_vmaxps_128(<4 x float> %dst, <4 x float> %i, <4 x float> %j, <4 x i32> %mask1) nounwind readnone {674; CHECK-LABEL: test_mask_vmaxps_128:675; CHECK: ## %bb.0:676; CHECK-NEXT: vptestmd %xmm3, %xmm3, %k1 ## encoding: [0x62,0xf2,0x65,0x08,0x27,0xcb]677; CHECK-NEXT: vmaxps %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x74,0x09,0x5f,0xc2]678; CHECK-NEXT: retq ## encoding: [0xc3]679 %mask = icmp ne <4 x i32> %mask1, zeroinitializer680 %cmp_res = fcmp ogt <4 x float> %i, %j681 %max = select <4 x i1> %cmp_res, <4 x float> %i, <4 x float> %j682 %r = select <4 x i1> %mask, <4 x float> %max, <4 x float> %dst683 ret <4 x float> %r684}685 686define <4 x float> @test_mask_vsubps_128(<4 x float> %dst, <4 x float> %i, <4 x float> %j, <4 x i32> %mask1) nounwind readnone {687; CHECK-LABEL: test_mask_vsubps_128:688; CHECK: ## %bb.0:689; CHECK-NEXT: vptestmd %xmm3, %xmm3, %k1 ## encoding: [0x62,0xf2,0x65,0x08,0x27,0xcb]690; CHECK-NEXT: vsubps %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x74,0x09,0x5c,0xc2]691; CHECK-NEXT: retq ## encoding: [0xc3]692 %mask = icmp ne <4 x i32> %mask1, zeroinitializer693 %x = fsub <4 x float> %i, %j694 %r = select <4 x i1> %mask, <4 x float> %x, <4 x float> %dst695 ret <4 x float> %r696}697 698 699define <4 x float> @test_mask_vdivps_128(<4 x float> %dst, <4 x float> %i, <4 x float> %j, <4 x i32> %mask1) nounwind readnone {700; CHECK-LABEL: test_mask_vdivps_128:701; CHECK: ## %bb.0:702; CHECK-NEXT: vptestmd %xmm3, %xmm3, %k1 ## encoding: [0x62,0xf2,0x65,0x08,0x27,0xcb]703; CHECK-NEXT: vdivps %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x74,0x09,0x5e,0xc2]704; CHECK-NEXT: retq ## encoding: [0xc3]705 %mask = icmp ne <4 x i32> %mask1, zeroinitializer706 %x = fdiv <4 x float> %i, %j707 %r = select <4 x i1> %mask, <4 x float> %x, <4 x float> %dst708 ret <4 x float> %r709}710 711define <2 x double> @test_mask_vmulpd_128(<2 x double> %dst, <2 x double> %i, <2 x double> %j, <2 x i64> %mask1) nounwind readnone {712; CHECK-LABEL: test_mask_vmulpd_128:713; CHECK: ## %bb.0:714; CHECK-NEXT: vptestmq %xmm3, %xmm3, %k1 ## encoding: [0x62,0xf2,0xe5,0x08,0x27,0xcb]715; CHECK-NEXT: vmulpd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0xf5,0x09,0x59,0xc2]716; CHECK-NEXT: retq ## encoding: [0xc3]717 %mask = icmp ne <2 x i64> %mask1, zeroinitializer718 %x = fmul <2 x double> %i, %j719 %r = select <2 x i1> %mask, <2 x double> %x, <2 x double> %dst720 ret <2 x double> %r721}722 723define <2 x double> @test_mask_vminpd_128(<2 x double> %dst, <2 x double> %i, <2 x double> %j, <2 x i64> %mask1) nounwind readnone {724; CHECK-LABEL: test_mask_vminpd_128:725; CHECK: ## %bb.0:726; CHECK-NEXT: vptestmq %xmm3, %xmm3, %k1 ## encoding: [0x62,0xf2,0xe5,0x08,0x27,0xcb]727; CHECK-NEXT: vminpd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0xf5,0x09,0x5d,0xc2]728; CHECK-NEXT: retq ## encoding: [0xc3]729 %mask = icmp ne <2 x i64> %mask1, zeroinitializer730 %cmp_res = fcmp olt <2 x double> %i, %j731 %min = select <2 x i1> %cmp_res, <2 x double> %i, <2 x double> %j732 %r = select <2 x i1> %mask, <2 x double> %min, <2 x double> %dst733 ret <2 x double> %r734}735 736define <2 x double> @test_mask_vmaxpd_128(<2 x double> %dst, <2 x double> %i, <2 x double> %j, <2 x i64> %mask1) nounwind readnone {737; CHECK-LABEL: test_mask_vmaxpd_128:738; CHECK: ## %bb.0:739; CHECK-NEXT: vptestmq %xmm3, %xmm3, %k1 ## encoding: [0x62,0xf2,0xe5,0x08,0x27,0xcb]740; CHECK-NEXT: vmaxpd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0xf5,0x09,0x5f,0xc2]741; CHECK-NEXT: retq ## encoding: [0xc3]742 %mask = icmp ne <2 x i64> %mask1, zeroinitializer743 %cmp_res = fcmp ogt <2 x double> %i, %j744 %max = select <2 x i1> %cmp_res, <2 x double> %i, <2 x double> %j745 %r = select <2 x i1> %mask, <2 x double> %max, <2 x double> %dst746 ret <2 x double> %r747}748 749define <2 x double> @test_mask_vsubpd_128(<2 x double> %dst, <2 x double> %i, <2 x double> %j, <2 x i64> %mask1) nounwind readnone {750; CHECK-LABEL: test_mask_vsubpd_128:751; CHECK: ## %bb.0:752; CHECK-NEXT: vptestmq %xmm3, %xmm3, %k1 ## encoding: [0x62,0xf2,0xe5,0x08,0x27,0xcb]753; CHECK-NEXT: vsubpd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0xf5,0x09,0x5c,0xc2]754; CHECK-NEXT: retq ## encoding: [0xc3]755 %mask = icmp ne <2 x i64> %mask1, zeroinitializer756 %x = fsub <2 x double> %i, %j757 %r = select <2 x i1> %mask, <2 x double> %x, <2 x double> %dst758 ret <2 x double> %r759}760 761define <2 x double> @test_mask_vdivpd_128(<2 x double> %dst, <2 x double> %i, <2 x double> %j, <2 x i64> %mask1) nounwind readnone {762; CHECK-LABEL: test_mask_vdivpd_128:763; CHECK: ## %bb.0:764; CHECK-NEXT: vptestmq %xmm3, %xmm3, %k1 ## encoding: [0x62,0xf2,0xe5,0x08,0x27,0xcb]765; CHECK-NEXT: vdivpd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0xf5,0x09,0x5e,0xc2]766; CHECK-NEXT: retq ## encoding: [0xc3]767 %mask = icmp ne <2 x i64> %mask1, zeroinitializer768 %x = fdiv <2 x double> %i, %j769 %r = select <2 x i1> %mask, <2 x double> %x, <2 x double> %dst770 ret <2 x double> %r771}772 773define <2 x double> @test_mask_vaddpd_128(<2 x double> %dst, <2 x double> %i, <2 x double> %j, <2 x i64> %mask1) nounwind readnone {774; CHECK-LABEL: test_mask_vaddpd_128:775; CHECK: ## %bb.0:776; CHECK-NEXT: vptestmq %xmm3, %xmm3, %k1 ## encoding: [0x62,0xf2,0xe5,0x08,0x27,0xcb]777; CHECK-NEXT: vaddpd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0xf5,0x09,0x58,0xc2]778; CHECK-NEXT: retq ## encoding: [0xc3]779 %mask = icmp ne <2 x i64> %mask1, zeroinitializer780 %x = fadd <2 x double> %i, %j781 %r = select <2 x i1> %mask, <2 x double> %x, <2 x double> %dst782 ret <2 x double> %r783}784 785define <2 x double> @test_maskz_vaddpd_128(<2 x double> %i, <2 x double> %j,786; CHECK-LABEL: test_maskz_vaddpd_128:787; CHECK: ## %bb.0:788; CHECK-NEXT: vptestmq %xmm2, %xmm2, %k1 ## encoding: [0x62,0xf2,0xed,0x08,0x27,0xca]789; CHECK-NEXT: vaddpd %xmm1, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0x89,0x58,0xc1]790; CHECK-NEXT: retq ## encoding: [0xc3]791 <2 x i64> %mask1) nounwind readnone {792 %mask = icmp ne <2 x i64> %mask1, zeroinitializer793 %x = fadd <2 x double> %i, %j794 %r = select <2 x i1> %mask, <2 x double> %x, <2 x double> zeroinitializer795 ret <2 x double> %r796}797 798define <2 x double> @test_mask_fold_vaddpd_128(<2 x double> %dst, <2 x double> %i, ptr %j, <2 x i64> %mask1) nounwind {799; CHECK-LABEL: test_mask_fold_vaddpd_128:800; CHECK: ## %bb.0:801; CHECK-NEXT: vptestmq %xmm2, %xmm2, %k1 ## encoding: [0x62,0xf2,0xed,0x08,0x27,0xca]802; CHECK-NEXT: vaddpd (%rdi), %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0xf5,0x09,0x58,0x07]803; CHECK-NEXT: retq ## encoding: [0xc3]804 %mask = icmp ne <2 x i64> %mask1, zeroinitializer805 %tmp = load <2 x double>, ptr %j806 %x = fadd <2 x double> %i, %tmp807 %r = select <2 x i1> %mask, <2 x double> %x, <2 x double> %dst808 ret <2 x double> %r809}810 811define <2 x double> @test_maskz_fold_vaddpd_128(<2 x double> %i, ptr %j, <2 x i64> %mask1) nounwind {812; CHECK-LABEL: test_maskz_fold_vaddpd_128:813; CHECK: ## %bb.0:814; CHECK-NEXT: vptestmq %xmm1, %xmm1, %k1 ## encoding: [0x62,0xf2,0xf5,0x08,0x27,0xc9]815; CHECK-NEXT: vaddpd (%rdi), %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0x89,0x58,0x07]816; CHECK-NEXT: retq ## encoding: [0xc3]817 %mask = icmp ne <2 x i64> %mask1, zeroinitializer818 %tmp = load <2 x double>, ptr %j819 %x = fadd <2 x double> %i, %tmp820 %r = select <2 x i1> %mask, <2 x double> %x, <2 x double> zeroinitializer821 ret <2 x double> %r822}823 824define <2 x double> @test_broadcast2_vaddpd_128(<2 x double> %i, ptr %j) nounwind {825; CHECK-LABEL: test_broadcast2_vaddpd_128:826; CHECK: ## %bb.0:827; CHECK-NEXT: vaddpd (%rdi){1to2}, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x18,0x58,0x07]828; CHECK-NEXT: retq ## encoding: [0xc3]829 %tmp = load double, ptr %j830 %j.0 = insertelement <2 x double> undef, double %tmp, i64 0831 %j.1 = insertelement <2 x double> %j.0, double %tmp, i64 1832 %x = fadd <2 x double> %j.1, %i833 ret <2 x double> %x834}835 836define <2 x double> @test_mask_broadcast_vaddpd_128(<2 x double> %dst, <2 x double> %i, ptr %j, <2 x i64> %mask1) nounwind {837; CHECK-LABEL: test_mask_broadcast_vaddpd_128:838; CHECK: ## %bb.0:839; CHECK-NEXT: vmovapd %xmm1, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x28,0xc1]840; CHECK-NEXT: vptestmq %xmm2, %xmm2, %k1 ## encoding: [0x62,0xf2,0xed,0x08,0x27,0xca]841; CHECK-NEXT: vaddpd (%rdi){1to2}, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0xf5,0x19,0x58,0x07]842; CHECK-NEXT: retq ## encoding: [0xc3]843 %mask = icmp ne <2 x i64> %mask1, zeroinitializer844 %tmp = load double, ptr %j845 %j.0 = insertelement <2 x double> undef, double %tmp, i64 0846 %j.1 = insertelement <2 x double> %j.0, double %tmp, i64 1847 %x = fadd <2 x double> %j.1, %i848 %r = select <2 x i1> %mask, <2 x double> %x, <2 x double> %i849 ret <2 x double> %r850}851 852define <2 x double> @test_maskz_broadcast_vaddpd_128(<2 x double> %i, ptr %j, <2 x i64> %mask1) nounwind {853; CHECK-LABEL: test_maskz_broadcast_vaddpd_128:854; CHECK: ## %bb.0:855; CHECK-NEXT: vptestmq %xmm1, %xmm1, %k1 ## encoding: [0x62,0xf2,0xf5,0x08,0x27,0xc9]856; CHECK-NEXT: vaddpd (%rdi){1to2}, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0x99,0x58,0x07]857; CHECK-NEXT: retq ## encoding: [0xc3]858 %mask = icmp ne <2 x i64> %mask1, zeroinitializer859 %tmp = load double, ptr %j860 %j.0 = insertelement <2 x double> undef, double %tmp, i64 0861 %j.1 = insertelement <2 x double> %j.0, double %tmp, i64 1862 %x = fadd <2 x double> %j.1, %i863 %r = select <2 x i1> %mask, <2 x double> %x, <2 x double> zeroinitializer864 ret <2 x double> %r865}866