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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avxvnniint16 | FileCheck %s3; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avxvnniint16 | FileCheck %s4; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefix=AVX105; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefix=AVX106 7define <4 x i32> @test_int_x86_avx2_vpdpwsud_128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) {8; CHECK-LABEL: test_int_x86_avx2_vpdpwsud_128:9; CHECK: # %bb.0:10; CHECK-NEXT: vpdpwsud %xmm2, %xmm1, %xmm0 # encoding: [0xc4,0xe2,0x72,0xd2,0xc2]11; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]12;13; AVX10-LABEL: test_int_x86_avx2_vpdpwsud_128:14; AVX10: # %bb.0:15; AVX10-NEXT: vpdpwsud %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x76,0x08,0xd2,0xc2]16; AVX10-NEXT: ret{{[l|q]}} # encoding: [0xc3]17 %ret = call <4 x i32> @llvm.x86.avx2.vpdpwsud.128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C)18 ret <4 x i32> %ret19}20declare <4 x i32> @llvm.x86.avx2.vpdpwsud.128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C)21 22define <8 x i32> @test_int_x86_avx2_vpdpwsud_256(<8 x i32> %A, <8 x i32> %B, <8 x i32> %C) {23; CHECK-LABEL: test_int_x86_avx2_vpdpwsud_256:24; CHECK: # %bb.0:25; CHECK-NEXT: vpdpwsud %ymm2, %ymm1, %ymm0 # encoding: [0xc4,0xe2,0x76,0xd2,0xc2]26; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]27;28; AVX10-LABEL: test_int_x86_avx2_vpdpwsud_256:29; AVX10: # %bb.0:30; AVX10-NEXT: vpdpwsud %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x76,0x28,0xd2,0xc2]31; AVX10-NEXT: ret{{[l|q]}} # encoding: [0xc3]32 %ret = call <8 x i32> @llvm.x86.avx2.vpdpwsud.256(<8 x i32> %A, <8 x i32> %B, <8 x i32> %C)33 ret <8 x i32> %ret34}35declare <8 x i32> @llvm.x86.avx2.vpdpwsud.256(<8 x i32> %A, <8 x i32> %B, <8 x i32> %C)36 37define <4 x i32> @test_int_x86_avx2_vpdpwsuds_128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) {38; CHECK-LABEL: test_int_x86_avx2_vpdpwsuds_128:39; CHECK: # %bb.0:40; CHECK-NEXT: vpdpwsuds %xmm2, %xmm1, %xmm0 # encoding: [0xc4,0xe2,0x72,0xd3,0xc2]41; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]42;43; AVX10-LABEL: test_int_x86_avx2_vpdpwsuds_128:44; AVX10: # %bb.0:45; AVX10-NEXT: vpdpwsuds %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x76,0x08,0xd3,0xc2]46; AVX10-NEXT: ret{{[l|q]}} # encoding: [0xc3]47 %ret = call <4 x i32> @llvm.x86.avx2.vpdpwsuds.128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C)48 ret <4 x i32> %ret49}50declare <4 x i32> @llvm.x86.avx2.vpdpwsuds.128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C)51 52define <8 x i32> @test_int_x86_avx2_vpdpwsuds_256(<8 x i32> %A, <8 x i32> %B, <8 x i32> %C) {53; CHECK-LABEL: test_int_x86_avx2_vpdpwsuds_256:54; CHECK: # %bb.0:55; CHECK-NEXT: vpdpwsuds %ymm2, %ymm1, %ymm0 # encoding: [0xc4,0xe2,0x76,0xd3,0xc2]56; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]57;58; AVX10-LABEL: test_int_x86_avx2_vpdpwsuds_256:59; AVX10: # %bb.0:60; AVX10-NEXT: vpdpwsuds %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x76,0x28,0xd3,0xc2]61; AVX10-NEXT: ret{{[l|q]}} # encoding: [0xc3]62 %ret = call <8 x i32> @llvm.x86.avx2.vpdpwsuds.256(<8 x i32> %A, <8 x i32> %B, <8 x i32> %C)63 ret <8 x i32> %ret64}65declare <8 x i32> @llvm.x86.avx2.vpdpwsuds.256(<8 x i32> %A, <8 x i32> %B, <8 x i32> %C)66 67define <4 x i32> @test_int_x86_avx2_vpdpwusd_128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) {68; CHECK-LABEL: test_int_x86_avx2_vpdpwusd_128:69; CHECK: # %bb.0:70; CHECK-NEXT: vpdpwusd %xmm2, %xmm1, %xmm0 # encoding: [0xc4,0xe2,0x71,0xd2,0xc2]71; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]72;73; AVX10-LABEL: test_int_x86_avx2_vpdpwusd_128:74; AVX10: # %bb.0:75; AVX10-NEXT: vpdpwusd %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x75,0x08,0xd2,0xc2]76; AVX10-NEXT: ret{{[l|q]}} # encoding: [0xc3]77 %ret = call <4 x i32> @llvm.x86.avx2.vpdpwusd.128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C)78 ret <4 x i32> %ret79}80declare <4 x i32> @llvm.x86.avx2.vpdpwusd.128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C)81 82define <8 x i32> @test_int_x86_avx2_vpdpwusd_256(<8 x i32> %A, <8 x i32> %B, <8 x i32> %C) {83; CHECK-LABEL: test_int_x86_avx2_vpdpwusd_256:84; CHECK: # %bb.0:85; CHECK-NEXT: vpdpwusd %ymm2, %ymm1, %ymm0 # encoding: [0xc4,0xe2,0x75,0xd2,0xc2]86; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]87;88; AVX10-LABEL: test_int_x86_avx2_vpdpwusd_256:89; AVX10: # %bb.0:90; AVX10-NEXT: vpdpwusd %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x75,0x28,0xd2,0xc2]91; AVX10-NEXT: ret{{[l|q]}} # encoding: [0xc3]92 %ret = call <8 x i32> @llvm.x86.avx2.vpdpwusd.256(<8 x i32> %A, <8 x i32> %B, <8 x i32> %C)93 ret <8 x i32> %ret94}95declare <8 x i32> @llvm.x86.avx2.vpdpwusd.256(<8 x i32> %A, <8 x i32> %B, <8 x i32> %C)96 97define <4 x i32> @test_int_x86_avx2_vpdpwusds_128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) {98; CHECK-LABEL: test_int_x86_avx2_vpdpwusds_128:99; CHECK: # %bb.0:100; CHECK-NEXT: vpdpwusds %xmm2, %xmm1, %xmm0 # encoding: [0xc4,0xe2,0x71,0xd3,0xc2]101; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]102;103; AVX10-LABEL: test_int_x86_avx2_vpdpwusds_128:104; AVX10: # %bb.0:105; AVX10-NEXT: vpdpwusds %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x75,0x08,0xd3,0xc2]106; AVX10-NEXT: ret{{[l|q]}} # encoding: [0xc3]107 %ret = call <4 x i32> @llvm.x86.avx2.vpdpwusds.128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C)108 ret <4 x i32> %ret109}110declare <4 x i32> @llvm.x86.avx2.vpdpwusds.128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C)111 112define <8 x i32> @test_int_x86_avx2_vpdpwusds_256(<8 x i32> %A, <8 x i32> %B, <8 x i32> %C) {113; CHECK-LABEL: test_int_x86_avx2_vpdpwusds_256:114; CHECK: # %bb.0:115; CHECK-NEXT: vpdpwusds %ymm2, %ymm1, %ymm0 # encoding: [0xc4,0xe2,0x75,0xd3,0xc2]116; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]117;118; AVX10-LABEL: test_int_x86_avx2_vpdpwusds_256:119; AVX10: # %bb.0:120; AVX10-NEXT: vpdpwusds %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x75,0x28,0xd3,0xc2]121; AVX10-NEXT: ret{{[l|q]}} # encoding: [0xc3]122 %ret = call <8 x i32> @llvm.x86.avx2.vpdpwusds.256(<8 x i32> %A, <8 x i32> %B, <8 x i32> %C)123 ret <8 x i32> %ret124}125declare <8 x i32> @llvm.x86.avx2.vpdpwusds.256(<8 x i32> %A, <8 x i32> %B, <8 x i32> %C)126 127define <4 x i32> @test_int_x86_avx2_vpdpwuud_128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) {128; CHECK-LABEL: test_int_x86_avx2_vpdpwuud_128:129; CHECK: # %bb.0:130; CHECK-NEXT: vpdpwuud %xmm2, %xmm1, %xmm0 # encoding: [0xc4,0xe2,0x70,0xd2,0xc2]131; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]132;133; AVX10-LABEL: test_int_x86_avx2_vpdpwuud_128:134; AVX10: # %bb.0:135; AVX10-NEXT: vpdpwuud %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x74,0x08,0xd2,0xc2]136; AVX10-NEXT: ret{{[l|q]}} # encoding: [0xc3]137 %ret = call <4 x i32> @llvm.x86.avx2.vpdpwuud.128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C)138 ret <4 x i32> %ret139}140declare <4 x i32> @llvm.x86.avx2.vpdpwuud.128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C)141 142define <8 x i32> @test_int_x86_avx2_vpdpwuud_256(<8 x i32> %A, <8 x i32> %B, <8 x i32> %C) {143; CHECK-LABEL: test_int_x86_avx2_vpdpwuud_256:144; CHECK: # %bb.0:145; CHECK-NEXT: vpdpwuud %ymm2, %ymm1, %ymm0 # encoding: [0xc4,0xe2,0x74,0xd2,0xc2]146; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]147;148; AVX10-LABEL: test_int_x86_avx2_vpdpwuud_256:149; AVX10: # %bb.0:150; AVX10-NEXT: vpdpwuud %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x74,0x28,0xd2,0xc2]151; AVX10-NEXT: ret{{[l|q]}} # encoding: [0xc3]152 %ret = call <8 x i32> @llvm.x86.avx2.vpdpwuud.256(<8 x i32> %A, <8 x i32> %B, <8 x i32> %C)153 ret <8 x i32> %ret154}155declare <8 x i32> @llvm.x86.avx2.vpdpwuud.256(<8 x i32> %A, <8 x i32> %B, <8 x i32> %C)156 157define <4 x i32> @test_int_x86_avx2_vpdpwuuds_128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) {158; CHECK-LABEL: test_int_x86_avx2_vpdpwuuds_128:159; CHECK: # %bb.0:160; CHECK-NEXT: vpdpwuuds %xmm2, %xmm1, %xmm0 # encoding: [0xc4,0xe2,0x70,0xd3,0xc2]161; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]162;163; AVX10-LABEL: test_int_x86_avx2_vpdpwuuds_128:164; AVX10: # %bb.0:165; AVX10-NEXT: vpdpwuuds %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x74,0x08,0xd3,0xc2]166; AVX10-NEXT: ret{{[l|q]}} # encoding: [0xc3]167 %ret = call <4 x i32> @llvm.x86.avx2.vpdpwuuds.128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C)168 ret <4 x i32> %ret169}170declare <4 x i32> @llvm.x86.avx2.vpdpwuuds.128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C)171 172define <8 x i32> @test_int_x86_avx2_vpdpwuuds_256(<8 x i32> %A, <8 x i32> %B, <8 x i32> %C) {173; CHECK-LABEL: test_int_x86_avx2_vpdpwuuds_256:174; CHECK: # %bb.0:175; CHECK-NEXT: vpdpwuuds %ymm2, %ymm1, %ymm0 # encoding: [0xc4,0xe2,0x74,0xd3,0xc2]176; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]177;178; AVX10-LABEL: test_int_x86_avx2_vpdpwuuds_256:179; AVX10: # %bb.0:180; AVX10-NEXT: vpdpwuuds %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x74,0x28,0xd3,0xc2]181; AVX10-NEXT: ret{{[l|q]}} # encoding: [0xc3]182 %ret = call <8 x i32> @llvm.x86.avx2.vpdpwuuds.256(<8 x i32> %A, <8 x i32> %B, <8 x i32> %C)183 ret <8 x i32> %ret184}185declare <8 x i32> @llvm.x86.avx2.vpdpwuuds.256(<8 x i32> %A, <8 x i32> %B, <8 x i32> %C)186