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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X863; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X644 5define i32 @t0(i64 %x) nounwind {6; X86-LABEL: t0:7; X86: # %bb.0: # %entry8; X86-NEXT: pshufw $238, {{[0-9]+}}(%esp), %mm0 # mm0 = mem[2,3,2,3]9; X86-NEXT: movd %mm0, %eax10; X86-NEXT: retl11;12; X64-LABEL: t0:13; X64: # %bb.0: # %entry14; X64-NEXT: movq %rdi, %mm015; X64-NEXT: pshufw $238, %mm0, %mm0 # mm0 = mm0[2,3,2,3]16; X64-NEXT: movd %mm0, %eax17; X64-NEXT: retq18entry:19 %0 = bitcast i64 %x to <4 x i16>20 %1 = bitcast <4 x i16> %0 to <1 x i64>21 %2 = tail call <1 x i64> @llvm.x86.sse.pshuf.w(<1 x i64> %1, i8 -18)22 %3 = bitcast <1 x i64> %2 to <4 x i16>23 %4 = bitcast <4 x i16> %3 to <1 x i64>24 %5 = extractelement <1 x i64> %4, i32 025 %6 = bitcast i64 %5 to <2 x i32>26 %7 = extractelement <2 x i32> %6, i32 027 ret i32 %728}29 30define i64 @t1(i64 %x, i32 %n) nounwind {31; X86-LABEL: t1:32; X86: # %bb.0: # %entry33; X86-NEXT: pushl %ebp34; X86-NEXT: movl %esp, %ebp35; X86-NEXT: andl $-8, %esp36; X86-NEXT: subl $8, %esp37; X86-NEXT: movq 8(%ebp), %mm038; X86-NEXT: movd 16(%ebp), %mm139; X86-NEXT: psllq %mm1, %mm040; X86-NEXT: movq %mm0, (%esp)41; X86-NEXT: movl (%esp), %eax42; X86-NEXT: movl {{[0-9]+}}(%esp), %edx43; X86-NEXT: movl %ebp, %esp44; X86-NEXT: popl %ebp45; X86-NEXT: retl46;47; X64-LABEL: t1:48; X64: # %bb.0: # %entry49; X64-NEXT: movq %rdi, %mm050; X64-NEXT: movd %esi, %mm151; X64-NEXT: psllq %mm1, %mm052; X64-NEXT: movq %mm0, %rax53; X64-NEXT: retq54entry:55 %0 = bitcast i64 %x to <1 x i64>56 %1 = tail call <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64> %0, i32 %n)57 %2 = bitcast <1 x i64> %1 to i6458 ret i64 %259}60 61define i64 @t2(i64 %x, i32 %n, i32 %w) nounwind {62; X86-LABEL: t2:63; X86: # %bb.0: # %entry64; X86-NEXT: pushl %ebp65; X86-NEXT: movl %esp, %ebp66; X86-NEXT: andl $-8, %esp67; X86-NEXT: subl $8, %esp68; X86-NEXT: movd 20(%ebp), %mm069; X86-NEXT: movd 16(%ebp), %mm170; X86-NEXT: psllq %mm1, %mm071; X86-NEXT: por 8(%ebp), %mm072; X86-NEXT: movq %mm0, (%esp)73; X86-NEXT: movl (%esp), %eax74; X86-NEXT: movl {{[0-9]+}}(%esp), %edx75; X86-NEXT: movl %ebp, %esp76; X86-NEXT: popl %ebp77; X86-NEXT: retl78;79; X64-LABEL: t2:80; X64: # %bb.0: # %entry81; X64-NEXT: movd %edx, %mm082; X64-NEXT: movd %esi, %mm183; X64-NEXT: psllq %mm1, %mm084; X64-NEXT: movq %rdi, %mm185; X64-NEXT: por %mm0, %mm186; X64-NEXT: movq %mm1, %rax87; X64-NEXT: retq88entry:89 %0 = insertelement <2 x i32> undef, i32 %w, i32 090 %1 = insertelement <2 x i32> %0, i32 0, i32 191 %2 = bitcast <2 x i32> %1 to <1 x i64>92 %3 = tail call <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64> %2, i32 %n)93 %4 = bitcast i64 %x to <1 x i64>94 %5 = tail call <1 x i64> @llvm.x86.mmx.por(<1 x i64> %4, <1 x i64> %3)95 %6 = bitcast <1 x i64> %5 to i6496 ret i64 %697}98 99define i64 @t3(ptr %y, ptr %n) nounwind {100; X86-LABEL: t3:101; X86: # %bb.0: # %entry102; X86-NEXT: pushl %ebp103; X86-NEXT: movl %esp, %ebp104; X86-NEXT: andl $-8, %esp105; X86-NEXT: subl $8, %esp106; X86-NEXT: movl 12(%ebp), %eax107; X86-NEXT: movl 8(%ebp), %ecx108; X86-NEXT: movq (%ecx), %mm0109; X86-NEXT: movd (%eax), %mm1110; X86-NEXT: psllq %mm1, %mm0111; X86-NEXT: movq %mm0, (%esp)112; X86-NEXT: movl (%esp), %eax113; X86-NEXT: movl {{[0-9]+}}(%esp), %edx114; X86-NEXT: movl %ebp, %esp115; X86-NEXT: popl %ebp116; X86-NEXT: retl117;118; X64-LABEL: t3:119; X64: # %bb.0: # %entry120; X64-NEXT: movq (%rdi), %mm0121; X64-NEXT: movd (%rsi), %mm1122; X64-NEXT: psllq %mm1, %mm0123; X64-NEXT: movq %mm0, %rax124; X64-NEXT: retq125entry:126 %0 = load <1 x i64>, ptr %y, align 8127 %1 = load i32, ptr %n, align 4128 %2 = tail call <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64> %0, i32 %1)129 %3 = bitcast <1 x i64> %2 to i64130 ret i64 %3131}132 133declare <1 x i64> @llvm.x86.sse.pshuf.w(<1 x i64>, i8)134declare <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64>, i32)135declare <1 x i64> @llvm.x86.mmx.por(<1 x i64>, <1 x i64>)136 137