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1; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=haswell | FileCheck %s --check-prefix=HSW2; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake | FileCheck %s --check-prefix=SKL3; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=skx | FileCheck %s --check-prefix=SKL4; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=alderlake | FileCheck %s --check-prefix=ADL5; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=silvermont -mattr=+lzcnt,+bmi | FileCheck %s --check-prefix=SKL6; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=goldmont -mattr=+lzcnt,+bmi | FileCheck %s --check-prefix=SKL7 8; This tests a fix for bugzilla 33869 https://bugs.llvm.org/show_bug.cgi?id=338699 10declare i32 @llvm.ctpop.i32(i32)11declare i64 @llvm.ctpop.i64(i64)12declare i64 @llvm.ctlz.i64(i64, i1)13declare i32 @llvm.cttz.i32(i32, i1)14declare i64 @llvm.cttz.i64(i64, i1)15declare i32 @llvm.ctlz.i32(i32, i1)16 17define i32 @loopdep_popcnt32(ptr nocapture %x, ptr nocapture %y) nounwind {18entry:19 %vx = load i32, ptr %x20 br label %loop21loop:22 %i = phi i32 [ 1, %entry ], [ %inc, %loop ]23 %s1 = phi i32 [ %vx, %entry ], [ %s2, %loop ]24 tail call void asm sideeffect "", "~{eax},~{ebx},~{ecx},~{edx},~{esi},~{edi},~{ebp},~{dirflag},~{fpsr},~{flags}"()25 %j = tail call i32 @llvm.ctpop.i32(i32 %i)26 %s2 = add i32 %s1, %j27 %inc = add nsw i32 %i, 128 tail call void asm sideeffect "", "~{eax},~{ebx},~{ecx},~{edx},~{esi},~{edi},~{ebp},~{dirflag},~{fpsr},~{flags}"()29 %exitcond = icmp eq i32 %inc, 15625000030 br i1 %exitcond, label %ret, label %loop31ret:32 ret i32 %s233 34;HSW-LABEL:@loopdep_popcnt3235;HSW: xorl [[GPR0:%e[a-d]x]], [[GPR0]]36;HSW-NEXT: popcntl {{.*}}, [[GPR0]]37 38;SKL-LABEL:@loopdep_popcnt3239;SKL: xorl [[GPR0:%e[a-d]x]], [[GPR0]]40;SKL-NEXT: popcntl {{.*}}, [[GPR0]]41 42;ADL-LABEL:@loopdep_popcnt3243;ADL-NOT: xor44;ADL: popcntl45}46 47define i64 @loopdep_popcnt64(ptr nocapture %x, ptr nocapture %y) nounwind {48entry:49 %vx = load i64, ptr %x50 br label %loop51loop:52 %i = phi i64 [ 1, %entry ], [ %inc, %loop ]53 %s1 = phi i64 [ %vx, %entry ], [ %s2, %loop ]54 tail call void asm sideeffect "", "~{eax},~{ebx},~{ecx},~{edx},~{esi},~{edi},~{ebp},~{dirflag},~{fpsr},~{flags}"()55 %j = tail call i64 @llvm.ctpop.i64(i64 %i)56 %s2 = add i64 %s1, %j57 %inc = add nsw i64 %i, 158 tail call void asm sideeffect "", "~{eax},~{ebx},~{ecx},~{edx},~{esi},~{edi},~{ebp},~{dirflag},~{fpsr},~{flags}"()59 %exitcond = icmp eq i64 %inc, 15625000060 br i1 %exitcond, label %ret, label %loop61ret:62 ret i64 %s263 64;HSW-LABEL:@loopdep_popcnt6465;HSW: xorl %e[[GPR0:[a-d]x]], %e[[GPR0]]66;HSW-NEXT: popcntq {{.*}}, %r[[GPR0]]67 68;SKL-LABEL:@loopdep_popcnt6469;SKL: xorl %e[[GPR0:[a-d]x]], %e[[GPR0]]70;SKL-NEXT: popcntq {{.*}}, %r[[GPR0]]71 72;ADL-LABEL:@loopdep_popcnt6473;ADL-NOT: xor74;ADL: popcntq75}76 77define i32 @loopdep_tzct32(ptr nocapture %x, ptr nocapture %y) nounwind {78entry:79 %vx = load i32, ptr %x80 br label %loop81loop:82 %i = phi i32 [ 1, %entry ], [ %inc, %loop ]83 %s1 = phi i32 [ %vx, %entry ], [ %s2, %loop ]84 tail call void asm sideeffect "", "~{eax},~{ebx},~{ecx},~{edx},~{esi},~{edi},~{ebp},~{dirflag},~{fpsr},~{flags}"()85 %j = call i32 @llvm.cttz.i32(i32 %i, i1 true)86 %s2 = add i32 %s1, %j87 %inc = add nsw i32 %i, 188 tail call void asm sideeffect "", "~{eax},~{ebx},~{ecx},~{edx},~{esi},~{edi},~{ebp},~{dirflag},~{fpsr},~{flags}"()89 %exitcond = icmp eq i32 %inc, 15625000090 br i1 %exitcond, label %ret, label %loop91ret:92 ret i32 %s293 94;HSW-LABEL:@loopdep_tzct3295;HSW: xorl [[GPR0:%e[a-d]x]], [[GPR0]]96;HSW-NEXT: tzcntl {{.*}}, [[GPR0]]97 98; This false dependecy issue was fixed in Skylake99;SKL-LABEL:@loopdep_tzct32100;SKL-NOT: xor101;SKL: tzcntl102}103 104define i64 @loopdep_tzct64(ptr nocapture %x, ptr nocapture %y) nounwind {105entry:106 %vx = load i64, ptr %x107 br label %loop108loop:109 %i = phi i64 [ 1, %entry ], [ %inc, %loop ]110 %s1 = phi i64 [ %vx, %entry ], [ %s2, %loop ]111 tail call void asm sideeffect "", "~{eax},~{ebx},~{ecx},~{edx},~{esi},~{edi},~{ebp},~{dirflag},~{fpsr},~{flags}"()112 %j = tail call i64 @llvm.cttz.i64(i64 %i, i1 true)113 %s2 = add i64 %s1, %j114 %inc = add nsw i64 %i, 1115 tail call void asm sideeffect "", "~{eax},~{ebx},~{ecx},~{edx},~{esi},~{edi},~{ebp},~{dirflag},~{fpsr},~{flags}"()116 %exitcond = icmp eq i64 %inc, 156250000117 br i1 %exitcond, label %ret, label %loop118ret:119 ret i64 %s2120 121;HSW-LABEL:@loopdep_tzct64122;HSW: xorl %e[[GPR0:[a-d]x]], %e[[GPR0]]123;HSW-NEXT: tzcntq {{.*}}, %r[[GPR0]]124 125; This false dependecy issue was fixed in Skylake126;SKL-LABEL:@loopdep_tzct64127;SKL-NOT: xor128;SKL: tzcntq129}130 131define i32 @loopdep_lzct32(ptr nocapture %x, ptr nocapture %y) nounwind {132entry:133 %vx = load i32, ptr %x134 br label %loop135loop:136 %i = phi i32 [ 1, %entry ], [ %inc, %loop ]137 %s1 = phi i32 [ %vx, %entry ], [ %s2, %loop ]138 tail call void asm sideeffect "", "~{eax},~{ebx},~{ecx},~{edx},~{esi},~{edi},~{ebp},~{dirflag},~{fpsr},~{flags}"()139 %j = call i32 @llvm.ctlz.i32(i32 %i, i1 true)140 %s2 = add i32 %s1, %j141 %inc = add nsw i32 %i, 1142 tail call void asm sideeffect "", "~{eax},~{ebx},~{ecx},~{edx},~{esi},~{edi},~{ebp},~{dirflag},~{fpsr},~{flags}"()143 %exitcond = icmp eq i32 %inc, 156250000144 br i1 %exitcond, label %ret, label %loop145ret:146 ret i32 %s2147 148;HSW-LABEL:@loopdep_lzct32149;HSW: xorl [[GPR0:%e[a-d]x]], [[GPR0]]150;HSW-NEXT: lzcntl {{.*}}, [[GPR0]]151 152; This false dependecy issue was fixed in Skylake153;SKL-LABEL:@loopdep_lzct32154;SKL-NOT: xor155;SKL: lzcntl156}157 158define i64 @loopdep_lzct64(ptr nocapture %x, ptr nocapture %y) nounwind {159entry:160 %vx = load i64, ptr %x161 br label %loop162loop:163 %i = phi i64 [ 1, %entry ], [ %inc, %loop ]164 %s1 = phi i64 [ %vx, %entry ], [ %s2, %loop ]165 tail call void asm sideeffect "", "~{eax},~{ebx},~{ecx},~{edx},~{esi},~{edi},~{ebp},~{dirflag},~{fpsr},~{flags}"()166 %j = tail call i64 @llvm.ctlz.i64(i64 %i, i1 true)167 %s2 = add i64 %s1, %j168 %inc = add nsw i64 %i, 1169 tail call void asm sideeffect "", "~{eax},~{ebx},~{ecx},~{edx},~{esi},~{edi},~{ebp},~{dirflag},~{fpsr},~{flags}"()170 %exitcond = icmp eq i64 %inc, 156250000171 br i1 %exitcond, label %ret, label %loop172ret:173 ret i64 %s2174 175;HSW-LABEL:@loopdep_lzct64176;HSW: xorl %e[[GPR0:[a-d]x]], %e[[GPR0]]177;HSW-NEXT: lzcntq {{.*}}, %r[[GPR0]]178 179; This false dependecy issue was fixed in Skylake180;SKL-LABEL:@loopdep_lzct64181;SKL-NOT: xor182;SKL: lzcntq183}184