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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-windows-msvc19.11.0 | FileCheck %s3 4; This matches the code produced by clang/lib/CodeGen/bittest-intrin.c5 6@sink = global i8 0, align 17 8define void @test32(ptr %base, i32 %idx) {9; CHECK-LABEL: test32:10; CHECK: # %bb.0: # %entry11; CHECK-NEXT: #APP12; CHECK-NEXT: btl %edx, (%rcx)13; CHECK-NEXT: #NO_APP14; CHECK-NEXT: setb sink(%rip)15; CHECK-NEXT: #APP16; CHECK-NEXT: btcl %edx, (%rcx)17; CHECK-NEXT: #NO_APP18; CHECK-NEXT: setb sink(%rip)19; CHECK-NEXT: #APP20; CHECK-NEXT: btrl %edx, (%rcx)21; CHECK-NEXT: #NO_APP22; CHECK-NEXT: setb sink(%rip)23; CHECK-NEXT: #APP24; CHECK-NEXT: btsl %edx, (%rcx)25; CHECK-NEXT: #NO_APP26; CHECK-NEXT: setb sink(%rip)27; CHECK-NEXT: #APP28; CHECK-NEXT: lock btrl %edx, (%rcx)29; CHECK-NEXT: #NO_APP30; CHECK-NEXT: setb sink(%rip)31; CHECK-NEXT: #APP32; CHECK-NEXT: lock btsl %edx, (%rcx)33; CHECK-NEXT: #NO_APP34; CHECK-NEXT: setb sink(%rip)35; CHECK-NEXT: #APP36; CHECK-NEXT: lock btsl %edx, (%rcx)37; CHECK-NEXT: #NO_APP38; CHECK-NEXT: setb sink(%rip)39; CHECK-NEXT: retq40entry:41 %0 = tail call i8 asm sideeffect "btl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %base, i32 %idx)42 store volatile i8 %0, ptr @sink, align 143 %1 = tail call i8 asm sideeffect "btcl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %base, i32 %idx)44 store volatile i8 %1, ptr @sink, align 145 %2 = tail call i8 asm sideeffect "btrl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %base, i32 %idx)46 store volatile i8 %2, ptr @sink, align 147 %3 = tail call i8 asm sideeffect "btsl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %base, i32 %idx)48 store volatile i8 %3, ptr @sink, align 149 %4 = tail call i8 asm sideeffect "lock btrl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %base, i32 %idx)50 store volatile i8 %4, ptr @sink, align 151 %5 = tail call i8 asm sideeffect "lock btsl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %base, i32 %idx)52 store volatile i8 %5, ptr @sink, align 153 %6 = tail call i8 asm sideeffect "lock btsl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %base, i32 %idx)54 store volatile i8 %6, ptr @sink, align 155 ret void56}57 58; Function Attrs: nounwind uwtable59define void @test64(ptr %base, i64 %idx) {60; CHECK-LABEL: test64:61; CHECK: # %bb.0: # %entry62; CHECK-NEXT: #APP63; CHECK-NEXT: btq %rdx, (%rcx)64; CHECK-NEXT: #NO_APP65; CHECK-NEXT: setb sink(%rip)66; CHECK-NEXT: #APP67; CHECK-NEXT: btcq %rdx, (%rcx)68; CHECK-NEXT: #NO_APP69; CHECK-NEXT: setb sink(%rip)70; CHECK-NEXT: #APP71; CHECK-NEXT: btrq %rdx, (%rcx)72; CHECK-NEXT: #NO_APP73; CHECK-NEXT: setb sink(%rip)74; CHECK-NEXT: #APP75; CHECK-NEXT: btsq %rdx, (%rcx)76; CHECK-NEXT: #NO_APP77; CHECK-NEXT: setb sink(%rip)78; CHECK-NEXT: #APP79; CHECK-NEXT: lock btrq %rdx, (%rcx)80; CHECK-NEXT: #NO_APP81; CHECK-NEXT: setb sink(%rip)82; CHECK-NEXT: #APP83; CHECK-NEXT: lock btsq %rdx, (%rcx)84; CHECK-NEXT: #NO_APP85; CHECK-NEXT: setb sink(%rip)86; CHECK-NEXT: retq87entry:88 %0 = tail call i8 asm sideeffect "btq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %base, i64 %idx)89 store volatile i8 %0, ptr @sink, align 190 %1 = tail call i8 asm sideeffect "btcq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %base, i64 %idx)91 store volatile i8 %1, ptr @sink, align 192 %2 = tail call i8 asm sideeffect "btrq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %base, i64 %idx)93 store volatile i8 %2, ptr @sink, align 194 %3 = tail call i8 asm sideeffect "btsq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %base, i64 %idx)95 store volatile i8 %3, ptr @sink, align 196 %4 = tail call i8 asm sideeffect "lock btrq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %base, i64 %idx)97 store volatile i8 %4, ptr @sink, align 198 %5 = tail call i8 asm sideeffect "lock btsq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %base, i64 %idx)99 store volatile i8 %5, ptr @sink, align 1100 ret void101}102