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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2,X64,X64-SSE23; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2,X64,X64-AVX24; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2,X86,X86-SSE25; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2,X86,X86-AVX26 7;------------------------------ 32-bit shuffles -------------------------------;8 9define <4 x i32> @shuffle_i32_of_shl_i16(<8 x i16> %x, <8 x i16> %y) nounwind {10; SSE2-LABEL: shuffle_i32_of_shl_i16:11; SSE2: # %bb.0:12; SSE2-NEXT: psllw $15, %xmm013; SSE2-NEXT: psllw $15, %xmm114; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,2],xmm0[1,0]15; SSE2-NEXT: movaps %xmm1, %xmm016; SSE2-NEXT: ret{{[l|q]}}17;18; AVX2-LABEL: shuffle_i32_of_shl_i16:19; AVX2: # %bb.0:20; AVX2-NEXT: vpsllw $15, %xmm0, %xmm021; AVX2-NEXT: vpsllw $15, %xmm1, %xmm122; AVX2-NEXT: vshufps {{.*#+}} xmm0 = xmm1[3,2],xmm0[1,0]23; AVX2-NEXT: ret{{[l|q]}}24 %i1 = tail call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> %x, i32 15)25 %i2 = tail call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> %y, i32 15)26 %i3 = bitcast <8 x i16> %i1 to <4 x i32>27 %i4 = bitcast <8 x i16> %i2 to <4 x i32>28 %i5 = shufflevector <4 x i32> %i3, <4 x i32> %i4, <4 x i32> <i32 7, i32 6, i32 1, i32 0>29 ret <4 x i32> %i530}31define <4 x i32> @shuffle_i32_of_lshr_i16(<8 x i16> %x, <8 x i16> %y) nounwind {32; SSE2-LABEL: shuffle_i32_of_lshr_i16:33; SSE2: # %bb.0:34; SSE2-NEXT: psrlw $15, %xmm035; SSE2-NEXT: psrlw $15, %xmm136; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,2],xmm0[1,0]37; SSE2-NEXT: movaps %xmm1, %xmm038; SSE2-NEXT: ret{{[l|q]}}39;40; AVX2-LABEL: shuffle_i32_of_lshr_i16:41; AVX2: # %bb.0:42; AVX2-NEXT: vpsrlw $15, %xmm0, %xmm043; AVX2-NEXT: vpsrlw $15, %xmm1, %xmm144; AVX2-NEXT: vshufps {{.*#+}} xmm0 = xmm1[3,2],xmm0[1,0]45; AVX2-NEXT: ret{{[l|q]}}46 %i1 = tail call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %x, i32 15)47 %i2 = tail call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %y, i32 15)48 %i3 = bitcast <8 x i16> %i1 to <4 x i32>49 %i4 = bitcast <8 x i16> %i2 to <4 x i32>50 %i5 = shufflevector <4 x i32> %i3, <4 x i32> %i4, <4 x i32> <i32 7, i32 6, i32 1, i32 0>51 ret <4 x i32> %i552}53define <4 x i32> @shuffle_i32_of_ashr_i16(<8 x i16> %x, <8 x i16> %y) nounwind {54; SSE2-LABEL: shuffle_i32_of_ashr_i16:55; SSE2: # %bb.0:56; SSE2-NEXT: psraw $15, %xmm057; SSE2-NEXT: psraw $15, %xmm158; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,2],xmm0[1,0]59; SSE2-NEXT: movaps %xmm1, %xmm060; SSE2-NEXT: ret{{[l|q]}}61;62; AVX2-LABEL: shuffle_i32_of_ashr_i16:63; AVX2: # %bb.0:64; AVX2-NEXT: vpsraw $15, %xmm0, %xmm065; AVX2-NEXT: vpsraw $15, %xmm1, %xmm166; AVX2-NEXT: vshufps {{.*#+}} xmm0 = xmm1[3,2],xmm0[1,0]67; AVX2-NEXT: ret{{[l|q]}}68 %i1 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %x, i32 15)69 %i2 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %y, i32 15)70 %i3 = bitcast <8 x i16> %i1 to <4 x i32>71 %i4 = bitcast <8 x i16> %i2 to <4 x i32>72 %i5 = shufflevector <4 x i32> %i3, <4 x i32> %i4, <4 x i32> <i32 7, i32 6, i32 1, i32 0>73 ret <4 x i32> %i574}75 76define <4 x i32> @shuffle_i32_of_shl_i32(<4 x i32> %x, <4 x i32> %y) nounwind {77; SSE2-LABEL: shuffle_i32_of_shl_i32:78; SSE2: # %bb.0:79; SSE2-NEXT: pslld $31, %xmm080; SSE2-NEXT: pslld $31, %xmm181; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,2],xmm0[1,0]82; SSE2-NEXT: movaps %xmm1, %xmm083; SSE2-NEXT: ret{{[l|q]}}84;85; AVX2-LABEL: shuffle_i32_of_shl_i32:86; AVX2: # %bb.0:87; AVX2-NEXT: vpslld $31, %xmm0, %xmm088; AVX2-NEXT: vpslld $31, %xmm1, %xmm189; AVX2-NEXT: vshufps {{.*#+}} xmm0 = xmm1[3,2],xmm0[1,0]90; AVX2-NEXT: ret{{[l|q]}}91 %i1 = tail call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> %x, i32 31)92 %i2 = tail call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> %y, i32 31)93 %i3 = shufflevector <4 x i32> %i1, <4 x i32> %i2, <4 x i32> <i32 7, i32 6, i32 1, i32 0>94 ret <4 x i32> %i395}96define <4 x i32> @shuffle_i32_of_lshr_i32(<4 x i32> %x, <4 x i32> %y) nounwind {97; SSE2-LABEL: shuffle_i32_of_lshr_i32:98; SSE2: # %bb.0:99; SSE2-NEXT: psrld $31, %xmm0100; SSE2-NEXT: psrld $31, %xmm1101; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,2],xmm0[1,0]102; SSE2-NEXT: movaps %xmm1, %xmm0103; SSE2-NEXT: ret{{[l|q]}}104;105; AVX2-LABEL: shuffle_i32_of_lshr_i32:106; AVX2: # %bb.0:107; AVX2-NEXT: vpsrld $31, %xmm0, %xmm0108; AVX2-NEXT: vpsrld $31, %xmm1, %xmm1109; AVX2-NEXT: vshufps {{.*#+}} xmm0 = xmm1[3,2],xmm0[1,0]110; AVX2-NEXT: ret{{[l|q]}}111 %i1 = tail call <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32> %x, i32 31)112 %i2 = tail call <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32> %y, i32 31)113 %i3 = shufflevector <4 x i32> %i1, <4 x i32> %i2, <4 x i32> <i32 7, i32 6, i32 1, i32 0>114 ret <4 x i32> %i3115}116define <4 x i32> @shuffle_i32_of_ashr_i32(<4 x i32> %x, <4 x i32> %y) nounwind {117; SSE2-LABEL: shuffle_i32_of_ashr_i32:118; SSE2: # %bb.0:119; SSE2-NEXT: psrad $31, %xmm0120; SSE2-NEXT: psrad $31, %xmm1121; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,2],xmm0[1,0]122; SSE2-NEXT: movaps %xmm1, %xmm0123; SSE2-NEXT: ret{{[l|q]}}124;125; AVX2-LABEL: shuffle_i32_of_ashr_i32:126; AVX2: # %bb.0:127; AVX2-NEXT: vpsrad $31, %xmm0, %xmm0128; AVX2-NEXT: vpsrad $31, %xmm1, %xmm1129; AVX2-NEXT: vshufps {{.*#+}} xmm0 = xmm1[3,2],xmm0[1,0]130; AVX2-NEXT: ret{{[l|q]}}131 %i1 = tail call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> %x, i32 31)132 %i2 = tail call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> %y, i32 31)133 %i3 = shufflevector <4 x i32> %i1, <4 x i32> %i2, <4 x i32> <i32 7, i32 6, i32 1, i32 0>134 ret <4 x i32> %i3135}136 137define <4 x i32> @shuffle_i32_of_shl_i64(<2 x i64> %x, <2 x i64> %y) nounwind {138; SSE2-LABEL: shuffle_i32_of_shl_i64:139; SSE2: # %bb.0:140; SSE2-NEXT: psllq $63, %xmm0141; SSE2-NEXT: psllq $63, %xmm1142; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,2],xmm0[1,0]143; SSE2-NEXT: movaps %xmm1, %xmm0144; SSE2-NEXT: ret{{[l|q]}}145;146; AVX2-LABEL: shuffle_i32_of_shl_i64:147; AVX2: # %bb.0:148; AVX2-NEXT: vpsllq $63, %xmm0, %xmm0149; AVX2-NEXT: vpsllq $63, %xmm1, %xmm1150; AVX2-NEXT: vshufps {{.*#+}} xmm0 = xmm1[3,2],xmm0[1,0]151; AVX2-NEXT: ret{{[l|q]}}152 %i1 = tail call <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64> %x, i32 63)153 %i2 = tail call <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64> %y, i32 63)154 %i3 = bitcast <2 x i64> %i1 to <4 x i32>155 %i4 = bitcast <2 x i64> %i2 to <4 x i32>156 %i5 = shufflevector <4 x i32> %i3, <4 x i32> %i4, <4 x i32> <i32 7, i32 6, i32 1, i32 0>157 ret <4 x i32> %i5158}159define <4 x i32> @shuffle_i32_of_lshr_i64(<2 x i64> %x, <2 x i64> %y) nounwind {160; SSE2-LABEL: shuffle_i32_of_lshr_i64:161; SSE2: # %bb.0:162; SSE2-NEXT: psrlq $63, %xmm0163; SSE2-NEXT: psrlq $63, %xmm1164; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,2],xmm0[1,0]165; SSE2-NEXT: movaps %xmm1, %xmm0166; SSE2-NEXT: ret{{[l|q]}}167;168; AVX2-LABEL: shuffle_i32_of_lshr_i64:169; AVX2: # %bb.0:170; AVX2-NEXT: vpsrlq $63, %xmm0, %xmm0171; AVX2-NEXT: vpsrlq $63, %xmm1, %xmm1172; AVX2-NEXT: vshufps {{.*#+}} xmm0 = xmm1[3,2],xmm0[1,0]173; AVX2-NEXT: ret{{[l|q]}}174 %i1 = tail call <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64> %x, i32 63)175 %i2 = tail call <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64> %y, i32 63)176 %i3 = bitcast <2 x i64> %i1 to <4 x i32>177 %i4 = bitcast <2 x i64> %i2 to <4 x i32>178 %i5 = shufflevector <4 x i32> %i3, <4 x i32> %i4, <4 x i32> <i32 7, i32 6, i32 1, i32 0>179 ret <4 x i32> %i5180}181define <4 x i32> @shuffle_i32_of_ashr_i64(<2 x i64> %x, <2 x i64> %y) nounwind {182; X64-SSE2-LABEL: shuffle_i32_of_ashr_i64:183; X64-SSE2: # %bb.0:184; X64-SSE2-NEXT: subq $40, %rsp185; X64-SSE2-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill186; X64-SSE2-NEXT: movl $63, %edi187; X64-SSE2-NEXT: callq llvm.x86.sse2.psrai.q@PLT188; X64-SSE2-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill189; X64-SSE2-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload190; X64-SSE2-NEXT: movl $63, %edi191; X64-SSE2-NEXT: callq llvm.x86.sse2.psrai.q@PLT192; X64-SSE2-NEXT: shufps $27, (%rsp), %xmm0 # 16-byte Folded Reload193; X64-SSE2-NEXT: # xmm0 = xmm0[3,2],mem[1,0]194; X64-SSE2-NEXT: addq $40, %rsp195; X64-SSE2-NEXT: retq196;197; X64-AVX2-LABEL: shuffle_i32_of_ashr_i64:198; X64-AVX2: # %bb.0:199; X64-AVX2-NEXT: subq $40, %rsp200; X64-AVX2-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill201; X64-AVX2-NEXT: movl $63, %edi202; X64-AVX2-NEXT: callq llvm.x86.sse2.psrai.q@PLT203; X64-AVX2-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill204; X64-AVX2-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload205; X64-AVX2-NEXT: movl $63, %edi206; X64-AVX2-NEXT: callq llvm.x86.sse2.psrai.q@PLT207; X64-AVX2-NEXT: vshufps $27, (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload208; X64-AVX2-NEXT: # xmm0 = xmm0[3,2],mem[1,0]209; X64-AVX2-NEXT: addq $40, %rsp210; X64-AVX2-NEXT: retq211;212; X86-SSE2-LABEL: shuffle_i32_of_ashr_i64:213; X86-SSE2: # %bb.0:214; X86-SSE2-NEXT: subl $32, %esp215; X86-SSE2-NEXT: movups %xmm1, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill216; X86-SSE2-NEXT: pushl $63217; X86-SSE2-NEXT: calll llvm.x86.sse2.psrai.q@PLT218; X86-SSE2-NEXT: addl $4, %esp219; X86-SSE2-NEXT: movups %xmm0, (%esp) # 16-byte Spill220; X86-SSE2-NEXT: movups {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload221; X86-SSE2-NEXT: pushl $63222; X86-SSE2-NEXT: calll llvm.x86.sse2.psrai.q@PLT223; X86-SSE2-NEXT: addl $4, %esp224; X86-SSE2-NEXT: movups (%esp), %xmm1 # 16-byte Reload225; X86-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2],xmm1[1,0]226; X86-SSE2-NEXT: addl $32, %esp227; X86-SSE2-NEXT: retl228;229; X86-AVX2-LABEL: shuffle_i32_of_ashr_i64:230; X86-AVX2: # %bb.0:231; X86-AVX2-NEXT: subl $32, %esp232; X86-AVX2-NEXT: vmovups %xmm1, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill233; X86-AVX2-NEXT: pushl $63234; X86-AVX2-NEXT: calll llvm.x86.sse2.psrai.q@PLT235; X86-AVX2-NEXT: addl $4, %esp236; X86-AVX2-NEXT: vmovups %xmm0, (%esp) # 16-byte Spill237; X86-AVX2-NEXT: vmovups {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload238; X86-AVX2-NEXT: pushl $63239; X86-AVX2-NEXT: calll llvm.x86.sse2.psrai.q@PLT240; X86-AVX2-NEXT: addl $4, %esp241; X86-AVX2-NEXT: vshufps $27, (%esp), %xmm0, %xmm0 # 16-byte Folded Reload242; X86-AVX2-NEXT: # xmm0 = xmm0[3,2],mem[1,0]243; X86-AVX2-NEXT: addl $32, %esp244; X86-AVX2-NEXT: retl245 %i1 = tail call <2 x i64> @llvm.x86.sse2.psrai.q(<2 x i64> %x, i32 63)246 %i2 = tail call <2 x i64> @llvm.x86.sse2.psrai.q(<2 x i64> %y, i32 63)247 %i3 = bitcast <2 x i64> %i1 to <4 x i32>248 %i4 = bitcast <2 x i64> %i2 to <4 x i32>249 %i5 = shufflevector <4 x i32> %i3, <4 x i32> %i4, <4 x i32> <i32 7, i32 6, i32 1, i32 0>250 ret <4 x i32> %i5251}252 253;------------------------------ 64-bit shuffles -------------------------------;254 255define <2 x i64> @shuffle_i64_of_shl_i16(<8 x i16> %x, <8 x i16> %y) nounwind {256; SSE2-LABEL: shuffle_i64_of_shl_i16:257; SSE2: # %bb.0:258; SSE2-NEXT: psllw $15, %xmm0259; SSE2-NEXT: psllw $15, %xmm1260; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,3],xmm0[0,1]261; SSE2-NEXT: movaps %xmm1, %xmm0262; SSE2-NEXT: ret{{[l|q]}}263;264; AVX2-LABEL: shuffle_i64_of_shl_i16:265; AVX2: # %bb.0:266; AVX2-NEXT: vpsllw $15, %xmm0, %xmm0267; AVX2-NEXT: vpsllw $15, %xmm1, %xmm1268; AVX2-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]269; AVX2-NEXT: ret{{[l|q]}}270 %i1 = tail call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> %x, i32 15)271 %i2 = tail call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> %y, i32 15)272 %i3 = bitcast <8 x i16> %i1 to <2 x i64>273 %i4 = bitcast <8 x i16> %i2 to <2 x i64>274 %i5 = shufflevector <2 x i64> %i3, <2 x i64> %i4, <2 x i32> <i32 3, i32 0>275 ret <2 x i64> %i5276}277define <2 x i64> @shuffle_i64_of_lshr_i16(<8 x i16> %x, <8 x i16> %y) nounwind {278; SSE2-LABEL: shuffle_i64_of_lshr_i16:279; SSE2: # %bb.0:280; SSE2-NEXT: psrlw $15, %xmm0281; SSE2-NEXT: psrlw $15, %xmm1282; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,3],xmm0[0,1]283; SSE2-NEXT: movaps %xmm1, %xmm0284; SSE2-NEXT: ret{{[l|q]}}285;286; AVX2-LABEL: shuffle_i64_of_lshr_i16:287; AVX2: # %bb.0:288; AVX2-NEXT: vpsrlw $15, %xmm0, %xmm0289; AVX2-NEXT: vpsrlw $15, %xmm1, %xmm1290; AVX2-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]291; AVX2-NEXT: ret{{[l|q]}}292 %i1 = tail call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %x, i32 15)293 %i2 = tail call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %y, i32 15)294 %i3 = bitcast <8 x i16> %i1 to <2 x i64>295 %i4 = bitcast <8 x i16> %i2 to <2 x i64>296 %i5 = shufflevector <2 x i64> %i3, <2 x i64> %i4, <2 x i32> <i32 3, i32 0>297 ret <2 x i64> %i5298}299define <2 x i64> @shuffle_i64_of_ashr_i16(<8 x i16> %x, <8 x i16> %y) nounwind {300; SSE2-LABEL: shuffle_i64_of_ashr_i16:301; SSE2: # %bb.0:302; SSE2-NEXT: psraw $15, %xmm0303; SSE2-NEXT: psraw $15, %xmm1304; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,3],xmm0[0,1]305; SSE2-NEXT: movaps %xmm1, %xmm0306; SSE2-NEXT: ret{{[l|q]}}307;308; AVX2-LABEL: shuffle_i64_of_ashr_i16:309; AVX2: # %bb.0:310; AVX2-NEXT: vpsraw $15, %xmm0, %xmm0311; AVX2-NEXT: vpsraw $15, %xmm1, %xmm1312; AVX2-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]313; AVX2-NEXT: ret{{[l|q]}}314 %i1 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %x, i32 15)315 %i2 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %y, i32 15)316 %i3 = bitcast <8 x i16> %i1 to <2 x i64>317 %i4 = bitcast <8 x i16> %i2 to <2 x i64>318 %i5 = shufflevector <2 x i64> %i3, <2 x i64> %i4, <2 x i32> <i32 3, i32 0>319 ret <2 x i64> %i5320}321 322define <2 x i64> @shuffle_i64_of_shl_i32(<4 x i32> %x, <4 x i32> %y) nounwind {323; SSE2-LABEL: shuffle_i64_of_shl_i32:324; SSE2: # %bb.0:325; SSE2-NEXT: pslld $31, %xmm0326; SSE2-NEXT: pslld $31, %xmm1327; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,3],xmm0[0,1]328; SSE2-NEXT: movaps %xmm1, %xmm0329; SSE2-NEXT: ret{{[l|q]}}330;331; AVX2-LABEL: shuffle_i64_of_shl_i32:332; AVX2: # %bb.0:333; AVX2-NEXT: vpslld $31, %xmm0, %xmm0334; AVX2-NEXT: vpslld $31, %xmm1, %xmm1335; AVX2-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]336; AVX2-NEXT: ret{{[l|q]}}337 %i1 = tail call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> %x, i32 31)338 %i2 = tail call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> %y, i32 31)339 %i3 = bitcast <4 x i32> %i1 to <2 x i64>340 %i4 = bitcast <4 x i32> %i2 to <2 x i64>341 %i5 = shufflevector <2 x i64> %i3, <2 x i64> %i4, <2 x i32> <i32 3, i32 0>342 ret <2 x i64> %i5343}344define <2 x i64> @shuffle_i64_of_lshr_i32(<4 x i32> %x, <4 x i32> %y) nounwind {345; SSE2-LABEL: shuffle_i64_of_lshr_i32:346; SSE2: # %bb.0:347; SSE2-NEXT: psrld $31, %xmm0348; SSE2-NEXT: psrld $31, %xmm1349; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,3],xmm0[0,1]350; SSE2-NEXT: movaps %xmm1, %xmm0351; SSE2-NEXT: ret{{[l|q]}}352;353; AVX2-LABEL: shuffle_i64_of_lshr_i32:354; AVX2: # %bb.0:355; AVX2-NEXT: vpsrld $31, %xmm0, %xmm0356; AVX2-NEXT: vpsrld $31, %xmm1, %xmm1357; AVX2-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]358; AVX2-NEXT: ret{{[l|q]}}359 %i1 = tail call <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32> %x, i32 31)360 %i2 = tail call <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32> %y, i32 31)361 %i3 = bitcast <4 x i32> %i1 to <2 x i64>362 %i4 = bitcast <4 x i32> %i2 to <2 x i64>363 %i5 = shufflevector <2 x i64> %i3, <2 x i64> %i4, <2 x i32> <i32 3, i32 0>364 ret <2 x i64> %i5365}366define <2 x i64> @shuffle_i64_of_ashr_i32(<4 x i32> %x, <4 x i32> %y) nounwind {367; SSE2-LABEL: shuffle_i64_of_ashr_i32:368; SSE2: # %bb.0:369; SSE2-NEXT: psrad $31, %xmm0370; SSE2-NEXT: psrad $31, %xmm1371; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,3],xmm0[0,1]372; SSE2-NEXT: movaps %xmm1, %xmm0373; SSE2-NEXT: ret{{[l|q]}}374;375; AVX2-LABEL: shuffle_i64_of_ashr_i32:376; AVX2: # %bb.0:377; AVX2-NEXT: vpsrad $31, %xmm0, %xmm0378; AVX2-NEXT: vpsrad $31, %xmm1, %xmm1379; AVX2-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]380; AVX2-NEXT: ret{{[l|q]}}381 %i1 = tail call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> %x, i32 31)382 %i2 = tail call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> %y, i32 31)383 %i3 = bitcast <4 x i32> %i1 to <2 x i64>384 %i4 = bitcast <4 x i32> %i2 to <2 x i64>385 %i5 = shufflevector <2 x i64> %i3, <2 x i64> %i4, <2 x i32> <i32 3, i32 0>386 ret <2 x i64> %i5387}388 389define <2 x i64> @shuffle_i64_of_shl_i64(<2 x i64> %x, <2 x i64> %y) nounwind {390; SSE2-LABEL: shuffle_i64_of_shl_i64:391; SSE2: # %bb.0:392; SSE2-NEXT: psllq $63, %xmm0393; SSE2-NEXT: psllq $63, %xmm1394; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,3],xmm0[0,1]395; SSE2-NEXT: movaps %xmm1, %xmm0396; SSE2-NEXT: ret{{[l|q]}}397;398; AVX2-LABEL: shuffle_i64_of_shl_i64:399; AVX2: # %bb.0:400; AVX2-NEXT: vpsllq $63, %xmm0, %xmm0401; AVX2-NEXT: vpsllq $63, %xmm1, %xmm1402; AVX2-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]403; AVX2-NEXT: ret{{[l|q]}}404 %i1 = tail call <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64> %x, i32 63)405 %i2 = tail call <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64> %y, i32 63)406 %i3 = bitcast <2 x i64> %i1 to <2 x i64>407 %i4 = bitcast <2 x i64> %i2 to <2 x i64>408 %i5 = shufflevector <2 x i64> %i3, <2 x i64> %i4, <2 x i32> <i32 3, i32 0>409 ret <2 x i64> %i5410}411define <2 x i64> @shuffle_i64_of_lshr_i64(<2 x i64> %x, <2 x i64> %y) nounwind {412; SSE2-LABEL: shuffle_i64_of_lshr_i64:413; SSE2: # %bb.0:414; SSE2-NEXT: psrlq $63, %xmm0415; SSE2-NEXT: psrlq $63, %xmm1416; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,3],xmm0[0,1]417; SSE2-NEXT: movaps %xmm1, %xmm0418; SSE2-NEXT: ret{{[l|q]}}419;420; AVX2-LABEL: shuffle_i64_of_lshr_i64:421; AVX2: # %bb.0:422; AVX2-NEXT: vpsrlq $63, %xmm0, %xmm0423; AVX2-NEXT: vpsrlq $63, %xmm1, %xmm1424; AVX2-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]425; AVX2-NEXT: ret{{[l|q]}}426 %i1 = tail call <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64> %x, i32 63)427 %i2 = tail call <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64> %y, i32 63)428 %i3 = bitcast <2 x i64> %i1 to <2 x i64>429 %i4 = bitcast <2 x i64> %i2 to <2 x i64>430 %i5 = shufflevector <2 x i64> %i3, <2 x i64> %i4, <2 x i32> <i32 3, i32 0>431 ret <2 x i64> %i5432}433define <2 x i64> @shuffle_i64_of_ashr_i64(<2 x i64> %x, <2 x i64> %y) nounwind {434; X64-SSE2-LABEL: shuffle_i64_of_ashr_i64:435; X64-SSE2: # %bb.0:436; X64-SSE2-NEXT: subq $40, %rsp437; X64-SSE2-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill438; X64-SSE2-NEXT: movl $63, %edi439; X64-SSE2-NEXT: callq llvm.x86.sse2.psrai.q@PLT440; X64-SSE2-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill441; X64-SSE2-NEXT: movapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload442; X64-SSE2-NEXT: movl $63, %edi443; X64-SSE2-NEXT: callq llvm.x86.sse2.psrai.q@PLT444; X64-SSE2-NEXT: shufpd $1, (%rsp), %xmm0 # 16-byte Folded Reload445; X64-SSE2-NEXT: # xmm0 = xmm0[1],mem[0]446; X64-SSE2-NEXT: addq $40, %rsp447; X64-SSE2-NEXT: retq448;449; X64-AVX2-LABEL: shuffle_i64_of_ashr_i64:450; X64-AVX2: # %bb.0:451; X64-AVX2-NEXT: subq $40, %rsp452; X64-AVX2-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill453; X64-AVX2-NEXT: movl $63, %edi454; X64-AVX2-NEXT: callq llvm.x86.sse2.psrai.q@PLT455; X64-AVX2-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill456; X64-AVX2-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload457; X64-AVX2-NEXT: movl $63, %edi458; X64-AVX2-NEXT: callq llvm.x86.sse2.psrai.q@PLT459; X64-AVX2-NEXT: vmovdqa (%rsp), %xmm1 # 16-byte Reload460; X64-AVX2-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]461; X64-AVX2-NEXT: addq $40, %rsp462; X64-AVX2-NEXT: retq463;464; X86-SSE2-LABEL: shuffle_i64_of_ashr_i64:465; X86-SSE2: # %bb.0:466; X86-SSE2-NEXT: subl $32, %esp467; X86-SSE2-NEXT: movups %xmm1, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill468; X86-SSE2-NEXT: pushl $63469; X86-SSE2-NEXT: calll llvm.x86.sse2.psrai.q@PLT470; X86-SSE2-NEXT: addl $4, %esp471; X86-SSE2-NEXT: movups %xmm0, (%esp) # 16-byte Spill472; X86-SSE2-NEXT: movups {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload473; X86-SSE2-NEXT: pushl $63474; X86-SSE2-NEXT: calll llvm.x86.sse2.psrai.q@PLT475; X86-SSE2-NEXT: addl $4, %esp476; X86-SSE2-NEXT: movups (%esp), %xmm1 # 16-byte Reload477; X86-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,3],xmm1[0,1]478; X86-SSE2-NEXT: addl $32, %esp479; X86-SSE2-NEXT: retl480;481; X86-AVX2-LABEL: shuffle_i64_of_ashr_i64:482; X86-AVX2: # %bb.0:483; X86-AVX2-NEXT: subl $32, %esp484; X86-AVX2-NEXT: vmovups %xmm1, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill485; X86-AVX2-NEXT: pushl $63486; X86-AVX2-NEXT: calll llvm.x86.sse2.psrai.q@PLT487; X86-AVX2-NEXT: addl $4, %esp488; X86-AVX2-NEXT: vmovups %xmm0, (%esp) # 16-byte Spill489; X86-AVX2-NEXT: vmovdqu {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload490; X86-AVX2-NEXT: pushl $63491; X86-AVX2-NEXT: calll llvm.x86.sse2.psrai.q@PLT492; X86-AVX2-NEXT: addl $4, %esp493; X86-AVX2-NEXT: vmovdqu (%esp), %xmm1 # 16-byte Reload494; X86-AVX2-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]495; X86-AVX2-NEXT: addl $32, %esp496; X86-AVX2-NEXT: retl497 %i1 = tail call <2 x i64> @llvm.x86.sse2.psrai.q(<2 x i64> %x, i32 63)498 %i2 = tail call <2 x i64> @llvm.x86.sse2.psrai.q(<2 x i64> %y, i32 63)499 %i3 = bitcast <2 x i64> %i1 to <2 x i64>500 %i4 = bitcast <2 x i64> %i2 to <2 x i64>501 %i5 = shufflevector <2 x i64> %i3, <2 x i64> %i4, <2 x i32> <i32 3, i32 0>502 ret <2 x i64> %i5503}504 505declare <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16>, i32)506declare <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16>, i32)507declare <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16>, i32)508declare <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32>, i32)509declare <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32>, i32)510declare <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32>, i32)511declare <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64>, i32)512declare <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64>, i32)513declare <2 x i64> @llvm.x86.sse2.psrai.q(<2 x i64>, i32) ; does not exist514;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:515; CHECK: {{.*}}516; X64: {{.*}}517; X86: {{.*}}518