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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+cmov,+bmi | FileCheck %s --check-prefixes=X86,X86-SLOW-BEXTR3; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+cmov,+bmi,+bmi2 | FileCheck %s --check-prefixes=X86,X86-SLOW-BEXTR4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefixes=X64,X64-SLOW-BEXTR5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s --check-prefixes=X64,X64-SLOW-BEXTR6; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+cmov,+bmi,+fast-bextr | FileCheck %s --check-prefixes=X86,X86-FAST-BEXTR7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+fast-bextr | FileCheck %s --check-prefixes=X64,X64-FAST-BEXTR8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+fast-bextr,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR9 10define i32 @andn32(i32 %x, i32 %y) {11; X86-LABEL: andn32:12; X86: # %bb.0:13; X86-NEXT: movl {{[0-9]+}}(%esp), %eax14; X86-NEXT: andnl {{[0-9]+}}(%esp), %eax, %eax15; X86-NEXT: retl16;17; X64-LABEL: andn32:18; X64: # %bb.0:19; X64-NEXT: andnl %esi, %edi, %eax20; X64-NEXT: retq21;22; EGPR-LABEL: andn32:23; EGPR: # %bb.0:24; EGPR-NEXT: andnl %esi, %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x40,0xf2,0xc6]25; EGPR-NEXT: retq # encoding: [0xc3]26 %tmp1 = xor i32 %x, -127 %tmp2 = and i32 %y, %tmp128 ret i32 %tmp229}30 31define i32 @andn32_load(i32 %x, ptr %y) {32; X86-LABEL: andn32_load:33; X86: # %bb.0:34; X86-NEXT: movl {{[0-9]+}}(%esp), %eax35; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx36; X86-NEXT: andnl (%eax), %ecx, %eax37; X86-NEXT: retl38;39; X64-LABEL: andn32_load:40; X64: # %bb.0:41; X64-NEXT: andnl (%rsi), %edi, %eax42; X64-NEXT: retq43;44; EGPR-LABEL: andn32_load:45; EGPR: # %bb.0:46; EGPR-NEXT: andnl (%rsi), %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x40,0xf2,0x06]47; EGPR-NEXT: retq # encoding: [0xc3]48 %y1 = load i32, ptr %y49 %tmp1 = xor i32 %x, -150 %tmp2 = and i32 %y1, %tmp151 ret i32 %tmp252}53 54define i64 @andn64(i64 %x, i64 %y) {55; X86-LABEL: andn64:56; X86: # %bb.0:57; X86-NEXT: movl {{[0-9]+}}(%esp), %eax58; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx59; X86-NEXT: andnl {{[0-9]+}}(%esp), %eax, %eax60; X86-NEXT: andnl {{[0-9]+}}(%esp), %ecx, %edx61; X86-NEXT: retl62;63; X64-LABEL: andn64:64; X64: # %bb.0:65; X64-NEXT: andnq %rsi, %rdi, %rax66; X64-NEXT: retq67;68; EGPR-LABEL: andn64:69; EGPR: # %bb.0:70; EGPR-NEXT: andnq %rsi, %rdi, %rax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xc0,0xf2,0xc6]71; EGPR-NEXT: retq # encoding: [0xc3]72 %tmp1 = xor i64 %x, -173 %tmp2 = and i64 %tmp1, %y74 ret i64 %tmp275}76 77; Don't choose a 'test' if an 'andn' can be used.78define i1 @andn_cmp(i32 %x, i32 %y) {79; X86-LABEL: andn_cmp:80; X86: # %bb.0:81; X86-NEXT: movl {{[0-9]+}}(%esp), %eax82; X86-NEXT: andnl {{[0-9]+}}(%esp), %eax, %eax83; X86-NEXT: sete %al84; X86-NEXT: retl85;86; X64-LABEL: andn_cmp:87; X64: # %bb.0:88; X64-NEXT: andnl %esi, %edi, %eax89; X64-NEXT: sete %al90; X64-NEXT: retq91;92; EGPR-LABEL: andn_cmp:93; EGPR: # %bb.0:94; EGPR-NEXT: andnl %esi, %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x40,0xf2,0xc6]95; EGPR-NEXT: testl %eax, %eax # encoding: [0x85,0xc0]96; EGPR-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]97; EGPR-NEXT: retq # encoding: [0xc3]98 %notx = xor i32 %x, -199 %and = and i32 %notx, %y100 %cmp = icmp eq i32 %and, 0101 ret i1 %cmp102}103 104; Recognize a disguised andn in the following 4 tests.105define i1 @and_cmp1(i32 %x, i32 %y) {106; X86-LABEL: and_cmp1:107; X86: # %bb.0:108; X86-NEXT: movl {{[0-9]+}}(%esp), %eax109; X86-NEXT: andnl {{[0-9]+}}(%esp), %eax, %eax110; X86-NEXT: sete %al111; X86-NEXT: retl112;113; X64-LABEL: and_cmp1:114; X64: # %bb.0:115; X64-NEXT: andnl %esi, %edi, %eax116; X64-NEXT: sete %al117; X64-NEXT: retq118;119; EGPR-LABEL: and_cmp1:120; EGPR: # %bb.0:121; EGPR-NEXT: andnl %esi, %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x40,0xf2,0xc6]122; EGPR-NEXT: testl %eax, %eax # encoding: [0x85,0xc0]123; EGPR-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]124; EGPR-NEXT: retq # encoding: [0xc3]125 %and = and i32 %x, %y126 %cmp = icmp eq i32 %and, %y127 ret i1 %cmp128}129 130define i1 @and_cmp2(i32 %x, i32 %y) {131; X86-LABEL: and_cmp2:132; X86: # %bb.0:133; X86-NEXT: movl {{[0-9]+}}(%esp), %eax134; X86-NEXT: andnl {{[0-9]+}}(%esp), %eax, %eax135; X86-NEXT: setne %al136; X86-NEXT: retl137;138; X64-LABEL: and_cmp2:139; X64: # %bb.0:140; X64-NEXT: andnl %esi, %edi, %eax141; X64-NEXT: setne %al142; X64-NEXT: retq143;144; EGPR-LABEL: and_cmp2:145; EGPR: # %bb.0:146; EGPR-NEXT: andnl %esi, %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x40,0xf2,0xc6]147; EGPR-NEXT: testl %eax, %eax # encoding: [0x85,0xc0]148; EGPR-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]149; EGPR-NEXT: retq # encoding: [0xc3]150 %and = and i32 %y, %x151 %cmp = icmp ne i32 %and, %y152 ret i1 %cmp153}154 155define i1 @and_cmp3(i32 %x, i32 %y) {156; X86-LABEL: and_cmp3:157; X86: # %bb.0:158; X86-NEXT: movl {{[0-9]+}}(%esp), %eax159; X86-NEXT: andnl {{[0-9]+}}(%esp), %eax, %eax160; X86-NEXT: sete %al161; X86-NEXT: retl162;163; X64-LABEL: and_cmp3:164; X64: # %bb.0:165; X64-NEXT: andnl %esi, %edi, %eax166; X64-NEXT: sete %al167; X64-NEXT: retq168;169; EGPR-LABEL: and_cmp3:170; EGPR: # %bb.0:171; EGPR-NEXT: andnl %esi, %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x40,0xf2,0xc6]172; EGPR-NEXT: testl %eax, %eax # encoding: [0x85,0xc0]173; EGPR-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]174; EGPR-NEXT: retq # encoding: [0xc3]175 %and = and i32 %x, %y176 %cmp = icmp eq i32 %y, %and177 ret i1 %cmp178}179 180define i1 @and_cmp4(i32 %x, i32 %y) {181; X86-LABEL: and_cmp4:182; X86: # %bb.0:183; X86-NEXT: movl {{[0-9]+}}(%esp), %eax184; X86-NEXT: andnl {{[0-9]+}}(%esp), %eax, %eax185; X86-NEXT: setne %al186; X86-NEXT: retl187;188; X64-LABEL: and_cmp4:189; X64: # %bb.0:190; X64-NEXT: andnl %esi, %edi, %eax191; X64-NEXT: setne %al192; X64-NEXT: retq193;194; EGPR-LABEL: and_cmp4:195; EGPR: # %bb.0:196; EGPR-NEXT: andnl %esi, %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x40,0xf2,0xc6]197; EGPR-NEXT: testl %eax, %eax # encoding: [0x85,0xc0]198; EGPR-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]199; EGPR-NEXT: retq # encoding: [0xc3]200 %and = and i32 %y, %x201 %cmp = icmp ne i32 %y, %and202 ret i1 %cmp203}204 205; A mask and compare against constant is ok for an 'andn' too206; even though the BMI instruction doesn't have an immediate form.207define i1 @and_cmp_const(i32 %x) {208; X86-LABEL: and_cmp_const:209; X86: # %bb.0:210; X86-NEXT: movl {{[0-9]+}}(%esp), %eax211; X86-NEXT: notl %eax212; X86-NEXT: testb $43, %al213; X86-NEXT: sete %al214; X86-NEXT: retl215;216; X64-LABEL: and_cmp_const:217; X64: # %bb.0:218; X64-NEXT: notl %edi219; X64-NEXT: testb $43, %dil220; X64-NEXT: sete %al221; X64-NEXT: retq222;223; EGPR-LABEL: and_cmp_const:224; EGPR: # %bb.0:225; EGPR-NEXT: notl %edi # encoding: [0xf7,0xd7]226; EGPR-NEXT: testb $43, %dil # encoding: [0x40,0xf6,0xc7,0x2b]227; EGPR-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]228; EGPR-NEXT: retq # encoding: [0xc3]229 %and = and i32 %x, 43230 %cmp = icmp eq i32 %and, 43231 ret i1 %cmp232}233 234; But don't use 'andn' if the mask is a power-of-two.235define i1 @and_cmp_const_power_of_two(i32 %x, i32 %y) {236; X86-LABEL: and_cmp_const_power_of_two:237; X86: # %bb.0:238; X86-NEXT: movl {{[0-9]+}}(%esp), %eax239; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx240; X86-NEXT: btl %ecx, %eax241; X86-NEXT: setae %al242; X86-NEXT: retl243;244; X64-LABEL: and_cmp_const_power_of_two:245; X64: # %bb.0:246; X64-NEXT: btl %esi, %edi247; X64-NEXT: setae %al248; X64-NEXT: retq249;250; EGPR-LABEL: and_cmp_const_power_of_two:251; EGPR: # %bb.0:252; EGPR-NEXT: btl %esi, %edi # encoding: [0x0f,0xa3,0xf7]253; EGPR-NEXT: setae %al # encoding: [0x0f,0x93,0xc0]254; EGPR-NEXT: retq # encoding: [0xc3]255 %shl = shl i32 1, %y256 %and = and i32 %x, %shl257 %cmp = icmp ne i32 %and, %shl258 ret i1 %cmp259}260 261; Don't transform to 'andn' if there's another use of the 'and'.262define i32 @and_cmp_not_one_use(i32 %x) {263; X86-LABEL: and_cmp_not_one_use:264; X86: # %bb.0:265; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx266; X86-NEXT: andl $37, %ecx267; X86-NEXT: xorl %eax, %eax268; X86-NEXT: cmpl $37, %ecx269; X86-NEXT: sete %al270; X86-NEXT: addl %ecx, %eax271; X86-NEXT: retl272;273; X64-LABEL: and_cmp_not_one_use:274; X64: # %bb.0:275; X64-NEXT: andl $37, %edi276; X64-NEXT: xorl %eax, %eax277; X64-NEXT: cmpl $37, %edi278; X64-NEXT: sete %al279; X64-NEXT: addl %edi, %eax280; X64-NEXT: retq281;282; EGPR-LABEL: and_cmp_not_one_use:283; EGPR: # %bb.0:284; EGPR-NEXT: andl $37, %edi # encoding: [0x83,0xe7,0x25]285; EGPR-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]286; EGPR-NEXT: cmpl $37, %edi # encoding: [0x83,0xff,0x25]287; EGPR-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]288; EGPR-NEXT: addl %edi, %eax # encoding: [0x01,0xf8]289; EGPR-NEXT: retq # encoding: [0xc3]290 %and = and i32 %x, 37291 %cmp = icmp eq i32 %and, 37292 %ext = zext i1 %cmp to i32293 %add = add i32 %and, %ext294 ret i32 %add295}296 297; Verify that we're not transforming invalid comparison predicates.298define i1 @not_an_andn1(i32 %x, i32 %y) {299; X86-LABEL: not_an_andn1:300; X86: # %bb.0:301; X86-NEXT: movl {{[0-9]+}}(%esp), %eax302; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx303; X86-NEXT: andl %eax, %ecx304; X86-NEXT: cmpl %ecx, %eax305; X86-NEXT: setg %al306; X86-NEXT: retl307;308; X64-LABEL: not_an_andn1:309; X64: # %bb.0:310; X64-NEXT: andl %esi, %edi311; X64-NEXT: cmpl %edi, %esi312; X64-NEXT: setg %al313; X64-NEXT: retq314;315; EGPR-LABEL: not_an_andn1:316; EGPR: # %bb.0:317; EGPR-NEXT: andl %esi, %edi # encoding: [0x21,0xf7]318; EGPR-NEXT: cmpl %edi, %esi # encoding: [0x39,0xfe]319; EGPR-NEXT: setg %al # encoding: [0x0f,0x9f,0xc0]320; EGPR-NEXT: retq # encoding: [0xc3]321 %and = and i32 %x, %y322 %cmp = icmp sgt i32 %y, %and323 ret i1 %cmp324}325 326define i1 @not_an_andn2(i32 %x, i32 %y) {327; X86-LABEL: not_an_andn2:328; X86: # %bb.0:329; X86-NEXT: movl {{[0-9]+}}(%esp), %eax330; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx331; X86-NEXT: andl %eax, %ecx332; X86-NEXT: cmpl %ecx, %eax333; X86-NEXT: setbe %al334; X86-NEXT: retl335;336; X64-LABEL: not_an_andn2:337; X64: # %bb.0:338; X64-NEXT: andl %esi, %edi339; X64-NEXT: cmpl %edi, %esi340; X64-NEXT: setbe %al341; X64-NEXT: retq342;343; EGPR-LABEL: not_an_andn2:344; EGPR: # %bb.0:345; EGPR-NEXT: andl %esi, %edi # encoding: [0x21,0xf7]346; EGPR-NEXT: cmpl %edi, %esi # encoding: [0x39,0xfe]347; EGPR-NEXT: setbe %al # encoding: [0x0f,0x96,0xc0]348; EGPR-NEXT: retq # encoding: [0xc3]349 %and = and i32 %y, %x350 %cmp = icmp ule i32 %y, %and351 ret i1 %cmp352}353 354; Don't choose a 'test' if an 'andn' can be used.355define i1 @andn_cmp_swap_ops(i64 %x, i64 %y) {356; X86-LABEL: andn_cmp_swap_ops:357; X86: # %bb.0:358; X86-NEXT: movl {{[0-9]+}}(%esp), %eax359; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx360; X86-NEXT: andnl {{[0-9]+}}(%esp), %ecx, %ecx361; X86-NEXT: andnl {{[0-9]+}}(%esp), %eax, %eax362; X86-NEXT: orl %ecx, %eax363; X86-NEXT: sete %al364; X86-NEXT: retl365;366; X64-LABEL: andn_cmp_swap_ops:367; X64: # %bb.0:368; X64-NEXT: andnq %rsi, %rdi, %rax369; X64-NEXT: sete %al370; X64-NEXT: retq371;372; EGPR-LABEL: andn_cmp_swap_ops:373; EGPR: # %bb.0:374; EGPR-NEXT: andnq %rsi, %rdi, %rax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xc0,0xf2,0xc6]375; EGPR-NEXT: testq %rax, %rax # encoding: [0x48,0x85,0xc0]376; EGPR-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]377; EGPR-NEXT: retq # encoding: [0xc3]378 %notx = xor i64 %x, -1379 %and = and i64 %y, %notx380 %cmp = icmp eq i64 %and, 0381 ret i1 %cmp382}383 384; Use a 'test' (not an 'and') because 'andn' only works for i32/i64.385define i1 @andn_cmp_i8(i8 %x, i8 %y) {386; X86-LABEL: andn_cmp_i8:387; X86: # %bb.0:388; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax389; X86-NEXT: notb %al390; X86-NEXT: testb %al, {{[0-9]+}}(%esp)391; X86-NEXT: sete %al392; X86-NEXT: retl393;394; X64-LABEL: andn_cmp_i8:395; X64: # %bb.0:396; X64-NEXT: notb %sil397; X64-NEXT: testb %sil, %dil398; X64-NEXT: sete %al399; X64-NEXT: retq400;401; EGPR-LABEL: andn_cmp_i8:402; EGPR: # %bb.0:403; EGPR-NEXT: notb %sil # encoding: [0x40,0xf6,0xd6]404; EGPR-NEXT: testb %sil, %dil # encoding: [0x40,0x84,0xf7]405; EGPR-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]406; EGPR-NEXT: retq # encoding: [0xc3]407 %noty = xor i8 %y, -1408 %and = and i8 %x, %noty409 %cmp = icmp eq i8 %and, 0410 ret i1 %cmp411}412 413; PR48768 - 'andn' clears the overflow flag, so we don't need a separate 'test'.414define i1 @andn_cmp_i32_overflow(i32 %x, i32 %y) {415; X86-LABEL: andn_cmp_i32_overflow:416; X86: # %bb.0:417; X86-NEXT: movl {{[0-9]+}}(%esp), %eax418; X86-NEXT: andnl {{[0-9]+}}(%esp), %eax, %eax419; X86-NEXT: setle %al420; X86-NEXT: retl421;422; X64-LABEL: andn_cmp_i32_overflow:423; X64: # %bb.0:424; X64-NEXT: andnl %edi, %esi, %eax425; X64-NEXT: setle %al426; X64-NEXT: retq427;428; EGPR-LABEL: andn_cmp_i32_overflow:429; EGPR: # %bb.0:430; EGPR-NEXT: andnl %edi, %esi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x48,0xf2,0xc7]431; EGPR-NEXT: testl %eax, %eax # encoding: [0x85,0xc0]432; EGPR-NEXT: setle %al # encoding: [0x0f,0x9e,0xc0]433; EGPR-NEXT: retq # encoding: [0xc3]434 %noty = xor i32 %y, -1435 %and = and i32 %x, %noty436 %cmp = icmp slt i32 %and, 1437 ret i1 %cmp438}439 440declare i32 @llvm.x86.bmi.bextr.32(i32, i32)441 442define i32 @bextr32(i32 %x, i32 %y) {443; X86-LABEL: bextr32:444; X86: # %bb.0:445; X86-NEXT: movl {{[0-9]+}}(%esp), %eax446; X86-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax447; X86-NEXT: retl448;449; X64-LABEL: bextr32:450; X64: # %bb.0:451; X64-NEXT: bextrl %esi, %edi, %eax452; X64-NEXT: retq453;454; EGPR-LABEL: bextr32:455; EGPR: # %bb.0:456; EGPR-NEXT: bextrl %esi, %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x48,0xf7,0xc7]457; EGPR-NEXT: retq # encoding: [0xc3]458 %tmp = tail call i32 @llvm.x86.bmi.bextr.32(i32 %x, i32 %y)459 ret i32 %tmp460}461 462define i32 @bextr32_load(ptr %x, i32 %y) {463; X86-LABEL: bextr32_load:464; X86: # %bb.0:465; X86-NEXT: movl {{[0-9]+}}(%esp), %eax466; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx467; X86-NEXT: bextrl %eax, (%ecx), %eax468; X86-NEXT: retl469;470; X64-LABEL: bextr32_load:471; X64: # %bb.0:472; X64-NEXT: bextrl %esi, (%rdi), %eax473; X64-NEXT: retq474;475; EGPR-LABEL: bextr32_load:476; EGPR: # %bb.0:477; EGPR-NEXT: bextrl %esi, (%rdi), %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x48,0xf7,0x07]478; EGPR-NEXT: retq # encoding: [0xc3]479 %x1 = load i32, ptr %x480 %tmp = tail call i32 @llvm.x86.bmi.bextr.32(i32 %x1, i32 %y)481 ret i32 %tmp482}483 484define i32 @bextr32b(i32 %x) uwtable ssp {485; X86-SLOW-BEXTR-LABEL: bextr32b:486; X86-SLOW-BEXTR: # %bb.0:487; X86-SLOW-BEXTR-NEXT: movl {{[0-9]+}}(%esp), %eax488; X86-SLOW-BEXTR-NEXT: shrl $4, %eax489; X86-SLOW-BEXTR-NEXT: andl $4095, %eax # imm = 0xFFF490; X86-SLOW-BEXTR-NEXT: retl491;492; X64-SLOW-BEXTR-LABEL: bextr32b:493; X64-SLOW-BEXTR: # %bb.0:494; X64-SLOW-BEXTR-NEXT: movl %edi, %eax495; X64-SLOW-BEXTR-NEXT: shrl $4, %eax496; X64-SLOW-BEXTR-NEXT: andl $4095, %eax # imm = 0xFFF497; X64-SLOW-BEXTR-NEXT: retq498;499; X86-FAST-BEXTR-LABEL: bextr32b:500; X86-FAST-BEXTR: # %bb.0:501; X86-FAST-BEXTR-NEXT: movl $3076, %eax # imm = 0xC04502; X86-FAST-BEXTR-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax503; X86-FAST-BEXTR-NEXT: retl504;505; X64-FAST-BEXTR-LABEL: bextr32b:506; X64-FAST-BEXTR: # %bb.0:507; X64-FAST-BEXTR-NEXT: movl $3076, %eax # imm = 0xC04508; X64-FAST-BEXTR-NEXT: bextrl %eax, %edi, %eax509; X64-FAST-BEXTR-NEXT: retq510;511; EGPR-LABEL: bextr32b:512; EGPR: # %bb.0:513; EGPR-NEXT: movl $3076, %eax # encoding: [0xb8,0x04,0x0c,0x00,0x00]514; EGPR-NEXT: # imm = 0xC04515; EGPR-NEXT: bextrl %eax, %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0xf7,0xc7]516; EGPR-NEXT: retq # encoding: [0xc3]517 %1 = lshr i32 %x, 4518 %2 = and i32 %1, 4095519 ret i32 %2520}521 522; Make sure we still use AH subreg trick to extract 15:8523define i32 @bextr32_subreg(i32 %x) uwtable ssp {524; X86-LABEL: bextr32_subreg:525; X86: # %bb.0:526; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax527; X86-NEXT: retl528;529; X64-LABEL: bextr32_subreg:530; X64: # %bb.0:531; X64-NEXT: movl %edi, %eax532; X64-NEXT: movzbl %ah, %eax533; X64-NEXT: retq534;535; EGPR-LABEL: bextr32_subreg:536; EGPR: # %bb.0:537; EGPR-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]538; EGPR-NEXT: movzbl %ah, %eax # encoding: [0x0f,0xb6,0xc4]539; EGPR-NEXT: retq # encoding: [0xc3]540 %1 = lshr i32 %x, 8541 %2 = and i32 %1, 255542 ret i32 %2543}544 545define i32 @bextr32b_load(ptr %x) uwtable ssp {546; X86-SLOW-BEXTR-LABEL: bextr32b_load:547; X86-SLOW-BEXTR: # %bb.0:548; X86-SLOW-BEXTR-NEXT: movl {{[0-9]+}}(%esp), %eax549; X86-SLOW-BEXTR-NEXT: movl (%eax), %eax550; X86-SLOW-BEXTR-NEXT: shrl $4, %eax551; X86-SLOW-BEXTR-NEXT: andl $4095, %eax # imm = 0xFFF552; X86-SLOW-BEXTR-NEXT: retl553;554; X64-SLOW-BEXTR-LABEL: bextr32b_load:555; X64-SLOW-BEXTR: # %bb.0:556; X64-SLOW-BEXTR-NEXT: movl (%rdi), %eax557; X64-SLOW-BEXTR-NEXT: shrl $4, %eax558; X64-SLOW-BEXTR-NEXT: andl $4095, %eax # imm = 0xFFF559; X64-SLOW-BEXTR-NEXT: retq560;561; X86-FAST-BEXTR-LABEL: bextr32b_load:562; X86-FAST-BEXTR: # %bb.0:563; X86-FAST-BEXTR-NEXT: movl {{[0-9]+}}(%esp), %eax564; X86-FAST-BEXTR-NEXT: movl $3076, %ecx # imm = 0xC04565; X86-FAST-BEXTR-NEXT: bextrl %ecx, (%eax), %eax566; X86-FAST-BEXTR-NEXT: retl567;568; X64-FAST-BEXTR-LABEL: bextr32b_load:569; X64-FAST-BEXTR: # %bb.0:570; X64-FAST-BEXTR-NEXT: movl $3076, %eax # imm = 0xC04571; X64-FAST-BEXTR-NEXT: bextrl %eax, (%rdi), %eax572; X64-FAST-BEXTR-NEXT: retq573;574; EGPR-LABEL: bextr32b_load:575; EGPR: # %bb.0:576; EGPR-NEXT: movl $3076, %eax # encoding: [0xb8,0x04,0x0c,0x00,0x00]577; EGPR-NEXT: # imm = 0xC04578; EGPR-NEXT: bextrl %eax, (%rdi), %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0xf7,0x07]579; EGPR-NEXT: retq # encoding: [0xc3]580 %1 = load i32, ptr %x581 %2 = lshr i32 %1, 4582 %3 = and i32 %2, 4095583 ret i32 %3584}585 586; PR34042587define i32 @bextr32c(i32 %x, i16 zeroext %y) {588; X86-LABEL: bextr32c:589; X86: # %bb.0:590; X86-NEXT: movswl {{[0-9]+}}(%esp), %eax591; X86-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax592; X86-NEXT: retl593;594; X64-LABEL: bextr32c:595; X64: # %bb.0:596; X64-NEXT: bextrl %esi, %edi, %eax597; X64-NEXT: retq598;599; EGPR-LABEL: bextr32c:600; EGPR: # %bb.0:601; EGPR-NEXT: bextrl %esi, %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x48,0xf7,0xc7]602; EGPR-NEXT: retq # encoding: [0xc3]603 %tmp0 = sext i16 %y to i32604 %tmp1 = tail call i32 @llvm.x86.bmi.bextr.32(i32 %x, i32 %tmp0)605 ret i32 %tmp1606}607 608define i32 @non_bextr32(i32 %x) {609; X86-LABEL: non_bextr32:610; X86: # %bb.0: # %entry611; X86-NEXT: movl {{[0-9]+}}(%esp), %eax612; X86-NEXT: shrl $2, %eax613; X86-NEXT: andl $111, %eax614; X86-NEXT: retl615;616; X64-LABEL: non_bextr32:617; X64: # %bb.0: # %entry618; X64-NEXT: movl %edi, %eax619; X64-NEXT: shrl $2, %eax620; X64-NEXT: andl $111, %eax621; X64-NEXT: retq622;623; EGPR-LABEL: non_bextr32:624; EGPR: # %bb.0: # %entry625; EGPR-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]626; EGPR-NEXT: shrl $2, %eax # encoding: [0xc1,0xe8,0x02]627; EGPR-NEXT: andl $111, %eax # encoding: [0x83,0xe0,0x6f]628; EGPR-NEXT: retq # encoding: [0xc3]629entry:630 %shr = lshr i32 %x, 2631 %and = and i32 %shr, 111632 ret i32 %and633}634 635define i32 @blsi32(i32 %x) {636; X86-LABEL: blsi32:637; X86: # %bb.0:638; X86-NEXT: blsil {{[0-9]+}}(%esp), %eax639; X86-NEXT: retl640;641; X64-LABEL: blsi32:642; X64: # %bb.0:643; X64-NEXT: blsil %edi, %eax644; X64-NEXT: retq645;646; EGPR-LABEL: blsi32:647; EGPR: # %bb.0:648; EGPR-NEXT: blsil %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0xf3,0xdf]649; EGPR-NEXT: retq # encoding: [0xc3]650 %tmp = sub i32 0, %x651 %tmp2 = and i32 %x, %tmp652 ret i32 %tmp2653}654 655define i32 @blsi32_load(ptr %x) {656; X86-LABEL: blsi32_load:657; X86: # %bb.0:658; X86-NEXT: movl {{[0-9]+}}(%esp), %eax659; X86-NEXT: blsil (%eax), %eax660; X86-NEXT: retl661;662; X64-LABEL: blsi32_load:663; X64: # %bb.0:664; X64-NEXT: blsil (%rdi), %eax665; X64-NEXT: retq666;667; EGPR-LABEL: blsi32_load:668; EGPR: # %bb.0:669; EGPR-NEXT: blsil (%rdi), %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0xf3,0x1f]670; EGPR-NEXT: retq # encoding: [0xc3]671 %x1 = load i32, ptr %x672 %tmp = sub i32 0, %x1673 %tmp2 = and i32 %x1, %tmp674 ret i32 %tmp2675}676 677define i32 @blsi32_z(i32 %a, i32 %b) nounwind {678; X86-LABEL: blsi32_z:679; X86: # %bb.0:680; X86-NEXT: blsil {{[0-9]+}}(%esp), %eax681; X86-NEXT: jne .LBB25_2682; X86-NEXT: # %bb.1:683; X86-NEXT: movl {{[0-9]+}}(%esp), %eax684; X86-NEXT: .LBB25_2:685; X86-NEXT: retl686;687; X64-LABEL: blsi32_z:688; X64: # %bb.0:689; X64-NEXT: blsil %edi, %eax690; X64-NEXT: cmovel %esi, %eax691; X64-NEXT: retq692;693; EGPR-LABEL: blsi32_z:694; EGPR: # %bb.0:695; EGPR-NEXT: blsil %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0xf3,0xdf]696; EGPR-NEXT: testl %eax, %eax # encoding: [0x85,0xc0]697; EGPR-NEXT: cmovel %esi, %eax # encoding: [0x0f,0x44,0xc6]698; EGPR-NEXT: retq # encoding: [0xc3]699 %t0 = sub i32 0, %a700 %t1 = and i32 %t0, %a701 %t2 = icmp eq i32 %t1, 0702 %t3 = select i1 %t2, i32 %b, i32 %t1703 ret i32 %t3704}705 706define i32 @blsi32_z2(i32 %a, i32 %b, i32 %c) nounwind {707; X86-LABEL: blsi32_z2:708; X86: # %bb.0:709; X86-NEXT: blsil {{[0-9]+}}(%esp), %eax710; X86-NEXT: leal {{[0-9]+}}(%esp), %eax711; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx712; X86-NEXT: cmovel %eax, %ecx713; X86-NEXT: movl (%ecx), %eax714; X86-NEXT: retl715;716; X64-LABEL: blsi32_z2:717; X64: # %bb.0:718; X64-NEXT: movl %esi, %eax719; X64-NEXT: blsil %edi, %ecx720; X64-NEXT: cmovnel %edx, %eax721; X64-NEXT: retq722;723; EGPR-LABEL: blsi32_z2:724; EGPR: # %bb.0:725; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]726; EGPR-NEXT: blsil %edi, %ecx # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x70,0xf3,0xdf]727; EGPR-NEXT: testl %ecx, %ecx # encoding: [0x85,0xc9]728; EGPR-NEXT: cmovnel %edx, %eax # encoding: [0x0f,0x45,0xc2]729; EGPR-NEXT: retq # encoding: [0xc3]730 %t0 = sub i32 0, %a731 %t1 = and i32 %t0, %a732 %t2 = icmp eq i32 %t1, 0733 %t3 = select i1 %t2, i32 %b, i32 %c734 ret i32 %t3735}736 737; Inspired by PR48768, but using cmovcc instead of setcc. There should be738; no test instruction.739define i32 @blsi32_sle(i32 %a, i32 %b, i32 %c) nounwind {740; X86-LABEL: blsi32_sle:741; X86: # %bb.0:742; X86-NEXT: blsil {{[0-9]+}}(%esp), %eax743; X86-NEXT: leal {{[0-9]+}}(%esp), %eax744; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx745; X86-NEXT: cmovlel %eax, %ecx746; X86-NEXT: movl (%ecx), %eax747; X86-NEXT: retl748;749; X64-LABEL: blsi32_sle:750; X64: # %bb.0:751; X64-NEXT: movl %esi, %eax752; X64-NEXT: blsil %edi, %ecx753; X64-NEXT: cmovgl %edx, %eax754; X64-NEXT: retq755;756; EGPR-LABEL: blsi32_sle:757; EGPR: # %bb.0:758; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]759; EGPR-NEXT: blsil %edi, %ecx # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x70,0xf3,0xdf]760; EGPR-NEXT: testl %ecx, %ecx # encoding: [0x85,0xc9]761; EGPR-NEXT: cmovgl %edx, %eax # encoding: [0x0f,0x4f,0xc2]762; EGPR-NEXT: retq # encoding: [0xc3]763 %t0 = sub i32 0, %a764 %t1 = and i32 %t0, %a765 %t2 = icmp sle i32 %t1, 0766 %t3 = select i1 %t2, i32 %b, i32 %c767 ret i32 %t3768}769 770define i64 @blsi64(i64 %x) {771; X86-LABEL: blsi64:772; X86: # %bb.0:773; X86-NEXT: pushl %esi774; X86-NEXT: .cfi_def_cfa_offset 8775; X86-NEXT: .cfi_offset %esi, -8776; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx777; X86-NEXT: movl {{[0-9]+}}(%esp), %esi778; X86-NEXT: xorl %edx, %edx779; X86-NEXT: movl %ecx, %eax780; X86-NEXT: negl %eax781; X86-NEXT: sbbl %esi, %edx782; X86-NEXT: andl %esi, %edx783; X86-NEXT: andl %ecx, %eax784; X86-NEXT: popl %esi785; X86-NEXT: .cfi_def_cfa_offset 4786; X86-NEXT: retl787;788; X64-LABEL: blsi64:789; X64: # %bb.0:790; X64-NEXT: blsiq %rdi, %rax791; X64-NEXT: retq792;793; EGPR-LABEL: blsi64:794; EGPR: # %bb.0:795; EGPR-NEXT: blsiq %rdi, %rax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf8,0xf3,0xdf]796; EGPR-NEXT: retq # encoding: [0xc3]797 %tmp = sub i64 0, %x798 %tmp2 = and i64 %tmp, %x799 ret i64 %tmp2800}801 802define i64 @blsi64_z(i64 %a, i64 %b) nounwind {803; X86-LABEL: blsi64_z:804; X86: # %bb.0:805; X86-NEXT: pushl %esi806; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx807; X86-NEXT: movl {{[0-9]+}}(%esp), %esi808; X86-NEXT: xorl %edx, %edx809; X86-NEXT: movl %ecx, %eax810; X86-NEXT: negl %eax811; X86-NEXT: sbbl %esi, %edx812; X86-NEXT: andl %esi, %edx813; X86-NEXT: andl %ecx, %eax814; X86-NEXT: movl %eax, %ecx815; X86-NEXT: orl %edx, %ecx816; X86-NEXT: jne .LBB29_2817; X86-NEXT: # %bb.1:818; X86-NEXT: movl {{[0-9]+}}(%esp), %edx819; X86-NEXT: movl {{[0-9]+}}(%esp), %eax820; X86-NEXT: .LBB29_2:821; X86-NEXT: popl %esi822; X86-NEXT: retl823;824; X64-LABEL: blsi64_z:825; X64: # %bb.0:826; X64-NEXT: blsiq %rdi, %rax827; X64-NEXT: cmoveq %rsi, %rax828; X64-NEXT: retq829;830; EGPR-LABEL: blsi64_z:831; EGPR: # %bb.0:832; EGPR-NEXT: blsiq %rdi, %rax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf8,0xf3,0xdf]833; EGPR-NEXT: testq %rax, %rax # encoding: [0x48,0x85,0xc0]834; EGPR-NEXT: cmoveq %rsi, %rax # encoding: [0x48,0x0f,0x44,0xc6]835; EGPR-NEXT: retq # encoding: [0xc3]836 %t0 = sub i64 0, %a837 %t1 = and i64 %t0, %a838 %t2 = icmp eq i64 %t1, 0839 %t3 = select i1 %t2, i64 %b, i64 %t1840 ret i64 %t3841}842 843define i64 @blsi64_z2(i64 %a, i64 %b, i64 %c) nounwind {844; X86-LABEL: blsi64_z2:845; X86: # %bb.0:846; X86-NEXT: pushl %esi847; X86-NEXT: movl {{[0-9]+}}(%esp), %eax848; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx849; X86-NEXT: xorl %edx, %edx850; X86-NEXT: movl %eax, %esi851; X86-NEXT: negl %esi852; X86-NEXT: sbbl %ecx, %edx853; X86-NEXT: andl %ecx, %edx854; X86-NEXT: andl %eax, %esi855; X86-NEXT: orl %edx, %esi856; X86-NEXT: leal {{[0-9]+}}(%esp), %eax857; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx858; X86-NEXT: cmovel %eax, %ecx859; X86-NEXT: movl (%ecx), %eax860; X86-NEXT: movl 4(%ecx), %edx861; X86-NEXT: popl %esi862; X86-NEXT: retl863;864; X64-LABEL: blsi64_z2:865; X64: # %bb.0:866; X64-NEXT: movq %rsi, %rax867; X64-NEXT: blsiq %rdi, %rcx868; X64-NEXT: cmovneq %rdx, %rax869; X64-NEXT: retq870;871; EGPR-LABEL: blsi64_z2:872; EGPR: # %bb.0:873; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]874; EGPR-NEXT: blsiq %rdi, %rcx # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf0,0xf3,0xdf]875; EGPR-NEXT: testq %rcx, %rcx # encoding: [0x48,0x85,0xc9]876; EGPR-NEXT: cmovneq %rdx, %rax # encoding: [0x48,0x0f,0x45,0xc2]877; EGPR-NEXT: retq # encoding: [0xc3]878 %t0 = sub i64 0, %a879 %t1 = and i64 %t0, %a880 %t2 = icmp eq i64 %t1, 0881 %t3 = select i1 %t2, i64 %b, i64 %c882 ret i64 %t3883}884 885define i64 @blsi64_sle(i64 %a, i64 %b, i64 %c) nounwind {886; X86-LABEL: blsi64_sle:887; X86: # %bb.0:888; X86-NEXT: pushl %esi889; X86-NEXT: movl {{[0-9]+}}(%esp), %eax890; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx891; X86-NEXT: xorl %edx, %edx892; X86-NEXT: movl %eax, %esi893; X86-NEXT: negl %esi894; X86-NEXT: sbbl %ecx, %edx895; X86-NEXT: andl %ecx, %edx896; X86-NEXT: andl %eax, %esi897; X86-NEXT: cmpl $1, %esi898; X86-NEXT: sbbl $0, %edx899; X86-NEXT: leal {{[0-9]+}}(%esp), %eax900; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx901; X86-NEXT: cmovll %eax, %ecx902; X86-NEXT: movl (%ecx), %eax903; X86-NEXT: movl 4(%ecx), %edx904; X86-NEXT: popl %esi905; X86-NEXT: retl906;907; X64-LABEL: blsi64_sle:908; X64: # %bb.0:909; X64-NEXT: movq %rsi, %rax910; X64-NEXT: blsiq %rdi, %rcx911; X64-NEXT: cmovgq %rdx, %rax912; X64-NEXT: retq913;914; EGPR-LABEL: blsi64_sle:915; EGPR: # %bb.0:916; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]917; EGPR-NEXT: blsiq %rdi, %rcx # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf0,0xf3,0xdf]918; EGPR-NEXT: testq %rcx, %rcx # encoding: [0x48,0x85,0xc9]919; EGPR-NEXT: cmovgq %rdx, %rax # encoding: [0x48,0x0f,0x4f,0xc2]920; EGPR-NEXT: retq # encoding: [0xc3]921 %t0 = sub i64 0, %a922 %t1 = and i64 %t0, %a923 %t2 = icmp sle i64 %t1, 0924 %t3 = select i1 %t2, i64 %b, i64 %c925 ret i64 %t3926}927 928define i32 @blsmsk32(i32 %x) {929; X86-LABEL: blsmsk32:930; X86: # %bb.0:931; X86-NEXT: blsmskl {{[0-9]+}}(%esp), %eax932; X86-NEXT: retl933;934; X64-LABEL: blsmsk32:935; X64: # %bb.0:936; X64-NEXT: blsmskl %edi, %eax937; X64-NEXT: retq938;939; EGPR-LABEL: blsmsk32:940; EGPR: # %bb.0:941; EGPR-NEXT: blsmskl %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0xf3,0xd7]942; EGPR-NEXT: retq # encoding: [0xc3]943 %tmp = sub i32 %x, 1944 %tmp2 = xor i32 %x, %tmp945 ret i32 %tmp2946}947 948define i32 @blsmsk32_load(ptr %x) {949; X86-LABEL: blsmsk32_load:950; X86: # %bb.0:951; X86-NEXT: movl {{[0-9]+}}(%esp), %eax952; X86-NEXT: blsmskl (%eax), %eax953; X86-NEXT: retl954;955; X64-LABEL: blsmsk32_load:956; X64: # %bb.0:957; X64-NEXT: blsmskl (%rdi), %eax958; X64-NEXT: retq959;960; EGPR-LABEL: blsmsk32_load:961; EGPR: # %bb.0:962; EGPR-NEXT: blsmskl (%rdi), %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0xf3,0x17]963; EGPR-NEXT: retq # encoding: [0xc3]964 %x1 = load i32, ptr %x965 %tmp = sub i32 %x1, 1966 %tmp2 = xor i32 %x1, %tmp967 ret i32 %tmp2968}969 970define i32 @blsmsk32_z(i32 %a, i32 %b) nounwind {971; X86-LABEL: blsmsk32_z:972; X86: # %bb.0:973; X86-NEXT: blsmskl {{[0-9]+}}(%esp), %eax974; X86-NEXT: jne .LBB34_2975; X86-NEXT: # %bb.1:976; X86-NEXT: movl {{[0-9]+}}(%esp), %eax977; X86-NEXT: .LBB34_2:978; X86-NEXT: retl979;980; X64-LABEL: blsmsk32_z:981; X64: # %bb.0:982; X64-NEXT: blsmskl %edi, %eax983; X64-NEXT: cmovel %esi, %eax984; X64-NEXT: retq985;986; EGPR-LABEL: blsmsk32_z:987; EGPR: # %bb.0:988; EGPR-NEXT: blsmskl %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0xf3,0xd7]989; EGPR-NEXT: testl %eax, %eax # encoding: [0x85,0xc0]990; EGPR-NEXT: cmovel %esi, %eax # encoding: [0x0f,0x44,0xc6]991; EGPR-NEXT: retq # encoding: [0xc3]992 %t0 = sub i32 %a, 1993 %t1 = xor i32 %t0, %a994 %t2 = icmp eq i32 %t1, 0995 %t3 = select i1 %t2, i32 %b, i32 %t1996 ret i32 %t3997}998 999define i32 @blsmsk32_z2(i32 %a, i32 %b, i32 %c) nounwind {1000; X86-LABEL: blsmsk32_z2:1001; X86: # %bb.0:1002; X86-NEXT: blsmskl {{[0-9]+}}(%esp), %eax1003; X86-NEXT: leal {{[0-9]+}}(%esp), %eax1004; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx1005; X86-NEXT: cmovel %eax, %ecx1006; X86-NEXT: movl (%ecx), %eax1007; X86-NEXT: retl1008;1009; X64-LABEL: blsmsk32_z2:1010; X64: # %bb.0:1011; X64-NEXT: movl %esi, %eax1012; X64-NEXT: blsmskl %edi, %ecx1013; X64-NEXT: cmovnel %edx, %eax1014; X64-NEXT: retq1015;1016; EGPR-LABEL: blsmsk32_z2:1017; EGPR: # %bb.0:1018; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]1019; EGPR-NEXT: blsmskl %edi, %ecx # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x70,0xf3,0xd7]1020; EGPR-NEXT: cmovnel %edx, %eax # encoding: [0x0f,0x45,0xc2]1021; EGPR-NEXT: retq # encoding: [0xc3]1022 %t0 = sub i32 %a, 11023 %t1 = xor i32 %t0, %a1024 %t2 = icmp eq i32 %t1, 01025 %t3 = select i1 %t2, i32 %b, i32 %c1026 ret i32 %t31027}1028 1029define i32 @blsmsk32_sle(i32 %a, i32 %b, i32 %c) nounwind {1030; X86-LABEL: blsmsk32_sle:1031; X86: # %bb.0:1032; X86-NEXT: blsmskl {{[0-9]+}}(%esp), %eax1033; X86-NEXT: leal {{[0-9]+}}(%esp), %eax1034; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx1035; X86-NEXT: cmovlel %eax, %ecx1036; X86-NEXT: movl (%ecx), %eax1037; X86-NEXT: retl1038;1039; X64-LABEL: blsmsk32_sle:1040; X64: # %bb.0:1041; X64-NEXT: movl %esi, %eax1042; X64-NEXT: blsmskl %edi, %ecx1043; X64-NEXT: cmovgl %edx, %eax1044; X64-NEXT: retq1045;1046; EGPR-LABEL: blsmsk32_sle:1047; EGPR: # %bb.0:1048; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]1049; EGPR-NEXT: blsmskl %edi, %ecx # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x70,0xf3,0xd7]1050; EGPR-NEXT: testl %ecx, %ecx # encoding: [0x85,0xc9]1051; EGPR-NEXT: cmovgl %edx, %eax # encoding: [0x0f,0x4f,0xc2]1052; EGPR-NEXT: retq # encoding: [0xc3]1053 %t0 = sub i32 %a, 11054 %t1 = xor i32 %t0, %a1055 %t2 = icmp sle i32 %t1, 01056 %t3 = select i1 %t2, i32 %b, i32 %c1057 ret i32 %t31058}1059 1060define i64 @blsmsk64(i64 %x) {1061; X86-LABEL: blsmsk64:1062; X86: # %bb.0:1063; X86-NEXT: pushl %esi1064; X86-NEXT: .cfi_def_cfa_offset 81065; X86-NEXT: .cfi_offset %esi, -81066; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx1067; X86-NEXT: movl {{[0-9]+}}(%esp), %esi1068; X86-NEXT: movl %ecx, %eax1069; X86-NEXT: addl $-1, %eax1070; X86-NEXT: movl %esi, %edx1071; X86-NEXT: adcl $-1, %edx1072; X86-NEXT: xorl %ecx, %eax1073; X86-NEXT: xorl %esi, %edx1074; X86-NEXT: popl %esi1075; X86-NEXT: .cfi_def_cfa_offset 41076; X86-NEXT: retl1077;1078; X64-LABEL: blsmsk64:1079; X64: # %bb.0:1080; X64-NEXT: blsmskq %rdi, %rax1081; X64-NEXT: retq1082;1083; EGPR-LABEL: blsmsk64:1084; EGPR: # %bb.0:1085; EGPR-NEXT: blsmskq %rdi, %rax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf8,0xf3,0xd7]1086; EGPR-NEXT: retq # encoding: [0xc3]1087 %tmp = sub i64 %x, 11088 %tmp2 = xor i64 %tmp, %x1089 ret i64 %tmp21090}1091 1092define i64 @blsmsk64_z(i64 %a, i64 %b) nounwind {1093; X86-LABEL: blsmsk64_z:1094; X86: # %bb.0:1095; X86-NEXT: pushl %esi1096; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx1097; X86-NEXT: movl {{[0-9]+}}(%esp), %esi1098; X86-NEXT: movl %ecx, %eax1099; X86-NEXT: addl $-1, %eax1100; X86-NEXT: movl %esi, %edx1101; X86-NEXT: adcl $-1, %edx1102; X86-NEXT: xorl %ecx, %eax1103; X86-NEXT: xorl %esi, %edx1104; X86-NEXT: movl %eax, %ecx1105; X86-NEXT: orl %edx, %ecx1106; X86-NEXT: jne .LBB38_21107; X86-NEXT: # %bb.1:1108; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1109; X86-NEXT: movl {{[0-9]+}}(%esp), %edx1110; X86-NEXT: .LBB38_2:1111; X86-NEXT: popl %esi1112; X86-NEXT: retl1113;1114; X64-LABEL: blsmsk64_z:1115; X64: # %bb.0:1116; X64-NEXT: blsmskq %rdi, %rax1117; X64-NEXT: cmoveq %rsi, %rax1118; X64-NEXT: retq1119;1120; EGPR-LABEL: blsmsk64_z:1121; EGPR: # %bb.0:1122; EGPR-NEXT: blsmskq %rdi, %rax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf8,0xf3,0xd7]1123; EGPR-NEXT: testq %rax, %rax # encoding: [0x48,0x85,0xc0]1124; EGPR-NEXT: cmoveq %rsi, %rax # encoding: [0x48,0x0f,0x44,0xc6]1125; EGPR-NEXT: retq # encoding: [0xc3]1126 %t0 = sub i64 %a, 11127 %t1 = xor i64 %t0, %a1128 %t2 = icmp eq i64 %t1, 01129 %t3 = select i1 %t2, i64 %b, i64 %t11130 ret i64 %t31131}1132 1133define i64 @blsmsk64_z2(i64 %a, i64 %b, i64 %c) nounwind {1134; X86-LABEL: blsmsk64_z2:1135; X86: # %bb.0:1136; X86-NEXT: pushl %esi1137; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1138; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx1139; X86-NEXT: movl %eax, %edx1140; X86-NEXT: addl $-1, %edx1141; X86-NEXT: movl %ecx, %esi1142; X86-NEXT: adcl $-1, %esi1143; X86-NEXT: xorl %eax, %edx1144; X86-NEXT: xorl %ecx, %esi1145; X86-NEXT: orl %edx, %esi1146; X86-NEXT: leal {{[0-9]+}}(%esp), %eax1147; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx1148; X86-NEXT: cmovel %eax, %ecx1149; X86-NEXT: movl (%ecx), %eax1150; X86-NEXT: movl 4(%ecx), %edx1151; X86-NEXT: popl %esi1152; X86-NEXT: retl1153;1154; X64-LABEL: blsmsk64_z2:1155; X64: # %bb.0:1156; X64-NEXT: movq %rsi, %rax1157; X64-NEXT: blsmskq %rdi, %rcx1158; X64-NEXT: cmovneq %rdx, %rax1159; X64-NEXT: retq1160;1161; EGPR-LABEL: blsmsk64_z2:1162; EGPR: # %bb.0:1163; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]1164; EGPR-NEXT: blsmskq %rdi, %rcx # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf0,0xf3,0xd7]1165; EGPR-NEXT: cmovneq %rdx, %rax # encoding: [0x48,0x0f,0x45,0xc2]1166; EGPR-NEXT: retq # encoding: [0xc3]1167 %t0 = sub i64 %a, 11168 %t1 = xor i64 %t0, %a1169 %t2 = icmp eq i64 %t1, 01170 %t3 = select i1 %t2, i64 %b, i64 %c1171 ret i64 %t31172}1173 1174define i64 @blsmsk64_sle(i64 %a, i64 %b, i64 %c) nounwind {1175; X86-LABEL: blsmsk64_sle:1176; X86: # %bb.0:1177; X86-NEXT: pushl %esi1178; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1179; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx1180; X86-NEXT: movl %eax, %edx1181; X86-NEXT: addl $-1, %edx1182; X86-NEXT: movl %ecx, %esi1183; X86-NEXT: adcl $-1, %esi1184; X86-NEXT: xorl %ecx, %esi1185; X86-NEXT: xorl %eax, %edx1186; X86-NEXT: cmpl $1, %edx1187; X86-NEXT: sbbl $0, %esi1188; X86-NEXT: leal {{[0-9]+}}(%esp), %eax1189; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx1190; X86-NEXT: cmovll %eax, %ecx1191; X86-NEXT: movl (%ecx), %eax1192; X86-NEXT: movl 4(%ecx), %edx1193; X86-NEXT: popl %esi1194; X86-NEXT: retl1195;1196; X64-LABEL: blsmsk64_sle:1197; X64: # %bb.0:1198; X64-NEXT: movq %rsi, %rax1199; X64-NEXT: blsmskq %rdi, %rcx1200; X64-NEXT: cmovgq %rdx, %rax1201; X64-NEXT: retq1202;1203; EGPR-LABEL: blsmsk64_sle:1204; EGPR: # %bb.0:1205; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]1206; EGPR-NEXT: blsmskq %rdi, %rcx # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf0,0xf3,0xd7]1207; EGPR-NEXT: testq %rcx, %rcx # encoding: [0x48,0x85,0xc9]1208; EGPR-NEXT: cmovgq %rdx, %rax # encoding: [0x48,0x0f,0x4f,0xc2]1209; EGPR-NEXT: retq # encoding: [0xc3]1210 %t0 = sub i64 %a, 11211 %t1 = xor i64 %t0, %a1212 %t2 = icmp sle i64 %t1, 01213 %t3 = select i1 %t2, i64 %b, i64 %c1214 ret i64 %t31215}1216 1217define i32 @blsr32(i32 %x) {1218; X86-LABEL: blsr32:1219; X86: # %bb.0:1220; X86-NEXT: blsrl {{[0-9]+}}(%esp), %eax1221; X86-NEXT: retl1222;1223; X64-LABEL: blsr32:1224; X64: # %bb.0:1225; X64-NEXT: blsrl %edi, %eax1226; X64-NEXT: retq1227;1228; EGPR-LABEL: blsr32:1229; EGPR: # %bb.0:1230; EGPR-NEXT: blsrl %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0xf3,0xcf]1231; EGPR-NEXT: retq # encoding: [0xc3]1232 %tmp = sub i32 %x, 11233 %tmp2 = and i32 %x, %tmp1234 ret i32 %tmp21235}1236 1237define i32 @blsr32_load(ptr %x) {1238; X86-LABEL: blsr32_load:1239; X86: # %bb.0:1240; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1241; X86-NEXT: blsrl (%eax), %eax1242; X86-NEXT: retl1243;1244; X64-LABEL: blsr32_load:1245; X64: # %bb.0:1246; X64-NEXT: blsrl (%rdi), %eax1247; X64-NEXT: retq1248;1249; EGPR-LABEL: blsr32_load:1250; EGPR: # %bb.0:1251; EGPR-NEXT: blsrl (%rdi), %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0xf3,0x0f]1252; EGPR-NEXT: retq # encoding: [0xc3]1253 %x1 = load i32, ptr %x1254 %tmp = sub i32 %x1, 11255 %tmp2 = and i32 %x1, %tmp1256 ret i32 %tmp21257}1258 1259define i32 @blsr32_z(i32 %a, i32 %b) nounwind {1260; X86-LABEL: blsr32_z:1261; X86: # %bb.0:1262; X86-NEXT: blsrl {{[0-9]+}}(%esp), %eax1263; X86-NEXT: jne .LBB43_21264; X86-NEXT: # %bb.1:1265; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1266; X86-NEXT: .LBB43_2:1267; X86-NEXT: retl1268;1269; X64-LABEL: blsr32_z:1270; X64: # %bb.0:1271; X64-NEXT: blsrl %edi, %eax1272; X64-NEXT: cmovel %esi, %eax1273; X64-NEXT: retq1274;1275; EGPR-LABEL: blsr32_z:1276; EGPR: # %bb.0:1277; EGPR-NEXT: blsrl %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0xf3,0xcf]1278; EGPR-NEXT: testl %eax, %eax # encoding: [0x85,0xc0]1279; EGPR-NEXT: cmovel %esi, %eax # encoding: [0x0f,0x44,0xc6]1280; EGPR-NEXT: retq # encoding: [0xc3]1281 %t0 = sub i32 %a, 11282 %t1 = and i32 %t0, %a1283 %t2 = icmp eq i32 %t1, 01284 %t3 = select i1 %t2, i32 %b, i32 %t11285 ret i32 %t31286}1287 1288define i32 @blsr32_z2(i32 %a, i32 %b, i32 %c) nounwind {1289; X86-LABEL: blsr32_z2:1290; X86: # %bb.0:1291; X86-NEXT: blsrl {{[0-9]+}}(%esp), %eax1292; X86-NEXT: leal {{[0-9]+}}(%esp), %eax1293; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx1294; X86-NEXT: cmovel %eax, %ecx1295; X86-NEXT: movl (%ecx), %eax1296; X86-NEXT: retl1297;1298; X64-LABEL: blsr32_z2:1299; X64: # %bb.0:1300; X64-NEXT: movl %esi, %eax1301; X64-NEXT: blsrl %edi, %ecx1302; X64-NEXT: cmovnel %edx, %eax1303; X64-NEXT: retq1304;1305; EGPR-LABEL: blsr32_z2:1306; EGPR: # %bb.0:1307; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]1308; EGPR-NEXT: blsrl %edi, %ecx # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x70,0xf3,0xcf]1309; EGPR-NEXT: testl %ecx, %ecx # encoding: [0x85,0xc9]1310; EGPR-NEXT: cmovnel %edx, %eax # encoding: [0x0f,0x45,0xc2]1311; EGPR-NEXT: retq # encoding: [0xc3]1312 %t0 = sub i32 %a, 11313 %t1 = and i32 %t0, %a1314 %t2 = icmp eq i32 %t1, 01315 %t3 = select i1 %t2, i32 %b, i32 %c1316 ret i32 %t31317}1318 1319define i32 @blsr32_sle(i32 %a, i32 %b, i32 %c) nounwind {1320; X86-LABEL: blsr32_sle:1321; X86: # %bb.0:1322; X86-NEXT: blsrl {{[0-9]+}}(%esp), %eax1323; X86-NEXT: leal {{[0-9]+}}(%esp), %eax1324; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx1325; X86-NEXT: cmovlel %eax, %ecx1326; X86-NEXT: movl (%ecx), %eax1327; X86-NEXT: retl1328;1329; X64-LABEL: blsr32_sle:1330; X64: # %bb.0:1331; X64-NEXT: movl %esi, %eax1332; X64-NEXT: blsrl %edi, %ecx1333; X64-NEXT: cmovgl %edx, %eax1334; X64-NEXT: retq1335;1336; EGPR-LABEL: blsr32_sle:1337; EGPR: # %bb.0:1338; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]1339; EGPR-NEXT: blsrl %edi, %ecx # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x70,0xf3,0xcf]1340; EGPR-NEXT: testl %ecx, %ecx # encoding: [0x85,0xc9]1341; EGPR-NEXT: cmovgl %edx, %eax # encoding: [0x0f,0x4f,0xc2]1342; EGPR-NEXT: retq # encoding: [0xc3]1343 %t0 = sub i32 %a, 11344 %t1 = and i32 %t0, %a1345 %t2 = icmp sle i32 %t1, 01346 %t3 = select i1 %t2, i32 %b, i32 %c1347 ret i32 %t31348}1349 1350define i64 @blsr64(i64 %x) {1351; X86-LABEL: blsr64:1352; X86: # %bb.0:1353; X86-NEXT: pushl %esi1354; X86-NEXT: .cfi_def_cfa_offset 81355; X86-NEXT: .cfi_offset %esi, -81356; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx1357; X86-NEXT: movl {{[0-9]+}}(%esp), %esi1358; X86-NEXT: movl %ecx, %eax1359; X86-NEXT: addl $-1, %eax1360; X86-NEXT: movl %esi, %edx1361; X86-NEXT: adcl $-1, %edx1362; X86-NEXT: andl %ecx, %eax1363; X86-NEXT: andl %esi, %edx1364; X86-NEXT: popl %esi1365; X86-NEXT: .cfi_def_cfa_offset 41366; X86-NEXT: retl1367;1368; X64-LABEL: blsr64:1369; X64: # %bb.0:1370; X64-NEXT: blsrq %rdi, %rax1371; X64-NEXT: retq1372;1373; EGPR-LABEL: blsr64:1374; EGPR: # %bb.0:1375; EGPR-NEXT: blsrq %rdi, %rax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf8,0xf3,0xcf]1376; EGPR-NEXT: retq # encoding: [0xc3]1377 %tmp = sub i64 %x, 11378 %tmp2 = and i64 %tmp, %x1379 ret i64 %tmp21380}1381 1382define i64 @blsr64_z(i64 %a, i64 %b) nounwind {1383; X86-LABEL: blsr64_z:1384; X86: # %bb.0:1385; X86-NEXT: pushl %esi1386; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx1387; X86-NEXT: movl {{[0-9]+}}(%esp), %esi1388; X86-NEXT: movl %ecx, %eax1389; X86-NEXT: addl $-1, %eax1390; X86-NEXT: movl %esi, %edx1391; X86-NEXT: adcl $-1, %edx1392; X86-NEXT: andl %ecx, %eax1393; X86-NEXT: andl %esi, %edx1394; X86-NEXT: movl %eax, %ecx1395; X86-NEXT: orl %edx, %ecx1396; X86-NEXT: jne .LBB47_21397; X86-NEXT: # %bb.1:1398; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1399; X86-NEXT: movl {{[0-9]+}}(%esp), %edx1400; X86-NEXT: .LBB47_2:1401; X86-NEXT: popl %esi1402; X86-NEXT: retl1403;1404; X64-LABEL: blsr64_z:1405; X64: # %bb.0:1406; X64-NEXT: blsrq %rdi, %rax1407; X64-NEXT: cmoveq %rsi, %rax1408; X64-NEXT: retq1409;1410; EGPR-LABEL: blsr64_z:1411; EGPR: # %bb.0:1412; EGPR-NEXT: blsrq %rdi, %rax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf8,0xf3,0xcf]1413; EGPR-NEXT: testq %rax, %rax # encoding: [0x48,0x85,0xc0]1414; EGPR-NEXT: cmoveq %rsi, %rax # encoding: [0x48,0x0f,0x44,0xc6]1415; EGPR-NEXT: retq # encoding: [0xc3]1416 %t0 = sub i64 %a, 11417 %t1 = and i64 %t0, %a1418 %t2 = icmp eq i64 %t1, 01419 %t3 = select i1 %t2, i64 %b, i64 %t11420 ret i64 %t31421}1422 1423define i64 @blsr64_z2(i64 %a, i64 %b, i64 %c) nounwind {1424; X86-LABEL: blsr64_z2:1425; X86: # %bb.0:1426; X86-NEXT: pushl %esi1427; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1428; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx1429; X86-NEXT: movl %eax, %edx1430; X86-NEXT: addl $-1, %edx1431; X86-NEXT: movl %ecx, %esi1432; X86-NEXT: adcl $-1, %esi1433; X86-NEXT: andl %eax, %edx1434; X86-NEXT: andl %ecx, %esi1435; X86-NEXT: orl %edx, %esi1436; X86-NEXT: leal {{[0-9]+}}(%esp), %eax1437; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx1438; X86-NEXT: cmovel %eax, %ecx1439; X86-NEXT: movl (%ecx), %eax1440; X86-NEXT: movl 4(%ecx), %edx1441; X86-NEXT: popl %esi1442; X86-NEXT: retl1443;1444; X64-LABEL: blsr64_z2:1445; X64: # %bb.0:1446; X64-NEXT: movq %rsi, %rax1447; X64-NEXT: blsrq %rdi, %rcx1448; X64-NEXT: cmovneq %rdx, %rax1449; X64-NEXT: retq1450;1451; EGPR-LABEL: blsr64_z2:1452; EGPR: # %bb.0:1453; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]1454; EGPR-NEXT: blsrq %rdi, %rcx # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf0,0xf3,0xcf]1455; EGPR-NEXT: testq %rcx, %rcx # encoding: [0x48,0x85,0xc9]1456; EGPR-NEXT: cmovneq %rdx, %rax # encoding: [0x48,0x0f,0x45,0xc2]1457; EGPR-NEXT: retq # encoding: [0xc3]1458 %t0 = sub i64 %a, 11459 %t1 = and i64 %t0, %a1460 %t2 = icmp eq i64 %t1, 01461 %t3 = select i1 %t2, i64 %b, i64 %c1462 ret i64 %t31463}1464 1465define i64 @blsr64_sle(i64 %a, i64 %b, i64 %c) nounwind {1466; X86-LABEL: blsr64_sle:1467; X86: # %bb.0:1468; X86-NEXT: pushl %esi1469; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1470; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx1471; X86-NEXT: movl %eax, %edx1472; X86-NEXT: addl $-1, %edx1473; X86-NEXT: movl %ecx, %esi1474; X86-NEXT: adcl $-1, %esi1475; X86-NEXT: andl %ecx, %esi1476; X86-NEXT: andl %eax, %edx1477; X86-NEXT: cmpl $1, %edx1478; X86-NEXT: sbbl $0, %esi1479; X86-NEXT: leal {{[0-9]+}}(%esp), %eax1480; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx1481; X86-NEXT: cmovll %eax, %ecx1482; X86-NEXT: movl (%ecx), %eax1483; X86-NEXT: movl 4(%ecx), %edx1484; X86-NEXT: popl %esi1485; X86-NEXT: retl1486;1487; X64-LABEL: blsr64_sle:1488; X64: # %bb.0:1489; X64-NEXT: movq %rsi, %rax1490; X64-NEXT: blsrq %rdi, %rcx1491; X64-NEXT: cmovgq %rdx, %rax1492; X64-NEXT: retq1493;1494; EGPR-LABEL: blsr64_sle:1495; EGPR: # %bb.0:1496; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]1497; EGPR-NEXT: blsrq %rdi, %rcx # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf0,0xf3,0xcf]1498; EGPR-NEXT: testq %rcx, %rcx # encoding: [0x48,0x85,0xc9]1499; EGPR-NEXT: cmovgq %rdx, %rax # encoding: [0x48,0x0f,0x4f,0xc2]1500; EGPR-NEXT: retq # encoding: [0xc3]1501 %t0 = sub i64 %a, 11502 %t1 = and i64 %t0, %a1503 %t2 = icmp sle i64 %t1, 01504 %t3 = select i1 %t2, i64 %b, i64 %c1505 ret i64 %t31506}1507 1508; PR35792 - https://bugs.llvm.org/show_bug.cgi?id=357921509 1510define i64 @blsr_disguised_constant(i64 %x) {1511; X86-LABEL: blsr_disguised_constant:1512; X86: # %bb.0:1513; X86-NEXT: blsrl {{[0-9]+}}(%esp), %eax1514; X86-NEXT: movzwl %ax, %eax1515; X86-NEXT: xorl %edx, %edx1516; X86-NEXT: retl1517;1518; X64-LABEL: blsr_disguised_constant:1519; X64: # %bb.0:1520; X64-NEXT: blsrl %edi, %eax1521; X64-NEXT: movzwl %ax, %eax1522; X64-NEXT: retq1523;1524; EGPR-LABEL: blsr_disguised_constant:1525; EGPR: # %bb.0:1526; EGPR-NEXT: blsrl %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0xf3,0xcf]1527; EGPR-NEXT: movzwl %ax, %eax # encoding: [0x0f,0xb7,0xc0]1528; EGPR-NEXT: retq # encoding: [0xc3]1529 %a1 = and i64 %x, 655351530 %a2 = add i64 %x, 655351531 %r = and i64 %a1, %a21532 ret i64 %r1533}1534 1535; The add here used to get shrunk, but the and did not thus hiding the blsr pattern.1536; We now use the knowledge that upper bits of the shift guarantee the and result has 0s in the upper bits to reduce it too.1537define i64 @blsr_disguised_shrunk_add(i64 %x) {1538; X86-LABEL: blsr_disguised_shrunk_add:1539; X86: # %bb.0:1540; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1541; X86-NEXT: shrl $16, %eax1542; X86-NEXT: blsrl %eax, %eax1543; X86-NEXT: xorl %edx, %edx1544; X86-NEXT: retl1545;1546; X64-LABEL: blsr_disguised_shrunk_add:1547; X64: # %bb.0:1548; X64-NEXT: shrq $48, %rdi1549; X64-NEXT: blsrl %edi, %eax1550; X64-NEXT: retq1551;1552; EGPR-LABEL: blsr_disguised_shrunk_add:1553; EGPR: # %bb.0:1554; EGPR-NEXT: shrq $48, %rdi # encoding: [0x48,0xc1,0xef,0x30]1555; EGPR-NEXT: blsrl %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0xf3,0xcf]1556; EGPR-NEXT: retq # encoding: [0xc3]1557 %a = lshr i64 %x, 481558 %b = add i64 %a, -11559 %c = and i64 %b, %a1560 ret i64 %c1561}1562 1563define void @pr40060(i32, i32) {1564; X86-LABEL: pr40060:1565; X86: # %bb.0:1566; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1567; X86-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax1568; X86-NEXT: testl %eax, %eax1569; X86-NEXT: jns bar # TAILCALL1570; X86-NEXT: # %bb.1:1571; X86-NEXT: retl1572;1573; X64-LABEL: pr40060:1574; X64: # %bb.0:1575; X64-NEXT: bextrl %esi, %edi, %eax1576; X64-NEXT: testl %eax, %eax1577; X64-NEXT: jns bar # TAILCALL1578; X64-NEXT: # %bb.1:1579; X64-NEXT: retq1580;1581; EGPR-LABEL: pr40060:1582; EGPR: # %bb.0:1583; EGPR-NEXT: bextrl %esi, %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x48,0xf7,0xc7]1584; EGPR-NEXT: testl %eax, %eax # encoding: [0x85,0xc0]1585; EGPR-NEXT: jns bar # TAILCALL1586; EGPR-NEXT: # encoding: [0x79,A]1587; EGPR-NEXT: # fixup A - offset: 1, value: bar, kind: FK_PCRel_11588; EGPR-NEXT: # %bb.1:1589; EGPR-NEXT: retq # encoding: [0xc3]1590 %3 = tail call i32 @llvm.x86.bmi.bextr.32(i32 %0, i32 %1)1591 %4 = icmp sgt i32 %3, -11592 br i1 %4, label %5, label %61593 1594 tail call void @bar()1595 br label %61596 1597 ret void1598}1599 1600define i32 @blsr32_branch(i32 %x) {1601; X86-LABEL: blsr32_branch:1602; X86: # %bb.0:1603; X86-NEXT: pushl %esi1604; X86-NEXT: .cfi_def_cfa_offset 81605; X86-NEXT: .cfi_offset %esi, -81606; X86-NEXT: blsrl {{[0-9]+}}(%esp), %esi1607; X86-NEXT: jne .LBB53_21608; X86-NEXT: # %bb.1:1609; X86-NEXT: calll bar1610; X86-NEXT: .LBB53_2:1611; X86-NEXT: movl %esi, %eax1612; X86-NEXT: popl %esi1613; X86-NEXT: .cfi_def_cfa_offset 41614; X86-NEXT: retl1615;1616; X64-LABEL: blsr32_branch:1617; X64: # %bb.0:1618; X64-NEXT: pushq %rbx1619; X64-NEXT: .cfi_def_cfa_offset 161620; X64-NEXT: .cfi_offset %rbx, -161621; X64-NEXT: blsrl %edi, %ebx1622; X64-NEXT: jne .LBB53_21623; X64-NEXT: # %bb.1:1624; X64-NEXT: callq bar1625; X64-NEXT: .LBB53_2:1626; X64-NEXT: movl %ebx, %eax1627; X64-NEXT: popq %rbx1628; X64-NEXT: .cfi_def_cfa_offset 81629; X64-NEXT: retq1630;1631; EGPR-LABEL: blsr32_branch:1632; EGPR: # %bb.0:1633; EGPR-NEXT: pushq %rbx # encoding: [0x53]1634; EGPR-NEXT: .cfi_def_cfa_offset 161635; EGPR-NEXT: .cfi_offset %rbx, -161636; EGPR-NEXT: blsrl %edi, %ebx # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x60,0xf3,0xcf]1637; EGPR-NEXT: jne .LBB53_2 # encoding: [0x75,A]1638; EGPR-NEXT: # fixup A - offset: 1, value: .LBB53_2, kind: FK_PCRel_11639; EGPR-NEXT: # %bb.1:1640; EGPR-NEXT: callq bar # encoding: [0xe8,A,A,A,A]1641; EGPR-NEXT: # fixup A - offset: 1, value: bar, kind: reloc_branch_4byte_pcrel1642; EGPR-NEXT: .LBB53_2:1643; EGPR-NEXT: movl %ebx, %eax # encoding: [0x89,0xd8]1644; EGPR-NEXT: popq %rbx # encoding: [0x5b]1645; EGPR-NEXT: .cfi_def_cfa_offset 81646; EGPR-NEXT: retq # encoding: [0xc3]1647 %tmp = sub i32 %x, 11648 %tmp2 = and i32 %x, %tmp1649 %cmp = icmp eq i32 %tmp2, 01650 br i1 %cmp, label %1, label %21651 1652 tail call void @bar()1653 br label %21654 ret i32 %tmp21655}1656 1657define i64 @blsr64_branch(i64 %x) {1658; X86-LABEL: blsr64_branch:1659; X86: # %bb.0:1660; X86-NEXT: pushl %edi1661; X86-NEXT: .cfi_def_cfa_offset 81662; X86-NEXT: pushl %esi1663; X86-NEXT: .cfi_def_cfa_offset 121664; X86-NEXT: .cfi_offset %esi, -121665; X86-NEXT: .cfi_offset %edi, -81666; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1667; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx1668; X86-NEXT: movl %eax, %esi1669; X86-NEXT: addl $-1, %esi1670; X86-NEXT: movl %ecx, %edi1671; X86-NEXT: adcl $-1, %edi1672; X86-NEXT: andl %eax, %esi1673; X86-NEXT: andl %ecx, %edi1674; X86-NEXT: movl %esi, %eax1675; X86-NEXT: orl %edi, %eax1676; X86-NEXT: jne .LBB54_21677; X86-NEXT: # %bb.1:1678; X86-NEXT: calll bar1679; X86-NEXT: .LBB54_2:1680; X86-NEXT: movl %esi, %eax1681; X86-NEXT: movl %edi, %edx1682; X86-NEXT: popl %esi1683; X86-NEXT: .cfi_def_cfa_offset 81684; X86-NEXT: popl %edi1685; X86-NEXT: .cfi_def_cfa_offset 41686; X86-NEXT: retl1687;1688; X64-LABEL: blsr64_branch:1689; X64: # %bb.0:1690; X64-NEXT: pushq %rbx1691; X64-NEXT: .cfi_def_cfa_offset 161692; X64-NEXT: .cfi_offset %rbx, -161693; X64-NEXT: blsrq %rdi, %rbx1694; X64-NEXT: jne .LBB54_21695; X64-NEXT: # %bb.1:1696; X64-NEXT: callq bar1697; X64-NEXT: .LBB54_2:1698; X64-NEXT: movq %rbx, %rax1699; X64-NEXT: popq %rbx1700; X64-NEXT: .cfi_def_cfa_offset 81701; X64-NEXT: retq1702;1703; EGPR-LABEL: blsr64_branch:1704; EGPR: # %bb.0:1705; EGPR-NEXT: pushq %rbx # encoding: [0x53]1706; EGPR-NEXT: .cfi_def_cfa_offset 161707; EGPR-NEXT: .cfi_offset %rbx, -161708; EGPR-NEXT: blsrq %rdi, %rbx # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe0,0xf3,0xcf]1709; EGPR-NEXT: jne .LBB54_2 # encoding: [0x75,A]1710; EGPR-NEXT: # fixup A - offset: 1, value: .LBB54_2, kind: FK_PCRel_11711; EGPR-NEXT: # %bb.1:1712; EGPR-NEXT: callq bar # encoding: [0xe8,A,A,A,A]1713; EGPR-NEXT: # fixup A - offset: 1, value: bar, kind: reloc_branch_4byte_pcrel1714; EGPR-NEXT: .LBB54_2:1715; EGPR-NEXT: movq %rbx, %rax # encoding: [0x48,0x89,0xd8]1716; EGPR-NEXT: popq %rbx # encoding: [0x5b]1717; EGPR-NEXT: .cfi_def_cfa_offset 81718; EGPR-NEXT: retq # encoding: [0xc3]1719 %tmp = sub i64 %x, 11720 %tmp2 = and i64 %x, %tmp1721 %cmp = icmp eq i64 %tmp2, 01722 br i1 %cmp, label %1, label %21723 1724 tail call void @bar()1725 br label %21726 ret i64 %tmp21727}1728 1729define i32 @blsi32_branch(i32 %x) {1730; X86-LABEL: blsi32_branch:1731; X86: # %bb.0:1732; X86-NEXT: pushl %esi1733; X86-NEXT: .cfi_def_cfa_offset 81734; X86-NEXT: .cfi_offset %esi, -81735; X86-NEXT: blsil {{[0-9]+}}(%esp), %esi1736; X86-NEXT: jne .LBB55_21737; X86-NEXT: # %bb.1:1738; X86-NEXT: calll bar1739; X86-NEXT: .LBB55_2:1740; X86-NEXT: movl %esi, %eax1741; X86-NEXT: popl %esi1742; X86-NEXT: .cfi_def_cfa_offset 41743; X86-NEXT: retl1744;1745; X64-LABEL: blsi32_branch:1746; X64: # %bb.0:1747; X64-NEXT: pushq %rbx1748; X64-NEXT: .cfi_def_cfa_offset 161749; X64-NEXT: .cfi_offset %rbx, -161750; X64-NEXT: blsil %edi, %ebx1751; X64-NEXT: jne .LBB55_21752; X64-NEXT: # %bb.1:1753; X64-NEXT: callq bar1754; X64-NEXT: .LBB55_2:1755; X64-NEXT: movl %ebx, %eax1756; X64-NEXT: popq %rbx1757; X64-NEXT: .cfi_def_cfa_offset 81758; X64-NEXT: retq1759;1760; EGPR-LABEL: blsi32_branch:1761; EGPR: # %bb.0:1762; EGPR-NEXT: pushq %rbx # encoding: [0x53]1763; EGPR-NEXT: .cfi_def_cfa_offset 161764; EGPR-NEXT: .cfi_offset %rbx, -161765; EGPR-NEXT: blsil %edi, %ebx # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x60,0xf3,0xdf]1766; EGPR-NEXT: jne .LBB55_2 # encoding: [0x75,A]1767; EGPR-NEXT: # fixup A - offset: 1, value: .LBB55_2, kind: FK_PCRel_11768; EGPR-NEXT: # %bb.1:1769; EGPR-NEXT: callq bar # encoding: [0xe8,A,A,A,A]1770; EGPR-NEXT: # fixup A - offset: 1, value: bar, kind: reloc_branch_4byte_pcrel1771; EGPR-NEXT: .LBB55_2:1772; EGPR-NEXT: movl %ebx, %eax # encoding: [0x89,0xd8]1773; EGPR-NEXT: popq %rbx # encoding: [0x5b]1774; EGPR-NEXT: .cfi_def_cfa_offset 81775; EGPR-NEXT: retq # encoding: [0xc3]1776 %tmp = sub i32 0, %x1777 %tmp2 = and i32 %x, %tmp1778 %cmp = icmp eq i32 %tmp2, 01779 br i1 %cmp, label %1, label %21780 1781 tail call void @bar()1782 br label %21783 ret i32 %tmp21784}1785 1786define i64 @blsi64_branch(i64 %x) {1787; X86-LABEL: blsi64_branch:1788; X86: # %bb.0:1789; X86-NEXT: pushl %edi1790; X86-NEXT: .cfi_def_cfa_offset 81791; X86-NEXT: pushl %esi1792; X86-NEXT: .cfi_def_cfa_offset 121793; X86-NEXT: .cfi_offset %esi, -121794; X86-NEXT: .cfi_offset %edi, -81795; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1796; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx1797; X86-NEXT: xorl %esi, %esi1798; X86-NEXT: movl %eax, %edi1799; X86-NEXT: negl %edi1800; X86-NEXT: sbbl %ecx, %esi1801; X86-NEXT: andl %ecx, %esi1802; X86-NEXT: andl %eax, %edi1803; X86-NEXT: movl %edi, %eax1804; X86-NEXT: orl %esi, %eax1805; X86-NEXT: jne .LBB56_21806; X86-NEXT: # %bb.1:1807; X86-NEXT: calll bar1808; X86-NEXT: .LBB56_2:1809; X86-NEXT: movl %edi, %eax1810; X86-NEXT: movl %esi, %edx1811; X86-NEXT: popl %esi1812; X86-NEXT: .cfi_def_cfa_offset 81813; X86-NEXT: popl %edi1814; X86-NEXT: .cfi_def_cfa_offset 41815; X86-NEXT: retl1816;1817; X64-LABEL: blsi64_branch:1818; X64: # %bb.0:1819; X64-NEXT: pushq %rbx1820; X64-NEXT: .cfi_def_cfa_offset 161821; X64-NEXT: .cfi_offset %rbx, -161822; X64-NEXT: blsiq %rdi, %rbx1823; X64-NEXT: jne .LBB56_21824; X64-NEXT: # %bb.1:1825; X64-NEXT: callq bar1826; X64-NEXT: .LBB56_2:1827; X64-NEXT: movq %rbx, %rax1828; X64-NEXT: popq %rbx1829; X64-NEXT: .cfi_def_cfa_offset 81830; X64-NEXT: retq1831;1832; EGPR-LABEL: blsi64_branch:1833; EGPR: # %bb.0:1834; EGPR-NEXT: pushq %rbx # encoding: [0x53]1835; EGPR-NEXT: .cfi_def_cfa_offset 161836; EGPR-NEXT: .cfi_offset %rbx, -161837; EGPR-NEXT: blsiq %rdi, %rbx # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe0,0xf3,0xdf]1838; EGPR-NEXT: jne .LBB56_2 # encoding: [0x75,A]1839; EGPR-NEXT: # fixup A - offset: 1, value: .LBB56_2, kind: FK_PCRel_11840; EGPR-NEXT: # %bb.1:1841; EGPR-NEXT: callq bar # encoding: [0xe8,A,A,A,A]1842; EGPR-NEXT: # fixup A - offset: 1, value: bar, kind: reloc_branch_4byte_pcrel1843; EGPR-NEXT: .LBB56_2:1844; EGPR-NEXT: movq %rbx, %rax # encoding: [0x48,0x89,0xd8]1845; EGPR-NEXT: popq %rbx # encoding: [0x5b]1846; EGPR-NEXT: .cfi_def_cfa_offset 81847; EGPR-NEXT: retq # encoding: [0xc3]1848 %tmp = sub i64 0, %x1849 %tmp2 = and i64 %x, %tmp1850 %cmp = icmp eq i64 %tmp2, 01851 br i1 %cmp, label %1, label %21852 1853 tail call void @bar()1854 br label %21855 ret i64 %tmp21856}1857 1858declare dso_local void @bar()1859 1860define void @pr42118_i32(i32 %x) {1861; X86-LABEL: pr42118_i32:1862; X86: # %bb.0:1863; X86-NEXT: blsrl {{[0-9]+}}(%esp), %eax1864; X86-NEXT: je bar # TAILCALL1865; X86-NEXT: # %bb.1:1866; X86-NEXT: retl1867;1868; X64-LABEL: pr42118_i32:1869; X64: # %bb.0:1870; X64-NEXT: blsrl %edi, %eax1871; X64-NEXT: je bar # TAILCALL1872; X64-NEXT: # %bb.1:1873; X64-NEXT: retq1874;1875; EGPR-LABEL: pr42118_i32:1876; EGPR: # %bb.0:1877; EGPR-NEXT: blsrl %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0xf3,0xcf]1878; EGPR-NEXT: testl %eax, %eax # encoding: [0x85,0xc0]1879; EGPR-NEXT: je bar # TAILCALL1880; EGPR-NEXT: # encoding: [0x74,A]1881; EGPR-NEXT: # fixup A - offset: 1, value: bar, kind: FK_PCRel_11882; EGPR-NEXT: # %bb.1:1883; EGPR-NEXT: retq # encoding: [0xc3]1884 %tmp = sub i32 0, %x1885 %tmp1 = and i32 %tmp, %x1886 %cmp = icmp eq i32 %tmp1, %x1887 br i1 %cmp, label %1, label %21888 1889 tail call void @bar()1890 br label %21891 1892 ret void1893}1894 1895define void @pr42118_i64(i64 %x) {1896; X86-LABEL: pr42118_i64:1897; X86: # %bb.0:1898; X86-NEXT: pushl %esi1899; X86-NEXT: .cfi_def_cfa_offset 81900; X86-NEXT: .cfi_offset %esi, -81901; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1902; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx1903; X86-NEXT: movl %eax, %edx1904; X86-NEXT: addl $-1, %edx1905; X86-NEXT: movl %ecx, %esi1906; X86-NEXT: adcl $-1, %esi1907; X86-NEXT: andl %eax, %edx1908; X86-NEXT: andl %ecx, %esi1909; X86-NEXT: orl %edx, %esi1910; X86-NEXT: jne .LBB58_11911; X86-NEXT: # %bb.2:1912; X86-NEXT: popl %esi1913; X86-NEXT: .cfi_def_cfa_offset 41914; X86-NEXT: jmp bar # TAILCALL1915; X86-NEXT: .LBB58_1:1916; X86-NEXT: .cfi_def_cfa_offset 81917; X86-NEXT: popl %esi1918; X86-NEXT: .cfi_def_cfa_offset 41919; X86-NEXT: retl1920;1921; X64-LABEL: pr42118_i64:1922; X64: # %bb.0:1923; X64-NEXT: blsrq %rdi, %rax1924; X64-NEXT: je bar # TAILCALL1925; X64-NEXT: # %bb.1:1926; X64-NEXT: retq1927;1928; EGPR-LABEL: pr42118_i64:1929; EGPR: # %bb.0:1930; EGPR-NEXT: blsrq %rdi, %rax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf8,0xf3,0xcf]1931; EGPR-NEXT: testq %rax, %rax # encoding: [0x48,0x85,0xc0]1932; EGPR-NEXT: je bar # TAILCALL1933; EGPR-NEXT: # encoding: [0x74,A]1934; EGPR-NEXT: # fixup A - offset: 1, value: bar, kind: FK_PCRel_11935; EGPR-NEXT: # %bb.1:1936; EGPR-NEXT: retq # encoding: [0xc3]1937 %tmp = sub i64 0, %x1938 %tmp1 = and i64 %tmp, %x1939 %cmp = icmp eq i64 %tmp1, %x1940 br i1 %cmp, label %1, label %21941 1942 tail call void @bar()1943 br label %21944 1945 ret void1946}1947 1948define i32 @blsi_cflag_32(i32 %x, i32 %y) nounwind {1949; X86-LABEL: blsi_cflag_32:1950; X86: # %bb.0:1951; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1952; X86-NEXT: testl %eax, %eax1953; X86-NEXT: jne .LBB59_11954; X86-NEXT: # %bb.2:1955; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1956; X86-NEXT: retl1957; X86-NEXT: .LBB59_1:1958; X86-NEXT: blsil %eax, %eax1959; X86-NEXT: retl1960;1961; X64-LABEL: blsi_cflag_32:1962; X64: # %bb.0:1963; X64-NEXT: blsil %edi, %eax1964; X64-NEXT: cmovael %esi, %eax1965; X64-NEXT: retq1966;1967; EGPR-LABEL: blsi_cflag_32:1968; EGPR: # %bb.0:1969; EGPR-NEXT: blsil %edi, %eax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0xf3,0xdf]1970; EGPR-NEXT: testl %edi, %edi # encoding: [0x85,0xff]1971; EGPR-NEXT: cmovel %esi, %eax # encoding: [0x0f,0x44,0xc6]1972; EGPR-NEXT: retq # encoding: [0xc3]1973 %tobool = icmp eq i32 %x, 01974 %sub = sub nsw i32 0, %x1975 %and = and i32 %sub, %x1976 %cond = select i1 %tobool, i32 %y, i32 %and1977 ret i32 %cond1978}1979 1980define i64 @blsi_cflag_64(i64 %x, i64 %y) nounwind {1981; X86-LABEL: blsi_cflag_64:1982; X86: # %bb.0:1983; X86-NEXT: pushl %edi1984; X86-NEXT: pushl %esi1985; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx1986; X86-NEXT: movl {{[0-9]+}}(%esp), %esi1987; X86-NEXT: xorl %edx, %edx1988; X86-NEXT: movl %ecx, %eax1989; X86-NEXT: negl %eax1990; X86-NEXT: sbbl %esi, %edx1991; X86-NEXT: movl %ecx, %edi1992; X86-NEXT: orl %esi, %edi1993; X86-NEXT: jne .LBB60_11994; X86-NEXT: # %bb.2:1995; X86-NEXT: movl {{[0-9]+}}(%esp), %edx1996; X86-NEXT: movl {{[0-9]+}}(%esp), %eax1997; X86-NEXT: jmp .LBB60_31998; X86-NEXT: .LBB60_1:1999; X86-NEXT: andl %esi, %edx2000; X86-NEXT: andl %ecx, %eax2001; X86-NEXT: .LBB60_3:2002; X86-NEXT: popl %esi2003; X86-NEXT: popl %edi2004; X86-NEXT: retl2005;2006; X64-LABEL: blsi_cflag_64:2007; X64: # %bb.0:2008; X64-NEXT: blsiq %rdi, %rax2009; X64-NEXT: cmovaeq %rsi, %rax2010; X64-NEXT: retq2011;2012; EGPR-LABEL: blsi_cflag_64:2013; EGPR: # %bb.0:2014; EGPR-NEXT: blsiq %rdi, %rax # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf8,0xf3,0xdf]2015; EGPR-NEXT: testq %rdi, %rdi # encoding: [0x48,0x85,0xff]2016; EGPR-NEXT: cmoveq %rsi, %rax # encoding: [0x48,0x0f,0x44,0xc6]2017; EGPR-NEXT: retq # encoding: [0xc3]2018 %tobool = icmp eq i64 %x, 02019 %sub = sub nsw i64 0, %x2020 %and = and i64 %sub, %x2021 %cond = select i1 %tobool, i64 %y, i64 %and2022 ret i64 %cond2023}2024