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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s3 4; add (sext i1 X), 1 -> zext (not i1 X)5 6define i32 @sext_inc(i1 zeroext %x) nounwind {7; CHECK-LABEL: sext_inc:8; CHECK: # %bb.0:9; CHECK-NEXT: xorb $1, %dil10; CHECK-NEXT: movzbl %dil, %eax11; CHECK-NEXT: retq12 %ext = sext i1 %x to i3213 %add = add i32 %ext, 114 ret i32 %add15}16 17; add (sext i1 X), 1 -> zext (not i1 X)18 19define <4 x i32> @sext_inc_vec(<4 x i1> %x) nounwind {20; CHECK-LABEL: sext_inc_vec:21; CHECK: # %bb.0:22; CHECK-NEXT: vbroadcastss {{.*#+}} xmm1 = [1,1,1,1]23; CHECK-NEXT: vandnps %xmm1, %xmm0, %xmm024; CHECK-NEXT: retq25 %ext = sext <4 x i1> %x to <4 x i32>26 %add = add <4 x i32> %ext, <i32 1, i32 1, i32 1, i32 1>27 ret <4 x i32> %add28}29 30define <4 x i32> @cmpgt_sext_inc_vec(<4 x i32> %x, <4 x i32> %y) nounwind {31; CHECK-LABEL: cmpgt_sext_inc_vec:32; CHECK: # %bb.0:33; CHECK-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm034; CHECK-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1,1,1,1]35; CHECK-NEXT: vpandn %xmm1, %xmm0, %xmm036; CHECK-NEXT: retq37 %cmp = icmp sgt <4 x i32> %x, %y38 %ext = sext <4 x i1> %cmp to <4 x i32>39 %add = add <4 x i32> %ext, <i32 1, i32 1, i32 1, i32 1>40 ret <4 x i32> %add41}42 43define <4 x i32> @cmpne_sext_inc_vec(<4 x i32> %x, <4 x i32> %y) nounwind {44; CHECK-LABEL: cmpne_sext_inc_vec:45; CHECK: # %bb.0:46; CHECK-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm047; CHECK-NEXT: vpsrld $31, %xmm0, %xmm048; CHECK-NEXT: retq49 %cmp = icmp ne <4 x i32> %x, %y50 %ext = sext <4 x i1> %cmp to <4 x i32>51 %add = add <4 x i32> %ext, <i32 1, i32 1, i32 1, i32 1>52 ret <4 x i32> %add53}54 55define <4 x i64> @cmpgt_sext_inc_vec256(<4 x i64> %x, <4 x i64> %y) nounwind {56; CHECK-LABEL: cmpgt_sext_inc_vec256:57; CHECK: # %bb.0:58; CHECK-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm059; CHECK-NEXT: vpbroadcastq {{.*#+}} ymm1 = [1,1,1,1]60; CHECK-NEXT: vpandn %ymm1, %ymm0, %ymm061; CHECK-NEXT: retq62 %cmp = icmp sgt <4 x i64> %x, %y63 %ext = sext <4 x i1> %cmp to <4 x i64>64 %add = add <4 x i64> %ext, <i64 1, i64 1, i64 1, i64 1>65 ret <4 x i64> %add66}67 68define i32 @bool_logic_and_math(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {69; CHECK-LABEL: bool_logic_and_math:70; CHECK: # %bb.0:71; CHECK-NEXT: cmpl %esi, %edi72; CHECK-NEXT: sete %al73; CHECK-NEXT: cmpl %ecx, %edx74; CHECK-NEXT: sete %cl75; CHECK-NEXT: orb %al, %cl76; CHECK-NEXT: movzbl %cl, %eax77; CHECK-NEXT: retq78 %cmp1 = icmp ne i32 %a, %b79 %cmp2 = icmp ne i32 %c, %d80 %and = and i1 %cmp1, %cmp281 %ext = sext i1 %and to i3282 %add = add i32 %ext, 183 ret i32 %add84}85 86define <4 x i32> @bool_logic_and_math_vec(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d) nounwind {87; CHECK-LABEL: bool_logic_and_math_vec:88; CHECK: # %bb.0:89; CHECK-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm090; CHECK-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm191; CHECK-NEXT: vpor %xmm1, %xmm0, %xmm092; CHECK-NEXT: vpsrld $31, %xmm0, %xmm093; CHECK-NEXT: retq94 %cmp1 = icmp ne <4 x i32> %a, %b95 %cmp2 = icmp ne <4 x i32> %c, %d96 %and = and <4 x i1> %cmp1, %cmp297 %ext = sext <4 x i1> %and to <4 x i32>98 %add = add <4 x i32> %ext, <i32 1, i32 1, i32 1, i32 1>99 ret <4 x i32> %add100}101 102define <4 x i32> @sextbool_add_vector(<4 x i32> %cmp1, <4 x i32> %cmp2, <4 x i32> %x) {103; CHECK-LABEL: sextbool_add_vector:104; CHECK: # %bb.0:105; CHECK-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0106; CHECK-NEXT: vpaddd %xmm0, %xmm2, %xmm0107; CHECK-NEXT: retq108 %c = icmp eq <4 x i32> %cmp1, %cmp2109 %b = sext <4 x i1> %c to <4 x i32>110 %s = add <4 x i32> %x, %b111 ret <4 x i32> %s112}113 114define <4 x i32> @zextbool_sub_vector(<4 x i32> %cmp1, <4 x i32> %cmp2, <4 x i32> %x) {115; CHECK-LABEL: zextbool_sub_vector:116; CHECK: # %bb.0:117; CHECK-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0118; CHECK-NEXT: vpaddd %xmm0, %xmm2, %xmm0119; CHECK-NEXT: retq120 %c = icmp eq <4 x i32> %cmp1, %cmp2121 %b = zext <4 x i1> %c to <4 x i32>122 %s = sub <4 x i32> %x, %b123 ret <4 x i32> %s124}125 126define i32 @assertsext_sub_1(i1 signext %cond, i32 %y) {127; CHECK-LABEL: assertsext_sub_1:128; CHECK: # %bb.0:129; CHECK-NEXT: # kill: def $esi killed $esi def $rsi130; CHECK-NEXT: # kill: def $edi killed $edi def $rdi131; CHECK-NEXT: leal (%rdi,%rsi), %eax132; CHECK-NEXT: retq133 %e = zext i1 %cond to i32134 %r = sub i32 %y, %e135 ret i32 %r136}137 138define i32 @assertsext_add_1(i1 signext %cond, i32 %y) {139; CHECK-LABEL: assertsext_add_1:140; CHECK: # %bb.0:141; CHECK-NEXT: movl %esi, %eax142; CHECK-NEXT: subl %edi, %eax143; CHECK-NEXT: retq144 %e = zext i1 %cond to i32145 %r = add i32 %e, %y146 ret i32 %r147}148 149define i32 @assertsext_add_1_commute(i1 signext %cond, i32 %y) {150; CHECK-LABEL: assertsext_add_1_commute:151; CHECK: # %bb.0:152; CHECK-NEXT: movl %esi, %eax153; CHECK-NEXT: subl %edi, %eax154; CHECK-NEXT: retq155 %e = zext i1 %cond to i32156 %r = add i32 %y, %e157 ret i32 %r158}159 160