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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s3 4; bswap inline assembly should be preserved as-is.5 6define i64 @foo(i64 %x) nounwind {7; CHECK-LABEL: foo:8; CHECK: ## %bb.0:9; CHECK-NEXT: movq %rdi, %rax10; CHECK-NEXT: ## InlineAsm Start11; CHECK-NEXT: bswapq %rax12; CHECK-NEXT: ## InlineAsm End13; CHECK-NEXT: retq14 %asmtmp = tail call i64 asm "bswap $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind15 ret i64 %asmtmp16}17 18define i64 @bar(i64 %x) nounwind {19; CHECK-LABEL: bar:20; CHECK: ## %bb.0:21; CHECK-NEXT: movq %rdi, %rax22; CHECK-NEXT: ## InlineAsm Start23; CHECK-NEXT: bswapq %rax24; CHECK-NEXT: ## InlineAsm End25; CHECK-NEXT: retq26 %asmtmp = tail call i64 asm "bswapq ${0:q}", "=r,0,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind27 ret i64 %asmtmp28}29 30define i32 @pen(i32 %x) nounwind {31; CHECK-LABEL: pen:32; CHECK: ## %bb.0:33; CHECK-NEXT: movl %edi, %eax34; CHECK-NEXT: ## InlineAsm Start35; CHECK-NEXT: bswapl %eax36; CHECK-NEXT: ## InlineAsm End37; CHECK-NEXT: retq38 %asmtmp = tail call i32 asm "bswapl ${0:k}", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %x) nounwind39 ret i32 %asmtmp40}41 42define zeroext i16 @s16(i16 zeroext %x) nounwind {43; CHECK-LABEL: s16:44; CHECK: ## %bb.0:45; CHECK-NEXT: ## InlineAsm Start46; CHECK-NEXT: rorw $8, %di47; CHECK-NEXT: ## InlineAsm End48; CHECK-NEXT: movzwl %di, %eax49; CHECK-NEXT: retq50 %asmtmp = tail call i16 asm "rorw $$8, ${0:w}", "=r,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i16 %x) nounwind51 ret i16 %asmtmp52}53 54define zeroext i16 @t16(i16 zeroext %x) nounwind {55; CHECK-LABEL: t16:56; CHECK: ## %bb.0:57; CHECK-NEXT: ## InlineAsm Start58; CHECK-NEXT: rorw $8, %di59; CHECK-NEXT: ## InlineAsm End60; CHECK-NEXT: movzwl %di, %eax61; CHECK-NEXT: retq62 %asmtmp = tail call i16 asm "rorw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{fpsr},~{flags}"(i16 %x) nounwind63 ret i16 %asmtmp64}65 66define zeroext i16 @u16(i16 zeroext %x) nounwind {67; CHECK-LABEL: u16:68; CHECK: ## %bb.0:69; CHECK-NEXT: ## InlineAsm Start70; CHECK-NEXT: rolw $8, %di71; CHECK-NEXT: ## InlineAsm End72; CHECK-NEXT: movzwl %di, %eax73; CHECK-NEXT: retq74 %asmtmp = tail call i16 asm "rolw $$8, ${0:w}", "=r,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i16 %x) nounwind75 ret i16 %asmtmp76}77 78define zeroext i16 @v16(i16 zeroext %x) nounwind {79; CHECK-LABEL: v16:80; CHECK: ## %bb.0:81; CHECK-NEXT: ## InlineAsm Start82; CHECK-NEXT: rolw $8, %di83; CHECK-NEXT: ## InlineAsm End84; CHECK-NEXT: movzwl %di, %eax85; CHECK-NEXT: retq86 %asmtmp = tail call i16 asm "rolw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{fpsr},~{flags}"(i16 %x) nounwind87 ret i16 %asmtmp88}89 90define i32 @s32(i32 %x) nounwind {91; CHECK-LABEL: s32:92; CHECK: ## %bb.0:93; CHECK-NEXT: movl %edi, %eax94; CHECK-NEXT: ## InlineAsm Start95; CHECK-NEXT: bswapl %eax96; CHECK-NEXT: ## InlineAsm End97; CHECK-NEXT: retq98 %asmtmp = tail call i32 asm "bswap $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %x) nounwind99 ret i32 %asmtmp100}101 102define i32 @t32(i32 %x) nounwind {103; CHECK-LABEL: t32:104; CHECK: ## %bb.0:105; CHECK-NEXT: movl %edi, %eax106; CHECK-NEXT: ## InlineAsm Start107; CHECK-NEXT: bswapl %eax108; CHECK-NEXT: ## InlineAsm End109; CHECK-NEXT: retq110 %asmtmp = tail call i32 asm "bswap $0", "=r,0,~{dirflag},~{flags},~{fpsr}"(i32 %x) nounwind111 ret i32 %asmtmp112}113 114define i32 @u32(i32 %x) nounwind {115; CHECK-LABEL: u32:116; CHECK: ## %bb.0:117; CHECK-NEXT: movl %edi, %eax118; CHECK-NEXT: ## InlineAsm Start119; CHECK-NEXT: rorw $8, %ax120; CHECK-NEXT: rorl $16, %eax121; CHECK-NEXT: rorw $8, %ax122; CHECK-NEXT: ## InlineAsm End123; CHECK-NEXT: retq124 %asmtmp = tail call i32 asm "rorw $$8, ${0:w};rorl $$16, $0;rorw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{flags},~{fpsr}"(i32 %x) nounwind125 ret i32 %asmtmp126}127 128define i64 @s64(i64 %x) nounwind {129; CHECK-LABEL: s64:130; CHECK: ## %bb.0:131; CHECK-NEXT: movq %rdi, %rax132; CHECK-NEXT: ## InlineAsm Start133; CHECK-NEXT: bswapq %rax134; CHECK-NEXT: ## InlineAsm End135; CHECK-NEXT: retq136 %asmtmp = tail call i64 asm "bswap ${0:q}", "=r,0,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind137 ret i64 %asmtmp138}139 140define i64 @t64(i64 %x) nounwind {141; CHECK-LABEL: t64:142; CHECK: ## %bb.0:143; CHECK-NEXT: movq %rdi, %rax144; CHECK-NEXT: ## InlineAsm Start145; CHECK-NEXT: bswapq %rax146; CHECK-NEXT: ## InlineAsm End147; CHECK-NEXT: retq148 %asmtmp = tail call i64 asm "bswap ${0:q}", "=r,0,~{fpsr},~{dirflag},~{flags}"(i64 %x) nounwind149 ret i64 %asmtmp150}151