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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE --check-prefix=SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE424; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX15; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX26 7;8; PR6455 'Clear Upper Bits' Patterns9;10 11define <2 x i64> @_clearupper2xi64a(<2 x i64>) nounwind {12; SSE2-LABEL: _clearupper2xi64a:13; SSE2: # %bb.0:14; SSE2-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm015; SSE2-NEXT: retq16;17; SSE42-LABEL: _clearupper2xi64a:18; SSE42: # %bb.0:19; SSE42-NEXT: xorps %xmm1, %xmm120; SSE42-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]21; SSE42-NEXT: retq22;23; AVX-LABEL: _clearupper2xi64a:24; AVX: # %bb.0:25; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm126; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]27; AVX-NEXT: retq28 %x0 = extractelement <2 x i64> %0, i32 029 %x1 = extractelement <2 x i64> %0, i32 130 %trunc0 = trunc i64 %x0 to i3231 %trunc1 = trunc i64 %x1 to i3232 %ext0 = zext i32 %trunc0 to i6433 %ext1 = zext i32 %trunc1 to i6434 %v0 = insertelement <2 x i64> undef, i64 %ext0, i32 035 %v1 = insertelement <2 x i64> %v0, i64 %ext1, i32 136 ret <2 x i64> %v137}38 39define <4 x i64> @_clearupper4xi64a(<4 x i64>) nounwind {40; SSE2-LABEL: _clearupper4xi64a:41; SSE2: # %bb.0:42; SSE2-NEXT: movaps {{.*#+}} xmm2 = [4294967295,4294967295]43; SSE2-NEXT: andps %xmm2, %xmm044; SSE2-NEXT: andps %xmm2, %xmm145; SSE2-NEXT: retq46;47; SSE42-LABEL: _clearupper4xi64a:48; SSE42: # %bb.0:49; SSE42-NEXT: xorps %xmm2, %xmm250; SSE42-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3]51; SSE42-NEXT: blendps {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3]52; SSE42-NEXT: retq53;54; AVX-LABEL: _clearupper4xi64a:55; AVX: # %bb.0:56; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm157; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7]58; AVX-NEXT: retq59 %x0 = extractelement <4 x i64> %0, i32 060 %x1 = extractelement <4 x i64> %0, i32 161 %x2 = extractelement <4 x i64> %0, i32 262 %x3 = extractelement <4 x i64> %0, i32 363 %trunc0 = trunc i64 %x0 to i3264 %trunc1 = trunc i64 %x1 to i3265 %trunc2 = trunc i64 %x2 to i3266 %trunc3 = trunc i64 %x3 to i3267 %ext0 = zext i32 %trunc0 to i6468 %ext1 = zext i32 %trunc1 to i6469 %ext2 = zext i32 %trunc2 to i6470 %ext3 = zext i32 %trunc3 to i6471 %v0 = insertelement <4 x i64> undef, i64 %ext0, i32 072 %v1 = insertelement <4 x i64> %v0, i64 %ext1, i32 173 %v2 = insertelement <4 x i64> %v1, i64 %ext2, i32 274 %v3 = insertelement <4 x i64> %v2, i64 %ext3, i32 375 ret <4 x i64> %v376}77 78define <4 x i32> @_clearupper4xi32a(<4 x i32>) nounwind {79; SSE2-LABEL: _clearupper4xi32a:80; SSE2: # %bb.0:81; SSE2-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm082; SSE2-NEXT: retq83;84; SSE42-LABEL: _clearupper4xi32a:85; SSE42: # %bb.0:86; SSE42-NEXT: pxor %xmm1, %xmm187; SSE42-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7]88; SSE42-NEXT: retq89;90; AVX-LABEL: _clearupper4xi32a:91; AVX: # %bb.0:92; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm193; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7]94; AVX-NEXT: retq95 %x0 = extractelement <4 x i32> %0, i32 096 %x1 = extractelement <4 x i32> %0, i32 197 %x2 = extractelement <4 x i32> %0, i32 298 %x3 = extractelement <4 x i32> %0, i32 399 %trunc0 = trunc i32 %x0 to i16100 %trunc1 = trunc i32 %x1 to i16101 %trunc2 = trunc i32 %x2 to i16102 %trunc3 = trunc i32 %x3 to i16103 %ext0 = zext i16 %trunc0 to i32104 %ext1 = zext i16 %trunc1 to i32105 %ext2 = zext i16 %trunc2 to i32106 %ext3 = zext i16 %trunc3 to i32107 %v0 = insertelement <4 x i32> undef, i32 %ext0, i32 0108 %v1 = insertelement <4 x i32> %v0, i32 %ext1, i32 1109 %v2 = insertelement <4 x i32> %v1, i32 %ext2, i32 2110 %v3 = insertelement <4 x i32> %v2, i32 %ext3, i32 3111 ret <4 x i32> %v3112}113 114define <8 x i32> @_clearupper8xi32a(<8 x i32>) nounwind {115; SSE2-LABEL: _clearupper8xi32a:116; SSE2: # %bb.0:117; SSE2-NEXT: movaps {{.*#+}} xmm2 = [65535,65535,65535,65535]118; SSE2-NEXT: andps %xmm2, %xmm0119; SSE2-NEXT: andps %xmm2, %xmm1120; SSE2-NEXT: retq121;122; SSE42-LABEL: _clearupper8xi32a:123; SSE42: # %bb.0:124; SSE42-NEXT: pxor %xmm2, %xmm2125; SSE42-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7]126; SSE42-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7]127; SSE42-NEXT: retq128;129; AVX1-LABEL: _clearupper8xi32a:130; AVX1: # %bb.0:131; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0132; AVX1-NEXT: retq133;134; AVX2-LABEL: _clearupper8xi32a:135; AVX2: # %bb.0:136; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1137; AVX2-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7],ymm0[8],ymm1[9],ymm0[10],ymm1[11],ymm0[12],ymm1[13],ymm0[14],ymm1[15]138; AVX2-NEXT: retq139 %x0 = extractelement <8 x i32> %0, i32 0140 %x1 = extractelement <8 x i32> %0, i32 1141 %x2 = extractelement <8 x i32> %0, i32 2142 %x3 = extractelement <8 x i32> %0, i32 3143 %x4 = extractelement <8 x i32> %0, i32 4144 %x5 = extractelement <8 x i32> %0, i32 5145 %x6 = extractelement <8 x i32> %0, i32 6146 %x7 = extractelement <8 x i32> %0, i32 7147 %trunc0 = trunc i32 %x0 to i16148 %trunc1 = trunc i32 %x1 to i16149 %trunc2 = trunc i32 %x2 to i16150 %trunc3 = trunc i32 %x3 to i16151 %trunc4 = trunc i32 %x4 to i16152 %trunc5 = trunc i32 %x5 to i16153 %trunc6 = trunc i32 %x6 to i16154 %trunc7 = trunc i32 %x7 to i16155 %ext0 = zext i16 %trunc0 to i32156 %ext1 = zext i16 %trunc1 to i32157 %ext2 = zext i16 %trunc2 to i32158 %ext3 = zext i16 %trunc3 to i32159 %ext4 = zext i16 %trunc4 to i32160 %ext5 = zext i16 %trunc5 to i32161 %ext6 = zext i16 %trunc6 to i32162 %ext7 = zext i16 %trunc7 to i32163 %v0 = insertelement <8 x i32> undef, i32 %ext0, i32 0164 %v1 = insertelement <8 x i32> %v0, i32 %ext1, i32 1165 %v2 = insertelement <8 x i32> %v1, i32 %ext2, i32 2166 %v3 = insertelement <8 x i32> %v2, i32 %ext3, i32 3167 %v4 = insertelement <8 x i32> %v3, i32 %ext4, i32 4168 %v5 = insertelement <8 x i32> %v4, i32 %ext5, i32 5169 %v6 = insertelement <8 x i32> %v5, i32 %ext6, i32 6170 %v7 = insertelement <8 x i32> %v6, i32 %ext7, i32 7171 ret <8 x i32> %v7172}173 174define <8 x i16> @_clearupper8xi16a(<8 x i16>) nounwind {175; SSE-LABEL: _clearupper8xi16a:176; SSE: # %bb.0:177; SSE-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0178; SSE-NEXT: retq179;180; AVX-LABEL: _clearupper8xi16a:181; AVX: # %bb.0:182; AVX-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0183; AVX-NEXT: retq184 %x0 = extractelement <8 x i16> %0, i32 0185 %x1 = extractelement <8 x i16> %0, i32 1186 %x2 = extractelement <8 x i16> %0, i32 2187 %x3 = extractelement <8 x i16> %0, i32 3188 %x4 = extractelement <8 x i16> %0, i32 4189 %x5 = extractelement <8 x i16> %0, i32 5190 %x6 = extractelement <8 x i16> %0, i32 6191 %x7 = extractelement <8 x i16> %0, i32 7192 %trunc0 = trunc i16 %x0 to i8193 %trunc1 = trunc i16 %x1 to i8194 %trunc2 = trunc i16 %x2 to i8195 %trunc3 = trunc i16 %x3 to i8196 %trunc4 = trunc i16 %x4 to i8197 %trunc5 = trunc i16 %x5 to i8198 %trunc6 = trunc i16 %x6 to i8199 %trunc7 = trunc i16 %x7 to i8200 %ext0 = zext i8 %trunc0 to i16201 %ext1 = zext i8 %trunc1 to i16202 %ext2 = zext i8 %trunc2 to i16203 %ext3 = zext i8 %trunc3 to i16204 %ext4 = zext i8 %trunc4 to i16205 %ext5 = zext i8 %trunc5 to i16206 %ext6 = zext i8 %trunc6 to i16207 %ext7 = zext i8 %trunc7 to i16208 %v0 = insertelement <8 x i16> undef, i16 %ext0, i32 0209 %v1 = insertelement <8 x i16> %v0, i16 %ext1, i32 1210 %v2 = insertelement <8 x i16> %v1, i16 %ext2, i32 2211 %v3 = insertelement <8 x i16> %v2, i16 %ext3, i32 3212 %v4 = insertelement <8 x i16> %v3, i16 %ext4, i32 4213 %v5 = insertelement <8 x i16> %v4, i16 %ext5, i32 5214 %v6 = insertelement <8 x i16> %v5, i16 %ext6, i32 6215 %v7 = insertelement <8 x i16> %v6, i16 %ext7, i32 7216 ret <8 x i16> %v7217}218 219define <16 x i16> @_clearupper16xi16a(<16 x i16>) nounwind {220; SSE-LABEL: _clearupper16xi16a:221; SSE: # %bb.0:222; SSE-NEXT: movaps {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]223; SSE-NEXT: andps %xmm2, %xmm0224; SSE-NEXT: andps %xmm2, %xmm1225; SSE-NEXT: retq226;227; AVX-LABEL: _clearupper16xi16a:228; AVX: # %bb.0:229; AVX-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0230; AVX-NEXT: retq231 %x0 = extractelement <16 x i16> %0, i32 0232 %x1 = extractelement <16 x i16> %0, i32 1233 %x2 = extractelement <16 x i16> %0, i32 2234 %x3 = extractelement <16 x i16> %0, i32 3235 %x4 = extractelement <16 x i16> %0, i32 4236 %x5 = extractelement <16 x i16> %0, i32 5237 %x6 = extractelement <16 x i16> %0, i32 6238 %x7 = extractelement <16 x i16> %0, i32 7239 %x8 = extractelement <16 x i16> %0, i32 8240 %x9 = extractelement <16 x i16> %0, i32 9241 %x10 = extractelement <16 x i16> %0, i32 10242 %x11 = extractelement <16 x i16> %0, i32 11243 %x12 = extractelement <16 x i16> %0, i32 12244 %x13 = extractelement <16 x i16> %0, i32 13245 %x14 = extractelement <16 x i16> %0, i32 14246 %x15 = extractelement <16 x i16> %0, i32 15247 %trunc0 = trunc i16 %x0 to i8248 %trunc1 = trunc i16 %x1 to i8249 %trunc2 = trunc i16 %x2 to i8250 %trunc3 = trunc i16 %x3 to i8251 %trunc4 = trunc i16 %x4 to i8252 %trunc5 = trunc i16 %x5 to i8253 %trunc6 = trunc i16 %x6 to i8254 %trunc7 = trunc i16 %x7 to i8255 %trunc8 = trunc i16 %x8 to i8256 %trunc9 = trunc i16 %x9 to i8257 %trunc10 = trunc i16 %x10 to i8258 %trunc11 = trunc i16 %x11 to i8259 %trunc12 = trunc i16 %x12 to i8260 %trunc13 = trunc i16 %x13 to i8261 %trunc14 = trunc i16 %x14 to i8262 %trunc15 = trunc i16 %x15 to i8263 %ext0 = zext i8 %trunc0 to i16264 %ext1 = zext i8 %trunc1 to i16265 %ext2 = zext i8 %trunc2 to i16266 %ext3 = zext i8 %trunc3 to i16267 %ext4 = zext i8 %trunc4 to i16268 %ext5 = zext i8 %trunc5 to i16269 %ext6 = zext i8 %trunc6 to i16270 %ext7 = zext i8 %trunc7 to i16271 %ext8 = zext i8 %trunc8 to i16272 %ext9 = zext i8 %trunc9 to i16273 %ext10 = zext i8 %trunc10 to i16274 %ext11 = zext i8 %trunc11 to i16275 %ext12 = zext i8 %trunc12 to i16276 %ext13 = zext i8 %trunc13 to i16277 %ext14 = zext i8 %trunc14 to i16278 %ext15 = zext i8 %trunc15 to i16279 %v0 = insertelement <16 x i16> undef, i16 %ext0, i32 0280 %v1 = insertelement <16 x i16> %v0, i16 %ext1, i32 1281 %v2 = insertelement <16 x i16> %v1, i16 %ext2, i32 2282 %v3 = insertelement <16 x i16> %v2, i16 %ext3, i32 3283 %v4 = insertelement <16 x i16> %v3, i16 %ext4, i32 4284 %v5 = insertelement <16 x i16> %v4, i16 %ext5, i32 5285 %v6 = insertelement <16 x i16> %v5, i16 %ext6, i32 6286 %v7 = insertelement <16 x i16> %v6, i16 %ext7, i32 7287 %v8 = insertelement <16 x i16> %v7, i16 %ext8, i32 8288 %v9 = insertelement <16 x i16> %v8, i16 %ext9, i32 9289 %v10 = insertelement <16 x i16> %v9, i16 %ext10, i32 10290 %v11 = insertelement <16 x i16> %v10, i16 %ext11, i32 11291 %v12 = insertelement <16 x i16> %v11, i16 %ext12, i32 12292 %v13 = insertelement <16 x i16> %v12, i16 %ext13, i32 13293 %v14 = insertelement <16 x i16> %v13, i16 %ext14, i32 14294 %v15 = insertelement <16 x i16> %v14, i16 %ext15, i32 15295 ret <16 x i16> %v15296}297 298define <16 x i8> @_clearupper16xi8a(<16 x i8>) nounwind {299; SSE-LABEL: _clearupper16xi8a:300; SSE: # %bb.0:301; SSE-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0302; SSE-NEXT: retq303;304; AVX-LABEL: _clearupper16xi8a:305; AVX: # %bb.0:306; AVX-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0307; AVX-NEXT: retq308 %x0 = extractelement <16 x i8> %0, i32 0309 %x1 = extractelement <16 x i8> %0, i32 1310 %x2 = extractelement <16 x i8> %0, i32 2311 %x3 = extractelement <16 x i8> %0, i32 3312 %x4 = extractelement <16 x i8> %0, i32 4313 %x5 = extractelement <16 x i8> %0, i32 5314 %x6 = extractelement <16 x i8> %0, i32 6315 %x7 = extractelement <16 x i8> %0, i32 7316 %x8 = extractelement <16 x i8> %0, i32 8317 %x9 = extractelement <16 x i8> %0, i32 9318 %x10 = extractelement <16 x i8> %0, i32 10319 %x11 = extractelement <16 x i8> %0, i32 11320 %x12 = extractelement <16 x i8> %0, i32 12321 %x13 = extractelement <16 x i8> %0, i32 13322 %x14 = extractelement <16 x i8> %0, i32 14323 %x15 = extractelement <16 x i8> %0, i32 15324 %trunc0 = trunc i8 %x0 to i4325 %trunc1 = trunc i8 %x1 to i4326 %trunc2 = trunc i8 %x2 to i4327 %trunc3 = trunc i8 %x3 to i4328 %trunc4 = trunc i8 %x4 to i4329 %trunc5 = trunc i8 %x5 to i4330 %trunc6 = trunc i8 %x6 to i4331 %trunc7 = trunc i8 %x7 to i4332 %trunc8 = trunc i8 %x8 to i4333 %trunc9 = trunc i8 %x9 to i4334 %trunc10 = trunc i8 %x10 to i4335 %trunc11 = trunc i8 %x11 to i4336 %trunc12 = trunc i8 %x12 to i4337 %trunc13 = trunc i8 %x13 to i4338 %trunc14 = trunc i8 %x14 to i4339 %trunc15 = trunc i8 %x15 to i4340 %ext0 = zext i4 %trunc0 to i8341 %ext1 = zext i4 %trunc1 to i8342 %ext2 = zext i4 %trunc2 to i8343 %ext3 = zext i4 %trunc3 to i8344 %ext4 = zext i4 %trunc4 to i8345 %ext5 = zext i4 %trunc5 to i8346 %ext6 = zext i4 %trunc6 to i8347 %ext7 = zext i4 %trunc7 to i8348 %ext8 = zext i4 %trunc8 to i8349 %ext9 = zext i4 %trunc9 to i8350 %ext10 = zext i4 %trunc10 to i8351 %ext11 = zext i4 %trunc11 to i8352 %ext12 = zext i4 %trunc12 to i8353 %ext13 = zext i4 %trunc13 to i8354 %ext14 = zext i4 %trunc14 to i8355 %ext15 = zext i4 %trunc15 to i8356 %v0 = insertelement <16 x i8> undef, i8 %ext0, i32 0357 %v1 = insertelement <16 x i8> %v0, i8 %ext1, i32 1358 %v2 = insertelement <16 x i8> %v1, i8 %ext2, i32 2359 %v3 = insertelement <16 x i8> %v2, i8 %ext3, i32 3360 %v4 = insertelement <16 x i8> %v3, i8 %ext4, i32 4361 %v5 = insertelement <16 x i8> %v4, i8 %ext5, i32 5362 %v6 = insertelement <16 x i8> %v5, i8 %ext6, i32 6363 %v7 = insertelement <16 x i8> %v6, i8 %ext7, i32 7364 %v8 = insertelement <16 x i8> %v7, i8 %ext8, i32 8365 %v9 = insertelement <16 x i8> %v8, i8 %ext9, i32 9366 %v10 = insertelement <16 x i8> %v9, i8 %ext10, i32 10367 %v11 = insertelement <16 x i8> %v10, i8 %ext11, i32 11368 %v12 = insertelement <16 x i8> %v11, i8 %ext12, i32 12369 %v13 = insertelement <16 x i8> %v12, i8 %ext13, i32 13370 %v14 = insertelement <16 x i8> %v13, i8 %ext14, i32 14371 %v15 = insertelement <16 x i8> %v14, i8 %ext15, i32 15372 ret <16 x i8> %v15373}374 375define <32 x i8> @_clearupper32xi8a(<32 x i8>) nounwind {376; SSE-LABEL: _clearupper32xi8a:377; SSE: # %bb.0:378; SSE-NEXT: movaps {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]379; SSE-NEXT: andps %xmm2, %xmm0380; SSE-NEXT: andps %xmm2, %xmm1381; SSE-NEXT: retq382;383; AVX-LABEL: _clearupper32xi8a:384; AVX: # %bb.0:385; AVX-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0386; AVX-NEXT: retq387 %x0 = extractelement <32 x i8> %0, i32 0388 %x1 = extractelement <32 x i8> %0, i32 1389 %x2 = extractelement <32 x i8> %0, i32 2390 %x3 = extractelement <32 x i8> %0, i32 3391 %x4 = extractelement <32 x i8> %0, i32 4392 %x5 = extractelement <32 x i8> %0, i32 5393 %x6 = extractelement <32 x i8> %0, i32 6394 %x7 = extractelement <32 x i8> %0, i32 7395 %x8 = extractelement <32 x i8> %0, i32 8396 %x9 = extractelement <32 x i8> %0, i32 9397 %x10 = extractelement <32 x i8> %0, i32 10398 %x11 = extractelement <32 x i8> %0, i32 11399 %x12 = extractelement <32 x i8> %0, i32 12400 %x13 = extractelement <32 x i8> %0, i32 13401 %x14 = extractelement <32 x i8> %0, i32 14402 %x15 = extractelement <32 x i8> %0, i32 15403 %x16 = extractelement <32 x i8> %0, i32 16404 %x17 = extractelement <32 x i8> %0, i32 17405 %x18 = extractelement <32 x i8> %0, i32 18406 %x19 = extractelement <32 x i8> %0, i32 19407 %x20 = extractelement <32 x i8> %0, i32 20408 %x21 = extractelement <32 x i8> %0, i32 21409 %x22 = extractelement <32 x i8> %0, i32 22410 %x23 = extractelement <32 x i8> %0, i32 23411 %x24 = extractelement <32 x i8> %0, i32 24412 %x25 = extractelement <32 x i8> %0, i32 25413 %x26 = extractelement <32 x i8> %0, i32 26414 %x27 = extractelement <32 x i8> %0, i32 27415 %x28 = extractelement <32 x i8> %0, i32 28416 %x29 = extractelement <32 x i8> %0, i32 29417 %x30 = extractelement <32 x i8> %0, i32 30418 %x31 = extractelement <32 x i8> %0, i32 31419 %trunc0 = trunc i8 %x0 to i4420 %trunc1 = trunc i8 %x1 to i4421 %trunc2 = trunc i8 %x2 to i4422 %trunc3 = trunc i8 %x3 to i4423 %trunc4 = trunc i8 %x4 to i4424 %trunc5 = trunc i8 %x5 to i4425 %trunc6 = trunc i8 %x6 to i4426 %trunc7 = trunc i8 %x7 to i4427 %trunc8 = trunc i8 %x8 to i4428 %trunc9 = trunc i8 %x9 to i4429 %trunc10 = trunc i8 %x10 to i4430 %trunc11 = trunc i8 %x11 to i4431 %trunc12 = trunc i8 %x12 to i4432 %trunc13 = trunc i8 %x13 to i4433 %trunc14 = trunc i8 %x14 to i4434 %trunc15 = trunc i8 %x15 to i4435 %trunc16 = trunc i8 %x16 to i4436 %trunc17 = trunc i8 %x17 to i4437 %trunc18 = trunc i8 %x18 to i4438 %trunc19 = trunc i8 %x19 to i4439 %trunc20 = trunc i8 %x20 to i4440 %trunc21 = trunc i8 %x21 to i4441 %trunc22 = trunc i8 %x22 to i4442 %trunc23 = trunc i8 %x23 to i4443 %trunc24 = trunc i8 %x24 to i4444 %trunc25 = trunc i8 %x25 to i4445 %trunc26 = trunc i8 %x26 to i4446 %trunc27 = trunc i8 %x27 to i4447 %trunc28 = trunc i8 %x28 to i4448 %trunc29 = trunc i8 %x29 to i4449 %trunc30 = trunc i8 %x30 to i4450 %trunc31 = trunc i8 %x31 to i4451 %ext0 = zext i4 %trunc0 to i8452 %ext1 = zext i4 %trunc1 to i8453 %ext2 = zext i4 %trunc2 to i8454 %ext3 = zext i4 %trunc3 to i8455 %ext4 = zext i4 %trunc4 to i8456 %ext5 = zext i4 %trunc5 to i8457 %ext6 = zext i4 %trunc6 to i8458 %ext7 = zext i4 %trunc7 to i8459 %ext8 = zext i4 %trunc8 to i8460 %ext9 = zext i4 %trunc9 to i8461 %ext10 = zext i4 %trunc10 to i8462 %ext11 = zext i4 %trunc11 to i8463 %ext12 = zext i4 %trunc12 to i8464 %ext13 = zext i4 %trunc13 to i8465 %ext14 = zext i4 %trunc14 to i8466 %ext15 = zext i4 %trunc15 to i8467 %ext16 = zext i4 %trunc16 to i8468 %ext17 = zext i4 %trunc17 to i8469 %ext18 = zext i4 %trunc18 to i8470 %ext19 = zext i4 %trunc19 to i8471 %ext20 = zext i4 %trunc20 to i8472 %ext21 = zext i4 %trunc21 to i8473 %ext22 = zext i4 %trunc22 to i8474 %ext23 = zext i4 %trunc23 to i8475 %ext24 = zext i4 %trunc24 to i8476 %ext25 = zext i4 %trunc25 to i8477 %ext26 = zext i4 %trunc26 to i8478 %ext27 = zext i4 %trunc27 to i8479 %ext28 = zext i4 %trunc28 to i8480 %ext29 = zext i4 %trunc29 to i8481 %ext30 = zext i4 %trunc30 to i8482 %ext31 = zext i4 %trunc31 to i8483 %v0 = insertelement <32 x i8> undef, i8 %ext0, i32 0484 %v1 = insertelement <32 x i8> %v0, i8 %ext1, i32 1485 %v2 = insertelement <32 x i8> %v1, i8 %ext2, i32 2486 %v3 = insertelement <32 x i8> %v2, i8 %ext3, i32 3487 %v4 = insertelement <32 x i8> %v3, i8 %ext4, i32 4488 %v5 = insertelement <32 x i8> %v4, i8 %ext5, i32 5489 %v6 = insertelement <32 x i8> %v5, i8 %ext6, i32 6490 %v7 = insertelement <32 x i8> %v6, i8 %ext7, i32 7491 %v8 = insertelement <32 x i8> %v7, i8 %ext8, i32 8492 %v9 = insertelement <32 x i8> %v8, i8 %ext9, i32 9493 %v10 = insertelement <32 x i8> %v9, i8 %ext10, i32 10494 %v11 = insertelement <32 x i8> %v10, i8 %ext11, i32 11495 %v12 = insertelement <32 x i8> %v11, i8 %ext12, i32 12496 %v13 = insertelement <32 x i8> %v12, i8 %ext13, i32 13497 %v14 = insertelement <32 x i8> %v13, i8 %ext14, i32 14498 %v15 = insertelement <32 x i8> %v14, i8 %ext15, i32 15499 %v16 = insertelement <32 x i8> %v15, i8 %ext16, i32 16500 %v17 = insertelement <32 x i8> %v16, i8 %ext17, i32 17501 %v18 = insertelement <32 x i8> %v17, i8 %ext18, i32 18502 %v19 = insertelement <32 x i8> %v18, i8 %ext19, i32 19503 %v20 = insertelement <32 x i8> %v19, i8 %ext20, i32 20504 %v21 = insertelement <32 x i8> %v20, i8 %ext21, i32 21505 %v22 = insertelement <32 x i8> %v21, i8 %ext22, i32 22506 %v23 = insertelement <32 x i8> %v22, i8 %ext23, i32 23507 %v24 = insertelement <32 x i8> %v23, i8 %ext24, i32 24508 %v25 = insertelement <32 x i8> %v24, i8 %ext25, i32 25509 %v26 = insertelement <32 x i8> %v25, i8 %ext26, i32 26510 %v27 = insertelement <32 x i8> %v26, i8 %ext27, i32 27511 %v28 = insertelement <32 x i8> %v27, i8 %ext28, i32 28512 %v29 = insertelement <32 x i8> %v28, i8 %ext29, i32 29513 %v30 = insertelement <32 x i8> %v29, i8 %ext30, i32 30514 %v31 = insertelement <32 x i8> %v30, i8 %ext31, i32 31515 ret <32 x i8> %v31516}517 518define <2 x i64> @_clearupper2xi64b(<2 x i64>) nounwind {519; SSE2-LABEL: _clearupper2xi64b:520; SSE2: # %bb.0:521; SSE2-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0522; SSE2-NEXT: retq523;524; SSE42-LABEL: _clearupper2xi64b:525; SSE42: # %bb.0:526; SSE42-NEXT: xorps %xmm1, %xmm1527; SSE42-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]528; SSE42-NEXT: retq529;530; AVX-LABEL: _clearupper2xi64b:531; AVX: # %bb.0:532; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1533; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]534; AVX-NEXT: retq535 %x32 = bitcast <2 x i64> %0 to <4 x i32>536 %r0 = insertelement <4 x i32> %x32, i32 zeroinitializer, i32 1537 %r1 = insertelement <4 x i32> %r0, i32 zeroinitializer, i32 3538 %r = bitcast <4 x i32> %r1 to <2 x i64>539 ret <2 x i64> %r540}541 542define <4 x i64> @_clearupper4xi64b(<4 x i64>) nounwind {543; SSE2-LABEL: _clearupper4xi64b:544; SSE2: # %bb.0:545; SSE2-NEXT: movaps {{.*#+}} xmm2 = [4294967295,0,4294967295,0]546; SSE2-NEXT: andps %xmm2, %xmm0547; SSE2-NEXT: andps %xmm2, %xmm1548; SSE2-NEXT: retq549;550; SSE42-LABEL: _clearupper4xi64b:551; SSE42: # %bb.0:552; SSE42-NEXT: xorps %xmm2, %xmm2553; SSE42-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3]554; SSE42-NEXT: blendps {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3]555; SSE42-NEXT: retq556;557; AVX-LABEL: _clearupper4xi64b:558; AVX: # %bb.0:559; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1560; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7]561; AVX-NEXT: retq562 %x32 = bitcast <4 x i64> %0 to <8 x i32>563 %r0 = insertelement <8 x i32> %x32, i32 zeroinitializer, i32 1564 %r1 = insertelement <8 x i32> %r0, i32 zeroinitializer, i32 3565 %r2 = insertelement <8 x i32> %r1, i32 zeroinitializer, i32 5566 %r3 = insertelement <8 x i32> %r2, i32 zeroinitializer, i32 7567 %r = bitcast <8 x i32> %r3 to <4 x i64>568 ret <4 x i64> %r569}570 571define <4 x i32> @_clearupper4xi32b(<4 x i32>) nounwind {572; SSE2-LABEL: _clearupper4xi32b:573; SSE2: # %bb.0:574; SSE2-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0575; SSE2-NEXT: retq576;577; SSE42-LABEL: _clearupper4xi32b:578; SSE42: # %bb.0:579; SSE42-NEXT: pxor %xmm1, %xmm1580; SSE42-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7]581; SSE42-NEXT: retq582;583; AVX-LABEL: _clearupper4xi32b:584; AVX: # %bb.0:585; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1586; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7]587; AVX-NEXT: retq588 %x16 = bitcast <4 x i32> %0 to <8 x i16>589 %r0 = insertelement <8 x i16> %x16, i16 zeroinitializer, i32 1590 %r1 = insertelement <8 x i16> %r0, i16 zeroinitializer, i32 3591 %r2 = insertelement <8 x i16> %r1, i16 zeroinitializer, i32 5592 %r3 = insertelement <8 x i16> %r2, i16 zeroinitializer, i32 7593 %r = bitcast <8 x i16> %r3 to <4 x i32>594 ret <4 x i32> %r595}596 597define <8 x i32> @_clearupper8xi32b(<8 x i32>) nounwind {598; SSE2-LABEL: _clearupper8xi32b:599; SSE2: # %bb.0:600; SSE2-NEXT: movaps {{.*#+}} xmm2 = [65535,0,65535,0,65535,0,65535,0]601; SSE2-NEXT: andps %xmm2, %xmm0602; SSE2-NEXT: andps %xmm2, %xmm1603; SSE2-NEXT: retq604;605; SSE42-LABEL: _clearupper8xi32b:606; SSE42: # %bb.0:607; SSE42-NEXT: pxor %xmm2, %xmm2608; SSE42-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7]609; SSE42-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7]610; SSE42-NEXT: retq611;612; AVX1-LABEL: _clearupper8xi32b:613; AVX1: # %bb.0:614; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0615; AVX1-NEXT: retq616;617; AVX2-LABEL: _clearupper8xi32b:618; AVX2: # %bb.0:619; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1620; AVX2-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7],ymm0[8],ymm1[9],ymm0[10],ymm1[11],ymm0[12],ymm1[13],ymm0[14],ymm1[15]621; AVX2-NEXT: retq622 %x16 = bitcast <8 x i32> %0 to <16 x i16>623 %r0 = insertelement <16 x i16> %x16, i16 zeroinitializer, i32 1624 %r1 = insertelement <16 x i16> %r0, i16 zeroinitializer, i32 3625 %r2 = insertelement <16 x i16> %r1, i16 zeroinitializer, i32 5626 %r3 = insertelement <16 x i16> %r2, i16 zeroinitializer, i32 7627 %r4 = insertelement <16 x i16> %r3, i16 zeroinitializer, i32 9628 %r5 = insertelement <16 x i16> %r4, i16 zeroinitializer, i32 11629 %r6 = insertelement <16 x i16> %r5, i16 zeroinitializer, i32 13630 %r7 = insertelement <16 x i16> %r6, i16 zeroinitializer, i32 15631 %r = bitcast <16 x i16> %r7 to <8 x i32>632 ret <8 x i32> %r633}634 635define <8 x i16> @_clearupper8xi16b(<8 x i16>) nounwind {636; SSE-LABEL: _clearupper8xi16b:637; SSE: # %bb.0:638; SSE-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0639; SSE-NEXT: retq640;641; AVX-LABEL: _clearupper8xi16b:642; AVX: # %bb.0:643; AVX-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0644; AVX-NEXT: retq645 %x8 = bitcast <8 x i16> %0 to <16 x i8>646 %r0 = insertelement <16 x i8> %x8, i8 zeroinitializer, i32 1647 %r1 = insertelement <16 x i8> %r0, i8 zeroinitializer, i32 3648 %r2 = insertelement <16 x i8> %r1, i8 zeroinitializer, i32 5649 %r3 = insertelement <16 x i8> %r2, i8 zeroinitializer, i32 7650 %r4 = insertelement <16 x i8> %r3, i8 zeroinitializer, i32 9651 %r5 = insertelement <16 x i8> %r4, i8 zeroinitializer, i32 11652 %r6 = insertelement <16 x i8> %r5, i8 zeroinitializer, i32 13653 %r7 = insertelement <16 x i8> %r6, i8 zeroinitializer, i32 15654 %r = bitcast <16 x i8> %r7 to <8 x i16>655 ret <8 x i16> %r656}657 658define <16 x i16> @_clearupper16xi16b(<16 x i16>) nounwind {659; SSE-LABEL: _clearupper16xi16b:660; SSE: # %bb.0:661; SSE-NEXT: movaps {{.*#+}} xmm2 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0]662; SSE-NEXT: andps %xmm2, %xmm0663; SSE-NEXT: andps %xmm2, %xmm1664; SSE-NEXT: retq665;666; AVX-LABEL: _clearupper16xi16b:667; AVX: # %bb.0:668; AVX-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0669; AVX-NEXT: retq670 %x8 = bitcast <16 x i16> %0 to <32 x i8>671 %r0 = insertelement <32 x i8> %x8, i8 zeroinitializer, i32 1672 %r1 = insertelement <32 x i8> %r0, i8 zeroinitializer, i32 3673 %r2 = insertelement <32 x i8> %r1, i8 zeroinitializer, i32 5674 %r3 = insertelement <32 x i8> %r2, i8 zeroinitializer, i32 7675 %r4 = insertelement <32 x i8> %r3, i8 zeroinitializer, i32 9676 %r5 = insertelement <32 x i8> %r4, i8 zeroinitializer, i32 11677 %r6 = insertelement <32 x i8> %r5, i8 zeroinitializer, i32 13678 %r7 = insertelement <32 x i8> %r6, i8 zeroinitializer, i32 15679 %r8 = insertelement <32 x i8> %r7, i8 zeroinitializer, i32 17680 %r9 = insertelement <32 x i8> %r8, i8 zeroinitializer, i32 19681 %r10 = insertelement <32 x i8> %r9, i8 zeroinitializer, i32 21682 %r11 = insertelement <32 x i8> %r10, i8 zeroinitializer, i32 23683 %r12 = insertelement <32 x i8> %r11, i8 zeroinitializer, i32 25684 %r13 = insertelement <32 x i8> %r12, i8 zeroinitializer, i32 27685 %r14 = insertelement <32 x i8> %r13, i8 zeroinitializer, i32 29686 %r15 = insertelement <32 x i8> %r14, i8 zeroinitializer, i32 31687 %r = bitcast <32 x i8> %r15 to <16 x i16>688 ret <16 x i16> %r689}690 691define <16 x i8> @_clearupper16xi8b(<16 x i8>) nounwind {692; SSE-LABEL: _clearupper16xi8b:693; SSE: # %bb.0:694; SSE-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0695; SSE-NEXT: retq696;697; AVX-LABEL: _clearupper16xi8b:698; AVX: # %bb.0:699; AVX-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0700; AVX-NEXT: retq701 %x4 = bitcast <16 x i8> %0 to <32 x i4>702 %r0 = insertelement <32 x i4> %x4, i4 zeroinitializer, i32 1703 %r1 = insertelement <32 x i4> %r0, i4 zeroinitializer, i32 3704 %r2 = insertelement <32 x i4> %r1, i4 zeroinitializer, i32 5705 %r3 = insertelement <32 x i4> %r2, i4 zeroinitializer, i32 7706 %r4 = insertelement <32 x i4> %r3, i4 zeroinitializer, i32 9707 %r5 = insertelement <32 x i4> %r4, i4 zeroinitializer, i32 11708 %r6 = insertelement <32 x i4> %r5, i4 zeroinitializer, i32 13709 %r7 = insertelement <32 x i4> %r6, i4 zeroinitializer, i32 15710 %r8 = insertelement <32 x i4> %r7, i4 zeroinitializer, i32 17711 %r9 = insertelement <32 x i4> %r8, i4 zeroinitializer, i32 19712 %r10 = insertelement <32 x i4> %r9, i4 zeroinitializer, i32 21713 %r11 = insertelement <32 x i4> %r10, i4 zeroinitializer, i32 23714 %r12 = insertelement <32 x i4> %r11, i4 zeroinitializer, i32 25715 %r13 = insertelement <32 x i4> %r12, i4 zeroinitializer, i32 27716 %r14 = insertelement <32 x i4> %r13, i4 zeroinitializer, i32 29717 %r15 = insertelement <32 x i4> %r14, i4 zeroinitializer, i32 31718 %r = bitcast <32 x i4> %r15 to <16 x i8>719 ret <16 x i8> %r720}721 722define <32 x i8> @_clearupper32xi8b(<32 x i8>) nounwind {723; SSE-LABEL: _clearupper32xi8b:724; SSE: # %bb.0:725; SSE-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0726; SSE-NEXT: retq727;728; AVX-LABEL: _clearupper32xi8b:729; AVX: # %bb.0:730; AVX-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0731; AVX-NEXT: retq732 %x4 = bitcast <32 x i8> %0 to <64 x i4>733 %r0 = insertelement <64 x i4> %x4, i4 zeroinitializer, i32 1734 %r1 = insertelement <64 x i4> %r0, i4 zeroinitializer, i32 3735 %r2 = insertelement <64 x i4> %r1, i4 zeroinitializer, i32 5736 %r3 = insertelement <64 x i4> %r2, i4 zeroinitializer, i32 7737 %r4 = insertelement <64 x i4> %r3, i4 zeroinitializer, i32 9738 %r5 = insertelement <64 x i4> %r4, i4 zeroinitializer, i32 11739 %r6 = insertelement <64 x i4> %r5, i4 zeroinitializer, i32 13740 %r7 = insertelement <64 x i4> %r6, i4 zeroinitializer, i32 15741 %r8 = insertelement <64 x i4> %r7, i4 zeroinitializer, i32 17742 %r9 = insertelement <64 x i4> %r8, i4 zeroinitializer, i32 19743 %r10 = insertelement <64 x i4> %r9, i4 zeroinitializer, i32 21744 %r11 = insertelement <64 x i4> %r10, i4 zeroinitializer, i32 23745 %r12 = insertelement <64 x i4> %r11, i4 zeroinitializer, i32 25746 %r13 = insertelement <64 x i4> %r12, i4 zeroinitializer, i32 27747 %r14 = insertelement <64 x i4> %r13, i4 zeroinitializer, i32 29748 %r15 = insertelement <64 x i4> %r14, i4 zeroinitializer, i32 31749 %r16 = insertelement <64 x i4> %r15, i4 zeroinitializer, i32 33750 %r17 = insertelement <64 x i4> %r16, i4 zeroinitializer, i32 35751 %r18 = insertelement <64 x i4> %r17, i4 zeroinitializer, i32 37752 %r19 = insertelement <64 x i4> %r18, i4 zeroinitializer, i32 39753 %r20 = insertelement <64 x i4> %r19, i4 zeroinitializer, i32 41754 %r21 = insertelement <64 x i4> %r20, i4 zeroinitializer, i32 43755 %r22 = insertelement <64 x i4> %r21, i4 zeroinitializer, i32 45756 %r23 = insertelement <64 x i4> %r22, i4 zeroinitializer, i32 47757 %r24 = insertelement <64 x i4> %r23, i4 zeroinitializer, i32 49758 %r25 = insertelement <64 x i4> %r24, i4 zeroinitializer, i32 51759 %r26 = insertelement <64 x i4> %r25, i4 zeroinitializer, i32 53760 %r27 = insertelement <64 x i4> %r26, i4 zeroinitializer, i32 55761 %r28 = insertelement <64 x i4> %r27, i4 zeroinitializer, i32 57762 %r29 = insertelement <64 x i4> %r28, i4 zeroinitializer, i32 59763 %r30 = insertelement <64 x i4> %r29, i4 zeroinitializer, i32 61764 %r31 = insertelement <64 x i4> %r30, i4 zeroinitializer, i32 63765 %r = bitcast <64 x i4> %r15 to <32 x i8>766 ret <32 x i8> %r767}768 769define <2 x i64> @_clearupper2xi64c(<2 x i64>) nounwind {770; SSE2-LABEL: _clearupper2xi64c:771; SSE2: # %bb.0:772; SSE2-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0773; SSE2-NEXT: retq774;775; SSE42-LABEL: _clearupper2xi64c:776; SSE42: # %bb.0:777; SSE42-NEXT: xorps %xmm1, %xmm1778; SSE42-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]779; SSE42-NEXT: retq780;781; AVX-LABEL: _clearupper2xi64c:782; AVX: # %bb.0:783; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1784; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]785; AVX-NEXT: retq786 %r = and <2 x i64> <i64 4294967295, i64 4294967295>, %0787 ret <2 x i64> %r788}789 790define <4 x i64> @_clearupper4xi64c(<4 x i64>) nounwind {791; SSE2-LABEL: _clearupper4xi64c:792; SSE2: # %bb.0:793; SSE2-NEXT: movaps {{.*#+}} xmm2 = [4294967295,0,4294967295,0]794; SSE2-NEXT: andps %xmm2, %xmm0795; SSE2-NEXT: andps %xmm2, %xmm1796; SSE2-NEXT: retq797;798; SSE42-LABEL: _clearupper4xi64c:799; SSE42: # %bb.0:800; SSE42-NEXT: xorps %xmm2, %xmm2801; SSE42-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3]802; SSE42-NEXT: blendps {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3]803; SSE42-NEXT: retq804;805; AVX-LABEL: _clearupper4xi64c:806; AVX: # %bb.0:807; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1808; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7]809; AVX-NEXT: retq810 %r = and <4 x i64> <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>, %0811 ret <4 x i64> %r812}813 814define <4 x i32> @_clearupper4xi32c(<4 x i32>) nounwind {815; SSE2-LABEL: _clearupper4xi32c:816; SSE2: # %bb.0:817; SSE2-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0818; SSE2-NEXT: retq819;820; SSE42-LABEL: _clearupper4xi32c:821; SSE42: # %bb.0:822; SSE42-NEXT: pxor %xmm1, %xmm1823; SSE42-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7]824; SSE42-NEXT: retq825;826; AVX-LABEL: _clearupper4xi32c:827; AVX: # %bb.0:828; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1829; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7]830; AVX-NEXT: retq831 %r = and <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>, %0832 ret <4 x i32> %r833}834 835define <8 x i32> @_clearupper8xi32c(<8 x i32>) nounwind {836; SSE2-LABEL: _clearupper8xi32c:837; SSE2: # %bb.0:838; SSE2-NEXT: movaps {{.*#+}} xmm2 = [65535,0,65535,0,65535,0,65535,0]839; SSE2-NEXT: andps %xmm2, %xmm0840; SSE2-NEXT: andps %xmm2, %xmm1841; SSE2-NEXT: retq842;843; SSE42-LABEL: _clearupper8xi32c:844; SSE42: # %bb.0:845; SSE42-NEXT: pxor %xmm2, %xmm2846; SSE42-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7]847; SSE42-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7]848; SSE42-NEXT: retq849;850; AVX1-LABEL: _clearupper8xi32c:851; AVX1: # %bb.0:852; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0853; AVX1-NEXT: retq854;855; AVX2-LABEL: _clearupper8xi32c:856; AVX2: # %bb.0:857; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1858; AVX2-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7],ymm0[8],ymm1[9],ymm0[10],ymm1[11],ymm0[12],ymm1[13],ymm0[14],ymm1[15]859; AVX2-NEXT: retq860 %r = and <8 x i32> <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>, %0861 ret <8 x i32> %r862}863 864define <8 x i16> @_clearupper8xi16c(<8 x i16>) nounwind {865; SSE-LABEL: _clearupper8xi16c:866; SSE: # %bb.0:867; SSE-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0868; SSE-NEXT: retq869;870; AVX-LABEL: _clearupper8xi16c:871; AVX: # %bb.0:872; AVX-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0873; AVX-NEXT: retq874 %r = and <8 x i16> <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>, %0875 ret <8 x i16> %r876}877 878define <16 x i16> @_clearupper16xi16c(<16 x i16>) nounwind {879; SSE-LABEL: _clearupper16xi16c:880; SSE: # %bb.0:881; SSE-NEXT: movaps {{.*#+}} xmm2 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0]882; SSE-NEXT: andps %xmm2, %xmm0883; SSE-NEXT: andps %xmm2, %xmm1884; SSE-NEXT: retq885;886; AVX-LABEL: _clearupper16xi16c:887; AVX: # %bb.0:888; AVX-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0889; AVX-NEXT: retq890 %r = and <16 x i16> <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>, %0891 ret <16 x i16> %r892}893 894define <16 x i8> @_clearupper16xi8c(<16 x i8>) nounwind {895; SSE-LABEL: _clearupper16xi8c:896; SSE: # %bb.0:897; SSE-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0898; SSE-NEXT: retq899;900; AVX-LABEL: _clearupper16xi8c:901; AVX: # %bb.0:902; AVX-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0903; AVX-NEXT: retq904 %r = and <16 x i8> <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>, %0905 ret <16 x i8> %r906}907 908define <32 x i8> @_clearupper32xi8c(<32 x i8>) nounwind {909; SSE-LABEL: _clearupper32xi8c:910; SSE: # %bb.0:911; SSE-NEXT: movaps {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]912; SSE-NEXT: andps %xmm2, %xmm0913; SSE-NEXT: andps %xmm2, %xmm1914; SSE-NEXT: retq915;916; AVX-LABEL: _clearupper32xi8c:917; AVX: # %bb.0:918; AVX-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0919; AVX-NEXT: retq920 %r = and <32 x i8> <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>, %0921 ret <32 x i8> %r922}923