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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s3 4; cmp with single-use load, should not form branch.5define i32 @test1(double %a, ptr nocapture %b, i32 %x, i32 %y)  {6; CHECK-LABEL: test1:7; CHECK:       # %bb.0:8; CHECK-NEXT:    movl %esi, %eax9; CHECK-NEXT:    ucomisd (%rdi), %xmm010; CHECK-NEXT:    cmovbel %edx, %eax11; CHECK-NEXT:    retq12  %load = load double, ptr %b, align 813  %cmp = fcmp olt double %load, %a14  %cond = select i1 %cmp, i32 %x, i32 %y15  ret i32 %cond16}17 18; Basic correctness check: no load.19define i32 @test2(double %a, double %b, i32 %x, i32 %y)  {20; CHECK-LABEL: test2:21; CHECK:       # %bb.0:22; CHECK-NEXT:    movl %edi, %eax23; CHECK-NEXT:    ucomisd %xmm1, %xmm024; CHECK-NEXT:    cmovbel %esi, %eax25; CHECK-NEXT:    retq26  %cmp = fcmp ogt double %a, %b27  %cond = select i1 %cmp, i32 %x, i32 %y28  ret i32 %cond29}30 31; Multiple uses of the load.32define i32 @test4(i32 %a, ptr nocapture %b, i32 %x, i32 %y)  {33; CHECK-LABEL: test4:34; CHECK:       # %bb.0:35; CHECK-NEXT:    movl (%rsi), %eax36; CHECK-NEXT:    cmpl %edi, %eax37; CHECK-NEXT:    cmovael %ecx, %edx38; CHECK-NEXT:    addl %edx, %eax39; CHECK-NEXT:    retq40  %load = load i32, ptr %b, align 441  %cmp = icmp ult i32 %load, %a42  %cond = select i1 %cmp, i32 %x, i32 %y43  %add = add i32 %cond, %load44  ret i32 %add45}46 47; Multiple uses of the cmp.48define i32 @test5(i32 %a, ptr nocapture %b, i32 %x, i32 %y) {49; CHECK-LABEL: test5:50; CHECK:       # %bb.0:51; CHECK-NEXT:    movl %ecx, %eax52; CHECK-NEXT:    cmpl %edi, (%rsi)53; CHECK-NEXT:    cmoval %edi, %eax54; CHECK-NEXT:    cmovael %edx, %eax55; CHECK-NEXT:    retq56  %load = load i32, ptr %b, align 457  %cmp = icmp ult i32 %load, %a58  %cmp1 = icmp ugt i32 %load, %a59  %cond = select i1 %cmp1, i32 %a, i32 %y60  %cond5 = select i1 %cmp, i32 %cond, i32 %x61  ret i32 %cond562}63 64; Zero-extended select.65define void @test6(i32 %a, i32 %x, ptr %y.ptr, ptr %z.ptr) {66; CHECK-LABEL: test6:67; CHECK:       # %bb.0: # %entry68; CHECK-NEXT:    # kill: def $esi killed $esi def $rsi69; CHECK-NEXT:    testl %edi, %edi70; CHECK-NEXT:    cmovnsl (%rdx), %esi71; CHECK-NEXT:    movq %rsi, (%rcx)72; CHECK-NEXT:    retq73entry:74  %y = load i32, ptr %y.ptr75  %cmp = icmp slt i32 %a, 076  %z = select i1 %cmp, i32 %x, i32 %y77  %z.ext = zext i32 %z to i6478  store i64 %z.ext, ptr %z.ptr79  ret void80}81 82; If a select is not obviously predictable, don't turn it into a branch.83define i32 @weighted_select1(i32 %a, i32 %b) {84; CHECK-LABEL: weighted_select1:85; CHECK:       # %bb.0:86; CHECK-NEXT:    movl %esi, %eax87; CHECK-NEXT:    testl %edi, %edi88; CHECK-NEXT:    cmovnel %edi, %eax89; CHECK-NEXT:    retq90  %cmp = icmp ne i32 %a, 091  %sel = select i1 %cmp, i32 %a, i32 %b, !prof !1592  ret i32 %sel93}94 95; If a select is obviously predictable, turn it into a branch.96define i32 @weighted_select2(i32 %a, i32 %b) {97; CHECK-LABEL: weighted_select2:98; CHECK:       # %bb.0:99; CHECK-NEXT:    movl %edi, %eax100; CHECK-NEXT:    testl %edi, %edi101; CHECK-NEXT:    jne .LBB6_2102; CHECK-NEXT:  # %bb.1: # %select.false103; CHECK-NEXT:    movl %esi, %eax104; CHECK-NEXT:  .LBB6_2: # %select.end105; CHECK-NEXT:    retq106  %cmp = icmp ne i32 %a, 0107  %sel = select i1 %cmp, i32 %a, i32 %b, !prof !16108  ret i32 %sel109}110 111; Note the reversed profile weights: it doesn't matter if it's112; obviously true or obviously false.113; Either one should become a branch rather than conditional move.114; TODO: But likely true vs. likely false should affect basic block placement?115define i32 @weighted_select3(i32 %a, i32 %b) {116; CHECK-LABEL: weighted_select3:117; CHECK:       # %bb.0:118; CHECK-NEXT:    movl %edi, %eax119; CHECK-NEXT:    testl %edi, %edi120; CHECK-NEXT:    je .LBB7_1121; CHECK-NEXT:  # %bb.2: # %select.end122; CHECK-NEXT:    retq123; CHECK-NEXT:  .LBB7_1: # %select.false124; CHECK-NEXT:    movl %esi, %eax125; CHECK-NEXT:    retq126  %cmp = icmp ne i32 %a, 0127  %sel = select i1 %cmp, i32 %a, i32 %b, !prof !17128  ret i32 %sel129}130 131; Weightlessness is no reason to die.132define i32 @unweighted_select(i32 %a, i32 %b) {133; CHECK-LABEL: unweighted_select:134; CHECK:       # %bb.0:135; CHECK-NEXT:    movl %esi, %eax136; CHECK-NEXT:    testl %edi, %edi137; CHECK-NEXT:    cmovnel %edi, %eax138; CHECK-NEXT:    retq139  %cmp = icmp ne i32 %a, 0140  %sel = select i1 %cmp, i32 %a, i32 %b, !prof !18141  ret i32 %sel142}143 144define i32 @weighted_select_optsize(i32 %a, i32 %b) optsize {145; CHECK-LABEL: weighted_select_optsize:146; CHECK:       # %bb.0:147; CHECK-NEXT:    movl %esi, %eax148; CHECK-NEXT:    testl %edi, %edi149; CHECK-NEXT:    cmovnel %edi, %eax150; CHECK-NEXT:    retq151  %cmp = icmp ne i32 %a, 0152  %sel = select i1 %cmp, i32 %a, i32 %b, !prof !16153  ret i32 %sel154}155 156define i32 @weighted_select_pgso(i32 %a, i32 %b) !prof !14 {157; CHECK-LABEL: weighted_select_pgso:158; CHECK:       # %bb.0:159; CHECK-NEXT:    movl %esi, %eax160; CHECK-NEXT:    testl %edi, %edi161; CHECK-NEXT:    cmovnel %edi, %eax162; CHECK-NEXT:    retq163  %cmp = icmp ne i32 %a, 0164  %sel = select i1 %cmp, i32 %a, i32 %b, !prof !16165  ret i32 %sel166}167 168; If two selects in a row are predictable, turn them into branches.169define i32 @weighted_selects(i32 %a, i32 %b) !prof !19 {170; CHECK-LABEL: weighted_selects:171; CHECK:       # %bb.0:172; CHECK-NEXT:    movl %esi, %eax173; CHECK-NEXT:    testl %edi, %edi174; CHECK-NEXT:    movl %edi, %ecx175; CHECK-NEXT:    jne .LBB11_2176; CHECK-NEXT:  # %bb.1: # %select.false177; CHECK-NEXT:    movl %eax, %ecx178; CHECK-NEXT:  .LBB11_2: # %select.end179; CHECK-NEXT:    testl %ecx, %ecx180; CHECK-NEXT:    jne .LBB11_4181; CHECK-NEXT:  # %bb.3: # %select.false2182; CHECK-NEXT:    movl %edi, %eax183; CHECK-NEXT:  .LBB11_4: # %select.end1184; CHECK-NEXT:    retq185  %cmp = icmp ne i32 %a, 0186  %sel = select i1 %cmp, i32 %a, i32 %b, !prof !16187  %cmp1 = icmp ne i32 %sel, 0188  %sel1 = select i1 %cmp1, i32 %b, i32 %a, !prof !16189  ret i32 %sel1190}191 192!llvm.module.flags = !{!0}193!0 = !{i32 1, !"ProfileSummary", !1}194!1 = !{!2, !3, !4, !5, !6, !7, !8, !9}195!2 = !{!"ProfileFormat", !"InstrProf"}196!3 = !{!"TotalCount", i64 10000}197!4 = !{!"MaxCount", i64 10}198!5 = !{!"MaxInternalCount", i64 1}199!6 = !{!"MaxFunctionCount", i64 1000}200!7 = !{!"NumCounts", i64 3}201!8 = !{!"NumFunctions", i64 3}202!9 = !{!"DetailedSummary", !10}203!10 = !{!11, !12, !13}204!11 = !{i32 10000, i64 100, i32 1}205!12 = !{i32 999000, i64 100, i32 1}206!13 = !{i32 999999, i64 1, i32 2}207!14 = !{!"function_entry_count", i64 0}208!15 = !{!"branch_weights", i32 1, i32 99}209!16 = !{!"branch_weights", i32 1, i32 100}210!17 = !{!"branch_weights", i32 100, i32 1}211!18 = !{!"branch_weights", i32 0, i32 0}212!19 = !{!"function_entry_count", i64 100}213