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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 32; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,CHECK-NOBMI,CHECK-NOBMI-SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi2 | FileCheck %s --check-prefixes=CHECK,CHECK-BMI2,CHECK-BMI2-SSE24; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi2,+avx | FileCheck %s --check-prefixes=CHECK,CHECK-BMI2,CHECK-AVX,CHECK-AVX12,CHECK-AVX15; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi2,+avx2 | FileCheck %s --check-prefixes=CHECK,CHECK-BMI2,CHECK-AVX,CHECK-AVX12,CHECK-AVX26; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi2,+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK,CHECK-BMI2,CHECK-AVX,CHECK-AVX5127declare <4 x i32> @llvm.fshl.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)8declare <4 x i32> @llvm.fshr.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)9declare <16 x i16> @llvm.fshl.v16i16(<16 x i16>, <16 x i16>, <16 x i16>)10declare <16 x i16> @llvm.fshr.v16i16(<16 x i16>, <16 x i16>, <16 x i16>)11declare i64 @llvm.fshl.i64(i64, i64, i64)12declare i64 @llvm.fshr.i64(i64, i64, i64)13declare i32 @llvm.fshl.i32(i32, i32, i32)14declare i32 @llvm.fshr.i32(i32, i32, i32)15declare i16 @llvm.fshl.i16(i16, i16, i16)16declare i16 @llvm.fshr.i16(i16, i16, i16)17declare i8 @llvm.fshl.i8(i8, i8, i8)18declare i8 @llvm.fshr.i8(i8, i8, i8)19 20define i1 @shr_to_shl_eq_i8_s2(i8 %x) {21; CHECK-LABEL: shr_to_shl_eq_i8_s2:22; CHECK: # %bb.0:23; CHECK-NEXT: movl %edi, %eax24; CHECK-NEXT: rolb $2, %al25; CHECK-NEXT: cmpb %al, %dil26; CHECK-NEXT: sete %al27; CHECK-NEXT: retq28 %and = and i8 %x, 6329 %shr = lshr i8 %x, 230 %r = icmp eq i8 %and, %shr31 ret i1 %r32}33 34define i1 @shl_to_shr_ne_i8_s7(i8 %x) {35; CHECK-LABEL: shl_to_shr_ne_i8_s7:36; CHECK: # %bb.0:37; CHECK-NEXT: movl %edi, %eax38; CHECK-NEXT: shrb $7, %al39; CHECK-NEXT: andb $1, %dil40; CHECK-NEXT: cmpb %al, %dil41; CHECK-NEXT: setne %al42; CHECK-NEXT: retq43 %shl = shl i8 %x, 744 %and = and i8 %x, 12845 %r = icmp ne i8 %shl, %and46 ret i1 %r47}48 49define i1 @rorl_to_srl_ne_i8_s5_fail(i8 %x) {50; CHECK-LABEL: rorl_to_srl_ne_i8_s5_fail:51; CHECK: # %bb.0:52; CHECK-NEXT: movl %edi, %eax53; CHECK-NEXT: rolb $5, %al54; CHECK-NEXT: cmpb %dil, %al55; CHECK-NEXT: setne %al56; CHECK-NEXT: retq57 %ror = call i8 @llvm.fshl.i8(i8 %x, i8 %x, i8 5)58 %r = icmp ne i8 %ror, %x59 ret i1 %r60}61 62define i1 @shr_to_shl_eq_i8_s1(i8 %x) {63; CHECK-LABEL: shr_to_shl_eq_i8_s1:64; CHECK: # %bb.0:65; CHECK-NEXT: movl %edi, %eax66; CHECK-NEXT: rolb %al67; CHECK-NEXT: cmpb %al, %dil68; CHECK-NEXT: sete %al69; CHECK-NEXT: retq70 %and = and i8 %x, 12771 %shr = lshr i8 %x, 172 %r = icmp eq i8 %and, %shr73 ret i1 %r74}75 76define i1 @shr_to_shl_eq_i32_s3(i32 %x) {77; CHECK-LABEL: shr_to_shl_eq_i32_s3:78; CHECK: # %bb.0:79; CHECK-NEXT: # kill: def $edi killed $edi def $rdi80; CHECK-NEXT: leal (,%rdi,8), %eax81; CHECK-NEXT: andl $-8, %edi82; CHECK-NEXT: cmpl %eax, %edi83; CHECK-NEXT: sete %al84; CHECK-NEXT: retq85 %and = and i32 %x, 53687091186 %shr = lshr i32 %x, 387 %r = icmp eq i32 %and, %shr88 ret i1 %r89}90 91define i1 @shl_to_shr_eq_i32_s3_fail(i32 %x) {92; CHECK-LABEL: shl_to_shr_eq_i32_s3_fail:93; CHECK: # %bb.0:94; CHECK-NEXT: movl %edi, %eax95; CHECK-NEXT: andl $536870911, %eax # imm = 0x1FFFFFFF96; CHECK-NEXT: shll $3, %edi97; CHECK-NEXT: cmpl %edi, %eax98; CHECK-NEXT: sete %al99; CHECK-NEXT: retq100 %and = and i32 %x, 536870911101 %shr = shl i32 %x, 3102 %r = icmp eq i32 %and, %shr103 ret i1 %r104}105 106define i1 @shl_to_shr_ne_i32_s16(i32 %x) {107; CHECK-NOBMI-LABEL: shl_to_shr_ne_i32_s16:108; CHECK-NOBMI: # %bb.0:109; CHECK-NOBMI-NEXT: movzwl %di, %eax110; CHECK-NOBMI-NEXT: shrl $16, %edi111; CHECK-NOBMI-NEXT: cmpl %edi, %eax112; CHECK-NOBMI-NEXT: setne %al113; CHECK-NOBMI-NEXT: retq114;115; CHECK-BMI2-LABEL: shl_to_shr_ne_i32_s16:116; CHECK-BMI2: # %bb.0:117; CHECK-BMI2-NEXT: rorxl $16, %edi, %eax118; CHECK-BMI2-NEXT: cmpl %eax, %edi119; CHECK-BMI2-NEXT: setne %al120; CHECK-BMI2-NEXT: retq121 %shl = shl i32 %x, 16122 %and = and i32 %x, 4294901760123 %r = icmp ne i32 %shl, %and124 ret i1 %r125}126 127define i1 @shl_to_shr_ne_i32_s16_fail(i32 %x) {128; CHECK-LABEL: shl_to_shr_ne_i32_s16_fail:129; CHECK: # %bb.0:130; CHECK-NEXT: movl %edi, %eax131; CHECK-NEXT: shll $16, %eax132; CHECK-NEXT: andl $2147450880, %edi # imm = 0x7FFF8000133; CHECK-NEXT: cmpl %edi, %eax134; CHECK-NEXT: setne %al135; CHECK-NEXT: retq136 %shl = shl i32 %x, 16137 %and = and i32 %x, 2147450880138 %r = icmp ne i32 %shl, %and139 ret i1 %r140}141 142define i1 @shr_to_shl_eq_i16_s1(i16 %x) {143; CHECK-LABEL: shr_to_shl_eq_i16_s1:144; CHECK: # %bb.0:145; CHECK-NEXT: movl %edi, %eax146; CHECK-NEXT: rolw %ax147; CHECK-NEXT: cmpw %ax, %di148; CHECK-NEXT: sete %al149; CHECK-NEXT: retq150 %and = and i16 %x, 32767151 %shr = lshr i16 %x, 1152 %r = icmp eq i16 %and, %shr153 ret i1 %r154}155 156define i1 @shr_to_shl_eq_i16_s1_fail(i16 %x) {157; CHECK-LABEL: shr_to_shl_eq_i16_s1_fail:158; CHECK: # %bb.0:159; CHECK-NEXT: movzwl %di, %eax160; CHECK-NEXT: andl $32766, %edi # imm = 0x7FFE161; CHECK-NEXT: shrl %eax162; CHECK-NEXT: cmpw %ax, %di163; CHECK-NEXT: sete %al164; CHECK-NEXT: retq165 %and = and i16 %x, 32766166 %shr = lshr i16 %x, 1167 %r = icmp eq i16 %and, %shr168 ret i1 %r169}170 171define i1 @shl_to_shr_eq_i64_s44(i64 %x) {172; CHECK-LABEL: shl_to_shr_eq_i64_s44:173; CHECK: # %bb.0:174; CHECK-NEXT: movq %rdi, %rax175; CHECK-NEXT: shrq $44, %rax176; CHECK-NEXT: andl $1048575, %edi # imm = 0xFFFFF177; CHECK-NEXT: cmpl %eax, %edi178; CHECK-NEXT: sete %al179; CHECK-NEXT: retq180 %shl = shl i64 %x, 44181 %and = and i64 %x, 18446726481523507200182 %r = icmp eq i64 %shl, %and183 ret i1 %r184}185 186define i1 @shr_to_shl_ne_i64_s32(i64 %x) {187; CHECK-NOBMI-LABEL: shr_to_shl_ne_i64_s32:188; CHECK-NOBMI: # %bb.0:189; CHECK-NOBMI-NEXT: movq %rdi, %rax190; CHECK-NOBMI-NEXT: shrq $32, %rax191; CHECK-NOBMI-NEXT: cmpl %eax, %edi192; CHECK-NOBMI-NEXT: setne %al193; CHECK-NOBMI-NEXT: retq194;195; CHECK-BMI2-LABEL: shr_to_shl_ne_i64_s32:196; CHECK-BMI2: # %bb.0:197; CHECK-BMI2-NEXT: rorxq $32, %rdi, %rax198; CHECK-BMI2-NEXT: cmpq %rax, %rdi199; CHECK-BMI2-NEXT: setne %al200; CHECK-BMI2-NEXT: retq201 %and = and i64 %x, 4294967295202 %shr = lshr i64 %x, 32203 %r = icmp ne i64 %and, %shr204 ret i1 %r205}206 207define i1 @rorl_to_shl_eq_i64_s16(i64 %x) {208; CHECK-NOBMI-LABEL: rorl_to_shl_eq_i64_s16:209; CHECK-NOBMI: # %bb.0:210; CHECK-NOBMI-NEXT: movq %rdi, %rax211; CHECK-NOBMI-NEXT: rolq $16, %rax212; CHECK-NOBMI-NEXT: cmpq %rdi, %rax213; CHECK-NOBMI-NEXT: sete %al214; CHECK-NOBMI-NEXT: retq215;216; CHECK-BMI2-LABEL: rorl_to_shl_eq_i64_s16:217; CHECK-BMI2: # %bb.0:218; CHECK-BMI2-NEXT: rorxq $48, %rdi, %rax219; CHECK-BMI2-NEXT: cmpq %rdi, %rax220; CHECK-BMI2-NEXT: sete %al221; CHECK-BMI2-NEXT: retq222 %ror = call i64 @llvm.fshl.i64(i64 %x, i64 %x, i64 16)223 %r = icmp eq i64 %ror, %x224 ret i1 %r225}226 227define i1 @ashr_to_shl_ne_i64_s32_fail(i64 %x) {228; CHECK-LABEL: ashr_to_shl_ne_i64_s32_fail:229; CHECK: # %bb.0:230; CHECK-NEXT: movl %edi, %eax231; CHECK-NEXT: sarq $32, %rdi232; CHECK-NEXT: cmpq %rdi, %rax233; CHECK-NEXT: setne %al234; CHECK-NEXT: retq235 %and = and i64 %x, 4294967295236 %shr = ashr i64 %x, 32237 %r = icmp ne i64 %and, %shr238 ret i1 %r239}240 241define i1 @shl_to_shr_eq_i64_s63(i64 %x) {242; CHECK-LABEL: shl_to_shr_eq_i64_s63:243; CHECK: # %bb.0:244; CHECK-NEXT: movq %rdi, %rax245; CHECK-NEXT: shrq $63, %rax246; CHECK-NEXT: andl $1, %edi247; CHECK-NEXT: cmpl %eax, %edi248; CHECK-NEXT: sete %al249; CHECK-NEXT: retq250 %shl = shl i64 %x, 63251 %and = and i64 %x, 9223372036854775808252 %r = icmp eq i64 %shl, %and253 ret i1 %r254}255 256define i1 @shl_to_shr_eq_i64_s63_fail(i64 %x) {257; CHECK-LABEL: shl_to_shr_eq_i64_s63_fail:258; CHECK: # %bb.0:259; CHECK-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000260; CHECK-NEXT: andq %rdi, %rax261; CHECK-NEXT: shlq $63, %rdi262; CHECK-NEXT: cmpq %rax, %rdi263; CHECK-NEXT: seta %al264; CHECK-NEXT: retq265 %shl = shl i64 %x, 63266 %and = and i64 %x, 9223372036854775808267 %r = icmp ugt i64 %shl, %and268 ret i1 %r269}270 271define i1 @shr_to_shl_eq_i64_s7(i64 %x) {272; CHECK-LABEL: shr_to_shl_eq_i64_s7:273; CHECK: # %bb.0:274; CHECK-NEXT: movq %rdi, %rax275; CHECK-NEXT: shlq $7, %rax276; CHECK-NEXT: andq $-128, %rdi277; CHECK-NEXT: cmpq %rax, %rdi278; CHECK-NEXT: sete %al279; CHECK-NEXT: retq280 %and = and i64 %x, 144115188075855871281 %shr = lshr i64 %x, 7282 %r = icmp eq i64 %and, %shr283 ret i1 %r284}285 286define i1 @shl_to_shr_ne_i32_s24(i32 %x) {287; CHECK-LABEL: shl_to_shr_ne_i32_s24:288; CHECK: # %bb.0:289; CHECK-NEXT: movzbl %dil, %eax290; CHECK-NEXT: shrl $24, %edi291; CHECK-NEXT: cmpl %edi, %eax292; CHECK-NEXT: setne %al293; CHECK-NEXT: retq294 %shl = shl i32 %x, 24295 %and = and i32 %x, 4278190080296 %r = icmp ne i32 %shl, %and297 ret i1 %r298}299 300define i1 @shr_to_shl_ne_i32_s24_fail(i32 %x) {301; CHECK-LABEL: shr_to_shl_ne_i32_s24_fail:302; CHECK: # %bb.0:303; CHECK-NEXT: movl %edi, %eax304; CHECK-NEXT: shrl $24, %eax305; CHECK-NEXT: andl $-16777216, %edi # imm = 0xFF000000306; CHECK-NEXT: cmpl %edi, %eax307; CHECK-NEXT: setne %al308; CHECK-NEXT: retq309 %shl = lshr i32 %x, 24310 %and = and i32 %x, 4278190080311 %r = icmp ne i32 %shl, %and312 ret i1 %r313}314 315define i1 @shr_to_shl_ne_i32_s8(i32 %x) {316; CHECK-NOBMI-LABEL: shr_to_shl_ne_i32_s8:317; CHECK-NOBMI: # %bb.0:318; CHECK-NOBMI-NEXT: movl %edi, %eax319; CHECK-NOBMI-NEXT: roll $8, %eax320; CHECK-NOBMI-NEXT: cmpl %eax, %edi321; CHECK-NOBMI-NEXT: setne %al322; CHECK-NOBMI-NEXT: retq323;324; CHECK-BMI2-LABEL: shr_to_shl_ne_i32_s8:325; CHECK-BMI2: # %bb.0:326; CHECK-BMI2-NEXT: rorxl $24, %edi, %eax327; CHECK-BMI2-NEXT: cmpl %eax, %edi328; CHECK-BMI2-NEXT: setne %al329; CHECK-BMI2-NEXT: retq330 %and = and i32 %x, 16777215331 %shr = lshr i32 %x, 8332 %r = icmp ne i32 %and, %shr333 ret i1 %r334}335 336define <4 x i1> @shr_to_ror_eq_4xi32_s4(<4 x i32> %x) {337; CHECK-NOBMI-LABEL: shr_to_ror_eq_4xi32_s4:338; CHECK-NOBMI: # %bb.0:339; CHECK-NOBMI-NEXT: movdqa %xmm0, %xmm1340; CHECK-NOBMI-NEXT: psrld $4, %xmm1341; CHECK-NOBMI-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0342; CHECK-NOBMI-NEXT: pcmpeqd %xmm1, %xmm0343; CHECK-NOBMI-NEXT: pcmpeqd %xmm1, %xmm1344; CHECK-NOBMI-NEXT: pxor %xmm1, %xmm0345; CHECK-NOBMI-NEXT: retq346;347; CHECK-BMI2-SSE2-LABEL: shr_to_ror_eq_4xi32_s4:348; CHECK-BMI2-SSE2: # %bb.0:349; CHECK-BMI2-SSE2-NEXT: movdqa %xmm0, %xmm1350; CHECK-BMI2-SSE2-NEXT: psrld $4, %xmm1351; CHECK-BMI2-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0352; CHECK-BMI2-SSE2-NEXT: pcmpeqd %xmm1, %xmm0353; CHECK-BMI2-SSE2-NEXT: pcmpeqd %xmm1, %xmm1354; CHECK-BMI2-SSE2-NEXT: pxor %xmm1, %xmm0355; CHECK-BMI2-SSE2-NEXT: retq356;357; CHECK-AVX1-LABEL: shr_to_ror_eq_4xi32_s4:358; CHECK-AVX1: # %bb.0:359; CHECK-AVX1-NEXT: vpsrld $4, %xmm0, %xmm1360; CHECK-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0361; CHECK-AVX1-NEXT: vpcmpeqd %xmm0, %xmm1, %xmm0362; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1363; CHECK-AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0364; CHECK-AVX1-NEXT: retq365;366; CHECK-AVX2-LABEL: shr_to_ror_eq_4xi32_s4:367; CHECK-AVX2: # %bb.0:368; CHECK-AVX2-NEXT: vpsrld $4, %xmm0, %xmm1369; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [268435455,268435455,268435455,268435455]370; CHECK-AVX2-NEXT: vpand %xmm2, %xmm0, %xmm0371; CHECK-AVX2-NEXT: vpcmpeqd %xmm0, %xmm1, %xmm0372; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1373; CHECK-AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0374; CHECK-AVX2-NEXT: retq375;376; CHECK-AVX512-LABEL: shr_to_ror_eq_4xi32_s4:377; CHECK-AVX512: # %bb.0:378; CHECK-AVX512-NEXT: vprold $4, %xmm0, %xmm1379; CHECK-AVX512-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0380; CHECK-AVX512-NEXT: vpternlogq $15, %xmm0, %xmm0, %xmm0381; CHECK-AVX512-NEXT: retq382 %shr = lshr <4 x i32> %x, <i32 4, i32 4, i32 4, i32 4>383 %and = and <4 x i32> %x, <i32 268435455, i32 268435455, i32 268435455, i32 268435455>384 %r = icmp ne <4 x i32> %shr, %and385 ret <4 x i1> %r386}387 388define <4 x i1> @shl_to_ror_eq_4xi32_s8(<4 x i32> %x) {389; CHECK-NOBMI-LABEL: shl_to_ror_eq_4xi32_s8:390; CHECK-NOBMI: # %bb.0:391; CHECK-NOBMI-NEXT: movdqa %xmm0, %xmm1392; CHECK-NOBMI-NEXT: pslld $8, %xmm1393; CHECK-NOBMI-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0394; CHECK-NOBMI-NEXT: pcmpeqd %xmm1, %xmm0395; CHECK-NOBMI-NEXT: pcmpeqd %xmm1, %xmm1396; CHECK-NOBMI-NEXT: pxor %xmm1, %xmm0397; CHECK-NOBMI-NEXT: retq398;399; CHECK-BMI2-SSE2-LABEL: shl_to_ror_eq_4xi32_s8:400; CHECK-BMI2-SSE2: # %bb.0:401; CHECK-BMI2-SSE2-NEXT: movdqa %xmm0, %xmm1402; CHECK-BMI2-SSE2-NEXT: pslld $8, %xmm1403; CHECK-BMI2-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0404; CHECK-BMI2-SSE2-NEXT: pcmpeqd %xmm1, %xmm0405; CHECK-BMI2-SSE2-NEXT: pcmpeqd %xmm1, %xmm1406; CHECK-BMI2-SSE2-NEXT: pxor %xmm1, %xmm0407; CHECK-BMI2-SSE2-NEXT: retq408;409; CHECK-AVX12-LABEL: shl_to_ror_eq_4xi32_s8:410; CHECK-AVX12: # %bb.0:411; CHECK-AVX12-NEXT: vpslld $8, %xmm0, %xmm1412; CHECK-AVX12-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0413; CHECK-AVX12-NEXT: vpcmpeqd %xmm0, %xmm1, %xmm0414; CHECK-AVX12-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1415; CHECK-AVX12-NEXT: vpxor %xmm1, %xmm0, %xmm0416; CHECK-AVX12-NEXT: retq417;418; CHECK-AVX512-LABEL: shl_to_ror_eq_4xi32_s8:419; CHECK-AVX512: # %bb.0:420; CHECK-AVX512-NEXT: vprold $8, %xmm0, %xmm1421; CHECK-AVX512-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0422; CHECK-AVX512-NEXT: vpternlogq $15, %xmm0, %xmm0, %xmm0423; CHECK-AVX512-NEXT: retq424 %shr = shl <4 x i32> %x, <i32 8, i32 8, i32 8, i32 8>425 %and = and <4 x i32> %x, <i32 4294967040, i32 4294967040, i32 4294967040, i32 4294967040>426 %r = icmp ne <4 x i32> %shr, %and427 ret <4 x i1> %r428}429 430define <4 x i1> @shl_to_ror_eq_4xi32_s7_fail_no_p2(<4 x i32> %x) {431; CHECK-NOBMI-LABEL: shl_to_ror_eq_4xi32_s7_fail_no_p2:432; CHECK-NOBMI: # %bb.0:433; CHECK-NOBMI-NEXT: movdqa %xmm0, %xmm1434; CHECK-NOBMI-NEXT: pslld $7, %xmm1435; CHECK-NOBMI-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0436; CHECK-NOBMI-NEXT: pcmpeqd %xmm1, %xmm0437; CHECK-NOBMI-NEXT: pcmpeqd %xmm1, %xmm1438; CHECK-NOBMI-NEXT: pxor %xmm1, %xmm0439; CHECK-NOBMI-NEXT: retq440;441; CHECK-BMI2-SSE2-LABEL: shl_to_ror_eq_4xi32_s7_fail_no_p2:442; CHECK-BMI2-SSE2: # %bb.0:443; CHECK-BMI2-SSE2-NEXT: movdqa %xmm0, %xmm1444; CHECK-BMI2-SSE2-NEXT: pslld $7, %xmm1445; CHECK-BMI2-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0446; CHECK-BMI2-SSE2-NEXT: pcmpeqd %xmm1, %xmm0447; CHECK-BMI2-SSE2-NEXT: pcmpeqd %xmm1, %xmm1448; CHECK-BMI2-SSE2-NEXT: pxor %xmm1, %xmm0449; CHECK-BMI2-SSE2-NEXT: retq450;451; CHECK-AVX1-LABEL: shl_to_ror_eq_4xi32_s7_fail_no_p2:452; CHECK-AVX1: # %bb.0:453; CHECK-AVX1-NEXT: vpslld $7, %xmm0, %xmm1454; CHECK-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0455; CHECK-AVX1-NEXT: vpcmpeqd %xmm0, %xmm1, %xmm0456; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1457; CHECK-AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0458; CHECK-AVX1-NEXT: retq459;460; CHECK-AVX2-LABEL: shl_to_ror_eq_4xi32_s7_fail_no_p2:461; CHECK-AVX2: # %bb.0:462; CHECK-AVX2-NEXT: vpslld $7, %xmm0, %xmm1463; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [4294967168,4294967168,4294967168,4294967168]464; CHECK-AVX2-NEXT: vpand %xmm2, %xmm0, %xmm0465; CHECK-AVX2-NEXT: vpcmpeqd %xmm0, %xmm1, %xmm0466; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1467; CHECK-AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0468; CHECK-AVX2-NEXT: retq469;470; CHECK-AVX512-LABEL: shl_to_ror_eq_4xi32_s7_fail_no_p2:471; CHECK-AVX512: # %bb.0:472; CHECK-AVX512-NEXT: vpslld $7, %xmm0, %xmm1473; CHECK-AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0474; CHECK-AVX512-NEXT: vpcmpeqd %xmm0, %xmm1, %xmm0475; CHECK-AVX512-NEXT: vpternlogq $15, %xmm0, %xmm0, %xmm0476; CHECK-AVX512-NEXT: retq477 %shr = shl <4 x i32> %x, <i32 7, i32 7, i32 7, i32 7>478 %and = and <4 x i32> %x, <i32 4294967168, i32 4294967168, i32 4294967168, i32 4294967168>479 %r = icmp ne <4 x i32> %shr, %and480 ret <4 x i1> %r481}482 483define <4 x i1> @shr_to_ror_eq_4xi32_s4_fail_no_splat(<4 x i32> %x) {484; CHECK-NOBMI-LABEL: shr_to_ror_eq_4xi32_s4_fail_no_splat:485; CHECK-NOBMI: # %bb.0:486; CHECK-NOBMI-NEXT: movdqa %xmm0, %xmm1487; CHECK-NOBMI-NEXT: psrld $4, %xmm1488; CHECK-NOBMI-NEXT: movdqa %xmm0, %xmm2489; CHECK-NOBMI-NEXT: psrld $8, %xmm2490; CHECK-NOBMI-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,0],xmm1[2,0]491; CHECK-NOBMI-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,0]492; CHECK-NOBMI-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0493; CHECK-NOBMI-NEXT: pcmpeqd %xmm1, %xmm0494; CHECK-NOBMI-NEXT: pcmpeqd %xmm1, %xmm1495; CHECK-NOBMI-NEXT: pxor %xmm1, %xmm0496; CHECK-NOBMI-NEXT: retq497;498; CHECK-BMI2-SSE2-LABEL: shr_to_ror_eq_4xi32_s4_fail_no_splat:499; CHECK-BMI2-SSE2: # %bb.0:500; CHECK-BMI2-SSE2-NEXT: movdqa %xmm0, %xmm1501; CHECK-BMI2-SSE2-NEXT: psrld $4, %xmm1502; CHECK-BMI2-SSE2-NEXT: movdqa %xmm0, %xmm2503; CHECK-BMI2-SSE2-NEXT: psrld $8, %xmm2504; CHECK-BMI2-SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,0],xmm1[2,0]505; CHECK-BMI2-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,0]506; CHECK-BMI2-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0507; CHECK-BMI2-SSE2-NEXT: pcmpeqd %xmm1, %xmm0508; CHECK-BMI2-SSE2-NEXT: pcmpeqd %xmm1, %xmm1509; CHECK-BMI2-SSE2-NEXT: pxor %xmm1, %xmm0510; CHECK-BMI2-SSE2-NEXT: retq511;512; CHECK-AVX1-LABEL: shr_to_ror_eq_4xi32_s4_fail_no_splat:513; CHECK-AVX1: # %bb.0:514; CHECK-AVX1-NEXT: vpsrld $8, %xmm0, %xmm1515; CHECK-AVX1-NEXT: vpsrld $4, %xmm0, %xmm2516; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1,2,3,4,5],xmm1[6,7]517; CHECK-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0518; CHECK-AVX1-NEXT: vpcmpeqd %xmm0, %xmm1, %xmm0519; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1520; CHECK-AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0521; CHECK-AVX1-NEXT: retq522;523; CHECK-AVX2-LABEL: shr_to_ror_eq_4xi32_s4_fail_no_splat:524; CHECK-AVX2: # %bb.0:525; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1526; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [268435455,268435455,268435455,268435455]527; CHECK-AVX2-NEXT: vpand %xmm2, %xmm0, %xmm0528; CHECK-AVX2-NEXT: vpcmpeqd %xmm0, %xmm1, %xmm0529; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1530; CHECK-AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0531; CHECK-AVX2-NEXT: retq532;533; CHECK-AVX512-LABEL: shr_to_ror_eq_4xi32_s4_fail_no_splat:534; CHECK-AVX512: # %bb.0:535; CHECK-AVX512-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1536; CHECK-AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0537; CHECK-AVX512-NEXT: vpcmpeqd %xmm0, %xmm1, %xmm0538; CHECK-AVX512-NEXT: vpternlogq $15, %xmm0, %xmm0, %xmm0539; CHECK-AVX512-NEXT: retq540 %shr = lshr <4 x i32> %x, <i32 4, i32 4, i32 4, i32 8>541 %and = and <4 x i32> %x, <i32 268435455, i32 268435455, i32 268435455, i32 268435455>542 %r = icmp ne <4 x i32> %shr, %and543 ret <4 x i1> %r544}545 546define <16 x i1> @shl_to_ror_eq_16xi16_s8_fail_preserve_i16(<16 x i16> %x) {547; CHECK-NOBMI-LABEL: shl_to_ror_eq_16xi16_s8_fail_preserve_i16:548; CHECK-NOBMI: # %bb.0:549; CHECK-NOBMI-NEXT: movdqa %xmm0, %xmm2550; CHECK-NOBMI-NEXT: psllw $8, %xmm2551; CHECK-NOBMI-NEXT: movdqa %xmm1, %xmm3552; CHECK-NOBMI-NEXT: psllw $8, %xmm3553; CHECK-NOBMI-NEXT: movdqa {{.*#+}} xmm4 = [0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255]554; CHECK-NOBMI-NEXT: pand %xmm4, %xmm0555; CHECK-NOBMI-NEXT: pcmpeqw %xmm2, %xmm0556; CHECK-NOBMI-NEXT: pand %xmm4, %xmm1557; CHECK-NOBMI-NEXT: pcmpeqw %xmm3, %xmm1558; CHECK-NOBMI-NEXT: packsswb %xmm1, %xmm0559; CHECK-NOBMI-NEXT: pcmpeqd %xmm1, %xmm1560; CHECK-NOBMI-NEXT: pxor %xmm1, %xmm0561; CHECK-NOBMI-NEXT: retq562;563; CHECK-BMI2-SSE2-LABEL: shl_to_ror_eq_16xi16_s8_fail_preserve_i16:564; CHECK-BMI2-SSE2: # %bb.0:565; CHECK-BMI2-SSE2-NEXT: movdqa %xmm0, %xmm2566; CHECK-BMI2-SSE2-NEXT: psllw $8, %xmm2567; CHECK-BMI2-SSE2-NEXT: movdqa %xmm1, %xmm3568; CHECK-BMI2-SSE2-NEXT: psllw $8, %xmm3569; CHECK-BMI2-SSE2-NEXT: movdqa {{.*#+}} xmm4 = [0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255]570; CHECK-BMI2-SSE2-NEXT: pand %xmm4, %xmm0571; CHECK-BMI2-SSE2-NEXT: pcmpeqw %xmm2, %xmm0572; CHECK-BMI2-SSE2-NEXT: pand %xmm4, %xmm1573; CHECK-BMI2-SSE2-NEXT: pcmpeqw %xmm3, %xmm1574; CHECK-BMI2-SSE2-NEXT: packsswb %xmm1, %xmm0575; CHECK-BMI2-SSE2-NEXT: pcmpeqd %xmm1, %xmm1576; CHECK-BMI2-SSE2-NEXT: pxor %xmm1, %xmm0577; CHECK-BMI2-SSE2-NEXT: retq578;579; CHECK-AVX1-LABEL: shl_to_ror_eq_16xi16_s8_fail_preserve_i16:580; CHECK-AVX1: # %bb.0:581; CHECK-AVX1-NEXT: vpsllw $8, %xmm0, %xmm1582; CHECK-AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2583; CHECK-AVX1-NEXT: vpsllw $8, %xmm2, %xmm2584; CHECK-AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0585; CHECK-AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3586; CHECK-AVX1-NEXT: vpcmpeqw %xmm3, %xmm2, %xmm2587; CHECK-AVX1-NEXT: vpcmpeqw %xmm0, %xmm1, %xmm0588; CHECK-AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0589; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1590; CHECK-AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0591; CHECK-AVX1-NEXT: vzeroupper592; CHECK-AVX1-NEXT: retq593;594; CHECK-AVX2-LABEL: shl_to_ror_eq_16xi16_s8_fail_preserve_i16:595; CHECK-AVX2: # %bb.0:596; CHECK-AVX2-NEXT: vpsllw $8, %ymm0, %ymm1597; CHECK-AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0598; CHECK-AVX2-NEXT: vpcmpeqw %ymm0, %ymm1, %ymm0599; CHECK-AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1600; CHECK-AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0601; CHECK-AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1602; CHECK-AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0603; CHECK-AVX2-NEXT: vzeroupper604; CHECK-AVX2-NEXT: retq605;606; CHECK-AVX512-LABEL: shl_to_ror_eq_16xi16_s8_fail_preserve_i16:607; CHECK-AVX512: # %bb.0:608; CHECK-AVX512-NEXT: vpsllw $8, %ymm0, %ymm1609; CHECK-AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm0610; CHECK-AVX512-NEXT: vpcmpeqw %ymm0, %ymm1, %ymm0611; CHECK-AVX512-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero612; CHECK-AVX512-NEXT: vpmovdb %zmm0, %xmm0613; CHECK-AVX512-NEXT: vpternlogq $15, %xmm0, %xmm0, %xmm0614; CHECK-AVX512-NEXT: vzeroupper615; CHECK-AVX512-NEXT: retq616 %shr = shl <16 x i16> %x, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>617 %and = and <16 x i16> %x, <i16 4294967040, i16 4294967040, i16 4294967040, i16 4294967040, i16 4294967040, i16 4294967040, i16 4294967040, i16 4294967040, i16 4294967040, i16 4294967040, i16 4294967040, i16 4294967040, i16 4294967040, i16 4294967040, i16 4294967040, i16 4294967040>618 %r = icmp ne <16 x i16> %shr, %and619 ret <16 x i1> %r620}621 622define <16 x i8> @shl_s3_cmp_v16i8(<16 x i8> %x, <16 x i8> %y) {623; CHECK-NOBMI-LABEL: shl_s3_cmp_v16i8:624; CHECK-NOBMI: # %bb.0:625; CHECK-NOBMI-NEXT: pcmpeqb %xmm1, %xmm0626; CHECK-NOBMI-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0627; CHECK-NOBMI-NEXT: retq628;629; CHECK-BMI2-SSE2-LABEL: shl_s3_cmp_v16i8:630; CHECK-BMI2-SSE2: # %bb.0:631; CHECK-BMI2-SSE2-NEXT: pcmpeqb %xmm1, %xmm0632; CHECK-BMI2-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0633; CHECK-BMI2-SSE2-NEXT: retq634;635; CHECK-AVX12-LABEL: shl_s3_cmp_v16i8:636; CHECK-AVX12: # %bb.0:637; CHECK-AVX12-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0638; CHECK-AVX12-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0639; CHECK-AVX12-NEXT: retq640;641; CHECK-AVX512-LABEL: shl_s3_cmp_v16i8:642; CHECK-AVX512: # %bb.0:643; CHECK-AVX512-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0644; CHECK-AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0645; CHECK-AVX512-NEXT: retq646 %cmp = icmp eq <16 x i8> %x, %y647 %ext = sext <16 x i1> %cmp to <16 x i8>648 %shr = shl <16 x i8> %ext, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>649 ret <16 x i8> %shr650}651 652define <4 x i64> @shl_s31_cmp_v4f64(<4 x double> %x, <4 x double> %y) {653; CHECK-NOBMI-LABEL: shl_s31_cmp_v4f64:654; CHECK-NOBMI: # %bb.0:655; CHECK-NOBMI-NEXT: cmpeqpd %xmm3, %xmm1656; CHECK-NOBMI-NEXT: cmpeqpd %xmm2, %xmm0657; CHECK-NOBMI-NEXT: psllq $31, %xmm0658; CHECK-NOBMI-NEXT: psllq $31, %xmm1659; CHECK-NOBMI-NEXT: retq660;661; CHECK-BMI2-SSE2-LABEL: shl_s31_cmp_v4f64:662; CHECK-BMI2-SSE2: # %bb.0:663; CHECK-BMI2-SSE2-NEXT: cmpeqpd %xmm3, %xmm1664; CHECK-BMI2-SSE2-NEXT: cmpeqpd %xmm2, %xmm0665; CHECK-BMI2-SSE2-NEXT: psllq $31, %xmm0666; CHECK-BMI2-SSE2-NEXT: psllq $31, %xmm1667; CHECK-BMI2-SSE2-NEXT: retq668;669; CHECK-AVX1-LABEL: shl_s31_cmp_v4f64:670; CHECK-AVX1: # %bb.0:671; CHECK-AVX1-NEXT: vcmpeqpd %ymm1, %ymm0, %ymm0672; CHECK-AVX1-NEXT: vandpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0673; CHECK-AVX1-NEXT: retq674;675; CHECK-AVX2-LABEL: shl_s31_cmp_v4f64:676; CHECK-AVX2: # %bb.0:677; CHECK-AVX2-NEXT: vcmpeqpd %ymm1, %ymm0, %ymm0678; CHECK-AVX2-NEXT: vpsllq $31, %ymm0, %ymm0679; CHECK-AVX2-NEXT: retq680;681; CHECK-AVX512-LABEL: shl_s31_cmp_v4f64:682; CHECK-AVX512: # %bb.0:683; CHECK-AVX512-NEXT: vcmpeqpd %ymm1, %ymm0, %ymm0684; CHECK-AVX512-NEXT: vpsllq $31, %ymm0, %ymm0685; CHECK-AVX512-NEXT: retq686 %cmp = fcmp oeq <4 x double> %x, %y687 %ext = sext <4 x i1> %cmp to <4 x i64>688 %shr = shl <4 x i64> %ext, <i64 31, i64 31, i64 31, i64 31>689 ret <4 x i64> %shr690}691 692define <16 x i8> @shr_s1_cmp_v16i8(<16 x i8> %x, <16 x i8> %y) {693; CHECK-NOBMI-LABEL: shr_s1_cmp_v16i8:694; CHECK-NOBMI: # %bb.0:695; CHECK-NOBMI-NEXT: pcmpeqb %xmm1, %xmm0696; CHECK-NOBMI-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0697; CHECK-NOBMI-NEXT: retq698;699; CHECK-BMI2-SSE2-LABEL: shr_s1_cmp_v16i8:700; CHECK-BMI2-SSE2: # %bb.0:701; CHECK-BMI2-SSE2-NEXT: pcmpeqb %xmm1, %xmm0702; CHECK-BMI2-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0703; CHECK-BMI2-SSE2-NEXT: retq704;705; CHECK-AVX12-LABEL: shr_s1_cmp_v16i8:706; CHECK-AVX12: # %bb.0:707; CHECK-AVX12-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0708; CHECK-AVX12-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0709; CHECK-AVX12-NEXT: retq710;711; CHECK-AVX512-LABEL: shr_s1_cmp_v16i8:712; CHECK-AVX512: # %bb.0:713; CHECK-AVX512-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0714; CHECK-AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0715; CHECK-AVX512-NEXT: retq716 %cmp = icmp eq <16 x i8> %x, %y717 %ext = sext <16 x i1> %cmp to <16 x i8>718 %shr = lshr <16 x i8> %ext, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>719 ret <16 x i8> %shr720}721 722define <8 x i32> @shr_s9_cmp_v8i32(<8 x i32> %x, <8 x i32> %y) {723; CHECK-NOBMI-LABEL: shr_s9_cmp_v8i32:724; CHECK-NOBMI: # %bb.0:725; CHECK-NOBMI-NEXT: pcmpgtd %xmm3, %xmm1726; CHECK-NOBMI-NEXT: pcmpgtd %xmm2, %xmm0727; CHECK-NOBMI-NEXT: psrld $9, %xmm0728; CHECK-NOBMI-NEXT: psrld $9, %xmm1729; CHECK-NOBMI-NEXT: retq730;731; CHECK-BMI2-SSE2-LABEL: shr_s9_cmp_v8i32:732; CHECK-BMI2-SSE2: # %bb.0:733; CHECK-BMI2-SSE2-NEXT: pcmpgtd %xmm3, %xmm1734; CHECK-BMI2-SSE2-NEXT: pcmpgtd %xmm2, %xmm0735; CHECK-BMI2-SSE2-NEXT: psrld $9, %xmm0736; CHECK-BMI2-SSE2-NEXT: psrld $9, %xmm1737; CHECK-BMI2-SSE2-NEXT: retq738;739; CHECK-AVX1-LABEL: shr_s9_cmp_v8i32:740; CHECK-AVX1: # %bb.0:741; CHECK-AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2742; CHECK-AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3743; CHECK-AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2744; CHECK-AVX1-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0745; CHECK-AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0746; CHECK-AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0747; CHECK-AVX1-NEXT: retq748;749; CHECK-AVX2-LABEL: shr_s9_cmp_v8i32:750; CHECK-AVX2: # %bb.0:751; CHECK-AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0752; CHECK-AVX2-NEXT: vpsrld $9, %ymm0, %ymm0753; CHECK-AVX2-NEXT: retq754;755; CHECK-AVX512-LABEL: shr_s9_cmp_v8i32:756; CHECK-AVX512: # %bb.0:757; CHECK-AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0758; CHECK-AVX512-NEXT: vpsrld $9, %ymm0, %ymm0759; CHECK-AVX512-NEXT: retq760 %cmp = icmp sgt <8 x i32> %x, %y761 %ext = sext <8 x i1> %cmp to <8 x i32>762 %shr = lshr <8 x i32> %ext, <i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9>763 ret <8 x i32> %shr764}765 766define i1 @shr_to_shl_eq_i32_s5_fail_doesnt_add_up(i32 %x) {767; CHECK-LABEL: shr_to_shl_eq_i32_s5_fail_doesnt_add_up:768; CHECK: # %bb.0:769; CHECK-NEXT: movl %edi, %eax770; CHECK-NEXT: andl $7, %eax771; CHECK-NEXT: shrl $5, %edi772; CHECK-NEXT: cmpl %edi, %eax773; CHECK-NEXT: sete %al774; CHECK-NEXT: retq775 %and = and i32 %x, 7776 %sh = lshr i32 %x, 5777 %r = icmp eq i32 %and, %sh778 ret i1 %r779}780 781define i1 @shr_to_shl_eq_i8_s5_fail_doesnt_add_up2(i32 %x) {782; CHECK-LABEL: shr_to_shl_eq_i8_s5_fail_doesnt_add_up2:783; CHECK: # %bb.0:784; CHECK-NEXT: movl %edi, %eax785; CHECK-NEXT: andl $268435455, %eax # imm = 0xFFFFFFF786; CHECK-NEXT: shrl $5, %edi787; CHECK-NEXT: cmpl %edi, %eax788; CHECK-NEXT: sete %al789; CHECK-NEXT: retq790 %and = and i32 %x, 268435455791 %sh = lshr i32 %x, 5792 %r = icmp eq i32 %and, %sh793 ret i1 %r794}795 796define i1 @shr_to_shl_eq_i8_s5_fail_doesnt_add_up3(i32 %x) {797; CHECK-LABEL: shr_to_shl_eq_i8_s5_fail_doesnt_add_up3:798; CHECK: # %bb.0:799; CHECK-NEXT: movl %edi, %eax800; CHECK-NEXT: andl $67108863, %eax # imm = 0x3FFFFFF801; CHECK-NEXT: shrl $5, %edi802; CHECK-NEXT: cmpl %edi, %eax803; CHECK-NEXT: sete %al804; CHECK-NEXT: retq805 %and = and i32 %x, 67108863806 %sh = lshr i32 %x, 5807 %r = icmp eq i32 %and, %sh808 ret i1 %r809}810 811define i1 @shr_to_shl_eq_i8_s5_fail_doesnt_not_mask(i32 %x) {812; CHECK-LABEL: shr_to_shl_eq_i8_s5_fail_doesnt_not_mask:813; CHECK: # %bb.0:814; CHECK-NEXT: movl %edi, %eax815; CHECK-NEXT: andl $11, %eax816; CHECK-NEXT: shrl $5, %edi817; CHECK-NEXT: cmpl %edi, %eax818; CHECK-NEXT: sete %al819; CHECK-NEXT: retq820 %and = and i32 %x, 11821 %sh = lshr i32 %x, 5822 %r = icmp eq i32 %and, %sh823 ret i1 %r824}825 826define i1 @shl_to_shr_eq_i32_s9_fail_wrong_mask(i32 %x) {827; CHECK-LABEL: shl_to_shr_eq_i32_s9_fail_wrong_mask:828; CHECK: # %bb.0:829; CHECK-NEXT: movl %edi, %eax830; CHECK-NEXT: andl $511, %eax # imm = 0x1FF831; CHECK-NEXT: shll $9, %edi832; CHECK-NEXT: cmpl %edi, %eax833; CHECK-NEXT: sete %al834; CHECK-NEXT: retq835 %and = and i32 %x, 511836 %sh = shl i32 %x, 9837 %r = icmp eq i32 %and, %sh838 ret i1 %r839}840 841define i1 @shr_to_shl_eq_i32_s5_fail_wrong_mask(i32 %x) {842; CHECK-LABEL: shr_to_shl_eq_i32_s5_fail_wrong_mask:843; CHECK: # %bb.0:844; CHECK-NEXT: movl %edi, %eax845; CHECK-NEXT: andl $-32, %eax846; CHECK-NEXT: shrl $5, %edi847; CHECK-NEXT: cmpl %edi, %eax848; CHECK-NEXT: sete %al849; CHECK-NEXT: retq850 %and = and i32 %x, -32851 %sh = lshr i32 %x, 5852 %r = icmp eq i32 %and, %sh853 ret i1 %r854}855 856define i1 @shl_to_shr_eq_i32_s9_fail_doesnt_add_up(i32 %x) {857; CHECK-LABEL: shl_to_shr_eq_i32_s9_fail_doesnt_add_up:858; CHECK: # %bb.0:859; CHECK-NEXT: movl %edi, %eax860; CHECK-NEXT: andl $65024, %eax # imm = 0xFE00861; CHECK-NEXT: shll $9, %edi862; CHECK-NEXT: cmpl %edi, %eax863; CHECK-NEXT: sete %al864; CHECK-NEXT: retq865 %and = and i32 %x, 65024866 %sh = shl i32 %x, 9867 %r = icmp eq i32 %and, %sh868 ret i1 %r869}870 871define i1 @shl_to_shr_eq_i32_s9_fail_doesnt_add_up2(i32 %x) {872; CHECK-LABEL: shl_to_shr_eq_i32_s9_fail_doesnt_add_up2:873; CHECK: # %bb.0:874; CHECK-NEXT: movl %edi, %eax875; CHECK-NEXT: andl $-1024, %eax # imm = 0xFC00876; CHECK-NEXT: shll $9, %edi877; CHECK-NEXT: cmpl %edi, %eax878; CHECK-NEXT: sete %al879; CHECK-NEXT: retq880 %and = and i32 %x, -1024881 %sh = shl i32 %x, 9882 %r = icmp eq i32 %and, %sh883 ret i1 %r884}885 886define i1 @shl_to_shr_eq_i32_s9_fail_doesnt_add_up3(i32 %x) {887; CHECK-LABEL: shl_to_shr_eq_i32_s9_fail_doesnt_add_up3:888; CHECK: # %bb.0:889; CHECK-NEXT: movl %edi, %eax890; CHECK-NEXT: andl $-256, %eax891; CHECK-NEXT: shll $9, %edi892; CHECK-NEXT: cmpl %edi, %eax893; CHECK-NEXT: sete %al894; CHECK-NEXT: retq895 %and = and i32 %x, -256896 %sh = shl i32 %x, 9897 %r = icmp eq i32 %and, %sh898 ret i1 %r899}900 901define i1 @shl_to_shr_eq_i32_s9_fail_not_mask(i32 %x) {902; CHECK-LABEL: shl_to_shr_eq_i32_s9_fail_not_mask:903; CHECK: # %bb.0:904; CHECK-NEXT: movl %edi, %eax905; CHECK-NEXT: andl $-511, %eax # imm = 0xFE01906; CHECK-NEXT: shll $9, %edi907; CHECK-NEXT: cmpl %edi, %eax908; CHECK-NEXT: sete %al909; CHECK-NEXT: retq910 %and = and i32 %x, -511911 %sh = shl i32 %x, 9912 %r = icmp eq i32 %and, %sh913 ret i1 %r914}915 916define i1 @shl_to_shr_eq_i32_s9_fail_not_mask2(i32 %x) {917; CHECK-LABEL: shl_to_shr_eq_i32_s9_fail_not_mask2:918; CHECK: # %bb.0:919; CHECK-NEXT: movl %edi, %eax920; CHECK-NEXT: andl $-255, %eax921; CHECK-NEXT: shll $9, %edi922; CHECK-NEXT: cmpl %edi, %eax923; CHECK-NEXT: sete %al924; CHECK-NEXT: retq925 %and = and i32 %x, -255926 %sh = shl i32 %x, 9927 %r = icmp eq i32 %and, %sh928 ret i1 %r929}930 931define i1 @shl_to_shr_eq_i32_s9_fail_wrong_mask2(i32 %x) {932; CHECK-LABEL: shl_to_shr_eq_i32_s9_fail_wrong_mask2:933; CHECK: # %bb.0:934; CHECK-NEXT: movl %edi, %eax935; CHECK-NEXT: andl $8388607, %eax # imm = 0x7FFFFF936; CHECK-NEXT: shll $9, %edi937; CHECK-NEXT: cmpl %edi, %eax938; CHECK-NEXT: sete %al939; CHECK-NEXT: retq940 %and = and i32 %x, 8388607941 %sh = shl i32 %x, 9942 %r = icmp eq i32 %and, %sh943 ret i1 %r944}945 946define i1 @shl_to_shr_eq_i32_s9(i32 %x) {947; CHECK-LABEL: shl_to_shr_eq_i32_s9:948; CHECK: # %bb.0:949; CHECK-NEXT: movl %edi, %eax950; CHECK-NEXT: shrl $9, %eax951; CHECK-NEXT: andl $8388607, %edi # imm = 0x7FFFFF952; CHECK-NEXT: cmpl %eax, %edi953; CHECK-NEXT: sete %al954; CHECK-NEXT: retq955 %and = and i32 %x, -512956 %sh = shl i32 %x, 9957 %r = icmp eq i32 %and, %sh958 ret i1 %r959}960 961define i1 @shr_to_shl_eq_i32_s5(i32 %x) {962; CHECK-LABEL: shr_to_shl_eq_i32_s5:963; CHECK: # %bb.0:964; CHECK-NEXT: movl %edi, %eax965; CHECK-NEXT: shll $5, %eax966; CHECK-NEXT: andl $-32, %edi967; CHECK-NEXT: cmpl %eax, %edi968; CHECK-NEXT: sete %al969; CHECK-NEXT: retq970 %and = and i32 %x, 134217727971 %sh = lshr i32 %x, 5972 %r = icmp eq i32 %and, %sh973 ret i1 %r974}975 976define i1 @shr_to_rotate_eq_i32_s5(i32 %x) {977; CHECK-NOBMI-LABEL: shr_to_rotate_eq_i32_s5:978; CHECK-NOBMI: # %bb.0:979; CHECK-NOBMI-NEXT: movl %edi, %eax980; CHECK-NOBMI-NEXT: roll $4, %eax981; CHECK-NOBMI-NEXT: cmpl %eax, %edi982; CHECK-NOBMI-NEXT: sete %al983; CHECK-NOBMI-NEXT: retq984;985; CHECK-BMI2-LABEL: shr_to_rotate_eq_i32_s5:986; CHECK-BMI2: # %bb.0:987; CHECK-BMI2-NEXT: rorxl $28, %edi, %eax988; CHECK-BMI2-NEXT: cmpl %eax, %edi989; CHECK-BMI2-NEXT: sete %al990; CHECK-BMI2-NEXT: retq991 %and = and i32 %x, 268435455992 %sh = lshr i32 %x, 4993 %r = icmp eq i32 %and, %sh994 ret i1 %r995}996 997define i32 @issue108722(i32 %0) {998; CHECK-NOBMI-LABEL: issue108722:999; CHECK-NOBMI: # %bb.0:1000; CHECK-NOBMI-NEXT: movl %edi, %ecx1001; CHECK-NOBMI-NEXT: roll $24, %ecx1002; CHECK-NOBMI-NEXT: xorl %eax, %eax1003; CHECK-NOBMI-NEXT: cmpl %edi, %ecx1004; CHECK-NOBMI-NEXT: sete %al1005; CHECK-NOBMI-NEXT: retq1006;1007; CHECK-BMI2-LABEL: issue108722:1008; CHECK-BMI2: # %bb.0:1009; CHECK-BMI2-NEXT: rorxl $8, %edi, %ecx1010; CHECK-BMI2-NEXT: xorl %eax, %eax1011; CHECK-BMI2-NEXT: cmpl %edi, %ecx1012; CHECK-BMI2-NEXT: sete %al1013; CHECK-BMI2-NEXT: retq1014 %2 = tail call i32 @llvm.fshl.i32(i32 %0, i32 %0, i32 24)1015 %3 = icmp eq i32 %2, %01016 %4 = zext i1 %3 to i321017 ret i32 %41018}1019 1020 1021;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:1022; CHECK-AVX: {{.*}}1023; CHECK-NOBMI-SSE2: {{.*}}1024