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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown- -mcpu=core2 | FileCheck %s --check-prefix=X863; RUN: llc < %s -mtriple=x86_64-unknown- -mcpu=core2 | FileCheck %s --check-prefix=X644; RUN: llc < %s -mtriple=i686-unknown- -mcpu=i486 | FileCheck %s --check-prefix=I4865; RUN: llc < %s -mtriple=i686-unknown- -mcpu=znver1 | FileCheck %s --check-prefix=X866; RUN: llc < %s -mtriple=i686-unknown- -mcpu=lakemont | FileCheck %s --check-prefix=X867 8; Basic 64-bit cmpxchg9define void @t1(ptr nocapture %p) nounwind ssp {10; X86-LABEL: t1:11; X86: # %bb.0: # %entry12; X86-NEXT: pushl %ebx13; X86-NEXT: pushl %esi14; X86-NEXT: movl {{[0-9]+}}(%esp), %esi15; X86-NEXT: xorl %eax, %eax16; X86-NEXT: xorl %edx, %edx17; X86-NEXT: xorl %ecx, %ecx18; X86-NEXT: movl $1, %ebx19; X86-NEXT: lock cmpxchg8b (%esi)20; X86-NEXT: popl %esi21; X86-NEXT: popl %ebx22; X86-NEXT: retl23;24; X64-LABEL: t1:25; X64: # %bb.0: # %entry26; X64-NEXT: movl $1, %ecx27; X64-NEXT: xorl %eax, %eax28; X64-NEXT: lock cmpxchgq %rcx, (%rdi)29; X64-NEXT: retq30;31; I486-LABEL: t1:32; I486: # %bb.0: # %entry33; I486-NEXT: pushl %ebp34; I486-NEXT: movl %esp, %ebp35; I486-NEXT: andl $-8, %esp36; I486-NEXT: subl $8, %esp37; I486-NEXT: movl 8(%ebp), %eax38; I486-NEXT: movl $0, {{[0-9]+}}(%esp)39; I486-NEXT: movl $0, (%esp)40; I486-NEXT: movl %esp, %ecx41; I486-NEXT: pushl $542; I486-NEXT: pushl $543; I486-NEXT: pushl $044; I486-NEXT: pushl $145; I486-NEXT: pushl %ecx46; I486-NEXT: pushl %eax47; I486-NEXT: calll __atomic_compare_exchange_8@PLT48; I486-NEXT: addl $24, %esp49; I486-NEXT: movl %ebp, %esp50; I486-NEXT: popl %ebp51; I486-NEXT: retl52entry:53 %r = cmpxchg ptr %p, i64 0, i64 1 seq_cst seq_cst54 ret void55}56 57