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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=corei7-avx -mattr=+sse2 | FileCheck %s3; PR18774 5@NNTOT = weak global i32 0 ; <ptr> [#uses=1]6@G = weak global float 0.000000e+00 ; <ptr> [#uses=1]7 8define void @runcont(ptr %source) nounwind {9; CHECK-LABEL: runcont:10; CHECK: ## %bb.0: ## %entry11; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax12; CHECK-NEXT: movl L_NNTOT$non_lazy_ptr, %ecx13; CHECK-NEXT: movl (%ecx), %ecx14; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm015; CHECK-NEXT: xorl %edx, %edx16; CHECK-NEXT: .p2align 417; CHECK-NEXT: LBB0_1: ## %bb18; CHECK-NEXT: ## =>This Inner Loop Header: Depth=119; CHECK-NEXT: vcvtsi2ssl (%eax,%edx,4), %xmm7, %xmm120; CHECK-NEXT: vaddss %xmm0, %xmm1, %xmm021; CHECK-NEXT: incl %edx22; CHECK-NEXT: cmpl %edx, %ecx23; CHECK-NEXT: jne LBB0_124; CHECK-NEXT: ## %bb.2: ## %bb1325; CHECK-NEXT: movl L_G$non_lazy_ptr, %eax26; CHECK-NEXT: vmovss %xmm0, (%eax)27; CHECK-NEXT: retl28entry:29 %tmp10 = load i32, ptr @NNTOT, align 4 ; <i32> [#uses=1]30 br label %bb31 32bb: ; preds = %bb, %entry33 %neuron.0 = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]34 %thesum.0 = phi float [ 0.000000e+00, %entry ], [ %tmp6, %bb ] ; <float> [#uses=1]35 %tmp2 = getelementptr i32, ptr %source, i32 %neuron.0 ; <ptr> [#uses=1]36 %tmp3 = load i32, ptr %tmp2, align 4 ; <i32> [#uses=1]37 %tmp34 = sitofp i32 %tmp3 to float ; <float> [#uses=1]38 %tmp6 = fadd float %tmp34, %thesum.0 ; <float> [#uses=2]39 %indvar.next = add i32 %neuron.0, 1 ; <i32> [#uses=2]40 %exitcond = icmp eq i32 %indvar.next, %tmp10 ; <i1> [#uses=1]41 br i1 %exitcond, label %bb13, label %bb42 43bb13: ; preds = %bb44 store volatile float %tmp6, ptr @G, align 445 ret void46}47