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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' %s -o - | FileCheck %s3; This file tests the different cases what are involved when codegen prepare4; tries to get sign/zero extension out of the way of addressing mode.5; This tests require an actual target as addressing mode decisions depends6; on the target.7 8target datalayout = "e-i64:64-f80:128-s:64-n8:16:32:64-S128"9target triple = "x86_64-apple-macosx"10 11 12; Check that we correctly promote both operands of the promotable add.13define i8 @twoArgsPromotion(i32 %arg1, i32 %arg2) {14; CHECK-LABEL: define i8 @twoArgsPromotion(15; CHECK-SAME: i32 [[ARG1:%.*]], i32 [[ARG2:%.*]]) {16; CHECK-NEXT: [[PROMOTED:%.*]] = sext i32 [[ARG1]] to i6417; CHECK-NEXT: [[PROMOTED2:%.*]] = sext i32 [[ARG2]] to i6418; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED]], [[PROMOTED2]]19; CHECK-NEXT: [[BASE:%.*]] = inttoptr i64 [[ADD]] to ptr20; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[BASE]], align 121; CHECK-NEXT: ret i8 [[RES]]22;23 %add = add nsw i32 %arg1, %arg224 %sextadd = sext i32 %add to i6425 %base = inttoptr i64 %sextadd to ptr26 %res = load i8, ptr %base27 ret i8 %res28}29 30; Check that we do not promote both operands of the promotable add when31; the instruction will not be folded into the addressing mode.32; Otherwise, we will increase the number of instruction executed.33; (This is a heuristic of course, because the new sext could have been34; merged with something else.)35define i8 @twoArgsNoPromotion(i32 %arg1, i32 %arg2, ptr %base) {36; CHECK-LABEL: define i8 @twoArgsNoPromotion(37; CHECK-SAME: i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], ptr [[BASE:%.*]]) {38; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[ARG1]], [[ARG2]]39; CHECK-NEXT: [[SEXTADD:%.*]] = sext i32 [[ADD]] to i6440; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[SEXTADD]]41; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 142; CHECK-NEXT: ret i8 [[RES]]43;44 %add = add nsw i32 %arg1, %arg245 %sextadd = sext i32 %add to i6446 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd47 %res = load i8, ptr %arrayidx48 ret i8 %res49}50 51; Check that we do not promote when the related instruction does not have52; the nsw flag.53define i8 @noPromotion(i32 %arg1, i32 %arg2, ptr %base) {54; CHECK-LABEL: define i8 @noPromotion(55; CHECK-SAME: i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], ptr [[BASE:%.*]]) {56; CHECK-NEXT: [[ADD:%.*]] = add i32 [[ARG1]], [[ARG2]]57; CHECK-NEXT: [[SEXTADD:%.*]] = sext i32 [[ADD]] to i6458; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[SEXTADD]]59; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 160; CHECK-NEXT: ret i8 [[RES]]61;62 %add = add i32 %arg1, %arg263 %sextadd = sext i32 %add to i6464 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd65 %res = load i8, ptr %arrayidx66 ret i8 %res67}68 69; Check that we correctly promote constant arguments.70define i8 @oneArgPromotion(i32 %arg1, ptr %base) {71; CHECK-LABEL: define i8 @oneArgPromotion(72; CHECK-SAME: i32 [[ARG1:%.*]], ptr [[BASE:%.*]]) {73; CHECK-NEXT: [[PROMOTED:%.*]] = sext i32 [[ARG1]] to i6474; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED]], 175; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]]76; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 177; CHECK-NEXT: ret i8 [[RES]]78;79 %add = add nsw i32 %arg1, 180 %sextadd = sext i32 %add to i6481 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd82 %res = load i8, ptr %arrayidx83 ret i8 %res84}85 86; Check that we are able to merge a sign extension with a zero extension.87define i8 @oneArgPromotionZExt(i8 %arg1, ptr %base) {88; CHECK-LABEL: define i8 @oneArgPromotionZExt(89; CHECK-SAME: i8 [[ARG1:%.*]], ptr [[BASE:%.*]]) {90; CHECK-NEXT: [[PROMOTED2:%.*]] = zext i8 [[ARG1]] to i6491; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED2]], 192; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]]93; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 194; CHECK-NEXT: ret i8 [[RES]]95;96 %zext = zext i8 %arg1 to i3297 %add = add nsw i32 %zext, 198 %sextadd = sext i32 %add to i6499 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd100 %res = load i8, ptr %arrayidx101 ret i8 %res102}103 104; When promoting a constant zext, the IR builder returns a constant,105; not an instruction. Make sure this is properly handled. This used106; to crash.107; Note: The constant zext is promoted, but does not help matching108; more thing in the addressing mode. Therefore the modification is109; rolled back.110; Still, this test case exercises the desired code path.111define i8 @oneArgPromotionCstZExt(ptr %base) {112; CHECK-LABEL: define i8 @oneArgPromotionCstZExt(113; CHECK-SAME: ptr [[BASE:%.*]]) {114; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 0, 1115; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]]116; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1117; CHECK-NEXT: ret i8 [[RES]]118;119 %cst = zext i16 undef to i32120 %add = add nsw i32 %cst, 1121 %sextadd = sext i32 %add to i64122 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd123 %res = load i8, ptr %arrayidx124 ret i8 %res125}126 127; Check that we do not promote truncate when we cannot determine the128; bits that are dropped.129define i8 @oneArgPromotionBlockTrunc1(i32 %arg1, ptr %base) {130; CHECK-LABEL: define i8 @oneArgPromotionBlockTrunc1(131; CHECK-SAME: i32 [[ARG1:%.*]], ptr [[BASE:%.*]]) {132; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[ARG1]] to i8133; CHECK-NEXT: [[PROMOTED:%.*]] = sext i8 [[TRUNC]] to i64134; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED]], 1135; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]]136; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1137; CHECK-NEXT: ret i8 [[RES]]138;139 %trunc = trunc i32 %arg1 to i8140 %add = add nsw i8 %trunc, 1141 %sextadd = sext i8 %add to i64142 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd143 %res = load i8, ptr %arrayidx144 ret i8 %res145}146 147; Check that we do not promote truncate when we cannot determine all the148; bits that are dropped.149define i8 @oneArgPromotionBlockTrunc2(i16 %arg1, ptr %base) {150; CHECK-LABEL: define i8 @oneArgPromotionBlockTrunc2(151; CHECK-SAME: i16 [[ARG1:%.*]], ptr [[BASE:%.*]]) {152; CHECK-NEXT: [[SEXTARG1:%.*]] = sext i16 [[ARG1]] to i32153; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[SEXTARG1]] to i8154; CHECK-NEXT: [[PROMOTED:%.*]] = sext i8 [[TRUNC]] to i64155; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED]], 1156; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]]157; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1158; CHECK-NEXT: ret i8 [[RES]]159;160 %sextarg1 = sext i16 %arg1 to i32161 %trunc = trunc i32 %sextarg1 to i8162 %add = add nsw i8 %trunc, 1163 %sextadd = sext i8 %add to i64164 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd165 %res = load i8, ptr %arrayidx166 ret i8 %res167}168 169; Check that we are able to promote truncate when we know all the bits170; that are dropped.171define i8 @oneArgPromotionPassTruncKeepSExt(i1 %arg1, ptr %base) {172; CHECK-LABEL: define i8 @oneArgPromotionPassTruncKeepSExt(173; CHECK-SAME: i1 [[ARG1:%.*]], ptr [[BASE:%.*]]) {174; CHECK-NEXT: [[PROMOTED:%.*]] = sext i1 [[ARG1]] to i64175; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED]], 1176; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]]177; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1178; CHECK-NEXT: ret i8 [[RES]]179;180 %sextarg1 = sext i1 %arg1 to i32181 %trunc = trunc i32 %sextarg1 to i8182 %add = add nsw i8 %trunc, 1183 %sextadd = sext i8 %add to i64184 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd185 %res = load i8, ptr %arrayidx186 ret i8 %res187}188 189; On X86 truncate are free. Check that we are able to promote the add190; to be used as addressing mode and that we insert a truncate for the other191; use.192define i8 @oneArgPromotionTruncInsert(i8 %arg1, ptr %base) {193; CHECK-LABEL: define i8 @oneArgPromotionTruncInsert(194; CHECK-SAME: i8 [[ARG1:%.*]], ptr [[BASE:%.*]]) {195; CHECK-NEXT: [[PROMOTED2:%.*]] = sext i8 [[ARG1]] to i64196; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED2]], 1197; CHECK-NEXT: [[PROMOTED:%.*]] = trunc i64 [[ADD]] to i8198; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]]199; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1200; CHECK-NEXT: [[FINALRES:%.*]] = add i8 [[RES]], [[PROMOTED]]201; CHECK-NEXT: ret i8 [[FINALRES]]202;203 %add = add nsw i8 %arg1, 1204 %sextadd = sext i8 %add to i64205 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd206 %res = load i8, ptr %arrayidx207 %finalres = add i8 %res, %add208 ret i8 %finalres209}210 211; Cannot sext from a larger type than the promoted type.212define i8 @oneArgPromotionLargerType(i128 %arg1, ptr %base) {213; CHECK-LABEL: define i8 @oneArgPromotionLargerType(214; CHECK-SAME: i128 [[ARG1:%.*]], ptr [[BASE:%.*]]) {215; CHECK-NEXT: [[TRUNC:%.*]] = trunc i128 [[ARG1]] to i8216; CHECK-NEXT: [[PROMOTED2:%.*]] = sext i8 [[TRUNC]] to i64217; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED2]], 1218; CHECK-NEXT: [[PROMOTED:%.*]] = trunc i64 [[ADD]] to i8219; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]]220; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1221; CHECK-NEXT: [[FINALRES:%.*]] = add i8 [[RES]], [[PROMOTED]]222; CHECK-NEXT: ret i8 [[FINALRES]]223;224 %trunc = trunc i128 %arg1 to i8225 %add = add nsw i8 %trunc, 1226 %sextadd = sext i8 %add to i64227 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd228 %res = load i8, ptr %arrayidx229 %finalres = add i8 %res, %add230 ret i8 %finalres231}232 233; Use same inserted trunc234; On X86 truncate are free. Check that we are able to promote the add235; to be used as addressing mode and that we insert a truncate for236; *all* the other uses.237define i8 @oneArgPromotionTruncInsertSeveralUse(i8 %arg1, ptr %base) {238; CHECK-LABEL: define i8 @oneArgPromotionTruncInsertSeveralUse(239; CHECK-SAME: i8 [[ARG1:%.*]], ptr [[BASE:%.*]]) {240; CHECK-NEXT: [[PROMOTED2:%.*]] = sext i8 [[ARG1]] to i64241; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED2]], 1242; CHECK-NEXT: [[PROMOTED:%.*]] = trunc i64 [[ADD]] to i8243; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]]244; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1245; CHECK-NEXT: [[ALMOSTFINALRES:%.*]] = add i8 [[RES]], [[PROMOTED]]246; CHECK-NEXT: [[FINALRES:%.*]] = add i8 [[ALMOSTFINALRES]], [[PROMOTED]]247; CHECK-NEXT: ret i8 [[FINALRES]]248;249 %add = add nsw i8 %arg1, 1250 %sextadd = sext i8 %add to i64251 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd252 %res = load i8, ptr %arrayidx253 %almostfinalres = add i8 %res, %add254 %finalres = add i8 %almostfinalres, %add255 ret i8 %finalres256}257 258; Check that the promoted instruction is used for all uses of the original259; sign extension.260define i64 @oneArgPromotionSExtSeveralUse(i8 %arg1, ptr %base) {261; CHECK-LABEL: define i64 @oneArgPromotionSExtSeveralUse(262; CHECK-SAME: i8 [[ARG1:%.*]], ptr [[BASE:%.*]]) {263; CHECK-NEXT: [[PROMOTED:%.*]] = sext i8 [[ARG1]] to i64264; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED]], 1265; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]]266; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1267; CHECK-NEXT: [[ALMOSTFINALRES:%.*]] = zext i8 [[RES]] to i64268; CHECK-NEXT: [[FINALRES:%.*]] = add i64 [[ALMOSTFINALRES]], [[ADD]]269; CHECK-NEXT: ret i64 [[FINALRES]]270;271 %add = add nsw i8 %arg1, 1272 %sextadd = sext i8 %add to i64273 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd274 %res = load i8, ptr %arrayidx275 %almostfinalres = zext i8 %res to i64276 %finalres = add i64 %almostfinalres, %sextadd277 ret i64 %finalres278}279 280; Check all types of rollback mechanism.281; For this test, the sign extension stays in place.282; However, the matching process goes until promoting both the operands283; of the first promotable add implies.284; At this point the rollback mechanism kicks in and restores the states285; until the addressing mode matcher is able to match something: in that286; case promote nothing.287; Along the way, the promotion mechanism involves:288; - Mutating the type of %promotableadd1 and %promotableadd2.289; - Creating a sext for %arg1 and %arg2.290; - Creating a trunc for a use of %promotableadd1.291; - Replacing a bunch of uses.292; - Setting the operands of the promoted instruction with the promoted values.293; - Moving instruction around (mainly sext when promoting instruction).294; Each type of those promotions has to be undo at least once during this295; specific test.296define i8 @twoArgsPromotionNest(i32 %arg1, i32 %arg2, ptr %base) {297; CHECK-LABEL: define i8 @twoArgsPromotionNest(298; CHECK-SAME: i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], ptr [[BASE:%.*]]) {299; CHECK-NEXT: [[PROMOTABLEADD1:%.*]] = add nsw i32 [[ARG1]], [[ARG2]]300; CHECK-NEXT: [[PROMOTABLEADD2:%.*]] = add nsw i32 [[PROMOTABLEADD1]], [[PROMOTABLEADD1]]301; CHECK-NEXT: [[SEXTADD:%.*]] = sext i32 [[PROMOTABLEADD2]] to i64302; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[SEXTADD]]303; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1304; CHECK-NEXT: ret i8 [[RES]]305;306 %promotableadd1 = add nsw i32 %arg1, %arg2307 %promotableadd2 = add nsw i32 %promotableadd1, %promotableadd1308 %sextadd = sext i32 %promotableadd2 to i64309 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd310 %res = load i8, ptr %arrayidx311 ret i8 %res312}313 314; Test the InstructionRemover undo, which was the only one not315; kicked in the previous test.316; The matcher first promotes the add, removes the trunc and promotes317; the sext of arg1.318; Then, the matcher cannot use an addressing mode r + r + r, thus it319; rolls back.320define i8 @twoArgsNoPromotionRemove(i1 %arg1, i8 %arg2, ptr %base) {321; CHECK-LABEL: define i8 @twoArgsNoPromotionRemove(322; CHECK-SAME: i1 [[ARG1:%.*]], i8 [[ARG2:%.*]], ptr [[BASE:%.*]]) {323; CHECK-NEXT: [[SEXTARG1:%.*]] = sext i1 [[ARG1]] to i32324; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[SEXTARG1]] to i8325; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[TRUNC]], [[ARG2]]326; CHECK-NEXT: [[SEXTADD:%.*]] = sext i8 [[ADD]] to i64327; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[SEXTADD]]328; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1329; CHECK-NEXT: ret i8 [[RES]]330;331 %sextarg1 = sext i1 %arg1 to i32332 %trunc = trunc i32 %sextarg1 to i8333 %add = add nsw i8 %trunc, %arg2334 %sextadd = sext i8 %add to i64335 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd336 %res = load i8, ptr %arrayidx337 ret i8 %res338}339 340; Ensure that when the profitability checks kicks in, the IR is not modified341; will IgnoreProfitability is on.342; The profitabily check happens when a candidate instruction has several uses.343; The matcher will create a new matcher for each use and check if the344; instruction is in the list of the matched instructions of this new matcher.345; All changes made by the new matchers must be dropped before pursuing346; otherwise the state of the original matcher will be wrong.347;348; Without the profitability check, when checking for the second use of349; arrayidx, the matcher promotes everything all the way to %arg1, %arg2.350; Check that we did not promote anything in the final matching.351;352; <rdar://problem/16020230>353; BB then354; BB else355define i32 @checkProfitability(i32 %arg1, i32 %arg2, i1 %test) {356; CHECK-LABEL: define i32 @checkProfitability(357; CHECK-SAME: i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i1 [[TEST:%.*]]) {358; CHECK-NEXT: [[SHL:%.*]] = shl nsw i32 [[ARG1]], 1359; CHECK-NEXT: [[ADD1:%.*]] = add nsw i32 [[SHL]], [[ARG2]]360; CHECK-NEXT: [[SEXTIDX1:%.*]] = sext i32 [[ADD1]] to i64361; CHECK-NEXT: br i1 [[TEST]], label %[[THEN:.*]], label %[[ELSE:.*]]362; CHECK: [[THEN]]:363; CHECK-NEXT: [[SUNKADDR:%.*]] = inttoptr i64 [[SEXTIDX1]] to ptr364; CHECK-NEXT: [[SUNKADDR13:%.*]] = getelementptr i8, ptr [[SUNKADDR]], i64 48365; CHECK-NEXT: [[RES1:%.*]] = load i32, ptr [[SUNKADDR13]], align 4366; CHECK-NEXT: br label %[[END:.*]]367; CHECK: [[ELSE]]:368; CHECK-NEXT: [[SUNKADDR17:%.*]] = inttoptr i64 [[SEXTIDX1]] to ptr369; CHECK-NEXT: [[SUNKADDR18:%.*]] = getelementptr i8, ptr [[SUNKADDR17]], i64 48370; CHECK-NEXT: [[RES2:%.*]] = load i32, ptr [[SUNKADDR18]], align 4371; CHECK-NEXT: br label %[[END]]372; CHECK: [[END]]:373; CHECK-NEXT: [[TMP:%.*]] = phi i32 [ [[RES1]], %[[THEN]] ], [ [[RES2]], %[[ELSE]] ]374; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[SEXTIDX1]] to i32375; CHECK-NEXT: [[RES:%.*]] = add i32 [[TMP]], [[TMP1]]376; CHECK-NEXT: [[ADDR:%.*]] = inttoptr i32 [[RES]] to ptr377; CHECK-NEXT: [[FINAL:%.*]] = load i32, ptr [[ADDR]], align 4378; CHECK-NEXT: ret i32 [[FINAL]]379;380 %shl = shl nsw i32 %arg1, 1381 %add1 = add nsw i32 %shl, %arg2382 %sextidx1 = sext i32 %add1 to i64383 %tmpptr = inttoptr i64 %sextidx1 to ptr384 %arrayidx1 = getelementptr i32, ptr %tmpptr, i64 12385 br i1 %test, label %then, label %else386then:387 %res1 = load i32, ptr %arrayidx1388 br label %end389else:390 %res2 = load i32, ptr %arrayidx1391 br label %end392end:393 %tmp = phi i32 [%res1, %then], [%res2, %else]394 %res = add i32 %tmp, %add1395 %addr = inttoptr i32 %res to ptr396 %final = load i32, ptr %addr397 ret i32 %final398}399 400%struct.dns_packet = type { i32, i32, %union.anon }401%union.anon = type { i32 }402 403@a = common global i32 0, align 4404@b = common global i16 0, align 2405 406; We used to crash on this function because we did not return the right407; promoted instruction for %conv.i.408; Make sure we generate the right code now.409; %conv.i is used twice and only one of its use is being promoted.410; Use it at the starting point for the matching.411define signext i16 @fn3(ptr nocapture readonly %P) {412; CHECK-LABEL: define signext i16 @fn3(413; CHECK-SAME: ptr readonly captures(none) [[P:%.*]]) {414; CHECK-NEXT: [[ENTRY:.*]]:415; CHECK-NEXT: br label %[[WHILE_BODY_I_I:.*]]416; CHECK: [[WHILE_BODY_I_I]]:417; CHECK-NEXT: [[SRC_ADDR_0_I_I:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[INC_I_I:%.*]], %[[WHILE_BODY_I_I]] ]418; CHECK-NEXT: [[INC_I_I]] = add i16 [[SRC_ADDR_0_I_I]], 1419; CHECK-NEXT: [[IDXPROM_I_I:%.*]] = sext i16 [[SRC_ADDR_0_I_I]] to i64420; CHECK-NEXT: [[SUNKADDR:%.*]] = getelementptr inbounds i8, ptr [[P]], i64 [[IDXPROM_I_I]]421; CHECK-NEXT: [[SUNKADDR2:%.*]] = getelementptr inbounds i8, ptr [[SUNKADDR]], i64 8422; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr [[SUNKADDR2]], align 1423; CHECK-NEXT: [[CONV2_I_I:%.*]] = zext i8 [[TMP1]] to i32424; CHECK-NEXT: [[AND_I_I:%.*]] = and i32 [[CONV2_I_I]], 15425; CHECK-NEXT: store i32 [[AND_I_I]], ptr @a, align 4426; CHECK-NEXT: [[TOBOOL_I_I:%.*]] = icmp eq i32 [[AND_I_I]], 0427; CHECK-NEXT: br i1 [[TOBOOL_I_I]], label %[[WHILE_BODY_I_I]], label %[[FN1_EXIT_I:.*]]428; CHECK: [[FN1_EXIT_I]]:429; CHECK-NEXT: [[CONV_I:%.*]] = zext i16 [[INC_I_I]] to i32430; CHECK-NEXT: [[PROMOTED4:%.*]] = zext i16 [[INC_I_I]] to i64431; CHECK-NEXT: [[SUNKADDR5:%.*]] = getelementptr i8, ptr [[P]], i64 [[PROMOTED4]]432; CHECK-NEXT: [[SUNKADDR6:%.*]] = getelementptr i8, ptr [[SUNKADDR5]], i64 7433; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[SUNKADDR6]], align 1434; CHECK-NEXT: [[CONV2_I:%.*]] = sext i8 [[TMP2]] to i16435; CHECK-NEXT: store i16 [[CONV2_I]], ptr @b, align 2436; CHECK-NEXT: [[SUB4_I:%.*]] = sub nsw i32 0, [[CONV_I]]437; CHECK-NEXT: [[CONV5_I:%.*]] = zext i16 [[CONV2_I]] to i32438; CHECK-NEXT: [[CMP_I:%.*]] = icmp sgt i32 [[CONV5_I]], [[SUB4_I]]439; CHECK-NEXT: br i1 [[CMP_I]], label %[[IF_THEN_I:.*]], label %[[FN2_EXIT:.*]]440; CHECK: [[IF_THEN_I]]:441; CHECK-NEXT: [[END_I:%.*]] = getelementptr inbounds [[STRUCT_DNS_PACKET:%.*]], ptr [[P]], i64 0, i32 1442; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[END_I]], align 4443; CHECK-NEXT: [[SUB7_I:%.*]] = add i32 [[TMP3]], 65535444; CHECK-NEXT: [[CONV8_I:%.*]] = trunc i32 [[SUB7_I]] to i16445; CHECK-NEXT: br label %[[FN2_EXIT]]446; CHECK: [[FN2_EXIT]]:447; CHECK-NEXT: [[RETVAL_0_I:%.*]] = phi i16 [ [[CONV8_I]], %[[IF_THEN_I]] ], [ undef, %[[FN1_EXIT_I]] ]448; CHECK-NEXT: ret i16 [[RETVAL_0_I]]449;450entry:451 %tmp = getelementptr inbounds %struct.dns_packet, ptr %P, i64 0, i32 2452 br label %while.body.i.i453 454while.body.i.i: ; preds = %while.body.i.i, %entry455 %src.addr.0.i.i = phi i16 [ 0, %entry ], [ %inc.i.i, %while.body.i.i ]456 %inc.i.i = add i16 %src.addr.0.i.i, 1457 %idxprom.i.i = sext i16 %src.addr.0.i.i to i64458 %arrayidx.i.i = getelementptr inbounds [0 x i8], ptr %tmp, i64 0, i64 %idxprom.i.i459 %tmp1 = load i8, ptr %arrayidx.i.i, align 1460 %conv2.i.i = zext i8 %tmp1 to i32461 %and.i.i = and i32 %conv2.i.i, 15462 store i32 %and.i.i, ptr @a, align 4463 %tobool.i.i = icmp eq i32 %and.i.i, 0464 br i1 %tobool.i.i, label %while.body.i.i, label %fn1.exit.i465 466fn1.exit.i: ; preds = %while.body.i.i467 %inc.i.i.lcssa = phi i16 [ %inc.i.i, %while.body.i.i ]468 %conv.i = zext i16 %inc.i.i.lcssa to i32469 %sub.i = add nsw i32 %conv.i, -1470 %idxprom.i = sext i32 %sub.i to i64471 %arrayidx.i = getelementptr inbounds [0 x i8], ptr %tmp, i64 0, i64 %idxprom.i472 %tmp2 = load i8, ptr %arrayidx.i, align 1473 %conv2.i = sext i8 %tmp2 to i16474 store i16 %conv2.i, ptr @b, align 2475 %sub4.i = sub nsw i32 0, %conv.i476 %conv5.i = zext i16 %conv2.i to i32477 %cmp.i = icmp sgt i32 %conv5.i, %sub4.i478 br i1 %cmp.i, label %if.then.i, label %fn2.exit479 480if.then.i: ; preds = %fn1.exit.i481 %end.i = getelementptr inbounds %struct.dns_packet, ptr %P, i64 0, i32 1482 %tmp3 = load i32, ptr %end.i, align 4483 %sub7.i = add i32 %tmp3, 65535484 %conv8.i = trunc i32 %sub7.i to i16485 br label %fn2.exit486 487fn2.exit: ; preds = %if.then.i, %fn1.exit.i488 %retval.0.i = phi i16 [ %conv8.i, %if.then.i ], [ undef, %fn1.exit.i ]489 ret i16 %retval.0.i490}491 492; Check that we do not promote an extension if the non-wrapping flag does not493; match the kind of the extension.494define i8 @noPromotionFlag(i32 %arg1, i32 %arg2) {495; CHECK-LABEL: define i8 @noPromotionFlag(496; CHECK-SAME: i32 [[ARG1:%.*]], i32 [[ARG2:%.*]]) {497; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[ARG1]], [[ARG2]]498; CHECK-NEXT: [[ZEXTADD:%.*]] = zext i32 [[ADD]] to i64499; CHECK-NEXT: [[BASE:%.*]] = inttoptr i64 [[ZEXTADD]] to ptr500; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[BASE]], align 1501; CHECK-NEXT: ret i8 [[RES]]502;503 %add = add nsw i32 %arg1, %arg2504 %zextadd = zext i32 %add to i64505 %base = inttoptr i64 %zextadd to ptr506 %res = load i8, ptr %base507 ret i8 %res508}509 510; Check that we correctly promote both operands of the promotable add with zext.511define i8 @twoArgsPromotionZExt(i32 %arg1, i32 %arg2) {512; CHECK-LABEL: define i8 @twoArgsPromotionZExt(513; CHECK-SAME: i32 [[ARG1:%.*]], i32 [[ARG2:%.*]]) {514; CHECK-NEXT: [[PROMOTED:%.*]] = zext i32 [[ARG1]] to i64515; CHECK-NEXT: [[PROMOTED2:%.*]] = zext i32 [[ARG2]] to i64516; CHECK-NEXT: [[ADD:%.*]] = add nuw i64 [[PROMOTED]], [[PROMOTED2]]517; CHECK-NEXT: [[BASE:%.*]] = inttoptr i64 [[ADD]] to ptr518; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[BASE]], align 1519; CHECK-NEXT: ret i8 [[RES]]520;521 %add = add nuw i32 %arg1, %arg2522 %zextadd = zext i32 %add to i64523 %base = inttoptr i64 %zextadd to ptr524 %res = load i8, ptr %base525 ret i8 %res526}527 528; Check that we correctly promote constant arguments.529define i8 @oneArgPromotionNegativeCstZExt(i8 %arg1, ptr %base) {530; CHECK-LABEL: define i8 @oneArgPromotionNegativeCstZExt(531; CHECK-SAME: i8 [[ARG1:%.*]], ptr [[BASE:%.*]]) {532; CHECK-NEXT: [[PROMOTED:%.*]] = zext i8 [[ARG1]] to i64533; CHECK-NEXT: [[ADD:%.*]] = add nuw i64 [[PROMOTED]], 255534; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]]535; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1536; CHECK-NEXT: ret i8 [[RES]]537;538 %add = add nuw i8 %arg1, -1539 %zextadd = zext i8 %add to i64540 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %zextadd541 %res = load i8, ptr %arrayidx542 ret i8 %res543}544 545; Check that we are able to merge two zero extensions.546define i8 @oneArgPromotionZExtZExt(i8 %arg1, ptr %base) {547; CHECK-LABEL: define i8 @oneArgPromotionZExtZExt(548; CHECK-SAME: i8 [[ARG1:%.*]], ptr [[BASE:%.*]]) {549; CHECK-NEXT: [[PROMOTED2:%.*]] = zext i8 [[ARG1]] to i64550; CHECK-NEXT: [[ADD:%.*]] = add nuw i64 [[PROMOTED2]], 1551; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]]552; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1553; CHECK-NEXT: ret i8 [[RES]]554;555 %zext = zext i8 %arg1 to i32556 %add = add nuw i32 %zext, 1557 %zextadd = zext i32 %add to i64558 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %zextadd559 %res = load i8, ptr %arrayidx560 ret i8 %res561}562 563; Check that we do not promote truncate when the dropped bits564; are of a different kind.565define i8 @oneArgPromotionBlockTruncZExt(i1 %arg1, ptr %base) {566; CHECK-LABEL: define i8 @oneArgPromotionBlockTruncZExt(567; CHECK-SAME: i1 [[ARG1:%.*]], ptr [[BASE:%.*]]) {568; CHECK-NEXT: [[SEXTARG1:%.*]] = sext i1 [[ARG1]] to i32569; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[SEXTARG1]] to i8570; CHECK-NEXT: [[PROMOTED:%.*]] = zext i8 [[TRUNC]] to i64571; CHECK-NEXT: [[ADD:%.*]] = add nuw i64 [[PROMOTED]], 1572; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]]573; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1574; CHECK-NEXT: ret i8 [[RES]]575;576 %sextarg1 = sext i1 %arg1 to i32577 %trunc = trunc i32 %sextarg1 to i8578 %add = add nuw i8 %trunc, 1579 %zextadd = zext i8 %add to i64580 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %zextadd581 %res = load i8, ptr %arrayidx582 ret i8 %res583}584 585; Check that we are able to promote truncate when we know all the bits586; that are dropped.587define i8 @oneArgPromotionPassTruncZExt(i1 %arg1, ptr %base) {588; CHECK-LABEL: define i8 @oneArgPromotionPassTruncZExt(589; CHECK-SAME: i1 [[ARG1:%.*]], ptr [[BASE:%.*]]) {590; CHECK-NEXT: [[PROMOTED2:%.*]] = zext i1 [[ARG1]] to i64591; CHECK-NEXT: [[ADD:%.*]] = add nuw i64 [[PROMOTED2]], 1592; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]]593; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1594; CHECK-NEXT: ret i8 [[RES]]595;596 %sextarg1 = zext i1 %arg1 to i32597 %trunc = trunc i32 %sextarg1 to i8598 %add = add nuw i8 %trunc, 1599 %zextadd = zext i8 %add to i64600 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %zextadd601 %res = load i8, ptr %arrayidx602 ret i8 %res603}604 605; Check that we do not promote sext with zext.606define i8 @oneArgPromotionBlockSExtZExt(i1 %arg1, ptr %base) {607; CHECK-LABEL: define i8 @oneArgPromotionBlockSExtZExt(608; CHECK-SAME: i1 [[ARG1:%.*]], ptr [[BASE:%.*]]) {609; CHECK-NEXT: [[SEXTARG1:%.*]] = sext i1 [[ARG1]] to i8610; CHECK-NEXT: [[PROMOTED:%.*]] = zext i8 [[SEXTARG1]] to i64611; CHECK-NEXT: [[ADD:%.*]] = add nuw i64 [[PROMOTED]], 1612; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]]613; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1614; CHECK-NEXT: ret i8 [[RES]]615;616 %sextarg1 = sext i1 %arg1 to i8617 %add = add nuw i8 %sextarg1, 1618 %zextadd = zext i8 %add to i64619 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %zextadd620 %res = load i8, ptr %arrayidx621 ret i8 %res622}623 624; Check that we replace the deleted sext with the promoted value.625define void @pr70938(ptr %f) {626; CHECK-LABEL: define void @pr70938(627; CHECK-SAME: ptr [[F:%.*]]) {628; CHECK-NEXT: [[ENTRY:.*:]]629; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 0, 1630; CHECK-NEXT: [[SUNKADDR:%.*]] = mul i64 [[ADD]], 2631; CHECK-NEXT: [[SUNKADDR1:%.*]] = getelementptr i8, ptr [[F]], i64 [[SUNKADDR]]632; CHECK-NEXT: [[SUNKADDR2:%.*]] = getelementptr i8, ptr [[SUNKADDR1]], i64 1633; CHECK-NEXT: store i8 0, ptr [[SUNKADDR2]], align 1634; CHECK-NEXT: ret void635;636entry:637 %add = add nsw i32 0, 1638 %idxprom3 = sext i32 %add to i64639 %arrayidx4 = getelementptr [2 x [1 x [2 x i8]]], ptr %f, i64 0, i64 %idxprom3640 %arrayidx8 = getelementptr [2 x i8], ptr %arrayidx4, i64 0, i64 %idxprom3641 br label %if.end642 643if.end: ; preds = %entry644 store i8 0, ptr %arrayidx8, align 1645 ret void646}647 648define void @pr119429() {649; CHECK-LABEL: define void @pr119429() {650; CHECK-NEXT: [[ENTRY:.*:]]651; CHECK-NEXT: [[AND:%.*]] = and i64 0, 0652; CHECK-NEXT: [[SUNKADDR:%.*]] = inttoptr i64 [[AND]] to ptr653; CHECK-NEXT: [[SUNKADDR1:%.*]] = mul i64 [[AND]], 2654; CHECK-NEXT: [[SUNKADDR2:%.*]] = getelementptr i8, ptr [[SUNKADDR]], i64 [[SUNKADDR1]]655; CHECK-NEXT: store i64 0, ptr [[SUNKADDR2]], align 8656; CHECK-NEXT: ret void657;658entry:659 %and = and i32 0, 0660 %conv1 = zext i32 %and to i64661 %sub = add i64 %conv1, 0662 br label %if.end663 664if.end:665 %mul = shl i64 %sub, 1666 %add = add i64 %mul, %conv1667 %ptr = inttoptr i64 %add to ptr668 store i64 0, ptr %ptr, align 8669 ret void670}671