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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX14; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX25; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX5126 7define <4 x double> @concat_rint_v4f64_v2f64(<2 x double> %a0, <2 x double> %a1) {8; SSE-LABEL: concat_rint_v4f64_v2f64:9; SSE: # %bb.0:10; SSE-NEXT: roundpd $4, %xmm0, %xmm011; SSE-NEXT: roundpd $4, %xmm1, %xmm112; SSE-NEXT: retq13;14; AVX-LABEL: concat_rint_v4f64_v2f64:15; AVX: # %bb.0:16; AVX-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm017; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm018; AVX-NEXT: vroundpd $4, %ymm0, %ymm019; AVX-NEXT: retq20 %v0 = call <2 x double> @llvm.rint.v2f64(<2 x double> %a0)21 %v1 = call <2 x double> @llvm.rint.v2f64(<2 x double> %a1)22 %res = shufflevector <2 x double> %v0, <2 x double> %v1, <4 x i32> <i32 0, i32 1, i32 2, i32 3>23 ret <4 x double> %res24}25 26define <8 x float> @concat_rint_v8f32_v4f32(<4 x float> %a0, <4 x float> %a1) {27; SSE-LABEL: concat_rint_v8f32_v4f32:28; SSE: # %bb.0:29; SSE-NEXT: roundps $4, %xmm0, %xmm030; SSE-NEXT: roundps $4, %xmm1, %xmm131; SSE-NEXT: retq32;33; AVX-LABEL: concat_rint_v8f32_v4f32:34; AVX: # %bb.0:35; AVX-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm036; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm037; AVX-NEXT: vroundps $4, %ymm0, %ymm038; AVX-NEXT: retq39 %v0 = call <4 x float> @llvm.rint.v4f32(<4 x float> %a0)40 %v1 = call <4 x float> @llvm.rint.v4f32(<4 x float> %a1)41 %res = shufflevector <4 x float> %v0, <4 x float> %v1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>42 ret <8 x float> %res43}44 45define <8 x double> @concat_rint_v8f64_v2f64(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, <2 x double> %a3) {46; SSE-LABEL: concat_rint_v8f64_v2f64:47; SSE: # %bb.0:48; SSE-NEXT: roundpd $4, %xmm0, %xmm049; SSE-NEXT: roundpd $4, %xmm1, %xmm150; SSE-NEXT: roundpd $4, %xmm2, %xmm251; SSE-NEXT: roundpd $4, %xmm3, %xmm352; SSE-NEXT: retq53;54; AVX1-LABEL: concat_rint_v8f64_v2f64:55; AVX1: # %bb.0:56; AVX1-NEXT: # kill: def $xmm2 killed $xmm2 def $ymm257; AVX1-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm058; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm059; AVX1-NEXT: vroundpd $4, %ymm0, %ymm060; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm161; AVX1-NEXT: vroundpd $4, %ymm1, %ymm162; AVX1-NEXT: retq63;64; AVX2-LABEL: concat_rint_v8f64_v2f64:65; AVX2: # %bb.0:66; AVX2-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm067; AVX2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm068; AVX2-NEXT: vroundpd $4, %ymm0, %ymm069; AVX2-NEXT: # kill: def $xmm2 killed $xmm2 def $ymm270; AVX2-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm171; AVX2-NEXT: vroundpd $4, %ymm1, %ymm172; AVX2-NEXT: retq73;74; AVX512-LABEL: concat_rint_v8f64_v2f64:75; AVX512: # %bb.0:76; AVX512-NEXT: # kill: def $xmm2 killed $xmm2 def $ymm277; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm078; AVX512-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm279; AVX512-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm080; AVX512-NEXT: vinsertf64x4 $1, %ymm2, %zmm0, %zmm081; AVX512-NEXT: vrndscalepd $4, %zmm0, %zmm082; AVX512-NEXT: retq83 %v0 = call <2 x double> @llvm.rint.v2f64(<2 x double> %a0)84 %v1 = call <2 x double> @llvm.rint.v2f64(<2 x double> %a1)85 %v2 = call <2 x double> @llvm.rint.v2f64(<2 x double> %a2)86 %v3 = call <2 x double> @llvm.rint.v2f64(<2 x double> %a3)87 %r01 = shufflevector <2 x double> %v0, <2 x double> %v1, <4 x i32> <i32 0, i32 1, i32 2, i32 3>88 %r23 = shufflevector <2 x double> %v2, <2 x double> %v3, <4 x i32> <i32 0, i32 1, i32 2, i32 3>89 %res = shufflevector <4 x double> %r01, <4 x double> %r23, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>90 ret <8 x double> %res91}92 93define <16 x float> @concat_rint_v16f32_v4f32(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, <4 x float> %a3) {94; SSE-LABEL: concat_rint_v16f32_v4f32:95; SSE: # %bb.0:96; SSE-NEXT: roundps $4, %xmm0, %xmm097; SSE-NEXT: roundps $4, %xmm1, %xmm198; SSE-NEXT: roundps $4, %xmm2, %xmm299; SSE-NEXT: roundps $4, %xmm3, %xmm3100; SSE-NEXT: retq101;102; AVX1-LABEL: concat_rint_v16f32_v4f32:103; AVX1: # %bb.0:104; AVX1-NEXT: # kill: def $xmm2 killed $xmm2 def $ymm2105; AVX1-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0106; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0107; AVX1-NEXT: vroundps $4, %ymm0, %ymm0108; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm1109; AVX1-NEXT: vroundps $4, %ymm1, %ymm1110; AVX1-NEXT: retq111;112; AVX2-LABEL: concat_rint_v16f32_v4f32:113; AVX2: # %bb.0:114; AVX2-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0115; AVX2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0116; AVX2-NEXT: vroundps $4, %ymm0, %ymm0117; AVX2-NEXT: # kill: def $xmm2 killed $xmm2 def $ymm2118; AVX2-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm1119; AVX2-NEXT: vroundps $4, %ymm1, %ymm1120; AVX2-NEXT: retq121;122; AVX512-LABEL: concat_rint_v16f32_v4f32:123; AVX512: # %bb.0:124; AVX512-NEXT: # kill: def $xmm2 killed $xmm2 def $ymm2125; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0126; AVX512-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2127; AVX512-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0128; AVX512-NEXT: vinsertf64x4 $1, %ymm2, %zmm0, %zmm0129; AVX512-NEXT: vrndscaleps $4, %zmm0, %zmm0130; AVX512-NEXT: retq131 %v0 = call <4 x float> @llvm.rint.v4f32(<4 x float> %a0)132 %v1 = call <4 x float> @llvm.rint.v4f32(<4 x float> %a1)133 %v2 = call <4 x float> @llvm.rint.v4f32(<4 x float> %a2)134 %v3 = call <4 x float> @llvm.rint.v4f32(<4 x float> %a3)135 %r01 = shufflevector <4 x float> %v0, <4 x float> %v1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>136 %r23 = shufflevector <4 x float> %v2, <4 x float> %v3, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>137 %res = shufflevector <8 x float> %r01, <8 x float> %r23, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>138 ret <16 x float> %res139}140 141define <8 x double> @concat_rint_v8f64_v4f64(<4 x double> %a0, <4 x double> %a1) {142; SSE-LABEL: concat_rint_v8f64_v4f64:143; SSE: # %bb.0:144; SSE-NEXT: roundpd $4, %xmm0, %xmm0145; SSE-NEXT: roundpd $4, %xmm1, %xmm1146; SSE-NEXT: roundpd $4, %xmm2, %xmm2147; SSE-NEXT: roundpd $4, %xmm3, %xmm3148; SSE-NEXT: retq149;150; AVX1OR2-LABEL: concat_rint_v8f64_v4f64:151; AVX1OR2: # %bb.0:152; AVX1OR2-NEXT: vroundpd $4, %ymm0, %ymm0153; AVX1OR2-NEXT: vroundpd $4, %ymm1, %ymm1154; AVX1OR2-NEXT: retq155;156; AVX512-LABEL: concat_rint_v8f64_v4f64:157; AVX512: # %bb.0:158; AVX512-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0159; AVX512-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0160; AVX512-NEXT: vrndscalepd $4, %zmm0, %zmm0161; AVX512-NEXT: retq162 %v0 = call <4 x double> @llvm.rint.v4f64(<4 x double> %a0)163 %v1 = call <4 x double> @llvm.rint.v4f64(<4 x double> %a1)164 %res = shufflevector <4 x double> %v0, <4 x double> %v1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>165 ret <8 x double> %res166}167 168define <16 x float> @concat_rint_v16f32_v8f32(<8 x float> %a0, <8 x float> %a1) {169; SSE-LABEL: concat_rint_v16f32_v8f32:170; SSE: # %bb.0:171; SSE-NEXT: roundps $4, %xmm0, %xmm0172; SSE-NEXT: roundps $4, %xmm1, %xmm1173; SSE-NEXT: roundps $4, %xmm2, %xmm2174; SSE-NEXT: roundps $4, %xmm3, %xmm3175; SSE-NEXT: retq176;177; AVX1OR2-LABEL: concat_rint_v16f32_v8f32:178; AVX1OR2: # %bb.0:179; AVX1OR2-NEXT: vroundps $4, %ymm0, %ymm0180; AVX1OR2-NEXT: vroundps $4, %ymm1, %ymm1181; AVX1OR2-NEXT: retq182;183; AVX512-LABEL: concat_rint_v16f32_v8f32:184; AVX512: # %bb.0:185; AVX512-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0186; AVX512-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0187; AVX512-NEXT: vrndscaleps $4, %zmm0, %zmm0188; AVX512-NEXT: retq189 %v0 = call <8 x float> @llvm.rint.v8f32(<8 x float> %a0)190 %v1 = call <8 x float> @llvm.rint.v8f32(<8 x float> %a1)191 %res = shufflevector <8 x float> %v0, <8 x float> %v1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>192 ret <16 x float> %res193}194