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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=sse2 | FileCheck %s3 4; Source file looks something like this:5;6; typedef int AAA[100][100];7;8; void testCombineMultiplies(AAA a,int lll)9; {10; int LOC = lll + 5;11;12; a[LOC][LOC] = 11;13;14; a[LOC][20] = 22;15; a[LOC+20][20] = 33;16; }17;18; We want to make sure we don't generate 2 multiply instructions,19; one for a[LOC][] and one for a[LOC+20]. visitMUL in DAGCombiner.cpp20; should combine the instructions in such a way to avoid the extra21; multiply.22;23; Output looks roughly like this:24;25; movl 8(%esp), %eax26; movl 12(%esp), %ecx27; imull $400, %ecx, %edx # imm = 0x19028; leal (%edx,%eax), %esi29; movl $11, 2020(%esi,%ecx,4)30; movl $22, 2080(%edx,%eax)31; movl $33, 10080(%edx,%eax)32 33; Function Attrs: nounwind34define void @testCombineMultiplies(ptr nocapture %a, i32 %lll) nounwind {35; CHECK-LABEL: testCombineMultiplies:36; CHECK: # %bb.0: # %entry37; CHECK-NEXT: pushl %esi38; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax39; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx40; CHECK-NEXT: imull $400, %ecx, %edx # imm = 0x19041; CHECK-NEXT: leal (%edx,%eax), %esi42; CHECK-NEXT: movl $11, 2020(%esi,%ecx,4)43; CHECK-NEXT: movl $22, 2080(%edx,%eax)44; CHECK-NEXT: movl $33, 10080(%edx,%eax)45; CHECK-NEXT: popl %esi46; CHECK-NEXT: retl47entry:48 %add = add nsw i32 %lll, 549 %arrayidx1 = getelementptr inbounds [100 x i32], ptr %a, i32 %add, i32 %add50 store i32 11, ptr %arrayidx1, align 451 %arrayidx3 = getelementptr inbounds [100 x i32], ptr %a, i32 %add, i32 2052 store i32 22, ptr %arrayidx3, align 453 %add4 = add nsw i32 %lll, 2554 %arrayidx6 = getelementptr inbounds [100 x i32], ptr %a, i32 %add4, i32 2055 store i32 33, ptr %arrayidx6, align 456 ret void57}58 59 60; Test for the same optimization on vector multiplies.61;62; Source looks something like this:63;64; typedef int v4int __attribute__((__vector_size__(16)));65;66; v4int x;67; v4int v2, v3;68; void testCombineMultiplies_splat(v4int v1) {69; v2 = (v1 + (v4int){ 11, 11, 11, 11 }) * (v4int) {22, 22, 22, 22};70; v3 = (v1 + (v4int){ 33, 33, 33, 33 }) * (v4int) {22, 22, 22, 22};71; x = (v1 + (v4int){ 11, 11, 11, 11 });72; }73;74; Output looks something like this:75;76; testCombineMultiplies_splat: # @testCombineMultiplies_splat77; # %bb.0: # %entry78; movdqa .LCPI1_0, %xmm1 # xmm1 = [11,11,11,11]79; paddd %xmm0, %xmm180; movdqa .LCPI1_1, %xmm2 # xmm2 = [22,22,22,22]81; pshufd $245, %xmm0, %xmm3 # xmm3 = xmm0[1,1,3,3]82; pmuludq %xmm2, %xmm083; pshufd $232, %xmm0, %xmm0 # xmm0 = xmm0[0,2,2,3]84; pmuludq %xmm2, %xmm385; pshufd $232, %xmm3, %xmm2 # xmm2 = xmm3[0,2,2,3]86; punpckldq %xmm2, %xmm0 # xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]87; movdqa .LCPI1_2, %xmm2 # xmm2 = [242,242,242,242]88; paddd %xmm0, %xmm289; paddd .LCPI1_3, %xmm090; movdqa %xmm2, v291; movdqa %xmm0, v392; movdqa %xmm1, x93; retl94;95; Again, we want to make sure we don't generate two different multiplies.96; We should have a single multiply for "v1 * {22, 22, 22, 22}" (made up of two97; pmuludq instructions), followed by two adds. Without this optimization, we'd98; do 2 adds, followed by 2 multiplies (i.e. 4 pmuludq instructions).99 100@v2 = common global <4 x i32> zeroinitializer, align 16101@v3 = common global <4 x i32> zeroinitializer, align 16102@x = common global <4 x i32> zeroinitializer, align 16103 104; Function Attrs: nounwind105define void @testCombineMultiplies_splat(<4 x i32> %v1) nounwind {106; CHECK-LABEL: testCombineMultiplies_splat:107; CHECK: # %bb.0: # %entry108; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [11,11,11,11]109; CHECK-NEXT: paddd %xmm0, %xmm1110; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [22,22,22,22]111; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]112; CHECK-NEXT: pmuludq %xmm2, %xmm0113; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]114; CHECK-NEXT: pmuludq %xmm2, %xmm3115; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]116; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]117; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [242,242,242,242]118; CHECK-NEXT: paddd %xmm0, %xmm2119; CHECK-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0120; CHECK-NEXT: movdqa %xmm2, v2121; CHECK-NEXT: movdqa %xmm0, v3122; CHECK-NEXT: movdqa %xmm1, x123; CHECK-NEXT: retl124entry:125 %add1 = add <4 x i32> %v1, <i32 11, i32 11, i32 11, i32 11>126 %mul1 = mul <4 x i32> %add1, <i32 22, i32 22, i32 22, i32 22>127 %add2 = add <4 x i32> %v1, <i32 33, i32 33, i32 33, i32 33>128 %mul2 = mul <4 x i32> %add2, <i32 22, i32 22, i32 22, i32 22>129 store <4 x i32> %mul1, ptr @v2, align 16130 store <4 x i32> %mul2, ptr @v3, align 16131 store <4 x i32> %add1, ptr @x, align 16132 ret void133}134 135; Finally, check the non-splatted vector case. This is very similar136; to the previous test case, except for the vector values.137 138; Function Attrs: nounwind139define void @testCombineMultiplies_non_splat(<4 x i32> %v1) nounwind {140; CHECK-LABEL: testCombineMultiplies_non_splat:141; CHECK: # %bb.0: # %entry142; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [11,22,33,44]143; CHECK-NEXT: paddd %xmm0, %xmm1144; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]145; CHECK-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [22,33,44,55]146; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]147; CHECK-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm2 # [33,u,55,u]148; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]149; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]150; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [242,726,1452,2420]151; CHECK-NEXT: paddd %xmm0, %xmm2152; CHECK-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0153; CHECK-NEXT: movdqa %xmm2, v2154; CHECK-NEXT: movdqa %xmm0, v3155; CHECK-NEXT: movdqa %xmm1, x156; CHECK-NEXT: retl157entry:158 %add1 = add <4 x i32> %v1, <i32 11, i32 22, i32 33, i32 44>159 %mul1 = mul <4 x i32> %add1, <i32 22, i32 33, i32 44, i32 55>160 %add2 = add <4 x i32> %v1, <i32 33, i32 44, i32 55, i32 66>161 %mul2 = mul <4 x i32> %add2, <i32 22, i32 33, i32 44, i32 55>162 store <4 x i32> %mul1, ptr @v2, align 16163 store <4 x i32> %mul2, ptr @v3, align 16164 store <4 x i32> %add1, ptr @x, align 16165 ret void166}167