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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s -check-prefixes=CHECK,SSE3; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -early-live-intervals | FileCheck %s -check-prefixes=CHECK,SSE4; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7-avx | FileCheck %s -check-prefixes=CHECK,AVX,AVX15; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v3 | FileCheck %s -check-prefixes=CHECK,AVX,AVX26 7define i32 @or_self(i32 %x) {8; CHECK-LABEL: or_self:9; CHECK: # %bb.0:10; CHECK-NEXT: movl %edi, %eax11; CHECK-NEXT: retq12 %or = or i32 %x, %x13 ret i32 %or14}15 16define <4 x i32> @or_self_vec(<4 x i32> %x) {17; CHECK-LABEL: or_self_vec:18; CHECK: # %bb.0:19; CHECK-NEXT: retq20 %or = or <4 x i32> %x, %x21 ret <4 x i32> %or22}23 24; fold (or x, c) -> c iff (x & ~c) == 025 26define <2 x i64> @or_zext_v2i32(<2 x i32> %a0) {27; SSE-LABEL: or_zext_v2i32:28; SSE: # %bb.0:29; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295]30; SSE-NEXT: retq31;32; AVX-LABEL: or_zext_v2i32:33; AVX: # %bb.0:34; AVX-NEXT: vmovddup {{.*#+}} xmm0 = [4294967295,4294967295]35; AVX-NEXT: # xmm0 = mem[0,0]36; AVX-NEXT: retq37 %1 = zext <2 x i32> %a0 to <2 x i64>38 %2 = or <2 x i64> %1, <i64 4294967295, i64 4294967295>39 ret <2 x i64> %240}41 42define <4 x i32> @or_zext_v4i16(<4 x i16> %a0) {43; SSE-LABEL: or_zext_v4i16:44; SSE: # %bb.0:45; SSE-NEXT: movaps {{.*#+}} xmm0 = [65535,65535,65535,65535]46; SSE-NEXT: retq47;48; AVX-LABEL: or_zext_v4i16:49; AVX: # %bb.0:50; AVX-NEXT: vbroadcastss {{.*#+}} xmm0 = [65535,65535,65535,65535]51; AVX-NEXT: retq52 %1 = zext <4 x i16> %a0 to <4 x i32>53 %2 = or <4 x i32> %1, <i32 65535, i32 65535, i32 65535, i32 65535>54 ret <4 x i32> %255}56 57; fold (or (and X, C1), (and (or X, Y), C2)) -> (or (and X, C1|C2), (and Y, C2))58 59define i32 @or_and_and_i32(i32 %x, i32 %y) {60; CHECK-LABEL: or_and_and_i32:61; CHECK: # %bb.0:62; CHECK-NEXT: movl %edi, %eax63; CHECK-NEXT: andl $-11, %esi64; CHECK-NEXT: andl $-3, %eax65; CHECK-NEXT: orl %esi, %eax66; CHECK-NEXT: retq67 %xy = or i32 %x, %y68 %mx = and i32 %x, 869 %mxy = and i32 %xy, -1170 %r = or i32 %mx, %mxy71 ret i32 %r72}73 74define i64 @or_and_and_commute_i64(i64 %x, i64 %y) {75; CHECK-LABEL: or_and_and_commute_i64:76; CHECK: # %bb.0:77; CHECK-NEXT: movq %rdi, %rax78; CHECK-NEXT: orq %rsi, %rax79; CHECK-NEXT: andq $-3, %rax80; CHECK-NEXT: retq81 %xy = or i64 %x, %y82 %mx = and i64 %x, 883 %mxy = and i64 %xy, -384 %r = or i64 %mxy, %mx85 ret i64 %r86}87 88define <4 x i32> @or_and_and_v4i32(<4 x i32> %x, <4 x i32> %y) {89; SSE-LABEL: or_and_and_v4i32:90; SSE: # %bb.0:91; SSE-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm192; SSE-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm093; SSE-NEXT: orps %xmm1, %xmm094; SSE-NEXT: retq95;96; AVX-LABEL: or_and_and_v4i32:97; AVX: # %bb.0:98; AVX-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm199; AVX-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0100; AVX-NEXT: vorps %xmm1, %xmm0, %xmm0101; AVX-NEXT: retq102 %xy = or <4 x i32> %x, %y103 %mx = and <4 x i32> %x, <i32 2, i32 4, i32 8, i32 16>104 %mxy = and <4 x i32> %xy, <i32 1, i32 -1, i32 -5, i32 -25>105 %r = or <4 x i32> %mx, %mxy106 ret <4 x i32> %r107}108 109define i32 @or_and_and_multiuse_i32(i32 %x, i32 %y) nounwind {110; CHECK-LABEL: or_and_and_multiuse_i32:111; CHECK: # %bb.0:112; CHECK-NEXT: pushq %rbx113; CHECK-NEXT: # kill: def $esi killed $esi def $rsi114; CHECK-NEXT: # kill: def $edi killed $edi def $rdi115; CHECK-NEXT: orl %edi, %esi116; CHECK-NEXT: andl $8, %edi117; CHECK-NEXT: andl $-11, %esi118; CHECK-NEXT: leal (%rdi,%rsi), %ebx119; CHECK-NEXT: movl %esi, %edi120; CHECK-NEXT: callq use_i32@PLT121; CHECK-NEXT: movl %ebx, %eax122; CHECK-NEXT: popq %rbx123; CHECK-NEXT: retq124 %xy = or i32 %x, %y125 %mx = and i32 %x, 8126 %mxy = and i32 %xy, -11127 %r = or i32 %mx, %mxy128 call void @use_i32(i32 %mxy)129 ret i32 %r130}131 132define i32 @or_and_multiuse_and_i32(i32 %x, i32 %y) nounwind {133; CHECK-LABEL: or_and_multiuse_and_i32:134; CHECK: # %bb.0:135; CHECK-NEXT: pushq %rbx136; CHECK-NEXT: # kill: def $esi killed $esi def $rsi137; CHECK-NEXT: # kill: def $edi killed $edi def $rdi138; CHECK-NEXT: orl %edi, %esi139; CHECK-NEXT: andl $8, %edi140; CHECK-NEXT: andl $-11, %esi141; CHECK-NEXT: leal (%rsi,%rdi), %ebx142; CHECK-NEXT: # kill: def $edi killed $edi killed $rdi143; CHECK-NEXT: callq use_i32@PLT144; CHECK-NEXT: movl %ebx, %eax145; CHECK-NEXT: popq %rbx146; CHECK-NEXT: retq147 %xy = or i32 %x, %y148 %mx = and i32 %x, 8149 %mxy = and i32 %xy, -11150 %r = or i32 %mx, %mxy151 call void @use_i32(i32 %mx)152 ret i32 %r153}154 155define i32 @or_and_multiuse_and_multiuse_i32(i32 %x, i32 %y) nounwind {156; CHECK-LABEL: or_and_multiuse_and_multiuse_i32:157; CHECK: # %bb.0:158; CHECK-NEXT: pushq %rbp159; CHECK-NEXT: pushq %rbx160; CHECK-NEXT: pushq %rax161; CHECK-NEXT: movl %esi, %ebx162; CHECK-NEXT: # kill: def $edi killed $edi def $rdi163; CHECK-NEXT: orl %edi, %ebx164; CHECK-NEXT: andl $8, %edi165; CHECK-NEXT: andl $-11, %ebx166; CHECK-NEXT: leal (%rdi,%rbx), %ebp167; CHECK-NEXT: # kill: def $edi killed $edi killed $rdi168; CHECK-NEXT: callq use_i32@PLT169; CHECK-NEXT: movl %ebx, %edi170; CHECK-NEXT: callq use_i32@PLT171; CHECK-NEXT: movl %ebp, %eax172; CHECK-NEXT: addq $8, %rsp173; CHECK-NEXT: popq %rbx174; CHECK-NEXT: popq %rbp175; CHECK-NEXT: retq176 %xy = or i32 %x, %y177 %mx = and i32 %x, 8178 %mxy = and i32 %xy, -11179 %r = or i32 %mx, %mxy180 call void @use_i32(i32 %mx)181 call void @use_i32(i32 %mxy)182 ret i32 %r183}184 185define i64 @or_build_pair_not(i32 %a0, i32 %a1) {186; CHECK-LABEL: or_build_pair_not:187; CHECK: # %bb.0:188; CHECK-NEXT: # kill: def $esi killed $esi def $rsi189; CHECK-NEXT: shlq $32, %rsi190; CHECK-NEXT: movl %edi, %eax191; CHECK-NEXT: orq %rsi, %rax192; CHECK-NEXT: notq %rax193; CHECK-NEXT: retq194 %n0 = xor i32 %a0, -1195 %n1 = xor i32 %a1, -1196 %x0 = zext i32 %n0 to i64197 %x1 = zext i32 %n1 to i64198 %hi = shl i64 %x1, 32199 %r = or i64 %hi, %x0200 ret i64 %r201}202 203define i64 @PR89533(<64 x i8> %a0) {204; SSE-LABEL: PR89533:205; SSE: # %bb.0:206; SSE-NEXT: movdqa {{.*#+}} xmm4 = [95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95]207; SSE-NEXT: pcmpeqb %xmm4, %xmm0208; SSE-NEXT: pmovmskb %xmm0, %eax209; SSE-NEXT: xorl $65535, %eax # imm = 0xFFFF210; SSE-NEXT: pcmpeqb %xmm4, %xmm1211; SSE-NEXT: pmovmskb %xmm1, %ecx212; SSE-NEXT: notl %ecx213; SSE-NEXT: shll $16, %ecx214; SSE-NEXT: orl %eax, %ecx215; SSE-NEXT: pcmpeqb %xmm4, %xmm2216; SSE-NEXT: pmovmskb %xmm2, %eax217; SSE-NEXT: xorl $65535, %eax # imm = 0xFFFF218; SSE-NEXT: pcmpeqb %xmm4, %xmm3219; SSE-NEXT: pmovmskb %xmm3, %edx220; SSE-NEXT: notl %edx221; SSE-NEXT: shll $16, %edx222; SSE-NEXT: orl %eax, %edx223; SSE-NEXT: shlq $32, %rdx224; SSE-NEXT: orq %rcx, %rdx225; SSE-NEXT: movl $64, %eax226; SSE-NEXT: rep bsfq %rdx, %rax227; SSE-NEXT: retq228;229; AVX1-LABEL: PR89533:230; AVX1: # %bb.0:231; AVX1-NEXT: vbroadcastss {{.*#+}} xmm2 = [95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95]232; AVX1-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm3233; AVX1-NEXT: vpmovmskb %xmm3, %eax234; AVX1-NEXT: xorl $65535, %eax # imm = 0xFFFF235; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0236; AVX1-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm0237; AVX1-NEXT: vpmovmskb %xmm0, %ecx238; AVX1-NEXT: notl %ecx239; AVX1-NEXT: shll $16, %ecx240; AVX1-NEXT: orl %eax, %ecx241; AVX1-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm0242; AVX1-NEXT: vpmovmskb %xmm0, %eax243; AVX1-NEXT: xorl $65535, %eax # imm = 0xFFFF244; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm0245; AVX1-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm0246; AVX1-NEXT: vpmovmskb %xmm0, %edx247; AVX1-NEXT: notl %edx248; AVX1-NEXT: shll $16, %edx249; AVX1-NEXT: orl %eax, %edx250; AVX1-NEXT: shlq $32, %rdx251; AVX1-NEXT: orq %rcx, %rdx252; AVX1-NEXT: movl $64, %eax253; AVX1-NEXT: rep bsfq %rdx, %rax254; AVX1-NEXT: vzeroupper255; AVX1-NEXT: retq256;257; AVX2-LABEL: PR89533:258; AVX2: # %bb.0:259; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95,95]260; AVX2-NEXT: vpcmpeqb %ymm2, %ymm0, %ymm0261; AVX2-NEXT: vpmovmskb %ymm0, %eax262; AVX2-NEXT: vpcmpeqb %ymm2, %ymm1, %ymm0263; AVX2-NEXT: vpmovmskb %ymm0, %ecx264; AVX2-NEXT: shlq $32, %rcx265; AVX2-NEXT: orq %rax, %rcx266; AVX2-NEXT: notq %rcx267; AVX2-NEXT: xorl %eax, %eax268; AVX2-NEXT: tzcntq %rcx, %rax269; AVX2-NEXT: vzeroupper270; AVX2-NEXT: retq271 %cmp = icmp ne <64 x i8> %a0, <i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95, i8 95>272 %mask = bitcast <64 x i1> %cmp to i64273 %tz = tail call i64 @llvm.cttz.i64(i64 %mask, i1 false)274 ret i64 %tz275}276 277declare void @use_i32(i32)278 279