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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX5 6declare <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32>, <4 x i32>)7 8define <8 x i16> @combine_packss_v4i32_signsplat(<4 x i32> %a0, <4 x i32> %a1) {9; SSE-LABEL: combine_packss_v4i32_signsplat:10; SSE: # %bb.0:11; SSE-NEXT: pcmpgtd %xmm1, %xmm012; SSE-NEXT: pcmpeqd %xmm1, %xmm113; SSE-NEXT: packssdw %xmm1, %xmm014; SSE-NEXT: retq15;16; AVX-LABEL: combine_packss_v4i32_signsplat:17; AVX: # %bb.0:18; AVX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm019; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm120; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm021; AVX-NEXT: retq22 %cmp = icmp sgt <4 x i32> %a0, %a123 %ext = sext <4 x i1> %cmp to <4 x i32>24 %pack = call <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32> %ext, <4 x i32> splat (i32 -1))25 %signsplat = ashr <8 x i16> %pack, splat (i16 15)26 ret <8 x i16> %signsplat27}28 29define <8 x i16> @combine_packss_v4i32_freeze_signsplat(<4 x i32> %a0, <4 x i32> %a1) {30; SSE-LABEL: combine_packss_v4i32_freeze_signsplat:31; SSE: # %bb.0:32; SSE-NEXT: pcmpgtd %xmm1, %xmm033; SSE-NEXT: pcmpeqd %xmm1, %xmm134; SSE-NEXT: packssdw %xmm1, %xmm035; SSE-NEXT: retq36;37; AVX-LABEL: combine_packss_v4i32_freeze_signsplat:38; AVX: # %bb.0:39; AVX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm040; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm141; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm042; AVX-NEXT: retq43 %cmp = icmp sgt <4 x i32> %a0, %a144 %ext = sext <4 x i1> %cmp to <4 x i32>45 %pack = call <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32> %ext, <4 x i32> splat (i32 -1))46 %freeze = freeze <8 x i16> %pack47 %signsplat = ashr <8 x i16> %freeze, splat (i16 15)48 ret <8 x i16> %signsplat49}50