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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE414; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE425; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2,AVX16; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2,AVX27; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX512F8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX512BW9 10define i8 @test_i8_knownbits(i8 %a) {11; CHECK-LABEL: test_i8_knownbits:12; CHECK: # %bb.0:13; CHECK-NEXT: movl %edi, %eax14; CHECK-NEXT: shrb %al15; CHECK-NEXT: # kill: def $al killed $al killed $eax16; CHECK-NEXT: retq17 %x = lshr i8 %a, 118 %1 = call i8 @llvm.smax.i8(i8 %x, i8 0)19 ret i8 %120}21 22define <16 x i8> @test_v16i8_nosignbit(<16 x i8> %a, <16 x i8> %b) {23; SSE2-LABEL: test_v16i8_nosignbit:24; SSE2: # %bb.0:25; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]26; SSE2-NEXT: pand %xmm2, %xmm027; SSE2-NEXT: pand %xmm1, %xmm228; SSE2-NEXT: pmaxub %xmm2, %xmm029; SSE2-NEXT: retq30;31; SSE41-LABEL: test_v16i8_nosignbit:32; SSE41: # %bb.0:33; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]34; SSE41-NEXT: pand %xmm2, %xmm035; SSE41-NEXT: pand %xmm1, %xmm236; SSE41-NEXT: pmaxsb %xmm2, %xmm037; SSE41-NEXT: retq38;39; SSE42-LABEL: test_v16i8_nosignbit:40; SSE42: # %bb.0:41; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]42; SSE42-NEXT: pand %xmm2, %xmm043; SSE42-NEXT: pand %xmm1, %xmm244; SSE42-NEXT: pmaxsb %xmm2, %xmm045; SSE42-NEXT: retq46;47; AVX1-LABEL: test_v16i8_nosignbit:48; AVX1: # %bb.0:49; AVX1-NEXT: vbroadcastss {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]50; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm051; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm152; AVX1-NEXT: vpmaxsb %xmm1, %xmm0, %xmm053; AVX1-NEXT: retq54;55; AVX2-LABEL: test_v16i8_nosignbit:56; AVX2: # %bb.0:57; AVX2-NEXT: vpbroadcastb {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]58; AVX2-NEXT: vpand %xmm2, %xmm0, %xmm059; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm160; AVX2-NEXT: vpmaxsb %xmm1, %xmm0, %xmm061; AVX2-NEXT: retq62 %1 = and <16 x i8> %a, <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>63 %2 = and <16 x i8> %b, <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>64 %3 = icmp sgt <16 x i8> %1, %265 %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %266 ret <16 x i8> %467}68 69define <16 x i8> @test_v16i8_reassociation(<16 x i8> %a) {70; SSE2-LABEL: test_v16i8_reassociation:71; SSE2: # %bb.0:72; SSE2-NEXT: pxor %xmm1, %xmm173; SSE2-NEXT: movdqa %xmm0, %xmm274; SSE2-NEXT: pcmpgtb %xmm1, %xmm275; SSE2-NEXT: pand %xmm2, %xmm076; SSE2-NEXT: retq77;78; SSE41-LABEL: test_v16i8_reassociation:79; SSE41: # %bb.0:80; SSE41-NEXT: pxor %xmm1, %xmm181; SSE41-NEXT: pmaxsb %xmm1, %xmm082; SSE41-NEXT: retq83;84; SSE42-LABEL: test_v16i8_reassociation:85; SSE42: # %bb.0:86; SSE42-NEXT: pxor %xmm1, %xmm187; SSE42-NEXT: pmaxsb %xmm1, %xmm088; SSE42-NEXT: retq89;90; AVX-LABEL: test_v16i8_reassociation:91; AVX: # %bb.0:92; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm193; AVX-NEXT: vpmaxsb %xmm1, %xmm0, %xmm094; AVX-NEXT: retq95 %1 = call <16 x i8> @llvm.smax.v16i8(<16 x i8> %a, <16 x i8> zeroinitializer)96 %2 = call <16 x i8> @llvm.smax.v16i8(<16 x i8> %1, <16 x i8> zeroinitializer)97 ret <16 x i8> %298}99 100define <16 x i8> @test_v16i8_demandedbits(<16 x i8> %x, <16 x i8> %y, <16 x i8> %a, <16 x i8> %b) {101; SSE2-LABEL: test_v16i8_demandedbits:102; SSE2: # %bb.0:103; SSE2-NEXT: movdqa %xmm0, %xmm4104; SSE2-NEXT: pcmpgtb %xmm1, %xmm4105; SSE2-NEXT: pand %xmm4, %xmm0106; SSE2-NEXT: pandn %xmm1, %xmm4107; SSE2-NEXT: por %xmm0, %xmm4108; SSE2-NEXT: pxor %xmm0, %xmm0109; SSE2-NEXT: pcmpgtb %xmm4, %xmm0110; SSE2-NEXT: pand %xmm0, %xmm3111; SSE2-NEXT: pandn %xmm2, %xmm0112; SSE2-NEXT: por %xmm3, %xmm0113; SSE2-NEXT: retq114;115; SSE41-LABEL: test_v16i8_demandedbits:116; SSE41: # %bb.0:117; SSE41-NEXT: andps %xmm1, %xmm0118; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2119; SSE41-NEXT: movdqa %xmm2, %xmm0120; SSE41-NEXT: retq121;122; SSE42-LABEL: test_v16i8_demandedbits:123; SSE42: # %bb.0:124; SSE42-NEXT: andps %xmm1, %xmm0125; SSE42-NEXT: pblendvb %xmm0, %xmm3, %xmm2126; SSE42-NEXT: movdqa %xmm2, %xmm0127; SSE42-NEXT: retq128;129; AVX1OR2-LABEL: test_v16i8_demandedbits:130; AVX1OR2: # %bb.0:131; AVX1OR2-NEXT: vpand %xmm1, %xmm0, %xmm0132; AVX1OR2-NEXT: vpblendvb %xmm0, %xmm3, %xmm2, %xmm0133; AVX1OR2-NEXT: retq134;135; AVX512F-LABEL: test_v16i8_demandedbits:136; AVX512F: # %bb.0:137; AVX512F-NEXT: vpand %xmm1, %xmm0, %xmm0138; AVX512F-NEXT: vpblendvb %xmm0, %xmm3, %xmm2, %xmm0139; AVX512F-NEXT: retq140;141; AVX512BW-LABEL: test_v16i8_demandedbits:142; AVX512BW: # %bb.0:143; AVX512BW-NEXT: # kill: def $xmm3 killed $xmm3 def $zmm3144; AVX512BW-NEXT: # kill: def $xmm2 killed $xmm2 def $zmm2145; AVX512BW-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0146; AVX512BW-NEXT: vpxor %xmm1, %xmm1, %xmm1147; AVX512BW-NEXT: vpcmpnltb %zmm1, %zmm0, %k1148; AVX512BW-NEXT: vpblendmb %zmm2, %zmm3, %zmm0 {%k1}149; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0150; AVX512BW-NEXT: vzeroupper151; AVX512BW-NEXT: retq152 %smax = tail call <16 x i8> @llvm.smax.v16i8(<16 x i8> %x, <16 x i8> %y)153 %cmp = icmp sge <16 x i8> %smax, zeroinitializer154 %res = select <16 x i1> %cmp, <16 x i8> %a, <16 x i8> %b155 ret <16 x i8> %res156}157 158declare i8 @llvm.smax.i8(i8, i8)159declare <16 x i8> @llvm.smax.v16i8(<16 x i8>, <16 x i8>)160