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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE414; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE425; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2,AVX16; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2,AVX27; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX512F8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX512BW9 10define i8 @test_i8_knownbits(i8 %a) {11; CHECK-LABEL: test_i8_knownbits:12; CHECK: # %bb.0:13; CHECK-NEXT: movl %edi, %eax14; CHECK-NEXT: orb $-128, %al15; CHECK-NEXT: # kill: def $al killed $al killed $eax16; CHECK-NEXT: retq17 %x = or i8 %a, -12818 %1 = call i8 @llvm.smin.i8(i8 %x, i8 0)19 ret i8 %120}21 22define <16 x i8> @test_v16i8_nosignbit(<16 x i8> %a, <16 x i8> %b) {23; SSE2-LABEL: test_v16i8_nosignbit:24; SSE2: # %bb.0:25; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]26; SSE2-NEXT: pand %xmm2, %xmm027; SSE2-NEXT: pand %xmm1, %xmm228; SSE2-NEXT: pminub %xmm2, %xmm029; SSE2-NEXT: retq30;31; SSE41-LABEL: test_v16i8_nosignbit:32; SSE41: # %bb.0:33; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]34; SSE41-NEXT: pand %xmm2, %xmm035; SSE41-NEXT: pand %xmm1, %xmm236; SSE41-NEXT: pminsb %xmm2, %xmm037; SSE41-NEXT: retq38;39; SSE42-LABEL: test_v16i8_nosignbit:40; SSE42: # %bb.0:41; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]42; SSE42-NEXT: pand %xmm2, %xmm043; SSE42-NEXT: pand %xmm1, %xmm244; SSE42-NEXT: pminsb %xmm2, %xmm045; SSE42-NEXT: retq46;47; AVX1-LABEL: test_v16i8_nosignbit:48; AVX1: # %bb.0:49; AVX1-NEXT: vbroadcastss {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]50; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm051; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm152; AVX1-NEXT: vpminsb %xmm1, %xmm0, %xmm053; AVX1-NEXT: retq54;55; AVX2-LABEL: test_v16i8_nosignbit:56; AVX2: # %bb.0:57; AVX2-NEXT: vpbroadcastb {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]58; AVX2-NEXT: vpand %xmm2, %xmm0, %xmm059; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm160; AVX2-NEXT: vpminsb %xmm1, %xmm0, %xmm061; AVX2-NEXT: retq62 %1 = and <16 x i8> %a, <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>63 %2 = and <16 x i8> %b, <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>64 %3 = icmp slt <16 x i8> %1, %265 %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %266 ret <16 x i8> %467}68 69define <16 x i8> @test_v16i8_reassociation(<16 x i8> %a) {70; SSE2-LABEL: test_v16i8_reassociation:71; SSE2: # %bb.0:72; SSE2-NEXT: pxor %xmm1, %xmm173; SSE2-NEXT: pcmpgtb %xmm0, %xmm174; SSE2-NEXT: pand %xmm1, %xmm075; SSE2-NEXT: retq76;77; SSE41-LABEL: test_v16i8_reassociation:78; SSE41: # %bb.0:79; SSE41-NEXT: pxor %xmm1, %xmm180; SSE41-NEXT: pminsb %xmm1, %xmm081; SSE41-NEXT: retq82;83; SSE42-LABEL: test_v16i8_reassociation:84; SSE42: # %bb.0:85; SSE42-NEXT: pxor %xmm1, %xmm186; SSE42-NEXT: pminsb %xmm1, %xmm087; SSE42-NEXT: retq88;89; AVX-LABEL: test_v16i8_reassociation:90; AVX: # %bb.0:91; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm192; AVX-NEXT: vpminsb %xmm1, %xmm0, %xmm093; AVX-NEXT: retq94 %1 = call <16 x i8> @llvm.smin.v16i8(<16 x i8> %a, <16 x i8> zeroinitializer)95 %2 = call <16 x i8> @llvm.smin.v16i8(<16 x i8> %1, <16 x i8> zeroinitializer)96 ret <16 x i8> %297}98 99define <16 x i8> @test_v16i8_demandedbits(<16 x i8> %x, <16 x i8> %y, <16 x i8> %a, <16 x i8> %b) {100; SSE2-LABEL: test_v16i8_demandedbits:101; SSE2: # %bb.0:102; SSE2-NEXT: movdqa %xmm1, %xmm4103; SSE2-NEXT: pcmpgtb %xmm0, %xmm4104; SSE2-NEXT: pand %xmm4, %xmm0105; SSE2-NEXT: pandn %xmm1, %xmm4106; SSE2-NEXT: por %xmm0, %xmm4107; SSE2-NEXT: pxor %xmm0, %xmm0108; SSE2-NEXT: pcmpgtb %xmm4, %xmm0109; SSE2-NEXT: pand %xmm0, %xmm3110; SSE2-NEXT: pandn %xmm2, %xmm0111; SSE2-NEXT: por %xmm3, %xmm0112; SSE2-NEXT: retq113;114; SSE41-LABEL: test_v16i8_demandedbits:115; SSE41: # %bb.0:116; SSE41-NEXT: orps %xmm1, %xmm0117; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2118; SSE41-NEXT: movdqa %xmm2, %xmm0119; SSE41-NEXT: retq120;121; SSE42-LABEL: test_v16i8_demandedbits:122; SSE42: # %bb.0:123; SSE42-NEXT: orps %xmm1, %xmm0124; SSE42-NEXT: pblendvb %xmm0, %xmm3, %xmm2125; SSE42-NEXT: movdqa %xmm2, %xmm0126; SSE42-NEXT: retq127;128; AVX1OR2-LABEL: test_v16i8_demandedbits:129; AVX1OR2: # %bb.0:130; AVX1OR2-NEXT: vpor %xmm1, %xmm0, %xmm0131; AVX1OR2-NEXT: vpblendvb %xmm0, %xmm3, %xmm2, %xmm0132; AVX1OR2-NEXT: retq133;134; AVX512F-LABEL: test_v16i8_demandedbits:135; AVX512F: # %bb.0:136; AVX512F-NEXT: vpor %xmm1, %xmm0, %xmm0137; AVX512F-NEXT: vpblendvb %xmm0, %xmm3, %xmm2, %xmm0138; AVX512F-NEXT: retq139;140; AVX512BW-LABEL: test_v16i8_demandedbits:141; AVX512BW: # %bb.0:142; AVX512BW-NEXT: # kill: def $xmm3 killed $xmm3 def $zmm3143; AVX512BW-NEXT: # kill: def $xmm2 killed $xmm2 def $zmm2144; AVX512BW-NEXT: vpminsb %xmm1, %xmm0, %xmm0145; AVX512BW-NEXT: vpxor %xmm1, %xmm1, %xmm1146; AVX512BW-NEXT: vpcmpnltb %zmm1, %zmm0, %k1147; AVX512BW-NEXT: vpblendmb %zmm2, %zmm3, %zmm0 {%k1}148; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0149; AVX512BW-NEXT: vzeroupper150; AVX512BW-NEXT: retq151 %smin = tail call <16 x i8> @llvm.smin.v16i8(<16 x i8> %x, <16 x i8> %y)152 %cmp = icmp sge <16 x i8> %smin, zeroinitializer153 %res = select <16 x i1> %cmp, <16 x i8> %a, <16 x i8> %b154 ret <16 x i8> %res155}156 157declare i8 @llvm.smin.i8(i8, i8)158declare <16 x i8> @llvm.smin.v16i8(<16 x i8>, <16 x i8>)159