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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE414; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE425; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1OR26; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX1OR27; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512F8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512BW9 10define <8 x i16> @test_v8i16_nosignbit(<8 x i16> %a, <8 x i16> %b) {11; SSE2-LABEL: test_v8i16_nosignbit:12; SSE2: # %bb.0:13; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm014; SSE2-NEXT: psrlw $1, %xmm115; SSE2-NEXT: pminsw %xmm1, %xmm016; SSE2-NEXT: retq17;18; SSE41-LABEL: test_v8i16_nosignbit:19; SSE41: # %bb.0:20; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm021; SSE41-NEXT: psrlw $1, %xmm122; SSE41-NEXT: pminuw %xmm1, %xmm023; SSE41-NEXT: retq24;25; SSE42-LABEL: test_v8i16_nosignbit:26; SSE42: # %bb.0:27; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm028; SSE42-NEXT: psrlw $1, %xmm129; SSE42-NEXT: pminuw %xmm1, %xmm030; SSE42-NEXT: retq31;32; AVX-LABEL: test_v8i16_nosignbit:33; AVX: # %bb.0:34; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm035; AVX-NEXT: vpsrlw $1, %xmm1, %xmm136; AVX-NEXT: vpminuw %xmm1, %xmm0, %xmm037; AVX-NEXT: retq38 %1 = and <8 x i16> %a, <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>39 %2 = lshr <8 x i16> %b, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>40 %3 = icmp ult <8 x i16> %1, %241 %4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %242 ret <8 x i16> %443}44 45define <16 x i8> @test_v16i8_reassociation(<16 x i8> %a) {46; SSE-LABEL: test_v16i8_reassociation:47; SSE: # %bb.0:48; SSE-NEXT: pmaxub {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm049; SSE-NEXT: retq50;51; AVX-LABEL: test_v16i8_reassociation:52; AVX: # %bb.0:53; AVX-NEXT: vpmaxub {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm054; AVX-NEXT: retq55 %1 = call <16 x i8> @llvm.umax.v16i8(<16 x i8> %a, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>)56 %2 = call <16 x i8> @llvm.umax.v16i8(<16 x i8> %1, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>)57 ret <16 x i8> %258}59 60define <16 x i8> @test_v16i8_demandedbits(<16 x i8> %x, <16 x i8> %y, <16 x i8> %a, <16 x i8> %b) {61; SSE2-LABEL: test_v16i8_demandedbits:62; SSE2: # %bb.0:63; SSE2-NEXT: por %xmm1, %xmm064; SSE2-NEXT: pxor %xmm1, %xmm165; SSE2-NEXT: pcmpgtb %xmm0, %xmm166; SSE2-NEXT: pand %xmm1, %xmm367; SSE2-NEXT: pandn %xmm2, %xmm168; SSE2-NEXT: por %xmm3, %xmm169; SSE2-NEXT: movdqa %xmm1, %xmm070; SSE2-NEXT: retq71;72; SSE41-LABEL: test_v16i8_demandedbits:73; SSE41: # %bb.0:74; SSE41-NEXT: orps %xmm1, %xmm075; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm276; SSE41-NEXT: movdqa %xmm2, %xmm077; SSE41-NEXT: retq78;79; SSE42-LABEL: test_v16i8_demandedbits:80; SSE42: # %bb.0:81; SSE42-NEXT: orps %xmm1, %xmm082; SSE42-NEXT: pblendvb %xmm0, %xmm3, %xmm283; SSE42-NEXT: movdqa %xmm2, %xmm084; SSE42-NEXT: retq85;86; AVX1OR2-LABEL: test_v16i8_demandedbits:87; AVX1OR2: # %bb.0:88; AVX1OR2-NEXT: vpor %xmm1, %xmm0, %xmm089; AVX1OR2-NEXT: vpblendvb %xmm0, %xmm3, %xmm2, %xmm090; AVX1OR2-NEXT: retq91;92; AVX512F-LABEL: test_v16i8_demandedbits:93; AVX512F: # %bb.0:94; AVX512F-NEXT: vpor %xmm1, %xmm0, %xmm095; AVX512F-NEXT: vpblendvb %xmm0, %xmm3, %xmm2, %xmm096; AVX512F-NEXT: retq97;98; AVX512BW-LABEL: test_v16i8_demandedbits:99; AVX512BW: # %bb.0:100; AVX512BW-NEXT: # kill: def $xmm3 killed $xmm3 def $zmm3101; AVX512BW-NEXT: # kill: def $xmm2 killed $xmm2 def $zmm2102; AVX512BW-NEXT: vpmaxub %xmm1, %xmm0, %xmm0103; AVX512BW-NEXT: vpxor %xmm1, %xmm1, %xmm1104; AVX512BW-NEXT: vpcmpnltb %zmm1, %zmm0, %k1105; AVX512BW-NEXT: vpblendmb %zmm2, %zmm3, %zmm0 {%k1}106; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0107; AVX512BW-NEXT: vzeroupper108; AVX512BW-NEXT: retq109 %umax = tail call <16 x i8> @llvm.umax.v16i8(<16 x i8> %x, <16 x i8> %y)110 %cmp = icmp sge <16 x i8> %umax, zeroinitializer111 %res = select <16 x i1> %cmp, <16 x i8> %a, <16 x i8> %b112 ret <16 x i8> %res113}114 115declare <16 x i8> @llvm.umax.v16i8(<16 x i8> %x, <16 x i8> %y)116