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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX5123; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avxifma | FileCheck %s --check-prefixes=CHECK,AVX4 5define <2 x i64> @test1_vpmadd52l(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {6; AVX512-LABEL: test1_vpmadd52l:7; AVX512: # %bb.0:8; AVX512-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm09; AVX512-NEXT: retq10;11; AVX-LABEL: test1_vpmadd52l:12; AVX: # %bb.0:13; AVX-NEXT: {vex} vpmadd52luq %xmm2, %xmm1, %xmm014; AVX-NEXT: retq15 16 %and = and <2 x i64> %x1, splat (i64 4503599627370495) ; (1LL << 52) - 117 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> %and, <2 x i64> %x2)18 ret <2 x i64> %119}20 21define <2 x i64> @test2_vpmadd52l(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {22; AVX512-LABEL: test2_vpmadd52l:23; AVX512: # %bb.0:24; AVX512-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm025; AVX512-NEXT: retq26;27; AVX-LABEL: test2_vpmadd52l:28; AVX: # %bb.0:29; AVX-NEXT: {vex} vpmadd52luq %xmm2, %xmm1, %xmm030; AVX-NEXT: retq31 %and = and <2 x i64> %x2, splat (i64 4503599627370495) ; (1LL << 52) - 132 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %and)33 ret <2 x i64> %134}35 36define <2 x i64> @test3_vpmadd52l(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {37; AVX512-LABEL: test3_vpmadd52l:38; AVX512: # %bb.0:39; AVX512-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm040; AVX512-NEXT: retq41;42; AVX-LABEL: test3_vpmadd52l:43; AVX: # %bb.0:44; AVX-NEXT: {vex} vpmadd52luq %xmm2, %xmm1, %xmm045; AVX-NEXT: retq46 %and = and <2 x i64> %x1, splat (i64 4503599627370495) ; (1LL << 52) - 147 %or = or <2 x i64> %x2, splat (i64 4503599627370496) ; 1LL << 5248 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> %and, <2 x i64> %or)49 ret <2 x i64> %150}51 52define <2 x i64> @test_vpmadd52l_wrong_bits(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {53; AVX512-LABEL: test_vpmadd52l_wrong_bits:54; AVX512: # %bb.0:55; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm156; AVX512-NEXT: vporq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm2, %xmm257; AVX512-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm058; AVX512-NEXT: retq59;60; AVX-LABEL: test_vpmadd52l_wrong_bits:61; AVX: # %bb.0:62; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm163; AVX-NEXT: vpor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm264; AVX-NEXT: {vex} vpmadd52luq %xmm2, %xmm1, %xmm065; AVX-NEXT: retq66 %and = and <2 x i64> %x1, splat (i64 2251799813685247) ; (1LL << 51) - 167 %or = or <2 x i64> %x2, splat (i64 2251799813685248) ; 1LL << 5168 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> %and, <2 x i64> %or)69 ret <2 x i64> %170}71 72define <2 x i64> @test_vpmadd52l_wrong_op(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {73; AVX512-LABEL: test_vpmadd52l_wrong_op:74; AVX512: # %bb.0:75; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm076; AVX512-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm077; AVX512-NEXT: retq78;79; AVX-LABEL: test_vpmadd52l_wrong_op:80; AVX: # %bb.0:81; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm082; AVX-NEXT: {vex} vpmadd52luq %xmm2, %xmm1, %xmm083; AVX-NEXT: retq84 %and = and <2 x i64> %x1, splat (i64 4503599627370495) ; (1LL << 52) - 185 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %and, <2 x i64> %x1, <2 x i64> %x2)86 ret <2 x i64> %187}88 89define <2 x i64> @test_vpmadd52h(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {90; AVX512-LABEL: test_vpmadd52h:91; AVX512: # %bb.0:92; AVX512-NEXT: vpmadd52huq %xmm2, %xmm1, %xmm093; AVX512-NEXT: retq94;95; AVX-LABEL: test_vpmadd52h:96; AVX: # %bb.0:97; AVX-NEXT: {vex} vpmadd52huq %xmm2, %xmm1, %xmm098; AVX-NEXT: retq99 100 %and = and <2 x i64> %x1, splat (i64 4503599627370495) ; (1LL << 52) - 1101 %or = or <2 x i64> %x2, splat (i64 4503599627370496) ; 1LL << 52102 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52h.uq.128(<2 x i64> %x0, <2 x i64> %and, <2 x i64> %or)103 ret <2 x i64> %1104}105 106; Test the fold x * 0 + y -> y107define <2 x i64> @test_vpmadd52l_mul_zero(<2 x i64> %x0, <2 x i64> %x1) {108; CHECK-LABEL: test_vpmadd52l_mul_zero:109; CHECK: # %bb.0:110; CHECK-NEXT: retq111 112 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> <i64 0, i64 0>, <2 x i64> %x1)113 ret <2 x i64> %1114}115 116define <2 x i64> @test_vpmadd52h_mul_zero(<2 x i64> %x0, <2 x i64> %x1) {117; CHECK-LABEL: test_vpmadd52h_mul_zero:118; CHECK: # %bb.0:119; CHECK-NEXT: retq120 121 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52h.uq.128(<2 x i64> %x0, <2 x i64> <i64 0, i64 0>, <2 x i64> %x1)122 ret <2 x i64> %1123}124 125define <2 x i64> @test_vpmadd52l_mul_zero_commuted(<2 x i64> %x0, <2 x i64> %x1) {126; CHECK-LABEL: test_vpmadd52l_mul_zero_commuted:127; CHECK: # %bb.0:128; CHECK-NEXT: retq129 130 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> <i64 0, i64 0>)131 ret <2 x i64> %1132}133 134define <2 x i64> @test_vpmadd52l_mul_zero_both(<2 x i64> %x0) {135; CHECK-LABEL: test_vpmadd52l_mul_zero_both:136; CHECK: # %bb.0:137; CHECK-NEXT: retq138 139 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> <i64 0, i64 0>, <2 x i64> <i64 0, i64 0>)140 ret <2 x i64> %1141}142 143define <2 x i64> @test_vpmadd52l_mul_zero_in_52bits(<2 x i64> %x0, <2 x i64> %x1) {144; CHECK-LABEL: test_vpmadd52l_mul_zero_in_52bits:145; CHECK: # %bb.0:146; CHECK-NEXT: retq147 148 ; mul by (1 << 52)149 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> splat (i64 4503599627370496), <2 x i64> %x1)150 ret <2 x i64> %1151}152 153define <2 x i64> @test_vpmadd52l_add_zero(<2 x i64> %x0, <2 x i64> %x1) {154; AVX512-LABEL: test_vpmadd52l_add_zero:155; AVX512: # %bb.0:156; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2157; AVX512-NEXT: vpmadd52luq %xmm1, %xmm0, %xmm2158; AVX512-NEXT: vmovdqa %xmm2, %xmm0159; AVX512-NEXT: retq160;161; AVX-LABEL: test_vpmadd52l_add_zero:162; AVX: # %bb.0:163; AVX-NEXT: vpxor %xmm2, %xmm2, %xmm2164; AVX-NEXT: {vex} vpmadd52luq %xmm1, %xmm0, %xmm2165; AVX-NEXT: vmovdqa %xmm2, %xmm0166; AVX-NEXT: retq167 168 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> <i64 0, i64 0>, <2 x i64> %x0, <2 x i64> %x1)169 ret <2 x i64> %1170}171 172define <2 x i64> @test_vpmadd52l_mul_zero_scalar(<2 x i64> %x0, <2 x i64> %x1) {173; AVX512-LABEL: test_vpmadd52l_mul_zero_scalar:174; AVX512: # %bb.0:175; AVX512-NEXT: vpmadd52luq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm0176; AVX512-NEXT: retq177;178; AVX-LABEL: test_vpmadd52l_mul_zero_scalar:179; AVX: # %bb.0:180; AVX-NEXT: {vex} vpmadd52luq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm0181; AVX-NEXT: retq182 183 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> <i64 0, i64 123>, <2 x i64> %x1)184 ret <2 x i64> %1185}186 187; (1 << 51) * (1 << 1) -> 1 << 52 -> low 52 bits are zeroes188define <2 x i64> @test_vpmadd52l_mul_lo52_zero(<2 x i64> %x0) {189; CHECK-LABEL: test_vpmadd52l_mul_lo52_zero:190; CHECK: # %bb.0:191; CHECK-NEXT: retq192 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> splat (i64 2251799813685248), <2 x i64> splat (i64 2))193 ret <2 x i64> %1194}195 196; (1 << 25) * (1 << 26) = 1 << 51 -> high 52 bits are zeroes197define <2 x i64> @test_vpmadd52h_mul_hi52_zero(<2 x i64> %x0) {198; CHECK-LABEL: test_vpmadd52h_mul_hi52_zero:199; CHECK: # %bb.0:200; CHECK-NEXT: retq201 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52h.uq.128(<2 x i64> %x0, <2 x i64> splat (i64 33554432), <2 x i64> splat (i64 67108864))202 ret <2 x i64> %1203}204 205define <2 x i64> @test_vpmadd52l_mul_lo52_const(<2 x i64> %x0) {206; AVX512-LABEL: test_vpmadd52l_mul_lo52_const:207; AVX512: # %bb.0:208; AVX512-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm0, %xmm0209; AVX512-NEXT: retq210;211; AVX-LABEL: test_vpmadd52l_mul_lo52_const:212; AVX: # %bb.0:213; AVX-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0214; AVX-NEXT: retq215 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> splat (i64 123), <2 x i64> splat (i64 456))216 ret <2 x i64> %1217}218 219; (1 << 51) * (1 << 51) -> 1 << 102 -> the high 52 bits is 1 << 50220define <2 x i64> @test_vpmadd52h_mul_hi52_const(<2 x i64> %x0) {221; AVX512-LABEL: test_vpmadd52h_mul_hi52_const:222; AVX512: # %bb.0:223; AVX512-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm0, %xmm0224; AVX512-NEXT: retq225;226; AVX-LABEL: test_vpmadd52h_mul_hi52_const:227; AVX: # %bb.0:228; AVX-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0229; AVX-NEXT: retq230 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52h.uq.128(<2 x i64> %x0, <2 x i64> splat (i64 2251799813685248), <2 x i64> splat (i64 2251799813685248))231 ret <2 x i64> %1232}233 234define <2 x i64> @test_vpmadd52l_mul_lo52_mask(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {235; CHECK-LABEL: test_vpmadd52l_mul_lo52_mask:236; CHECK: # %bb.0:237; CHECK-NEXT: retq238 %and1 = and <2 x i64> %x0, splat (i64 1073741824) ; 1LL << 30239 %and2 = and <2 x i64> %x1, splat (i64 1073741824) ; 1LL << 30240 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> %and1, <2 x i64> %and2)241 ret <2 x i64> %1242}243 244define <2 x i64> @test_vpmadd52h_mul_hi52_mask(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {245; CHECK-LABEL: test_vpmadd52h_mul_hi52_mask:246; CHECK: # %bb.0:247; CHECK-NEXT: retq248 %and1 = lshr <2 x i64> %x0, splat (i64 40)249 %and2 = lshr <2 x i64> %x1, splat (i64 40)250 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52h.uq.128(<2 x i64> %x0, <2 x i64> %and1, <2 x i64> %and2)251 ret <2 x i64> %1252}253 254define <2 x i64> @test_vpmadd52l_mul_lo52_mask_negative(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {255; AVX512-LABEL: test_vpmadd52l_mul_lo52_mask_negative:256; AVX512: # %bb.0:257; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm0, %xmm2258; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm1259; AVX512-NEXT: vpmadd52luq %xmm1, %xmm2, %xmm0260; AVX512-NEXT: retq261;262; AVX-LABEL: test_vpmadd52l_mul_lo52_mask_negative:263; AVX: # %bb.0:264; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2265; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1266; AVX-NEXT: {vex} vpmadd52luq %xmm1, %xmm2, %xmm0267; AVX-NEXT: retq268 %and1 = and <2 x i64> %x0, splat (i64 2097152) ; 1LL << 21269 %and2 = and <2 x i64> %x1, splat (i64 1073741824) ; 1LL << 30270 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> %and1, <2 x i64> %and2)271 ret <2 x i64> %1272}273 274define <2 x i64> @test_vpmadd52h_mul_hi52_negative(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {275; AVX512-LABEL: test_vpmadd52h_mul_hi52_negative:276; AVX512: # %bb.0:277; AVX512-NEXT: vpsrlq $30, %xmm0, %xmm2278; AVX512-NEXT: vpsrlq $43, %xmm1, %xmm1279; AVX512-NEXT: vpmadd52huq %xmm1, %xmm2, %xmm0280; AVX512-NEXT: retq281;282; AVX-LABEL: test_vpmadd52h_mul_hi52_negative:283; AVX: # %bb.0:284; AVX-NEXT: vpsrlq $30, %xmm0, %xmm2285; AVX-NEXT: vpsrlq $43, %xmm1, %xmm1286; AVX-NEXT: {vex} vpmadd52huq %xmm1, %xmm2, %xmm0287; AVX-NEXT: retq288 %and1 = lshr <2 x i64> %x0, splat (i64 30)289 %and2 = lshr <2 x i64> %x1, splat (i64 43)290 %1 = call <2 x i64> @llvm.x86.avx512.vpmadd52h.uq.128(<2 x i64> %x0, <2 x i64> %and1, <2 x i64> %and2)291 ret <2 x i64> %1292}293 294define <2 x i64> @test1_knownbits_vpmadd52l(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {295; CHECK-LABEL: test1_knownbits_vpmadd52l:296; CHECK: # %bb.0:297; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = [1,1]298; CHECK-NEXT: # xmm0 = mem[0,0]299; CHECK-NEXT: retq300 %and1 = and <2 x i64> %x0, splat (i64 4)301 %and2 = and <2 x i64> %x1, splat (i64 4)302 %madd = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> splat(i64 1), <2 x i64> %and1, <2 x i64> %and2)303 %ret = and <2 x i64> %madd, splat (i64 1)304 ret <2 x i64> %ret305}306 307define <2 x i64> @test1_knownbits_vpmadd52h(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {308; CHECK-LABEL: test1_knownbits_vpmadd52h:309; CHECK: # %bb.0:310; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = [3,3]311; CHECK-NEXT: # xmm0 = mem[0,0]312; CHECK-NEXT: retq313 %and1 = and <2 x i64> %x0, splat (i64 1073741824) ; 1LL << 30314 %and2 = and <2 x i64> %x1, splat (i64 1073741824) ; 1LL << 30315 %madd = call <2 x i64> @llvm.x86.avx512.vpmadd52h.uq.128(<2 x i64> splat(i64 3), <2 x i64> %and1, <2 x i64> %and2)316 %ret = and <2 x i64> %madd, splat (i64 3)317 ret <2 x i64> %ret318}319 320define <2 x i64> @test2_knownbits_vpmadd52l(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {321; CHECK-LABEL: test2_knownbits_vpmadd52l:322; CHECK: # %bb.0:323; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = [1234,1234]324; CHECK-NEXT: # xmm0 = mem[0,0]325; CHECK-NEXT: retq326 %and1 = and <2 x i64> %x0, splat (i64 67108864) ; 1LL << 26327 %and2 = and <2 x i64> %x1, splat (i64 33554432) ; 1LL << 25328 %madd = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> splat(i64 1234), <2 x i64> %and1, <2 x i64> %and2)329 %ret = and <2 x i64> %madd, splat (i64 1234)330 ret <2 x i64> %ret331}332 333define <2 x i64> @test2_knownbits_vpmadd52h(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {334; CHECK-LABEL: test2_knownbits_vpmadd52h:335; CHECK: # %bb.0:336; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = [1,1]337; CHECK-NEXT: # xmm0 = mem[0,0]338; CHECK-NEXT: retq339 %and1 = and <2 x i64> %x0, splat (i64 1073741824) ; 1LL << 30340 %and2 = and <2 x i64> %x1, splat (i64 1073741824) ; 1LL << 30341 ; add (1LL << 20) + 1342 %madd = call <2 x i64> @llvm.x86.avx512.vpmadd52h.uq.128(<2 x i64> splat(i64 1025), <2 x i64> %and1, <2 x i64> %and2)343 %ret = and <2 x i64> %madd, splat (i64 1)344 ret <2 x i64> %ret345}346 347define <2 x i64> @test3_knownbits_vpmadd52l_negative(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {348; AVX512-LABEL: test3_knownbits_vpmadd52l_negative:349; AVX512: # %bb.0:350; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm0, %xmm0351; AVX512-NEXT: vpbroadcastq {{.*#+}} xmm2 = [1,1]352; AVX512-NEXT: vpor %xmm2, %xmm1, %xmm1353; AVX512-NEXT: vmovdqa %xmm2, %xmm3354; AVX512-NEXT: vpmadd52luq %xmm1, %xmm0, %xmm3355; AVX512-NEXT: vpand %xmm2, %xmm3, %xmm0356; AVX512-NEXT: retq357;358; AVX-LABEL: test3_knownbits_vpmadd52l_negative:359; AVX: # %bb.0:360; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0361; AVX-NEXT: vpmovsxbq {{.*#+}} xmm2 = [1,1]362; AVX-NEXT: vpor %xmm2, %xmm1, %xmm1363; AVX-NEXT: vmovdqa %xmm2, %xmm3364; AVX-NEXT: {vex} vpmadd52luq %xmm1, %xmm0, %xmm3365; AVX-NEXT: vpand %xmm2, %xmm3, %xmm0366; AVX-NEXT: retq367 %and1 = and <2 x i64> %x0, splat (i64 67108865) ; (1LL << 26) + 1368 %or = or <2 x i64> %x1, splat (i64 1)369 %madd = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> splat(i64 1), <2 x i64> %and1, <2 x i64> %or)370 %ret = and <2 x i64> %madd, splat (i64 1)371 ret <2 x i64> %ret372}373 374define <2 x i64> @test3_knownbits_vpmadd52h_negative(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {375; AVX512-LABEL: test3_knownbits_vpmadd52h_negative:376; AVX512: # %bb.0:377; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm0, %xmm0378; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm1379; AVX512-NEXT: vpbroadcastq {{.*#+}} xmm2 = [1,1]380; AVX512-NEXT: vmovdqa %xmm2, %xmm3381; AVX512-NEXT: vpmadd52huq %xmm1, %xmm0, %xmm3382; AVX512-NEXT: vpand %xmm2, %xmm3, %xmm0383; AVX512-NEXT: retq384;385; AVX-LABEL: test3_knownbits_vpmadd52h_negative:386; AVX: # %bb.0:387; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0388; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1389; AVX-NEXT: vpmovsxbq {{.*#+}} xmm2 = [1,1]390; AVX-NEXT: vmovdqa %xmm2, %xmm3391; AVX-NEXT: {vex} vpmadd52huq %xmm1, %xmm0, %xmm3392; AVX-NEXT: vpand %xmm2, %xmm3, %xmm0393; AVX-NEXT: retq394 %and1 = and <2 x i64> %x0, splat (i64 4194304) ; 1LL << 22395 %and2 = and <2 x i64> %x1, splat (i64 1073741824) ; 1LL << 30396 ; add (1LL << 20) + 1397 %madd = call <2 x i64> @llvm.x86.avx512.vpmadd52h.uq.128(<2 x i64> splat(i64 1), <2 x i64> %and1, <2 x i64> %and2)398 %ret = and <2 x i64> %madd, splat (i64 1)399 ret <2 x i64> %ret400}401 402define <2 x i64> @test_vpmadd52l_mul_one(<2 x i64> %x0, <2 x i32> %x1) {403; CHECK-LABEL: test_vpmadd52l_mul_one:404; CHECK: # %bb.0:405; CHECK-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero406; CHECK-NEXT: vpaddq %xmm0, %xmm1, %xmm0407; CHECK-NEXT: retq408 %ext = zext <2 x i32> %x1 to <2 x i64>409 %ifma = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> splat(i64 1), <2 x i64> %ext)410 ret <2 x i64> %ifma411}412 413define <2 x i64> @test_vpmadd52l_mul_one_commuted(<2 x i64> %x0, <2 x i32> %x1) {414; CHECK-LABEL: test_vpmadd52l_mul_one_commuted:415; CHECK: # %bb.0:416; CHECK-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero417; CHECK-NEXT: vpaddq %xmm0, %xmm1, %xmm0418; CHECK-NEXT: retq419 %ext = zext <2 x i32> %x1 to <2 x i64>420 %ifma = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> %ext, <2 x i64> splat(i64 1))421 ret <2 x i64> %ifma422}423 424define <2 x i64> @test_vpmadd52l_mul_one_no_mask(<2 x i64> %x0, <2 x i64> %x1) {425; AVX512-LABEL: test_vpmadd52l_mul_one_no_mask:426; AVX512: # %bb.0:427; AVX512-NEXT: vpmadd52luq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0428; AVX512-NEXT: retq429;430; AVX-LABEL: test_vpmadd52l_mul_one_no_mask:431; AVX: # %bb.0:432; AVX-NEXT: {vex} vpmadd52luq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm0433; AVX-NEXT: retq434 %ifma = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> splat(i64 1), <2 x i64> %x1)435 ret <2 x i64> %ifma436}437 438; Mul by (1 << 52) + 1439define <2 x i64> @test_vpmadd52l_mul_one_in_52bits(<2 x i64> %x0, <2 x i32> %x1) {440; CHECK-LABEL: test_vpmadd52l_mul_one_in_52bits:441; CHECK: # %bb.0:442; CHECK-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero443; CHECK-NEXT: vpaddq %xmm0, %xmm1, %xmm0444; CHECK-NEXT: retq445 %ext = zext <2 x i32> %x1 to <2 x i64>446 %ifma = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> splat(i64 4503599627370497), <2 x i64> %ext)447 ret <2 x i64> %ifma448}449 450; lo(x1) * 1 = lo(x1), the high 52 bits are zeroes still.451define <2 x i64> @test_vpmadd52h_mul_one(<2 x i64> %x0, <2 x i64> %x1) {452; CHECK-LABEL: test_vpmadd52h_mul_one:453; CHECK: # %bb.0:454; CHECK-NEXT: retq455 %ifma = call <2 x i64> @llvm.x86.avx512.vpmadd52h.uq.128(<2 x i64> %x0, <2 x i64> splat(i64 1), <2 x i64> %x1)456 ret <2 x i64> %ifma457}458