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1; The register allocator can commute two-address instructions to avoid2; insertion of register-register copies.3 4; Make sure there are only 3 mov's for each testcase5; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mcpu=corei7 | FileCheck %s -check-prefix=LINUX6; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s -check-prefix=DARWIN7 8 9@G = external dso_local global i32 ; <ptr> [#uses=2]10 11declare void @ext(i32)12 13define i32 @t1(i32 %X, i32 %Y) nounwind {14; LINUX-LABEL: t1:15; LINUX: movl 4(%esp), %eax16; LINUX: movl 8(%esp), %ecx17; LINUX: addl %eax, %ecx18; LINUX: movl %ecx, G19 %Z = add i32 %X, %Y ; <i32> [#uses=1]20 store i32 %Z, ptr @G21 ret i32 %X22}23 24define i32 @t2(i32 %X, i32 %Y) nounwind {25; LINUX-LABEL: t2:26; LINUX: movl 4(%esp), %eax27; LINUX: movl 8(%esp), %ecx28; LINUX: xorl %eax, %ecx29; LINUX: movl %ecx, G30 %Z = xor i32 %X, %Y ; <i32> [#uses=1]31 store i32 %Z, ptr @G32 ret i32 %X33}34 35; rdar://876299536%0 = type { i64, i32 }37 38define %0 @t3(i32 %lb, i8 zeroext %has_lb, i8 zeroext %lb_inclusive, i32 %ub, i8 zeroext %has_ub, i8 zeroext %ub_inclusive) nounwind {39entry:40; DARWIN-LABEL: t3:41; DARWIN: shlq $32, %rcx42; DARWIN-NEXT: orq %rcx, %rax43; DARWIN-NEXT: shll $844; DARWIN-NOT: leaq45 %tmp21 = zext i32 %lb to i6446 %tmp23 = zext i32 %ub to i6447 %tmp24 = shl i64 %tmp23, 3248 %ins26 = or i64 %tmp24, %tmp2149 %tmp28 = zext i8 %has_lb to i3250 %tmp33 = zext i8 %has_ub to i3251 %tmp34 = shl i32 %tmp33, 852 %tmp38 = zext i8 %lb_inclusive to i3253 %tmp39 = shl i32 %tmp38, 1654 %tmp43 = zext i8 %ub_inclusive to i3255 %tmp44 = shl i32 %tmp43, 2456 %ins31 = or i32 %tmp39, %tmp2857 %ins36 = or i32 %ins31, %tmp3458 %ins46 = or i32 %ins36, %tmp4459 %tmp16 = insertvalue %0 undef, i64 %ins26, 060 %tmp19 = insertvalue %0 %tmp16, i32 %ins46, 161 ret %0 %tmp1962}63