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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX14; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fma | FileCheck %s --check-prefix=FMA5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=FMA6 7; PR318668; complex float complex_square_f32(complex float x) {9; return x*x;10; }11 12define <2 x float> @complex_square_f32(<2 x float>) #0 {13; SSE-LABEL: complex_square_f32:14; SSE: # %bb.0:15; SSE-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]16; SSE-NEXT: movaps %xmm0, %xmm217; SSE-NEXT: addss %xmm0, %xmm218; SSE-NEXT: mulss %xmm1, %xmm219; SSE-NEXT: mulss %xmm0, %xmm020; SSE-NEXT: mulss %xmm1, %xmm121; SSE-NEXT: subss %xmm1, %xmm022; SSE-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[2,3]23; SSE-NEXT: retq24;25; AVX1-LABEL: complex_square_f32:26; AVX1: # %bb.0:27; AVX1-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]28; AVX1-NEXT: vaddss %xmm0, %xmm0, %xmm229; AVX1-NEXT: vmulss %xmm2, %xmm1, %xmm230; AVX1-NEXT: vmulss %xmm0, %xmm0, %xmm031; AVX1-NEXT: vmulss %xmm1, %xmm1, %xmm132; AVX1-NEXT: vsubss %xmm1, %xmm0, %xmm033; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[2,3]34; AVX1-NEXT: retq35;36; FMA-LABEL: complex_square_f32:37; FMA: # %bb.0:38; FMA-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]39; FMA-NEXT: vaddss %xmm0, %xmm0, %xmm240; FMA-NEXT: vmulss %xmm2, %xmm1, %xmm241; FMA-NEXT: vmulss %xmm1, %xmm1, %xmm142; FMA-NEXT: vfmsub231ss {{.*#+}} xmm1 = (xmm0 * xmm0) - xmm143; FMA-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm2[0],xmm1[2,3]44; FMA-NEXT: retq45 %2 = extractelement <2 x float> %0, i32 046 %3 = extractelement <2 x float> %0, i32 147 %4 = fmul fast float %3, 2.000000e+0048 %5 = fmul fast float %4, %249 %6 = fmul fast float %2, %250 %7 = fmul fast float %3, %351 %8 = fsub fast float %6, %752 %9 = insertelement <2 x float> undef, float %8, i32 053 %10 = insertelement <2 x float> %9, float %5, i32 154 ret <2 x float> %1055}56 57define <2 x double> @complex_square_f64(<2 x double>) #0 {58; SSE-LABEL: complex_square_f64:59; SSE: # %bb.0:60; SSE-NEXT: movapd %xmm0, %xmm161; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]62; SSE-NEXT: movapd %xmm0, %xmm263; SSE-NEXT: addsd %xmm0, %xmm264; SSE-NEXT: mulsd %xmm1, %xmm265; SSE-NEXT: mulsd %xmm0, %xmm066; SSE-NEXT: mulsd %xmm1, %xmm167; SSE-NEXT: subsd %xmm1, %xmm068; SSE-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0]69; SSE-NEXT: retq70;71; AVX1-LABEL: complex_square_f64:72; AVX1: # %bb.0:73; AVX1-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]74; AVX1-NEXT: vaddsd %xmm0, %xmm0, %xmm275; AVX1-NEXT: vmulsd %xmm2, %xmm1, %xmm276; AVX1-NEXT: vmulsd %xmm0, %xmm0, %xmm077; AVX1-NEXT: vmulsd %xmm1, %xmm1, %xmm178; AVX1-NEXT: vsubsd %xmm1, %xmm0, %xmm079; AVX1-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0]80; AVX1-NEXT: retq81;82; FMA-LABEL: complex_square_f64:83; FMA: # %bb.0:84; FMA-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]85; FMA-NEXT: vaddsd %xmm0, %xmm0, %xmm286; FMA-NEXT: vmulsd %xmm2, %xmm1, %xmm287; FMA-NEXT: vmulsd %xmm1, %xmm1, %xmm188; FMA-NEXT: vfmsub231sd {{.*#+}} xmm1 = (xmm0 * xmm0) - xmm189; FMA-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm2[0]90; FMA-NEXT: retq91 %2 = extractelement <2 x double> %0, i32 092 %3 = extractelement <2 x double> %0, i32 193 %4 = fmul fast double %3, 2.000000e+0094 %5 = fmul fast double %4, %295 %6 = fmul fast double %2, %296 %7 = fmul fast double %3, %397 %8 = fsub fast double %6, %798 %9 = insertelement <2 x double> undef, double %8, i32 099 %10 = insertelement <2 x double> %9, double %5, i32 1100 ret <2 x double> %10101}102 103; complex float complex_mul_f32(complex float x, complex float y) {104; return x*y;105; }106 107define <2 x float> @complex_mul_f32(<2 x float>, <2 x float>) #0 {108; SSE-LABEL: complex_mul_f32:109; SSE: # %bb.0:110; SSE-NEXT: movshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]111; SSE-NEXT: movshdup {{.*#+}} xmm3 = xmm1[1,1,3,3]112; SSE-NEXT: movaps %xmm3, %xmm4113; SSE-NEXT: mulss %xmm0, %xmm4114; SSE-NEXT: mulss %xmm1, %xmm0115; SSE-NEXT: mulss %xmm2, %xmm1116; SSE-NEXT: addss %xmm4, %xmm1117; SSE-NEXT: mulss %xmm2, %xmm3118; SSE-NEXT: subss %xmm3, %xmm0119; SSE-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]120; SSE-NEXT: retq121;122; AVX1-LABEL: complex_mul_f32:123; AVX1: # %bb.0:124; AVX1-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]125; AVX1-NEXT: vmovshdup {{.*#+}} xmm3 = xmm1[1,1,3,3]126; AVX1-NEXT: vmulss %xmm0, %xmm3, %xmm4127; AVX1-NEXT: vmulss %xmm2, %xmm1, %xmm5128; AVX1-NEXT: vaddss %xmm5, %xmm4, %xmm4129; AVX1-NEXT: vmulss %xmm0, %xmm1, %xmm0130; AVX1-NEXT: vmulss %xmm2, %xmm3, %xmm1131; AVX1-NEXT: vsubss %xmm1, %xmm0, %xmm0132; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[2,3]133; AVX1-NEXT: retq134;135; FMA-LABEL: complex_mul_f32:136; FMA: # %bb.0:137; FMA-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]138; FMA-NEXT: vmovshdup {{.*#+}} xmm3 = xmm1[1,1,3,3]139; FMA-NEXT: vmulss %xmm2, %xmm1, %xmm4140; FMA-NEXT: vfmadd231ss {{.*#+}} xmm4 = (xmm3 * xmm0) + xmm4141; FMA-NEXT: vmulss %xmm2, %xmm3, %xmm2142; FMA-NEXT: vfmsub231ss {{.*#+}} xmm2 = (xmm1 * xmm0) - xmm2143; FMA-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0],xmm4[0],xmm2[2,3]144; FMA-NEXT: retq145 %3 = extractelement <2 x float> %0, i32 0146 %4 = extractelement <2 x float> %0, i32 1147 %5 = extractelement <2 x float> %1, i32 0148 %6 = extractelement <2 x float> %1, i32 1149 %7 = fmul fast float %6, %3150 %8 = fmul fast float %5, %4151 %9 = fadd fast float %7, %8152 %10 = fmul fast float %5, %3153 %11 = fmul fast float %6, %4154 %12 = fsub fast float %10, %11155 %13 = insertelement <2 x float> undef, float %12, i32 0156 %14 = insertelement <2 x float> %13, float %9, i32 1157 ret <2 x float> %14158}159 160define <2 x double> @complex_mul_f64(<2 x double>, <2 x double>) #0 {161; SSE-LABEL: complex_mul_f64:162; SSE: # %bb.0:163; SSE-NEXT: movapd %xmm0, %xmm2164; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm0[1]165; SSE-NEXT: movapd %xmm1, %xmm3166; SSE-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm1[1]167; SSE-NEXT: movapd %xmm3, %xmm4168; SSE-NEXT: mulsd %xmm0, %xmm4169; SSE-NEXT: mulsd %xmm1, %xmm0170; SSE-NEXT: mulsd %xmm2, %xmm1171; SSE-NEXT: addsd %xmm4, %xmm1172; SSE-NEXT: mulsd %xmm2, %xmm3173; SSE-NEXT: subsd %xmm3, %xmm0174; SSE-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]175; SSE-NEXT: retq176;177; AVX1-LABEL: complex_mul_f64:178; AVX1: # %bb.0:179; AVX1-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]180; AVX1-NEXT: vshufpd {{.*#+}} xmm3 = xmm1[1,0]181; AVX1-NEXT: vmulsd %xmm0, %xmm3, %xmm4182; AVX1-NEXT: vmulsd %xmm2, %xmm1, %xmm5183; AVX1-NEXT: vaddsd %xmm5, %xmm4, %xmm4184; AVX1-NEXT: vmulsd %xmm0, %xmm1, %xmm0185; AVX1-NEXT: vmulsd %xmm2, %xmm3, %xmm1186; AVX1-NEXT: vsubsd %xmm1, %xmm0, %xmm0187; AVX1-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm4[0]188; AVX1-NEXT: retq189;190; FMA-LABEL: complex_mul_f64:191; FMA: # %bb.0:192; FMA-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]193; FMA-NEXT: vshufpd {{.*#+}} xmm3 = xmm1[1,0]194; FMA-NEXT: vmulsd %xmm2, %xmm1, %xmm4195; FMA-NEXT: vfmadd231sd {{.*#+}} xmm4 = (xmm3 * xmm0) + xmm4196; FMA-NEXT: vmulsd %xmm2, %xmm3, %xmm2197; FMA-NEXT: vfmsub231sd {{.*#+}} xmm2 = (xmm1 * xmm0) - xmm2198; FMA-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm2[0],xmm4[0]199; FMA-NEXT: retq200 %3 = extractelement <2 x double> %0, i32 0201 %4 = extractelement <2 x double> %0, i32 1202 %5 = extractelement <2 x double> %1, i32 0203 %6 = extractelement <2 x double> %1, i32 1204 %7 = fmul fast double %6, %3205 %8 = fmul fast double %5, %4206 %9 = fadd fast double %7, %8207 %10 = fmul fast double %5, %3208 %11 = fmul fast double %6, %4209 %12 = fsub fast double %10, %11210 %13 = insertelement <2 x double> undef, double %12, i32 0211 %14 = insertelement <2 x double> %13, double %9, i32 1212 ret <2 x double> %14213}214 215attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "less-precise-fpmad"="false" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" }216