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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc %s -o - -mtriple=x86_64-unknown-linux -run-pass=twoaddressinstruction -verify-machineinstrs | FileCheck %s3# RUN: llc %s -o - -mtriple=x86_64-unknown-linux --passes=two-address-instruction -verify-each | FileCheck %s4 5# In TwoAddressInstructionPass, new instructions should be added to DistanceMap.6# In this case, function convertInstTo3Addr is called on the first ADD7# instruction, extra COPY instructions are generated. If they are not added to8# DistanceMap, function noUseAfterLastDef computes a wrong value for the later9# ADD instruction, and a different commute decision is made.10 11--- |12 ; ModuleID = 't.ll'13 source_filename = "t.ll"14 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"15 target triple = "x86_64-unknown-linux"16 17 declare i16 @llvm.sadd.sat.i16(i16, i16)18 19 define signext i16 @func16(i16 signext %x, i16 signext %y, i16 signext %z) nounwind {20 %a = mul i16 %y, %z21 %tmp = call i16 @llvm.sadd.sat.i16(i16 %x, i16 %a)22 ret i16 %tmp23 }24 25...26---27name: func1628alignment: 1629tracksRegLiveness: true30registers:31 - { id: 0, class: gr32 }32 - { id: 1, class: gr32 }33 - { id: 2, class: gr32 }34 - { id: 3, class: gr16 }35 - { id: 4, class: gr32 }36 - { id: 5, class: gr16 }37 - { id: 6, class: gr16 }38 - { id: 7, class: gr32 }39 - { id: 8, class: gr32 }40 - { id: 9, class: gr32 }41 - { id: 10, class: gr16 }42 - { id: 11, class: gr32 }43 - { id: 13, class: gr32 }44 - { id: 14, class: gr16 }45frameInfo:46 maxAlignment: 147body: |48 bb.0 :49 liveins: $edi, $esi, $edx50 ; CHECK-LABEL: name: func1651 ; CHECK: liveins: $edi, $esi, $edx52 ; CHECK-NEXT: {{ $}}53 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY killed $edx54 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY killed $esi55 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr32 = COPY killed $edi56 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gr16 = COPY killed [[COPY2]].sub_16bit57 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gr32 = COPY [[COPY1]]58 ; CHECK-NEXT: [[IMUL32rr:%[0-9]+]]:gr32 = IMUL32rr [[IMUL32rr]], killed [[COPY]], implicit-def dead $eflags59 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gr16 = COPY killed [[IMUL32rr]].sub_16bit60 ; CHECK-NEXT: [[DEF:%[0-9]+]]:gr64_nosp = IMPLICIT_DEF61 ; CHECK-NEXT: [[DEF]].sub_16bit:gr64_nosp = COPY [[COPY3]]62 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:gr64_nosp = IMPLICIT_DEF63 ; CHECK-NEXT: [[DEF1]].sub_16bit:gr64_nosp = COPY [[COPY4]]64 ; CHECK-NEXT: [[LEA64_32r:%[0-9]+]]:gr32 = LEA64_32r killed [[DEF]], 1, killed [[DEF1]], 0, $noreg65 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gr16 = COPY killed [[LEA64_32r]].sub_16bit66 ; CHECK-NEXT: [[MOVSX32rr16_:%[0-9]+]]:gr32 = MOVSX32rr16 killed [[COPY5]]67 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:gr32 = COPY [[MOVSX32rr16_]]68 ; CHECK-NEXT: [[SAR32ri:%[0-9]+]]:gr32 = SAR32ri [[SAR32ri]], 15, implicit-def dead $eflags69 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:gr32 = COPY [[SAR32ri]]70 ; CHECK-NEXT: [[XOR32ri:%[0-9]+]]:gr32 = XOR32ri [[XOR32ri]], -32768, implicit-def dead $eflags71 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:gr16 = COPY [[COPY3]]72 ; CHECK-NEXT: [[ADD16rr:%[0-9]+]]:gr16 = ADD16rr [[ADD16rr]], killed [[COPY4]], implicit-def $eflags73 ; CHECK-NEXT: undef %11.sub_16bit:gr32 = COPY killed [[ADD16rr]]74 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:gr32 = COPY [[XOR32ri]]75 ; CHECK-NEXT: [[CMOV32rr:%[0-9]+]]:gr32 = CMOV32rr [[CMOV32rr]], killed %11, 1, implicit killed $eflags76 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:gr16 = COPY killed [[CMOV32rr]].sub_16bit77 ; CHECK-NEXT: $ax = COPY killed [[COPY6]]78 ; CHECK-NEXT: RET 0, killed $ax79 %2:gr32 = COPY killed $edx80 %1:gr32 = COPY killed $esi81 %0:gr32 = COPY killed $edi82 %3:gr16 = COPY killed %0.sub_16bit:gr3283 %4:gr32 = IMUL32rr killed %1:gr32, killed %2:gr32, implicit-def dead $eflags84 %5:gr16 = COPY killed %4.sub_16bit:gr3285 %6:gr16 = ADD16rr %3:gr16, %5:gr16, implicit-def dead $eflags86 %7:gr32 = MOVSX32rr16 killed %6:gr1687 %8:gr32 = SAR32ri killed %7:gr32, 15, implicit-def dead $eflags88 %9:gr32 = XOR32ri killed %8:gr32, -32768, implicit-def dead $eflags89 %10:gr16 = ADD16rr killed %3:gr16, killed %5:gr16, implicit-def $eflags90 %11:gr32 = INSERT_SUBREG undef %12:gr32, killed %10:gr16, %subreg.sub_16bit91 %13:gr32 = CMOV32rr killed %11:gr32, killed %9:gr32, 0, implicit killed $eflags92 %14:gr16 = COPY killed %13.sub_16bit:gr3293 $ax = COPY killed %14:gr1694 RET 0, killed $ax95 96...97