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1; RUN: llc < %s | FileCheck %s2; ModuleID = '8div.c'3target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"4target triple = "x86_64-apple-macosx10.6.6"5 6define signext i8 @test_div(i8 %dividend, i8 %divisor) nounwind ssp {7entry:8 %dividend.addr = alloca i8, align 29 %divisor.addr = alloca i8, align 110 %quotient = alloca i8, align 111 store i8 %dividend, ptr %dividend.addr, align 212 store i8 %divisor, ptr %divisor.addr, align 113 %tmp = load i8, ptr %dividend.addr, align 214 %tmp1 = load i8, ptr %divisor.addr, align 115; Insist on i8->i32 zero extension, even though divb demands only i16:16; CHECK: movzbl {{.*}}%eax17; CHECK: divb18 %div = udiv i8 %tmp, %tmp119 store i8 %div, ptr %quotient, align 120 %tmp4 = load i8, ptr %quotient, align 121 ret i8 %tmp422}23