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1; RUN: llc -mcpu=skylake-avx512 -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s2; RUN: llc -mcpu=skylake-avx512 -mtriple=x86_64-unknown-linux-gnu %s -o - | llvm-mc -triple=x86_64-unknown-linux-gnu3 4; Check that the X86 domain reassignment pass doesn't introduce an illegal5; test instruction. See PR373966define void @japi1_foo2_34617(i1 %arg) {7pass2:8 br label %if59 10L174:11 %tmp = icmp sgt <2 x i64> undef, zeroinitializer12 %tmp1 = icmp sle <2 x i64> undef, undef13 %tmp2 = and <2 x i1> %tmp, %tmp114 %tmp3 = extractelement <2 x i1> %tmp2, i32 015 %tmp4 = extractelement <2 x i1> %tmp2, i32 116 %tmp106 = and i1 %tmp4, %tmp317 %tmp107 = zext i1 %tmp106 to i818 %tmp108 = and i8 %tmp122, %tmp10719 %tmp109 = icmp eq i8 %tmp108, 020; CHECK-NOT: testb {{%k[0-7]}}21 br i1 %tmp109, label %L188, label %L19022 23if5:24 %b.055 = phi i8 [ 1, %pass2 ], [ %tmp122, %if5 ]25 %tmp118 = icmp sgt i64 undef, 026 %tmp119 = icmp sle i64 undef, undef27 %tmp120 = and i1 %tmp118, %tmp11928 %tmp121 = zext i1 %tmp120 to i829 %tmp122 = and i8 %b.055, %tmp12130 br i1 %arg, label %L174, label %if531 32L188:33 unreachable34 35L190:36 ret void37}38