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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -run-pass x86-domain-reassignment -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq -o - %s | FileCheck %s3--- |4 ; ModuleID = '../test/CodeGen/X86/gpr-to-mask.ll'5 source_filename = "../test/CodeGen/X86/gpr-to-mask.ll"6 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"7 target triple = "x86_64-unknown-unknown"8 9 define void @test_fcmp_storefloat(i1 %cond, ptr %fptr, float %f1, float %f2, float %f3, float %f4, float %f5, float %f6) #0 {10 entry:11 br i1 %cond, label %if, label %else12 13 if: ; preds = %entry14 %cmp1 = fcmp oeq float %f3, %f415 br label %exit16 17 else: ; preds = %entry18 %cmp2 = fcmp oeq float %f5, %f619 br label %exit20 21 exit: ; preds = %else, %if22 %val = phi i1 [ %cmp1, %if ], [ %cmp2, %else ]23 %selected = select i1 %val, float %f1, float %f224 store float %selected, ptr %fptr25 ret void26 }27 28 define void @test_8bitops() #0 {29 ret void30 }31 define void @test_16bitops() #0 {32 ret void33 }34 define void @test_32bitops() #0 {35 ret void36 }37 define void @test_64bitops() #0 {38 ret void39 }40 define void @test_16bitext() #0 {41 ret void42 }43 define void @test_32bitext() #0 {44 ret void45 }46 define void @test_64bitext() #0 {47 ret void48 }49 ; Note that this function need to be compiled with -global-isel50 ; to obtain testable MIR51 define void @test_unused(i64 %0) #0 {52 %unused = lshr i64 %0, 753 ret void54 }55...56---57name: test_fcmp_storefloat58alignment: 1659exposesReturnsTwice: false60legalized: false61regBankSelected: false62selected: false63tracksRegLiveness: true64registers:65 - { id: 0, class: gr8, preferred-register: '' }66 - { id: 1, class: gr8, preferred-register: '' }67 - { id: 2, class: gr8, preferred-register: '' }68 - { id: 3, class: gr32, preferred-register: '' }69 - { id: 4, class: gr64, preferred-register: '' }70 - { id: 5, class: vr128x, preferred-register: '' }71 - { id: 6, class: fr32x, preferred-register: '' }72 - { id: 7, class: fr32x, preferred-register: '' }73 - { id: 8, class: fr32x, preferred-register: '' }74 - { id: 9, class: fr32x, preferred-register: '' }75 - { id: 10, class: fr32x, preferred-register: '' }76 - { id: 11, class: gr8, preferred-register: '' }77 - { id: 12, class: vk1, preferred-register: '' }78 - { id: 13, class: gr32, preferred-register: '' }79 - { id: 14, class: vk1, preferred-register: '' }80 - { id: 15, class: gr32, preferred-register: '' }81 - { id: 16, class: gr32, preferred-register: '' }82 - { id: 17, class: gr32, preferred-register: '' }83 - { id: 18, class: vk1wm, preferred-register: '' }84 - { id: 19, class: vr128x, preferred-register: '' }85 - { id: 20, class: vr128, preferred-register: '' }86 - { id: 21, class: vr128, preferred-register: '' }87 - { id: 22, class: fr32x, preferred-register: '' }88liveins:89 - { reg: '$edi', virtual-reg: '%3' }90 - { reg: '$rsi', virtual-reg: '%4' }91 - { reg: '$xmm0', virtual-reg: '%5' }92 - { reg: '$xmm1', virtual-reg: '%6' }93 - { reg: '$xmm2', virtual-reg: '%7' }94 - { reg: '$xmm3', virtual-reg: '%8' }95 - { reg: '$xmm4', virtual-reg: '%9' }96 - { reg: '$xmm5', virtual-reg: '%10' }97frameInfo:98 isFrameAddressTaken: false99 isReturnAddressTaken: false100 hasStackMap: false101 hasPatchPoint: false102 stackSize: 0103 offsetAdjustment: 0104 maxAlignment: 0105 adjustsStack: false106 hasCalls: false107 stackProtector: ''108 maxCallFrameSize: 4294967295109 hasOpaqueSPAdjustment: false110 hasVAStart: false111 hasMustTailInVarArgFunc: false112 savePoint: []113 restorePoint: []114fixedStack:115stack:116constants:117body: |118 ; CHECK-LABEL: name: test_fcmp_storefloat119 ; CHECK: bb.0.entry:120 ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)121 ; CHECK: liveins: $edi, $rsi, $xmm0, $xmm1, $xmm2, $xmm3, $xmm4, $xmm5122 ; CHECK: [[COPY:%[0-9]+]]:fr32x = COPY $xmm5123 ; CHECK: [[COPY1:%[0-9]+]]:fr32x = COPY $xmm4124 ; CHECK: [[COPY2:%[0-9]+]]:fr32x = COPY $xmm3125 ; CHECK: [[COPY3:%[0-9]+]]:fr32x = COPY $xmm2126 ; CHECK: [[COPY4:%[0-9]+]]:fr32x = COPY $xmm1127 ; CHECK: [[COPY5:%[0-9]+]]:vr128x = COPY $xmm0128 ; CHECK: [[COPY6:%[0-9]+]]:gr64 = COPY $rsi129 ; CHECK: [[COPY7:%[0-9]+]]:gr32 = COPY $edi130 ; CHECK: [[COPY8:%[0-9]+]]:gr8 = COPY [[COPY7]].sub_8bit131 ; CHECK: TEST8ri killed [[COPY8]], 1, implicit-def $eflags132 ; CHECK: JCC_1 %bb.2, 4, implicit $eflags133 ; CHECK: JMP_1 %bb.1134 ; CHECK: bb.1.if:135 ; CHECK: successors: %bb.3(0x80000000)136 ; CHECK: [[VCMPSSZrri:%[0-9]+]]:vk1 = VCMPSSZrri [[COPY3]], [[COPY2]], 0137 ; CHECK: [[COPY9:%[0-9]+]]:vk32 = COPY [[VCMPSSZrri]]138 ; CHECK: [[COPY10:%[0-9]+]]:vk8 = COPY [[COPY9]]139 ; CHECK: JMP_1 %bb.3140 ; CHECK: bb.2.else:141 ; CHECK: successors: %bb.3(0x80000000)142 ; CHECK: [[VCMPSSZrri1:%[0-9]+]]:vk1 = VCMPSSZrri [[COPY1]], [[COPY]], 0143 ; CHECK: [[COPY11:%[0-9]+]]:vk32 = COPY [[VCMPSSZrri1]]144 ; CHECK: [[COPY12:%[0-9]+]]:vk8 = COPY [[COPY11]]145 ; CHECK: bb.3.exit:146 ; CHECK: [[PHI:%[0-9]+]]:vk8 = PHI [[COPY12]], %bb.2, [[COPY10]], %bb.1147 ; CHECK: [[DEF:%[0-9]+]]:vk32 = IMPLICIT_DEF148 ; CHECK: [[COPY13:%[0-9]+]]:vk32 = COPY [[PHI]]149 ; CHECK: [[COPY14:%[0-9]+]]:vk1wm = COPY [[COPY13]]150 ; CHECK: [[COPY15:%[0-9]+]]:vr128x = COPY [[COPY4]]151 ; CHECK: [[DEF1:%[0-9]+]]:vr128 = IMPLICIT_DEF152 ; CHECK: [[VMOVSSZrrk:%[0-9]+]]:vr128 = VMOVSSZrrk [[COPY15]], killed [[COPY14]], killed [[DEF1]], [[COPY5]]153 ; CHECK: [[COPY16:%[0-9]+]]:fr32x = COPY [[VMOVSSZrrk]]154 ; CHECK: VMOVSSZmr [[COPY6]], 1, $noreg, 0, $noreg, killed [[COPY16]] :: (store (s32) into %ir.fptr)155 ; CHECK: RET 0156 bb.0.entry:157 successors: %bb.1(0x40000000), %bb.2(0x40000000)158 liveins: $edi, $rsi, $xmm0, $xmm1, $xmm2, $xmm3, $xmm4, $xmm5159 160 %10 = COPY $xmm5161 %9 = COPY $xmm4162 %8 = COPY $xmm3163 %7 = COPY $xmm2164 %6 = COPY $xmm1165 %5 = COPY $xmm0166 %4 = COPY $rsi167 %3 = COPY $edi168 %11 = COPY %3.sub_8bit169 TEST8ri killed %11, 1, implicit-def $eflags170 JCC_1 %bb.2, 4, implicit $eflags171 JMP_1 %bb.1172 173 bb.1.if:174 successors: %bb.3(0x80000000)175 176 %14 = VCMPSSZrri %7, %8, 0, implicit $mxcsr177 178 ; check that cross domain copies are replaced with same domain copies.179 180 %15 = COPY %14181 %0 = COPY %15.sub_8bit182 JMP_1 %bb.3183 184 bb.2.else:185 successors: %bb.3(0x80000000)186 %12 = VCMPSSZrri %9, %10, 0, implicit $mxcsr187 188 ; check that cross domain copies are replaced with same domain copies.189 190 %13 = COPY %12191 %1 = COPY %13.sub_8bit192 193 bb.3.exit:194 195 ; check PHI, IMPLICIT_DEF, and INSERT_SUBREG replacers.196 197 %2 = PHI %1, %bb.2, %0, %bb.1198 %17 = IMPLICIT_DEF199 %16 = INSERT_SUBREG %17, %2, %subreg.sub_8bit_hi200 %18 = COPY %16201 %19 = COPY %6202 %21 = IMPLICIT_DEF203 %20 = VMOVSSZrrk %19, killed %18, killed %21, %5204 %22 = COPY %20205 VMOVSSZmr %4, 1, $noreg, 0, $noreg, killed %22 :: (store (s32) into %ir.fptr)206 RET 0207 208...209---210name: test_8bitops211alignment: 16212exposesReturnsTwice: false213legalized: false214regBankSelected: false215selected: false216tracksRegLiveness: true217registers:218 - { id: 0, class: gr64, preferred-register: '' }219 - { id: 1, class: vr512, preferred-register: '' }220 - { id: 2, class: vr512, preferred-register: '' }221 - { id: 3, class: vr512, preferred-register: '' }222 - { id: 4, class: vr512, preferred-register: '' }223 - { id: 5, class: vk8, preferred-register: '' }224 - { id: 6, class: gr32, preferred-register: '' }225 - { id: 7, class: gr8, preferred-register: '' }226 - { id: 8, class: gr32, preferred-register: '' }227 - { id: 9, class: gr32, preferred-register: '' }228 - { id: 10, class: vk8wm, preferred-register: '' }229 - { id: 11, class: vr512, preferred-register: '' }230 - { id: 12, class: gr8, preferred-register: '' }231 - { id: 13, class: gr8, preferred-register: '' }232 - { id: 14, class: gr8, preferred-register: '' }233 - { id: 15, class: gr8, preferred-register: '' }234 - { id: 16, class: gr8, preferred-register: '' }235 - { id: 17, class: gr8, preferred-register: '' }236 - { id: 18, class: gr8, preferred-register: '' }237liveins:238 - { reg: '$rdi', virtual-reg: '%0' }239 - { reg: '$zmm0', virtual-reg: '%1' }240 - { reg: '$zmm1', virtual-reg: '%2' }241 - { reg: '$zmm2', virtual-reg: '%3' }242 - { reg: '$zmm3', virtual-reg: '%4' }243frameInfo:244 isFrameAddressTaken: false245 isReturnAddressTaken: false246 hasStackMap: false247 hasPatchPoint: false248 stackSize: 0249 offsetAdjustment: 0250 maxAlignment: 0251 adjustsStack: false252 hasCalls: false253 stackProtector: ''254 maxCallFrameSize: 4294967295255 hasOpaqueSPAdjustment: false256 hasVAStart: false257 hasMustTailInVarArgFunc: false258 savePoint: []259 restorePoint: []260fixedStack:261stack:262constants:263body: |264 ; CHECK-LABEL: name: test_8bitops265 ; CHECK: bb.0:266 ; CHECK: successors: %bb.1(0x80000000)267 ; CHECK: liveins: $rdi, $zmm0, $zmm1, $zmm2, $zmm3268 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi269 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0270 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1271 ; CHECK: [[COPY3:%[0-9]+]]:vr512 = COPY $zmm2272 ; CHECK: [[COPY4:%[0-9]+]]:vr512 = COPY $zmm3273 ; CHECK: [[VCMPPDZrri:%[0-9]+]]:vk8 = VCMPPDZrri [[COPY3]], [[COPY4]], 0274 ; CHECK: [[COPY5:%[0-9]+]]:vk32 = COPY [[VCMPPDZrri]]275 ; CHECK: [[COPY6:%[0-9]+]]:vk8 = COPY [[COPY5]]276 ; CHECK: [[KSHIFTRBki:%[0-9]+]]:vk8 = KSHIFTRBki [[COPY6]], 2277 ; CHECK: [[KSHIFTLBki:%[0-9]+]]:vk8 = KSHIFTLBki [[KSHIFTRBki]], 1278 ; CHECK: [[KNOTBkk:%[0-9]+]]:vk8 = KNOTBkk [[KSHIFTLBki]]279 ; CHECK: [[KORBkk:%[0-9]+]]:vk8 = KORBkk [[KNOTBkk]], [[KSHIFTRBki]]280 ; CHECK: [[KANDBkk:%[0-9]+]]:vk8 = KANDBkk [[KORBkk]], [[KSHIFTLBki]]281 ; CHECK: [[KXORBkk:%[0-9]+]]:vk8 = KXORBkk [[KANDBkk]], [[KSHIFTRBki]]282 ; CHECK: [[KADDBkk:%[0-9]+]]:vk8 = KADDBkk [[KXORBkk]], [[KNOTBkk]]283 ; CHECK: [[DEF:%[0-9]+]]:vk32 = IMPLICIT_DEF284 ; CHECK: [[COPY7:%[0-9]+]]:vk32 = COPY [[KADDBkk]]285 ; CHECK: [[COPY8:%[0-9]+]]:vk8wm = COPY [[COPY7]]286 ; CHECK: [[VMOVAPDZrrk:%[0-9]+]]:vr512 = VMOVAPDZrrk [[COPY2]], killed [[COPY8]], [[COPY1]]287 ; CHECK: VMOVAPDZmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVAPDZrrk]]288 ; CHECK: bb.1:289 ; CHECK: successors: %bb.2(0x80000000)290 ; CHECK: bb.2:291 ; CHECK: RET 0292 bb.0:293 liveins: $rdi, $zmm0, $zmm1, $zmm2, $zmm3294 295 %0 = COPY $rdi296 %1 = COPY $zmm0297 %2 = COPY $zmm1298 %3 = COPY $zmm2299 %4 = COPY $zmm3300 301 %5 = VCMPPDZrri %3, %4, 0, implicit $mxcsr302 %6 = COPY %5303 %7 = COPY %6.sub_8bit304 305 %12 = SHR8ri %7, 2, implicit-def dead $eflags306 %13 = SHL8ri %12, 1, implicit-def dead $eflags307 %14 = NOT8r %13308 %15 = OR8rr %14, %12, implicit-def dead $eflags309 %16 = AND8rr %15, %13, implicit-def dead $eflags310 %17 = XOR8rr %16, %12, implicit-def dead $eflags311 %18 = ADD8rr %17, %14, implicit-def dead $eflags312 313 %8 = IMPLICIT_DEF314 %9 = INSERT_SUBREG %8, %18, %subreg.sub_8bit_hi315 %10 = COPY %9316 %11 = VMOVAPDZrrk %2, killed %10, %1317 VMOVAPDZmr %0, 1, $noreg, 0, $noreg, killed %11318 319 ; FIXME We can't replace TEST with KTEST due to flag differences320 ; TEST8rr %18, %18, implicit-def $eflags321 ; JCC_1 %bb.1, 4, implicit $eflags322 ; JMP_1 %bb.2323 324 bb.1:325 326 bb.2:327 RET 0328 329...330---331name: test_16bitops332alignment: 16333exposesReturnsTwice: false334legalized: false335regBankSelected: false336selected: false337tracksRegLiveness: true338registers:339 - { id: 0, class: gr64, preferred-register: '' }340 - { id: 1, class: vr512, preferred-register: '' }341 - { id: 2, class: vr512, preferred-register: '' }342 - { id: 3, class: vr512, preferred-register: '' }343 - { id: 4, class: vr512, preferred-register: '' }344 - { id: 5, class: vk16, preferred-register: '' }345 - { id: 6, class: gr32, preferred-register: '' }346 - { id: 7, class: gr16, preferred-register: '' }347 - { id: 8, class: gr32, preferred-register: '' }348 - { id: 9, class: gr32, preferred-register: '' }349 - { id: 10, class: vk16wm, preferred-register: '' }350 - { id: 11, class: vr512, preferred-register: '' }351 - { id: 12, class: gr16, preferred-register: '' }352 - { id: 13, class: gr16, preferred-register: '' }353 - { id: 14, class: gr16, preferred-register: '' }354 - { id: 15, class: gr16, preferred-register: '' }355 - { id: 16, class: gr16, preferred-register: '' }356 - { id: 17, class: gr16, preferred-register: '' }357liveins:358 - { reg: '$rdi', virtual-reg: '%0' }359 - { reg: '$zmm0', virtual-reg: '%1' }360 - { reg: '$zmm1', virtual-reg: '%2' }361 - { reg: '$zmm2', virtual-reg: '%3' }362 - { reg: '$zmm3', virtual-reg: '%4' }363frameInfo:364 isFrameAddressTaken: false365 isReturnAddressTaken: false366 hasStackMap: false367 hasPatchPoint: false368 stackSize: 0369 offsetAdjustment: 0370 maxAlignment: 0371 adjustsStack: false372 hasCalls: false373 stackProtector: ''374 maxCallFrameSize: 4294967295375 hasOpaqueSPAdjustment: false376 hasVAStart: false377 hasMustTailInVarArgFunc: false378 savePoint: []379 restorePoint: []380fixedStack:381stack:382constants:383body: |384 ; CHECK-LABEL: name: test_16bitops385 ; CHECK: bb.0:386 ; CHECK: successors: %bb.1(0x80000000)387 ; CHECK: liveins: $rdi, $zmm0, $zmm1, $zmm2, $zmm3388 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi389 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0390 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1391 ; CHECK: [[COPY3:%[0-9]+]]:vr512 = COPY $zmm2392 ; CHECK: [[COPY4:%[0-9]+]]:vr512 = COPY $zmm3393 ; CHECK: [[VCMPPSZrri:%[0-9]+]]:vk16 = VCMPPSZrri [[COPY3]], [[COPY4]], 0394 ; CHECK: [[COPY5:%[0-9]+]]:vk32 = COPY [[VCMPPSZrri]]395 ; CHECK: [[COPY6:%[0-9]+]]:vk16 = COPY [[COPY5]]396 ; CHECK: [[KSHIFTRWki:%[0-9]+]]:vk16 = KSHIFTRWki [[COPY6]], 2397 ; CHECK: [[KSHIFTLWki:%[0-9]+]]:vk16 = KSHIFTLWki [[KSHIFTRWki]], 1398 ; CHECK: [[KNOTWkk:%[0-9]+]]:vk16 = KNOTWkk [[KSHIFTLWki]]399 ; CHECK: [[KORWkk:%[0-9]+]]:vk16 = KORWkk [[KNOTWkk]], [[KSHIFTRWki]]400 ; CHECK: [[KANDWkk:%[0-9]+]]:vk16 = KANDWkk [[KORWkk]], [[KSHIFTLWki]]401 ; CHECK: [[KXORWkk:%[0-9]+]]:vk16 = KXORWkk [[KANDWkk]], [[KSHIFTRWki]]402 ; CHECK: [[DEF:%[0-9]+]]:vk32 = IMPLICIT_DEF403 ; CHECK: [[COPY7:%[0-9]+]]:vk32 = COPY [[KXORWkk]]404 ; CHECK: [[COPY8:%[0-9]+]]:vk16wm = COPY [[COPY7]]405 ; CHECK: [[VMOVAPSZrrk:%[0-9]+]]:vr512 = VMOVAPSZrrk [[COPY2]], killed [[COPY8]], [[COPY1]]406 ; CHECK: VMOVAPSZmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVAPSZrrk]]407 ; CHECK: bb.1:408 ; CHECK: successors: %bb.2(0x80000000)409 ; CHECK: bb.2:410 ; CHECK: RET 0411 bb.0:412 liveins: $rdi, $zmm0, $zmm1, $zmm2, $zmm3413 414 %0 = COPY $rdi415 %1 = COPY $zmm0416 %2 = COPY $zmm1417 %3 = COPY $zmm2418 %4 = COPY $zmm3419 420 %5 = VCMPPSZrri %3, %4, 0, implicit $mxcsr421 %6 = COPY %5422 %7 = COPY %6.sub_16bit423 424 %12 = SHR16ri %7, 2, implicit-def dead $eflags425 %13 = SHL16ri %12, 1, implicit-def dead $eflags426 %14 = NOT16r %13427 %15 = OR16rr %14, %12, implicit-def dead $eflags428 %16 = AND16rr %15, %13, implicit-def dead $eflags429 %17 = XOR16rr %16, %12, implicit-def dead $eflags430 431 %8 = IMPLICIT_DEF432 %9 = INSERT_SUBREG %8, %17, %subreg.sub_16bit433 %10 = COPY %9434 %11 = VMOVAPSZrrk %2, killed %10, %1435 VMOVAPSZmr %0, 1, $noreg, 0, $noreg, killed %11436 437 ; FIXME We can't replace TEST with KTEST due to flag differences438 ; FIXME TEST16rr %17, %17, implicit-def $eflags439 ; FIXME JCC_1 %bb.1, 4, implicit $eflags440 ; FIXME JMP_1 %bb.2441 442 bb.1:443 444 bb.2:445 RET 0446 447...448---449name: test_32bitops450alignment: 16451exposesReturnsTwice: false452legalized: false453regBankSelected: false454selected: false455tracksRegLiveness: true456registers:457 - { id: 0, class: gr64, preferred-register: '' }458 - { id: 1, class: vr512, preferred-register: '' }459 - { id: 2, class: vr512, preferred-register: '' }460 - { id: 3, class: vk32wm, preferred-register: '' }461 - { id: 4, class: vr512, preferred-register: '' }462 - { id: 5, class: gr32, preferred-register: '' }463 - { id: 6, class: gr32, preferred-register: '' }464 - { id: 7, class: gr32, preferred-register: '' }465 - { id: 8, class: gr32, preferred-register: '' }466 - { id: 9, class: gr32, preferred-register: '' }467 - { id: 10, class: gr32, preferred-register: '' }468 - { id: 11, class: gr32, preferred-register: '' }469 - { id: 12, class: gr32, preferred-register: '' }470 - { id: 13, class: gr32, preferred-register: '' }471liveins:472 - { reg: '$rdi', virtual-reg: '%0' }473 - { reg: '$zmm0', virtual-reg: '%1' }474 - { reg: '$zmm1', virtual-reg: '%2' }475frameInfo:476 isFrameAddressTaken: false477 isReturnAddressTaken: false478 hasStackMap: false479 hasPatchPoint: false480 stackSize: 0481 offsetAdjustment: 0482 maxAlignment: 0483 adjustsStack: false484 hasCalls: false485 stackProtector: ''486 maxCallFrameSize: 4294967295487 hasOpaqueSPAdjustment: false488 hasVAStart: false489 hasMustTailInVarArgFunc: false490 savePoint: []491 restorePoint: []492fixedStack:493stack:494constants:495body: |496 ; CHECK-LABEL: name: test_32bitops497 ; CHECK: bb.0:498 ; CHECK: successors: %bb.1(0x80000000)499 ; CHECK: liveins: $rdi, $zmm0, $zmm1500 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi501 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0502 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1503 ; CHECK: [[KMOVDkm:%[0-9]+]]:vk32 = KMOVDkm [[COPY]], 1, $noreg, 0, $noreg504 ; CHECK: [[KSHIFTRDki:%[0-9]+]]:vk32 = KSHIFTRDki [[KMOVDkm]], 2505 ; CHECK: [[KSHIFTLDki:%[0-9]+]]:vk32 = KSHIFTLDki [[KSHIFTRDki]], 1506 ; CHECK: [[KNOTDkk:%[0-9]+]]:vk32 = KNOTDkk [[KSHIFTLDki]]507 ; CHECK: [[KORDkk:%[0-9]+]]:vk32 = KORDkk [[KNOTDkk]], [[KSHIFTRDki]]508 ; CHECK: [[KANDDkk:%[0-9]+]]:vk32 = KANDDkk [[KORDkk]], [[KSHIFTLDki]]509 ; CHECK: [[KXORDkk:%[0-9]+]]:vk32 = KXORDkk [[KANDDkk]], [[KSHIFTRDki]]510 ; CHECK: [[KANDNDkk:%[0-9]+]]:vk32 = KANDNDkk [[KXORDkk]], [[KORDkk]]511 ; CHECK: [[KADDDkk:%[0-9]+]]:vk32 = KADDDkk [[KANDNDkk]], [[KXORDkk]]512 ; CHECK: [[COPY3:%[0-9]+]]:vk32wm = COPY [[KADDDkk]]513 ; CHECK: [[VMOVDQU16Zrrk:%[0-9]+]]:vr512 = VMOVDQU16Zrrk [[COPY2]], killed [[COPY3]], [[COPY1]]514 ; CHECK: VMOVDQA32Zmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVDQU16Zrrk]]515 ; CHECK: bb.1:516 ; CHECK: successors: %bb.2(0x80000000)517 ; CHECK: bb.2:518 ; CHECK: RET 0519 bb.0:520 liveins: $rdi, $zmm0, $zmm1521 522 %0 = COPY $rdi523 %1 = COPY $zmm0524 %2 = COPY $zmm1525 526 %5 = MOV32rm %0, 1, $noreg, 0, $noreg527 %6 = SHR32ri %5, 2, implicit-def dead $eflags528 %7 = SHL32ri %6, 1, implicit-def dead $eflags529 %8 = NOT32r %7530 %9 = OR32rr %8, %6, implicit-def dead $eflags531 %10 = AND32rr %9, %7, implicit-def dead $eflags532 %11 = XOR32rr %10, %6, implicit-def dead $eflags533 %12 = ANDN32rr %11, %9, implicit-def dead $eflags534 %13 = ADD32rr %12, %11, implicit-def dead $eflags535 536 %3 = COPY %13537 %4 = VMOVDQU16Zrrk %2, killed %3, %1538 VMOVDQA32Zmr %0, 1, $noreg, 0, $noreg, killed %4539 540 ; FIXME We can't replace TEST with KTEST due to flag differences541 ; FIXME TEST32rr %13, %13, implicit-def $eflags542 ; FIXME JCC_1 %bb.1, 4, implicit $eflags543 ; FIXME JMP_1 %bb.2544 545 bb.1:546 547 bb.2:548 RET 0549 550...551---552name: test_64bitops553alignment: 16554exposesReturnsTwice: false555legalized: false556regBankSelected: false557selected: false558tracksRegLiveness: true559registers:560 - { id: 0, class: gr64, preferred-register: '' }561 - { id: 1, class: vr512, preferred-register: '' }562 - { id: 2, class: vr512, preferred-register: '' }563 - { id: 3, class: vk64wm, preferred-register: '' }564 - { id: 4, class: vr512, preferred-register: '' }565 - { id: 5, class: gr64, preferred-register: '' }566 - { id: 6, class: gr64, preferred-register: '' }567 - { id: 7, class: gr64, preferred-register: '' }568 - { id: 8, class: gr64, preferred-register: '' }569 - { id: 9, class: gr64, preferred-register: '' }570 - { id: 10, class: gr64, preferred-register: '' }571 - { id: 11, class: gr64, preferred-register: '' }572 - { id: 12, class: gr64, preferred-register: '' }573 - { id: 13, class: gr64, preferred-register: '' }574liveins:575 - { reg: '$rdi', virtual-reg: '%0' }576 - { reg: '$zmm0', virtual-reg: '%1' }577 - { reg: '$zmm1', virtual-reg: '%2' }578frameInfo:579 isFrameAddressTaken: false580 isReturnAddressTaken: false581 hasStackMap: false582 hasPatchPoint: false583 stackSize: 0584 offsetAdjustment: 0585 maxAlignment: 0586 adjustsStack: false587 hasCalls: false588 stackProtector: ''589 maxCallFrameSize: 4294967295590 hasOpaqueSPAdjustment: false591 hasVAStart: false592 hasMustTailInVarArgFunc: false593 savePoint: []594 restorePoint: []595fixedStack:596stack:597constants:598body: |599 ; CHECK-LABEL: name: test_64bitops600 ; CHECK: bb.0:601 ; CHECK: successors: %bb.1(0x80000000)602 ; CHECK: liveins: $rdi, $zmm0, $zmm1603 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi604 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0605 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1606 ; CHECK: [[KMOVQkm:%[0-9]+]]:vk64 = KMOVQkm [[COPY]], 1, $noreg, 0, $noreg607 ; CHECK: [[KSHIFTRQki:%[0-9]+]]:vk64 = KSHIFTRQki [[KMOVQkm]], 2608 ; CHECK: [[KSHIFTLQki:%[0-9]+]]:vk64 = KSHIFTLQki [[KSHIFTRQki]], 1609 ; CHECK: [[KNOTQkk:%[0-9]+]]:vk64 = KNOTQkk [[KSHIFTLQki]]610 ; CHECK: [[KORQkk:%[0-9]+]]:vk64 = KORQkk [[KNOTQkk]], [[KSHIFTRQki]]611 ; CHECK: [[KANDQkk:%[0-9]+]]:vk64 = KANDQkk [[KORQkk]], [[KSHIFTLQki]]612 ; CHECK: [[KXORQkk:%[0-9]+]]:vk64 = KXORQkk [[KANDQkk]], [[KSHIFTRQki]]613 ; CHECK: [[KANDNQkk:%[0-9]+]]:vk64 = KANDNQkk [[KXORQkk]], [[KORQkk]]614 ; CHECK: [[KADDQkk:%[0-9]+]]:vk64 = KADDQkk [[KANDNQkk]], [[KXORQkk]]615 ; CHECK: [[COPY3:%[0-9]+]]:vk64wm = COPY [[KADDQkk]]616 ; CHECK: [[VMOVDQU8Zrrk:%[0-9]+]]:vr512 = VMOVDQU8Zrrk [[COPY2]], killed [[COPY3]], [[COPY1]]617 ; CHECK: VMOVDQA32Zmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVDQU8Zrrk]]618 ; CHECK: bb.1:619 ; CHECK: successors: %bb.2(0x80000000)620 ; CHECK: bb.2:621 ; CHECK: RET 0622 bb.0:623 liveins: $rdi, $zmm0, $zmm1624 625 %0 = COPY $rdi626 %1 = COPY $zmm0627 %2 = COPY $zmm1628 629 %5 = MOV64rm %0, 1, $noreg, 0, $noreg630 %6 = SHR64ri %5, 2, implicit-def dead $eflags631 %7 = SHL64ri %6, 1, implicit-def dead $eflags632 %8 = NOT64r %7633 %9 = OR64rr %8, %6, implicit-def dead $eflags634 %10 = AND64rr %9, %7, implicit-def dead $eflags635 %11 = XOR64rr %10, %6, implicit-def dead $eflags636 %12 = ANDN64rr %11, %9, implicit-def dead $eflags637 %13 = ADD64rr %12, %11, implicit-def dead $eflags638 639 %3 = COPY %13640 %4 = VMOVDQU8Zrrk %2, killed %3, %1641 VMOVDQA32Zmr %0, 1, $noreg, 0, $noreg, killed %4642 643 ; FIXME We can't replace TEST with KTEST due to flag differences644 ; FIXME TEST64rr %13, %13, implicit-def $eflags645 ; FIXME JCC_1 %bb.1, 4, implicit $eflags646 ; FIXME JMP_1 %bb.2647 648 bb.1:649 650 bb.2:651 RET 0652 653...654---655name: test_16bitext656alignment: 16657exposesReturnsTwice: false658legalized: false659regBankSelected: false660selected: false661tracksRegLiveness: true662registers:663 - { id: 0, class: gr64, preferred-register: '' }664 - { id: 1, class: vr512, preferred-register: '' }665 - { id: 2, class: vr512, preferred-register: '' }666 - { id: 3, class: vk16wm, preferred-register: '' }667 - { id: 4, class: vr512, preferred-register: '' }668 - { id: 5, class: gr16, preferred-register: '' }669 - { id: 6, class: gr16, preferred-register: '' }670liveins:671 - { reg: '$rdi', virtual-reg: '%0' }672 - { reg: '$zmm0', virtual-reg: '%1' }673 - { reg: '$zmm1', virtual-reg: '%2' }674frameInfo:675 isFrameAddressTaken: false676 isReturnAddressTaken: false677 hasStackMap: false678 hasPatchPoint: false679 stackSize: 0680 offsetAdjustment: 0681 maxAlignment: 0682 adjustsStack: false683 hasCalls: false684 stackProtector: ''685 maxCallFrameSize: 4294967295686 hasOpaqueSPAdjustment: false687 hasVAStart: false688 hasMustTailInVarArgFunc: false689 savePoint: []690 restorePoint: []691fixedStack:692stack:693constants:694body: |695 bb.0:696 liveins: $rdi, $zmm0, $zmm1697 698 ; CHECK-LABEL: name: test_16bitext699 ; CHECK: liveins: $rdi, $zmm0, $zmm1700 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi701 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0702 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1703 ; CHECK: [[KMOVBkm:%[0-9]+]]:vk8 = KMOVBkm [[COPY]], 1, $noreg, 0, $noreg704 ; CHECK: [[COPY3:%[0-9]+]]:vk16 = COPY [[KMOVBkm]]705 ; CHECK: [[KNOTWkk:%[0-9]+]]:vk16 = KNOTWkk [[COPY3]]706 ; CHECK: [[COPY4:%[0-9]+]]:vk16wm = COPY [[KNOTWkk]]707 ; CHECK: [[VMOVAPSZrrk:%[0-9]+]]:vr512 = VMOVAPSZrrk [[COPY2]], killed [[COPY4]], [[COPY1]]708 ; CHECK: VMOVAPSZmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVAPSZrrk]]709 ; CHECK: RET 0710 %0 = COPY $rdi711 %1 = COPY $zmm0712 %2 = COPY $zmm1713 714 %5 = MOVZX16rm8 %0, 1, $noreg, 0, $noreg715 %6 = NOT16r %5716 717 %3 = COPY %6718 %4 = VMOVAPSZrrk %2, killed %3, %1719 VMOVAPSZmr %0, 1, $noreg, 0, $noreg, killed %4720 RET 0721 722...723---724name: test_32bitext725alignment: 16726exposesReturnsTwice: false727legalized: false728regBankSelected: false729selected: false730tracksRegLiveness: true731registers:732 - { id: 0, class: gr64, preferred-register: '' }733 - { id: 1, class: vr512, preferred-register: '' }734 - { id: 2, class: vr512, preferred-register: '' }735 - { id: 3, class: vk64wm, preferred-register: '' }736 - { id: 4, class: vr512, preferred-register: '' }737 - { id: 5, class: gr32, preferred-register: '' }738 - { id: 6, class: gr32, preferred-register: '' }739 - { id: 7, class: gr32, preferred-register: '' }740liveins:741 - { reg: '$rdi', virtual-reg: '%0' }742 - { reg: '$zmm0', virtual-reg: '%1' }743 - { reg: '$zmm1', virtual-reg: '%2' }744frameInfo:745 isFrameAddressTaken: false746 isReturnAddressTaken: false747 hasStackMap: false748 hasPatchPoint: false749 stackSize: 0750 offsetAdjustment: 0751 maxAlignment: 0752 adjustsStack: false753 hasCalls: false754 stackProtector: ''755 maxCallFrameSize: 4294967295756 hasOpaqueSPAdjustment: false757 hasVAStart: false758 hasMustTailInVarArgFunc: false759 savePoint: []760 restorePoint: []761fixedStack:762stack:763constants:764body: |765 bb.0:766 liveins: $rdi, $zmm0, $zmm1767 768 ; CHECK-LABEL: name: test_32bitext769 ; CHECK: liveins: $rdi, $zmm0, $zmm1770 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi771 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0772 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1773 ; CHECK: [[KMOVBkm:%[0-9]+]]:vk8 = KMOVBkm [[COPY]], 1, $noreg, 0, $noreg774 ; CHECK: [[COPY3:%[0-9]+]]:vk32 = COPY [[KMOVBkm]]775 ; CHECK: [[KMOVWkm:%[0-9]+]]:vk16 = KMOVWkm [[COPY]], 1, $noreg, 0, $noreg776 ; CHECK: [[COPY4:%[0-9]+]]:vk32 = COPY [[KMOVWkm]]777 ; CHECK: [[KADDDkk:%[0-9]+]]:vk32 = KADDDkk [[COPY3]], [[COPY4]]778 ; CHECK: [[COPY5:%[0-9]+]]:vk64wm = COPY [[KADDDkk]]779 ; CHECK: [[VMOVDQU16Zrrk:%[0-9]+]]:vr512 = VMOVDQU16Zrrk [[COPY2]], killed [[COPY5]], [[COPY1]]780 ; CHECK: VMOVDQA32Zmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVDQU16Zrrk]]781 ; CHECK: RET 0782 %0 = COPY $rdi783 %1 = COPY $zmm0784 %2 = COPY $zmm1785 786 %5 = MOVZX32rm8 %0, 1, $noreg, 0, $noreg787 %6 = MOVZX32rm16 %0, 1, $noreg, 0, $noreg788 %7 = ADD32rr %5, %6, implicit-def dead $eflags789 790 %3 = COPY %7791 %4 = VMOVDQU16Zrrk %2, killed %3, %1792 VMOVDQA32Zmr %0, 1, $noreg, 0, $noreg, killed %4793 RET 0794 795...796---797name: test_64bitext798alignment: 16799exposesReturnsTwice: false800legalized: false801regBankSelected: false802selected: false803tracksRegLiveness: true804registers:805 - { id: 0, class: gr64, preferred-register: '' }806 - { id: 1, class: vr512, preferred-register: '' }807 - { id: 2, class: vr512, preferred-register: '' }808 - { id: 3, class: vk64wm, preferred-register: '' }809 - { id: 4, class: vr512, preferred-register: '' }810 - { id: 5, class: gr64, preferred-register: '' }811 - { id: 6, class: gr64, preferred-register: '' }812 - { id: 7, class: gr64, preferred-register: '' }813liveins:814 - { reg: '$rdi', virtual-reg: '%0' }815 - { reg: '$zmm0', virtual-reg: '%1' }816 - { reg: '$zmm1', virtual-reg: '%2' }817frameInfo:818 isFrameAddressTaken: false819 isReturnAddressTaken: false820 hasStackMap: false821 hasPatchPoint: false822 stackSize: 0823 offsetAdjustment: 0824 maxAlignment: 0825 adjustsStack: false826 hasCalls: false827 stackProtector: ''828 maxCallFrameSize: 4294967295829 hasOpaqueSPAdjustment: false830 hasVAStart: false831 hasMustTailInVarArgFunc: false832 savePoint: []833 restorePoint: []834fixedStack:835stack:836constants:837body: |838 bb.0:839 liveins: $rdi, $zmm0, $zmm1840 841 ; CHECK-LABEL: name: test_64bitext842 ; CHECK: liveins: $rdi, $zmm0, $zmm1843 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi844 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0845 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1846 ; CHECK: [[KMOVBkm:%[0-9]+]]:vk8 = KMOVBkm [[COPY]], 1, $noreg, 0, $noreg847 ; CHECK: [[COPY3:%[0-9]+]]:vk64 = COPY [[KMOVBkm]]848 ; CHECK: [[KMOVWkm:%[0-9]+]]:vk16 = KMOVWkm [[COPY]], 1, $noreg, 0, $noreg849 ; CHECK: [[COPY4:%[0-9]+]]:vk64 = COPY [[KMOVWkm]]850 ; CHECK: [[KADDQkk:%[0-9]+]]:vk64 = KADDQkk [[COPY3]], [[COPY4]]851 ; CHECK: [[COPY5:%[0-9]+]]:vk64wm = COPY [[KADDQkk]]852 ; CHECK: [[VMOVDQU8Zrrk:%[0-9]+]]:vr512 = VMOVDQU8Zrrk [[COPY2]], killed [[COPY5]], [[COPY1]]853 ; CHECK: VMOVDQA32Zmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVDQU8Zrrk]]854 ; CHECK: RET 0855 %0 = COPY $rdi856 %1 = COPY $zmm0857 %2 = COPY $zmm1858 859 %5 = MOVZX64rm8 %0, 1, $noreg, 0, $noreg860 %6 = MOVZX64rm16 %0, 1, $noreg, 0, $noreg861 %7 = ADD64rr %5, %6, implicit-def dead $eflags862 863 %3 = COPY %7864 %4 = VMOVDQU8Zrrk %2, killed %3, %1865 VMOVDQA32Zmr %0, 1, $noreg, 0, $noreg, killed %4866 RET 0867 868...869---870name: test_unused871alignment: 16872exposesReturnsTwice: false873legalized: true874regBankSelected: true875selected: true876failedISel: false877tracksRegLiveness: true878hasWinCFI: false879callsEHReturn: false880callsUnwindInit: false881hasEHContTarget: false882hasEHScopes: false883hasEHFunclets: false884isOutlined: false885debugInstrRef: false886failsVerification: false887tracksDebugUserValues: false888registers:889# Note that this test is supposed to have registers without classes890 - { id: 0, class: _, preferred-register: '' }891 - { id: 1, class: _, preferred-register: '' }892 - { id: 2, class: _, preferred-register: '' }893liveins:894 - { reg: '$rdi', virtual-reg: '' }895frameInfo:896 isFrameAddressTaken: false897 isReturnAddressTaken: false898 hasStackMap: false899 hasPatchPoint: false900 stackSize: 0901 offsetAdjustment: 0902 maxAlignment: 1903 adjustsStack: false904 hasCalls: false905 stackProtector: ''906 functionContext: ''907 maxCallFrameSize: 4294967295908 cvBytesOfCalleeSavedRegisters: 0909 hasOpaqueSPAdjustment: false910 hasVAStart: false911 hasMustTailInVarArgFunc: false912 hasTailCall: false913 localFrameSize: 0914 savePoint: []915 restorePoint: []916fixedStack: []917stack: []918entry_values: []919callSites: []920debugValueSubstitutions: []921constants: []922machineFunctionInfo: {}923body: |924 bb.1 (%ir-block.1):925 liveins: $rdi926 927 RET 0928 929...930