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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx,+f16c -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX,X863; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+f16c -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX,X644; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX512VL,X86-AVX512VL5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX512VL,X64-AVX512VL6 7define <8 x i16> @test_x86_vcvtps2ph_128(<4 x float> %a0) {8; AVX-LABEL: test_x86_vcvtps2ph_128:9; AVX: # %bb.0:10; AVX-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # encoding: [0xc4,0xe3,0x79,0x1d,0xc0,0x00]11; AVX-NEXT: ret{{[l|q]}} # encoding: [0xc3]12;13; AVX512VL-LABEL: test_x86_vcvtps2ph_128:14; AVX512VL: # %bb.0:15; AVX512VL-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x1d,0xc0,0x00]16; AVX512VL-NEXT: ret{{[l|q]}} # encoding: [0xc3]17 %res = call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %a0, i32 0) ; <<8 x i16>> [#uses=1]18 ret <8 x i16> %res19}20declare <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float>, i32) nounwind readonly21 22define <8 x i16> @test_x86_vcvtps2ph_256(<8 x float> %a0) {23; AVX-LABEL: test_x86_vcvtps2ph_256:24; AVX: # %bb.0:25; AVX-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # encoding: [0xc4,0xe3,0x7d,0x1d,0xc0,0x00]26; AVX-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]27; AVX-NEXT: ret{{[l|q]}} # encoding: [0xc3]28;29; AVX512VL-LABEL: test_x86_vcvtps2ph_256:30; AVX512VL: # %bb.0:31; AVX512VL-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x1d,0xc0,0x00]32; AVX512VL-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]33; AVX512VL-NEXT: ret{{[l|q]}} # encoding: [0xc3]34 %res = call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %a0, i32 0) ; <<8 x i16>> [#uses=1]35 ret <8 x i16> %res36}37declare <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float>, i32) nounwind readonly38 39 40define void @test_x86_vcvtps2ph_256_m(ptr nocapture %d, <8 x float> %a) nounwind {41; X86-LABEL: test_x86_vcvtps2ph_256_m:42; X86: # %bb.0: # %entry43; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]44; X86-NEXT: vcvtps2ph $3, %ymm0, (%eax) # encoding: [0xc4,0xe3,0x7d,0x1d,0x00,0x03]45; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]46; X86-NEXT: retl # encoding: [0xc3]47;48; X64-LABEL: test_x86_vcvtps2ph_256_m:49; X64: # %bb.0: # %entry50; X64-NEXT: vcvtps2ph $3, %ymm0, (%rdi) # encoding: [0xc4,0xe3,0x7d,0x1d,0x07,0x03]51; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]52; X64-NEXT: retq # encoding: [0xc3]53;54; X86-AVX512VL-LABEL: test_x86_vcvtps2ph_256_m:55; X86-AVX512VL: # %bb.0: # %entry56; X86-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]57; X86-AVX512VL-NEXT: vcvtps2ph $3, %ymm0, (%eax) # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x1d,0x00,0x03]58; X86-AVX512VL-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]59; X86-AVX512VL-NEXT: retl # encoding: [0xc3]60;61; X64-AVX512VL-LABEL: test_x86_vcvtps2ph_256_m:62; X64-AVX512VL: # %bb.0: # %entry63; X64-AVX512VL-NEXT: vcvtps2ph $3, %ymm0, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x1d,0x07,0x03]64; X64-AVX512VL-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]65; X64-AVX512VL-NEXT: retq # encoding: [0xc3]66entry:67 %0 = tail call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %a, i32 3)68 store <8 x i16> %0, ptr %d, align 1669 ret void70}71 72define void @test_x86_vcvtps2ph_128_m(ptr nocapture %d, <4 x float> %a) nounwind {73; X86-LABEL: test_x86_vcvtps2ph_128_m:74; X86: # %bb.0: # %entry75; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]76; X86-NEXT: vcvtps2ph $3, %xmm0, (%eax) # encoding: [0xc4,0xe3,0x79,0x1d,0x00,0x03]77; X86-NEXT: retl # encoding: [0xc3]78;79; X64-LABEL: test_x86_vcvtps2ph_128_m:80; X64: # %bb.0: # %entry81; X64-NEXT: vcvtps2ph $3, %xmm0, (%rdi) # encoding: [0xc4,0xe3,0x79,0x1d,0x07,0x03]82; X64-NEXT: retq # encoding: [0xc3]83;84; X86-AVX512VL-LABEL: test_x86_vcvtps2ph_128_m:85; X86-AVX512VL: # %bb.0: # %entry86; X86-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]87; X86-AVX512VL-NEXT: vcvtps2ph $3, %xmm0, (%eax) # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x1d,0x00,0x03]88; X86-AVX512VL-NEXT: retl # encoding: [0xc3]89;90; X64-AVX512VL-LABEL: test_x86_vcvtps2ph_128_m:91; X64-AVX512VL: # %bb.0: # %entry92; X64-AVX512VL-NEXT: vcvtps2ph $3, %xmm0, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x1d,0x07,0x03]93; X64-AVX512VL-NEXT: retq # encoding: [0xc3]94entry:95 %0 = tail call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %a, i32 3)96 %1 = shufflevector <8 x i16> %0, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>97 store <4 x i16> %1, ptr %d, align 898 ret void99}100 101define void @test_x86_vcvtps2ph_128_m2(ptr nocapture %hf4x16, <4 x float> %f4X86) #0 {102; X86-LABEL: test_x86_vcvtps2ph_128_m2:103; X86: # %bb.0: # %entry104; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]105; X86-NEXT: vcvtps2ph $3, %xmm0, (%eax) # encoding: [0xc4,0xe3,0x79,0x1d,0x00,0x03]106; X86-NEXT: retl # encoding: [0xc3]107;108; X64-LABEL: test_x86_vcvtps2ph_128_m2:109; X64: # %bb.0: # %entry110; X64-NEXT: vcvtps2ph $3, %xmm0, (%rdi) # encoding: [0xc4,0xe3,0x79,0x1d,0x07,0x03]111; X64-NEXT: retq # encoding: [0xc3]112;113; X86-AVX512VL-LABEL: test_x86_vcvtps2ph_128_m2:114; X86-AVX512VL: # %bb.0: # %entry115; X86-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]116; X86-AVX512VL-NEXT: vcvtps2ph $3, %xmm0, (%eax) # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x1d,0x00,0x03]117; X86-AVX512VL-NEXT: retl # encoding: [0xc3]118;119; X64-AVX512VL-LABEL: test_x86_vcvtps2ph_128_m2:120; X64-AVX512VL: # %bb.0: # %entry121; X64-AVX512VL-NEXT: vcvtps2ph $3, %xmm0, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x1d,0x07,0x03]122; X64-AVX512VL-NEXT: retq # encoding: [0xc3]123entry:124 %0 = tail call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %f4X86, i32 3)125 %1 = bitcast <8 x i16> %0 to <2 x double>126 %vecext = extractelement <2 x double> %1, i32 0127 store double %vecext, ptr %hf4x16, align 8128 ret void129}130 131define void @test_x86_vcvtps2ph_128_m3(ptr nocapture %hf4x16, <4 x float> %f4X86) #0 {132; X86-LABEL: test_x86_vcvtps2ph_128_m3:133; X86: # %bb.0: # %entry134; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]135; X86-NEXT: vcvtps2ph $3, %xmm0, (%eax) # encoding: [0xc4,0xe3,0x79,0x1d,0x00,0x03]136; X86-NEXT: retl # encoding: [0xc3]137;138; X64-LABEL: test_x86_vcvtps2ph_128_m3:139; X64: # %bb.0: # %entry140; X64-NEXT: vcvtps2ph $3, %xmm0, (%rdi) # encoding: [0xc4,0xe3,0x79,0x1d,0x07,0x03]141; X64-NEXT: retq # encoding: [0xc3]142;143; X86-AVX512VL-LABEL: test_x86_vcvtps2ph_128_m3:144; X86-AVX512VL: # %bb.0: # %entry145; X86-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]146; X86-AVX512VL-NEXT: vcvtps2ph $3, %xmm0, (%eax) # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x1d,0x00,0x03]147; X86-AVX512VL-NEXT: retl # encoding: [0xc3]148;149; X64-AVX512VL-LABEL: test_x86_vcvtps2ph_128_m3:150; X64-AVX512VL: # %bb.0: # %entry151; X64-AVX512VL-NEXT: vcvtps2ph $3, %xmm0, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x1d,0x07,0x03]152; X64-AVX512VL-NEXT: retq # encoding: [0xc3]153entry:154 %0 = tail call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %f4X86, i32 3)155 %1 = bitcast <8 x i16> %0 to <2 x i64>156 %vecext = extractelement <2 x i64> %1, i32 0157 store i64 %vecext, ptr %hf4x16, align 8158 ret void159}160