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1; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -fast-isel -fast-isel-abort=1 -asm-verbose=0 | FileCheck %s2;3; Bitcasts between 256-bit vector types are no-ops since no instruction is4; needed for the conversion.5 6define <4 x i64> @v8i32_to_v4i64(<8 x i32> %a) {7;CHECK-LABEL: v8i32_to_v4i64:8;CHECK-NEXT: .cfi_startproc9;CHECK-NEXT: ret10 %1 = bitcast <8 x i32> %a to <4 x i64>11 ret <4 x i64> %112}13 14define <4 x i64> @v16i16_to_v4i64(<16 x i16> %a) {15;CHECK-LABEL: v16i16_to_v4i64:16;CHECK-NEXT: .cfi_startproc17;CHECK-NEXT: ret18 %1 = bitcast <16 x i16> %a to <4 x i64>19 ret <4 x i64> %120}21 22define <4 x i64> @v32i8_to_v4i64(<32 x i8> %a) {23;CHECK-LABEL: v32i8_to_v4i64:24;CHECK-NEXT: .cfi_startproc25;CHECK-NEXT: ret26 %1 = bitcast <32 x i8> %a to <4 x i64>27 ret <4 x i64> %128}29 30define <4 x i64> @v4f64_to_v4i64(<4 x double> %a) {31;CHECK-LABEL: v4f64_to_v4i64:32;CHECK-NEXT: .cfi_startproc33;CHECK-NEXT: ret34 %1 = bitcast <4 x double> %a to <4 x i64>35 ret <4 x i64> %136}37 38define <4 x i64> @v8f32_to_v4i64(<8 x float> %a) {39;CHECK-LABEL: v8f32_to_v4i64:40;CHECK-NEXT: .cfi_startproc41;CHECK-NEXT: ret42 %1 = bitcast <8 x float> %a to <4 x i64>43 ret <4 x i64> %144}45 46define <8 x i32> @v4i64_to_v8i32(<4 x i64> %a) {47;CHECK-LABEL: v4i64_to_v8i32:48;CHECK-NEXT: .cfi_startproc49;CHECK-NEXT: ret50 %1 = bitcast <4 x i64> %a to <8 x i32>51 ret <8 x i32> %152}53 54define <8 x i32> @v16i16_to_v8i32(<16 x i16> %a) {55;CHECK-LABEL: v16i16_to_v8i32:56;CHECK-NEXT: .cfi_startproc57;CHECK-NEXT: ret58 %1 = bitcast <16 x i16> %a to <8 x i32>59 ret <8 x i32> %160}61 62define <8 x i32> @v32i8_to_v8i32(<32 x i8> %a) {63;CHECK-LABEL: v32i8_to_v8i32:64;CHECK-NEXT: .cfi_startproc65;CHECK-NEXT: ret66 %1 = bitcast <32 x i8> %a to <8 x i32>67 ret <8 x i32> %168}69 70define <8 x i32> @v4f64_to_v8i32(<4 x double> %a) {71;CHECK-LABEL: v4f64_to_v8i32:72;CHECK-NEXT: .cfi_startproc73;CHECK-NEXT: ret74 %1 = bitcast <4 x double> %a to <8 x i32>75 ret <8 x i32> %176}77 78define <8 x i32> @v8f32_to_v8i32(<8 x float> %a) {79;CHECK-LABEL: v8f32_to_v8i32:80;CHECK-NEXT: .cfi_startproc81;CHECK-NEXT: ret82 %1 = bitcast <8 x float> %a to <8 x i32>83 ret <8 x i32> %184}85 86define <16 x i16> @v4i64_to_v16i16(<4 x i64> %a) {87;CHECK-LABEL: v4i64_to_v16i16:88;CHECK-NEXT: .cfi_startproc89;CHECK-NEXT: ret90 %1 = bitcast <4 x i64> %a to <16 x i16>91 ret <16 x i16> %192}93 94define <16 x i16> @v8i32_to_v16i16(<8 x i32> %a) {95;CHECK-LABEL: v8i32_to_v16i16:96;CHECK-NEXT: .cfi_startproc97;CHECK-NEXT: ret98 %1 = bitcast <8 x i32> %a to <16 x i16>99 ret <16 x i16> %1100}101 102define <16 x i16> @v32i8_to_v16i16(<32 x i8> %a) {103;CHECK-LABEL: v32i8_to_v16i16:104;CHECK-NEXT: .cfi_startproc105;CHECK-NEXT: ret106 %1 = bitcast <32 x i8> %a to <16 x i16>107 ret <16 x i16> %1108}109 110define <16 x i16> @v4f64_to_v16i16(<4 x double> %a) {111;CHECK-LABEL: v4f64_to_v16i16:112;CHECK-NEXT: .cfi_startproc113;CHECK-NEXT: ret114 %1 = bitcast <4 x double> %a to <16 x i16>115 ret <16 x i16> %1116}117 118define <16 x i16> @v8f32_to_v16i16(<8 x float> %a) {119;CHECK-LABEL: v8f32_to_v16i16:120;CHECK-NEXT: .cfi_startproc121;CHECK-NEXT: ret122 %1 = bitcast <8 x float> %a to <16 x i16>123 ret <16 x i16> %1124}125 126define <32 x i8> @v16i16_to_v32i8(<16 x i16> %a) {127;CHECK-LABEL: v16i16_to_v32i8:128;CHECK-NEXT: .cfi_startproc129;CHECK-NEXT: ret130 %1 = bitcast <16 x i16> %a to <32 x i8>131 ret <32 x i8> %1132}133 134define <32 x i8> @v4i64_to_v32i8(<4 x i64> %a) {135;CHECK-LABEL: v4i64_to_v32i8:136;CHECK-NEXT: .cfi_startproc137;CHECK-NEXT: ret138 %1 = bitcast <4 x i64> %a to <32 x i8>139 ret <32 x i8> %1140}141 142define <32 x i8> @v8i32_to_v32i8(<8 x i32> %a) {143;CHECK-LABEL: v8i32_to_v32i8:144;CHECK-NEXT: .cfi_startproc145;CHECK-NEXT: ret146 %1 = bitcast <8 x i32> %a to <32 x i8>147 ret <32 x i8> %1148}149 150define <32 x i8> @v4f64_to_v32i8(<4 x double> %a) {151;CHECK-LABEL: v4f64_to_v32i8:152;CHECK-NEXT: .cfi_startproc153;CHECK-NEXT: ret154 %1 = bitcast <4 x double> %a to <32 x i8>155 ret <32 x i8> %1156}157 158define <32 x i8> @v8f32_to_v32i8(<8 x float> %a) {159;CHECK-LABEL: v8f32_to_v32i8:160;CHECK-NEXT: .cfi_startproc161;CHECK-NEXT: ret162 %1 = bitcast <8 x float> %a to <32 x i8>163 ret <32 x i8> %1164}165 166define <8 x float> @v32i8_to_v8f32(<32 x i8> %a) {167;CHECK-LABEL: v32i8_to_v8f32:168;CHECK-NEXT: .cfi_startproc169;CHECK-NEXT: ret170 %1 = bitcast <32 x i8> %a to <8 x float>171 ret <8 x float> %1172}173 174define <8 x float> @v16i16_to_v8f32(<16 x i16> %a) {175;CHECK-LABEL: v16i16_to_v8f32:176;CHECK-NEXT: .cfi_startproc177;CHECK-NEXT: ret178 %1 = bitcast <16 x i16> %a to <8 x float>179 ret <8 x float> %1180}181 182define <8 x float> @v4i64_to_v8f32(<4 x i64> %a) {183;CHECK-LABEL: v4i64_to_v8f32:184;CHECK-NEXT: .cfi_startproc185;CHECK-NEXT: ret186 %1 = bitcast <4 x i64> %a to <8 x float>187 ret <8 x float> %1188}189 190define <8 x float> @v8i32_to_v8f32(<8 x i32> %a) {191;CHECK-LABEL: v8i32_to_v8f32:192;CHECK-NEXT: .cfi_startproc193;CHECK-NEXT: ret194 %1 = bitcast <8 x i32> %a to <8 x float>195 ret <8 x float> %1196}197 198define <8 x float> @v4f64_to_v8f32(<4 x double> %a) {199;CHECK-LABEL: v4f64_to_v8f32:200;CHECK-NEXT: .cfi_startproc201;CHECK-NEXT: ret202 %1 = bitcast <4 x double> %a to <8 x float>203 ret <8 x float> %1204}205 206define <4 x double> @v8f32_to_v4f64(<8 x float> %a) {207;CHECK-LABEL: v8f32_to_v4f64:208;CHECK-NEXT: .cfi_startproc209;CHECK-NEXT: ret210 %1 = bitcast <8 x float> %a to <4 x double>211 ret <4 x double> %1212}213 214define <4 x double> @v32i8_to_v4f64(<32 x i8> %a) {215;CHECK-LABEL: v32i8_to_v4f64:216;CHECK-NEXT: .cfi_startproc217;CHECK-NEXT: ret218 %1 = bitcast <32 x i8> %a to <4 x double>219 ret <4 x double> %1220}221 222define <4 x double> @v16i16_to_v4f64(<16 x i16> %a) {223;CHECK-LABEL: v16i16_to_v4f64:224;CHECK-NEXT: .cfi_startproc225;CHECK-NEXT: ret226 %1 = bitcast <16 x i16> %a to <4 x double>227 ret <4 x double> %1228}229 230define <4 x double> @v4i64_to_v4f64(<4 x i64> %a) {231;CHECK-LABEL: v4i64_to_v4f64:232;CHECK-NEXT: .cfi_startproc233;CHECK-NEXT: ret234 %1 = bitcast <4 x i64> %a to <4 x double>235 ret <4 x double> %1236}237 238define <4 x double> @v8i32_to_v4f64(<8 x i32> %a) {239;CHECK-LABEL: v8i32_to_v4f64:240;CHECK-NEXT: .cfi_startproc241;CHECK-NEXT: ret242 %1 = bitcast <8 x i32> %a to <4 x double>243 ret <4 x double> %1244}245